[PATCH] changing CONFIG_LOCALVERSION rebuilds too much, for no good reason
[linux-2.6] / drivers / net / gianfar.c
1 /*
2  * drivers/net/gianfar.c
3  *
4  * Gianfar Ethernet Driver
5  * Driver for FEC on MPC8540 and TSEC on MPC8540/MPC8560
6  * Based on 8260_io/fcc_enet.c
7  *
8  * Author: Andy Fleming
9  * Maintainer: Kumar Gala (kumar.gala@freescale.com)
10  *
11  * Copyright (c) 2002-2004 Freescale Semiconductor, Inc.
12  *
13  * This program is free software; you can redistribute  it and/or modify it
14  * under  the terms of  the GNU General  Public License as published by the
15  * Free Software Foundation;  either version 2 of the  License, or (at your
16  * option) any later version.
17  *
18  *  Gianfar:  AKA Lambda Draconis, "Dragon"
19  *  RA 11 31 24.2
20  *  Dec +69 19 52
21  *  V 3.84
22  *  B-V +1.62
23  *
24  *  Theory of operation
25  *  This driver is designed for the non-CPM ethernet controllers
26  *  on the 85xx and 83xx family of integrated processors
27  *
28  *  The driver is initialized through platform_device.  Structures which
29  *  define the configuration needed by the board are defined in a
30  *  board structure in arch/ppc/platforms (though I do not
31  *  discount the possibility that other architectures could one
32  *  day be supported.
33  *
34  *  The Gianfar Ethernet Controller uses a ring of buffer
35  *  descriptors.  The beginning is indicated by a register
36  *  pointing to the physical address of the start of the ring.
37  *  The end is determined by a "wrap" bit being set in the
38  *  last descriptor of the ring.
39  *
40  *  When a packet is received, the RXF bit in the
41  *  IEVENT register is set, triggering an interrupt when the
42  *  corresponding bit in the IMASK register is also set (if
43  *  interrupt coalescing is active, then the interrupt may not
44  *  happen immediately, but will wait until either a set number
45  *  of frames or amount of time have passed).  In NAPI, the
46  *  interrupt handler will signal there is work to be done, and
47  *  exit.  Without NAPI, the packet(s) will be handled
48  *  immediately.  Both methods will start at the last known empty
49  *  descriptor, and process every subsequent descriptor until there
50  *  are none left with data (NAPI will stop after a set number of
51  *  packets to give time to other tasks, but will eventually
52  *  process all the packets).  The data arrives inside a
53  *  pre-allocated skb, and so after the skb is passed up to the
54  *  stack, a new skb must be allocated, and the address field in
55  *  the buffer descriptor must be updated to indicate this new
56  *  skb.
57  *
58  *  When the kernel requests that a packet be transmitted, the
59  *  driver starts where it left off last time, and points the
60  *  descriptor at the buffer which was passed in.  The driver
61  *  then informs the DMA engine that there are packets ready to
62  *  be transmitted.  Once the controller is finished transmitting
63  *  the packet, an interrupt may be triggered (under the same
64  *  conditions as for reception, but depending on the TXF bit).
65  *  The driver then cleans up the buffer.
66  */
67
68 #include <linux/config.h>
69 #include <linux/kernel.h>
70 #include <linux/sched.h>
71 #include <linux/string.h>
72 #include <linux/errno.h>
73 #include <linux/unistd.h>
74 #include <linux/slab.h>
75 #include <linux/interrupt.h>
76 #include <linux/init.h>
77 #include <linux/delay.h>
78 #include <linux/netdevice.h>
79 #include <linux/etherdevice.h>
80 #include <linux/skbuff.h>
81 #include <linux/if_vlan.h>
82 #include <linux/spinlock.h>
83 #include <linux/mm.h>
84 #include <linux/platform_device.h>
85 #include <linux/ip.h>
86 #include <linux/tcp.h>
87 #include <linux/udp.h>
88
89 #include <asm/io.h>
90 #include <asm/irq.h>
91 #include <asm/uaccess.h>
92 #include <linux/module.h>
93 #include <linux/dma-mapping.h>
94 #include <linux/crc32.h>
95 #include <linux/mii.h>
96 #include <linux/phy.h>
97
98 #include "gianfar.h"
99 #include "gianfar_mii.h"
100
101 #define TX_TIMEOUT      (1*HZ)
102 #define SKB_ALLOC_TIMEOUT 1000000
103 #undef BRIEF_GFAR_ERRORS
104 #undef VERBOSE_GFAR_ERRORS
105
106 #ifdef CONFIG_GFAR_NAPI
107 #define RECEIVE(x) netif_receive_skb(x)
108 #else
109 #define RECEIVE(x) netif_rx(x)
110 #endif
111
112 const char gfar_driver_name[] = "Gianfar Ethernet";
113 const char gfar_driver_version[] = "1.2";
114
115 static int gfar_enet_open(struct net_device *dev);
116 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev);
117 static void gfar_timeout(struct net_device *dev);
118 static int gfar_close(struct net_device *dev);
119 struct sk_buff *gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp);
120 static struct net_device_stats *gfar_get_stats(struct net_device *dev);
121 static int gfar_set_mac_address(struct net_device *dev);
122 static int gfar_change_mtu(struct net_device *dev, int new_mtu);
123 static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs);
124 static irqreturn_t gfar_transmit(int irq, void *dev_id, struct pt_regs *regs);
125 static irqreturn_t gfar_interrupt(int irq, void *dev_id, struct pt_regs *regs);
126 static void adjust_link(struct net_device *dev);
127 static void init_registers(struct net_device *dev);
128 static int init_phy(struct net_device *dev);
129 static int gfar_probe(struct device *device);
130 static int gfar_remove(struct device *device);
131 static void free_skb_resources(struct gfar_private *priv);
132 static void gfar_set_multi(struct net_device *dev);
133 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr);
134 #ifdef CONFIG_GFAR_NAPI
135 static int gfar_poll(struct net_device *dev, int *budget);
136 #endif
137 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit);
138 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb, int length);
139 static void gfar_vlan_rx_register(struct net_device *netdev,
140                                 struct vlan_group *grp);
141 static void gfar_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
142
143 extern struct ethtool_ops gfar_ethtool_ops;
144
145 MODULE_AUTHOR("Freescale Semiconductor, Inc");
146 MODULE_DESCRIPTION("Gianfar Ethernet Driver");
147 MODULE_LICENSE("GPL");
148
149 int gfar_uses_fcb(struct gfar_private *priv)
150 {
151         if (priv->vlan_enable || priv->rx_csum_enable)
152                 return 1;
153         else
154                 return 0;
155 }
156
157 /* Set up the ethernet device structure, private data,
158  * and anything else we need before we start */
159 static int gfar_probe(struct device *device)
160 {
161         u32 tempval;
162         struct net_device *dev = NULL;
163         struct gfar_private *priv = NULL;
164         struct platform_device *pdev = to_platform_device(device);
165         struct gianfar_platform_data *einfo;
166         struct resource *r;
167         int idx;
168         int err = 0;
169
170         einfo = (struct gianfar_platform_data *) pdev->dev.platform_data;
171
172         if (NULL == einfo) {
173                 printk(KERN_ERR "gfar %d: Missing additional data!\n",
174                        pdev->id);
175
176                 return -ENODEV;
177         }
178
179         /* Create an ethernet device instance */
180         dev = alloc_etherdev(sizeof (*priv));
181
182         if (NULL == dev)
183                 return -ENOMEM;
184
185         priv = netdev_priv(dev);
186
187         /* Set the info in the priv to the current info */
188         priv->einfo = einfo;
189
190         /* fill out IRQ fields */
191         if (einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
192                 priv->interruptTransmit = platform_get_irq_byname(pdev, "tx");
193                 priv->interruptReceive = platform_get_irq_byname(pdev, "rx");
194                 priv->interruptError = platform_get_irq_byname(pdev, "error");
195         } else {
196                 priv->interruptTransmit = platform_get_irq(pdev, 0);
197         }
198
199         /* get a pointer to the register memory */
200         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
201         priv->regs = (struct gfar *)
202                 ioremap(r->start, sizeof (struct gfar));
203
204         if (NULL == priv->regs) {
205                 err = -ENOMEM;
206                 goto regs_fail;
207         }
208
209         spin_lock_init(&priv->lock);
210
211         dev_set_drvdata(device, dev);
212
213         /* Stop the DMA engine now, in case it was running before */
214         /* (The firmware could have used it, and left it running). */
215         /* To do this, we write Graceful Receive Stop and Graceful */
216         /* Transmit Stop, and then wait until the corresponding bits */
217         /* in IEVENT indicate the stops have completed. */
218         tempval = gfar_read(&priv->regs->dmactrl);
219         tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
220         gfar_write(&priv->regs->dmactrl, tempval);
221
222         tempval = gfar_read(&priv->regs->dmactrl);
223         tempval |= (DMACTRL_GRS | DMACTRL_GTS);
224         gfar_write(&priv->regs->dmactrl, tempval);
225
226         while (!(gfar_read(&priv->regs->ievent) & (IEVENT_GRSC | IEVENT_GTSC)))
227                 cpu_relax();
228
229         /* Reset MAC layer */
230         gfar_write(&priv->regs->maccfg1, MACCFG1_SOFT_RESET);
231
232         tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
233         gfar_write(&priv->regs->maccfg1, tempval);
234
235         /* Initialize MACCFG2. */
236         gfar_write(&priv->regs->maccfg2, MACCFG2_INIT_SETTINGS);
237
238         /* Initialize ECNTRL */
239         gfar_write(&priv->regs->ecntrl, ECNTRL_INIT_SETTINGS);
240
241         /* Copy the station address into the dev structure, */
242         memcpy(dev->dev_addr, einfo->mac_addr, MAC_ADDR_LEN);
243
244         /* Set the dev->base_addr to the gfar reg region */
245         dev->base_addr = (unsigned long) (priv->regs);
246
247         SET_MODULE_OWNER(dev);
248         SET_NETDEV_DEV(dev, device);
249
250         /* Fill in the dev structure */
251         dev->open = gfar_enet_open;
252         dev->hard_start_xmit = gfar_start_xmit;
253         dev->tx_timeout = gfar_timeout;
254         dev->watchdog_timeo = TX_TIMEOUT;
255 #ifdef CONFIG_GFAR_NAPI
256         dev->poll = gfar_poll;
257         dev->weight = GFAR_DEV_WEIGHT;
258 #endif
259         dev->stop = gfar_close;
260         dev->get_stats = gfar_get_stats;
261         dev->change_mtu = gfar_change_mtu;
262         dev->mtu = 1500;
263         dev->set_multicast_list = gfar_set_multi;
264
265         dev->ethtool_ops = &gfar_ethtool_ops;
266
267         if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_CSUM) {
268                 priv->rx_csum_enable = 1;
269                 dev->features |= NETIF_F_IP_CSUM;
270         } else
271                 priv->rx_csum_enable = 0;
272
273         priv->vlgrp = NULL;
274
275         if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_VLAN) {
276                 dev->vlan_rx_register = gfar_vlan_rx_register;
277                 dev->vlan_rx_kill_vid = gfar_vlan_rx_kill_vid;
278
279                 dev->features |= NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_RX;
280
281                 priv->vlan_enable = 1;
282         }
283
284         if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_EXTENDED_HASH) {
285                 priv->extended_hash = 1;
286                 priv->hash_width = 9;
287
288                 priv->hash_regs[0] = &priv->regs->igaddr0;
289                 priv->hash_regs[1] = &priv->regs->igaddr1;
290                 priv->hash_regs[2] = &priv->regs->igaddr2;
291                 priv->hash_regs[3] = &priv->regs->igaddr3;
292                 priv->hash_regs[4] = &priv->regs->igaddr4;
293                 priv->hash_regs[5] = &priv->regs->igaddr5;
294                 priv->hash_regs[6] = &priv->regs->igaddr6;
295                 priv->hash_regs[7] = &priv->regs->igaddr7;
296                 priv->hash_regs[8] = &priv->regs->gaddr0;
297                 priv->hash_regs[9] = &priv->regs->gaddr1;
298                 priv->hash_regs[10] = &priv->regs->gaddr2;
299                 priv->hash_regs[11] = &priv->regs->gaddr3;
300                 priv->hash_regs[12] = &priv->regs->gaddr4;
301                 priv->hash_regs[13] = &priv->regs->gaddr5;
302                 priv->hash_regs[14] = &priv->regs->gaddr6;
303                 priv->hash_regs[15] = &priv->regs->gaddr7;
304
305         } else {
306                 priv->extended_hash = 0;
307                 priv->hash_width = 8;
308
309                 priv->hash_regs[0] = &priv->regs->gaddr0;
310                 priv->hash_regs[1] = &priv->regs->gaddr1;
311                 priv->hash_regs[2] = &priv->regs->gaddr2;
312                 priv->hash_regs[3] = &priv->regs->gaddr3;
313                 priv->hash_regs[4] = &priv->regs->gaddr4;
314                 priv->hash_regs[5] = &priv->regs->gaddr5;
315                 priv->hash_regs[6] = &priv->regs->gaddr6;
316                 priv->hash_regs[7] = &priv->regs->gaddr7;
317         }
318
319         if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_PADDING)
320                 priv->padding = DEFAULT_PADDING;
321         else
322                 priv->padding = 0;
323
324         dev->hard_header_len += priv->padding;
325
326         if (dev->features & NETIF_F_IP_CSUM)
327                 dev->hard_header_len += GMAC_FCB_LEN;
328
329         priv->rx_buffer_size = DEFAULT_RX_BUFFER_SIZE;
330 #ifdef CONFIG_GFAR_BUFSTASH
331         priv->rx_stash_size = STASH_LENGTH;
332 #endif
333         priv->tx_ring_size = DEFAULT_TX_RING_SIZE;
334         priv->rx_ring_size = DEFAULT_RX_RING_SIZE;
335
336         priv->txcoalescing = DEFAULT_TX_COALESCE;
337         priv->txcount = DEFAULT_TXCOUNT;
338         priv->txtime = DEFAULT_TXTIME;
339         priv->rxcoalescing = DEFAULT_RX_COALESCE;
340         priv->rxcount = DEFAULT_RXCOUNT;
341         priv->rxtime = DEFAULT_RXTIME;
342
343         /* Enable most messages by default */
344         priv->msg_enable = (NETIF_MSG_IFUP << 1 ) - 1;
345
346         err = register_netdev(dev);
347
348         if (err) {
349                 printk(KERN_ERR "%s: Cannot register net device, aborting.\n",
350                                 dev->name);
351                 goto register_fail;
352         }
353
354         /* Print out the device info */
355         printk(KERN_INFO DEVICE_NAME, dev->name);
356         for (idx = 0; idx < 6; idx++)
357                 printk("%2.2x%c", dev->dev_addr[idx], idx == 5 ? ' ' : ':');
358         printk("\n");
359
360         /* Even more device info helps when determining which kernel */
361         /* provided which set of benchmarks.  Since this is global for all */
362         /* devices, we only print it once */
363 #ifdef CONFIG_GFAR_NAPI
364         printk(KERN_INFO "%s: Running with NAPI enabled\n", dev->name);
365 #else
366         printk(KERN_INFO "%s: Running with NAPI disabled\n", dev->name);
367 #endif
368         printk(KERN_INFO "%s: %d/%d RX/TX BD ring size\n",
369                dev->name, priv->rx_ring_size, priv->tx_ring_size);
370
371         return 0;
372
373 register_fail:
374         iounmap((void *) priv->regs);
375 regs_fail:
376         free_netdev(dev);
377         return err;
378 }
379
380 static int gfar_remove(struct device *device)
381 {
382         struct net_device *dev = dev_get_drvdata(device);
383         struct gfar_private *priv = netdev_priv(dev);
384
385         dev_set_drvdata(device, NULL);
386
387         iounmap((void *) priv->regs);
388         free_netdev(dev);
389
390         return 0;
391 }
392
393
394 /* Initializes driver's PHY state, and attaches to the PHY.
395  * Returns 0 on success.
396  */
397 static int init_phy(struct net_device *dev)
398 {
399         struct gfar_private *priv = netdev_priv(dev);
400         uint gigabit_support =
401                 priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_GIGABIT ?
402                 SUPPORTED_1000baseT_Full : 0;
403         struct phy_device *phydev;
404
405         priv->oldlink = 0;
406         priv->oldspeed = 0;
407         priv->oldduplex = -1;
408
409         phydev = phy_connect(dev, priv->einfo->bus_id, &adjust_link, 0);
410
411         if (IS_ERR(phydev)) {
412                 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
413                 return PTR_ERR(phydev);
414         }
415
416         /* Remove any features not supported by the controller */
417         phydev->supported &= (GFAR_SUPPORTED | gigabit_support);
418         phydev->advertising = phydev->supported;
419
420         priv->phydev = phydev;
421
422         return 0;
423 }
424
425 static void init_registers(struct net_device *dev)
426 {
427         struct gfar_private *priv = netdev_priv(dev);
428
429         /* Clear IEVENT */
430         gfar_write(&priv->regs->ievent, IEVENT_INIT_CLEAR);
431
432         /* Initialize IMASK */
433         gfar_write(&priv->regs->imask, IMASK_INIT_CLEAR);
434
435         /* Init hash registers to zero */
436         gfar_write(&priv->regs->igaddr0, 0);
437         gfar_write(&priv->regs->igaddr1, 0);
438         gfar_write(&priv->regs->igaddr2, 0);
439         gfar_write(&priv->regs->igaddr3, 0);
440         gfar_write(&priv->regs->igaddr4, 0);
441         gfar_write(&priv->regs->igaddr5, 0);
442         gfar_write(&priv->regs->igaddr6, 0);
443         gfar_write(&priv->regs->igaddr7, 0);
444
445         gfar_write(&priv->regs->gaddr0, 0);
446         gfar_write(&priv->regs->gaddr1, 0);
447         gfar_write(&priv->regs->gaddr2, 0);
448         gfar_write(&priv->regs->gaddr3, 0);
449         gfar_write(&priv->regs->gaddr4, 0);
450         gfar_write(&priv->regs->gaddr5, 0);
451         gfar_write(&priv->regs->gaddr6, 0);
452         gfar_write(&priv->regs->gaddr7, 0);
453
454         /* Zero out the rmon mib registers if it has them */
455         if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_RMON) {
456                 memset((void *) &(priv->regs->rmon), 0,
457                        sizeof (struct rmon_mib));
458
459                 /* Mask off the CAM interrupts */
460                 gfar_write(&priv->regs->rmon.cam1, 0xffffffff);
461                 gfar_write(&priv->regs->rmon.cam2, 0xffffffff);
462         }
463
464         /* Initialize the max receive buffer length */
465         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
466
467 #ifdef CONFIG_GFAR_BUFSTASH
468         /* If we are stashing buffers, we need to set the
469          * extraction length to the size of the buffer */
470         gfar_write(&priv->regs->attreli, priv->rx_stash_size << 16);
471 #endif
472
473         /* Initialize the Minimum Frame Length Register */
474         gfar_write(&priv->regs->minflr, MINFLR_INIT_SETTINGS);
475
476         /* Setup Attributes so that snooping is on for rx */
477         gfar_write(&priv->regs->attr, ATTR_INIT_SETTINGS);
478         gfar_write(&priv->regs->attreli, ATTRELI_INIT_SETTINGS);
479
480         /* Assign the TBI an address which won't conflict with the PHYs */
481         gfar_write(&priv->regs->tbipa, TBIPA_VALUE);
482 }
483
484
485 /* Halt the receive and transmit queues */
486 void gfar_halt(struct net_device *dev)
487 {
488         struct gfar_private *priv = netdev_priv(dev);
489         struct gfar *regs = priv->regs;
490         u32 tempval;
491
492         /* Mask all interrupts */
493         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
494
495         /* Clear all interrupts */
496         gfar_write(&regs->ievent, IEVENT_INIT_CLEAR);
497
498         /* Stop the DMA, and wait for it to stop */
499         tempval = gfar_read(&priv->regs->dmactrl);
500         if ((tempval & (DMACTRL_GRS | DMACTRL_GTS))
501             != (DMACTRL_GRS | DMACTRL_GTS)) {
502                 tempval |= (DMACTRL_GRS | DMACTRL_GTS);
503                 gfar_write(&priv->regs->dmactrl, tempval);
504
505                 while (!(gfar_read(&priv->regs->ievent) &
506                          (IEVENT_GRSC | IEVENT_GTSC)))
507                         cpu_relax();
508         }
509
510         /* Disable Rx and Tx */
511         tempval = gfar_read(&regs->maccfg1);
512         tempval &= ~(MACCFG1_RX_EN | MACCFG1_TX_EN);
513         gfar_write(&regs->maccfg1, tempval);
514 }
515
516 void stop_gfar(struct net_device *dev)
517 {
518         struct gfar_private *priv = netdev_priv(dev);
519         struct gfar *regs = priv->regs;
520         unsigned long flags;
521
522         phy_stop(priv->phydev);
523
524         /* Lock it down */
525         spin_lock_irqsave(&priv->lock, flags);
526
527         gfar_halt(dev);
528
529         spin_unlock_irqrestore(&priv->lock, flags);
530
531         /* Free the IRQs */
532         if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
533                 free_irq(priv->interruptError, dev);
534                 free_irq(priv->interruptTransmit, dev);
535                 free_irq(priv->interruptReceive, dev);
536         } else {
537                 free_irq(priv->interruptTransmit, dev);
538         }
539
540         free_skb_resources(priv);
541
542         dma_free_coherent(NULL,
543                         sizeof(struct txbd8)*priv->tx_ring_size
544                         + sizeof(struct rxbd8)*priv->rx_ring_size,
545                         priv->tx_bd_base,
546                         gfar_read(&regs->tbase0));
547 }
548
549 /* If there are any tx skbs or rx skbs still around, free them.
550  * Then free tx_skbuff and rx_skbuff */
551 static void free_skb_resources(struct gfar_private *priv)
552 {
553         struct rxbd8 *rxbdp;
554         struct txbd8 *txbdp;
555         int i;
556
557         /* Go through all the buffer descriptors and free their data buffers */
558         txbdp = priv->tx_bd_base;
559
560         for (i = 0; i < priv->tx_ring_size; i++) {
561
562                 if (priv->tx_skbuff[i]) {
563                         dma_unmap_single(NULL, txbdp->bufPtr,
564                                         txbdp->length,
565                                         DMA_TO_DEVICE);
566                         dev_kfree_skb_any(priv->tx_skbuff[i]);
567                         priv->tx_skbuff[i] = NULL;
568                 }
569         }
570
571         kfree(priv->tx_skbuff);
572
573         rxbdp = priv->rx_bd_base;
574
575         /* rx_skbuff is not guaranteed to be allocated, so only
576          * free it and its contents if it is allocated */
577         if(priv->rx_skbuff != NULL) {
578                 for (i = 0; i < priv->rx_ring_size; i++) {
579                         if (priv->rx_skbuff[i]) {
580                                 dma_unmap_single(NULL, rxbdp->bufPtr,
581                                                 priv->rx_buffer_size
582                                                 + RXBUF_ALIGNMENT,
583                                                 DMA_FROM_DEVICE);
584
585                                 dev_kfree_skb_any(priv->rx_skbuff[i]);
586                                 priv->rx_skbuff[i] = NULL;
587                         }
588
589                         rxbdp->status = 0;
590                         rxbdp->length = 0;
591                         rxbdp->bufPtr = 0;
592
593                         rxbdp++;
594                 }
595
596                 kfree(priv->rx_skbuff);
597         }
598 }
599
600 void gfar_start(struct net_device *dev)
601 {
602         struct gfar_private *priv = netdev_priv(dev);
603         struct gfar *regs = priv->regs;
604         u32 tempval;
605
606         /* Enable Rx and Tx in MACCFG1 */
607         tempval = gfar_read(&regs->maccfg1);
608         tempval |= (MACCFG1_RX_EN | MACCFG1_TX_EN);
609         gfar_write(&regs->maccfg1, tempval);
610
611         /* Initialize DMACTRL to have WWR and WOP */
612         tempval = gfar_read(&priv->regs->dmactrl);
613         tempval |= DMACTRL_INIT_SETTINGS;
614         gfar_write(&priv->regs->dmactrl, tempval);
615
616         /* Clear THLT, so that the DMA starts polling now */
617         gfar_write(&regs->tstat, TSTAT_CLEAR_THALT);
618
619         /* Make sure we aren't stopped */
620         tempval = gfar_read(&priv->regs->dmactrl);
621         tempval &= ~(DMACTRL_GRS | DMACTRL_GTS);
622         gfar_write(&priv->regs->dmactrl, tempval);
623
624         /* Unmask the interrupts we look for */
625         gfar_write(&regs->imask, IMASK_DEFAULT);
626 }
627
628 /* Bring the controller up and running */
629 int startup_gfar(struct net_device *dev)
630 {
631         struct txbd8 *txbdp;
632         struct rxbd8 *rxbdp;
633         dma_addr_t addr;
634         unsigned long vaddr;
635         int i;
636         struct gfar_private *priv = netdev_priv(dev);
637         struct gfar *regs = priv->regs;
638         int err = 0;
639         u32 rctrl = 0;
640
641         gfar_write(&regs->imask, IMASK_INIT_CLEAR);
642
643         /* Allocate memory for the buffer descriptors */
644         vaddr = (unsigned long) dma_alloc_coherent(NULL,
645                         sizeof (struct txbd8) * priv->tx_ring_size +
646                         sizeof (struct rxbd8) * priv->rx_ring_size,
647                         &addr, GFP_KERNEL);
648
649         if (vaddr == 0) {
650                 if (netif_msg_ifup(priv))
651                         printk(KERN_ERR "%s: Could not allocate buffer descriptors!\n",
652                                         dev->name);
653                 return -ENOMEM;
654         }
655
656         priv->tx_bd_base = (struct txbd8 *) vaddr;
657
658         /* enet DMA only understands physical addresses */
659         gfar_write(&regs->tbase0, addr);
660
661         /* Start the rx descriptor ring where the tx ring leaves off */
662         addr = addr + sizeof (struct txbd8) * priv->tx_ring_size;
663         vaddr = vaddr + sizeof (struct txbd8) * priv->tx_ring_size;
664         priv->rx_bd_base = (struct rxbd8 *) vaddr;
665         gfar_write(&regs->rbase0, addr);
666
667         /* Setup the skbuff rings */
668         priv->tx_skbuff =
669             (struct sk_buff **) kmalloc(sizeof (struct sk_buff *) *
670                                         priv->tx_ring_size, GFP_KERNEL);
671
672         if (NULL == priv->tx_skbuff) {
673                 if (netif_msg_ifup(priv))
674                         printk(KERN_ERR "%s: Could not allocate tx_skbuff\n",
675                                         dev->name);
676                 err = -ENOMEM;
677                 goto tx_skb_fail;
678         }
679
680         for (i = 0; i < priv->tx_ring_size; i++)
681                 priv->tx_skbuff[i] = NULL;
682
683         priv->rx_skbuff =
684             (struct sk_buff **) kmalloc(sizeof (struct sk_buff *) *
685                                         priv->rx_ring_size, GFP_KERNEL);
686
687         if (NULL == priv->rx_skbuff) {
688                 if (netif_msg_ifup(priv))
689                         printk(KERN_ERR "%s: Could not allocate rx_skbuff\n",
690                                         dev->name);
691                 err = -ENOMEM;
692                 goto rx_skb_fail;
693         }
694
695         for (i = 0; i < priv->rx_ring_size; i++)
696                 priv->rx_skbuff[i] = NULL;
697
698         /* Initialize some variables in our dev structure */
699         priv->dirty_tx = priv->cur_tx = priv->tx_bd_base;
700         priv->cur_rx = priv->rx_bd_base;
701         priv->skb_curtx = priv->skb_dirtytx = 0;
702         priv->skb_currx = 0;
703
704         /* Initialize Transmit Descriptor Ring */
705         txbdp = priv->tx_bd_base;
706         for (i = 0; i < priv->tx_ring_size; i++) {
707                 txbdp->status = 0;
708                 txbdp->length = 0;
709                 txbdp->bufPtr = 0;
710                 txbdp++;
711         }
712
713         /* Set the last descriptor in the ring to indicate wrap */
714         txbdp--;
715         txbdp->status |= TXBD_WRAP;
716
717         rxbdp = priv->rx_bd_base;
718         for (i = 0; i < priv->rx_ring_size; i++) {
719                 struct sk_buff *skb = NULL;
720
721                 rxbdp->status = 0;
722
723                 skb = gfar_new_skb(dev, rxbdp);
724
725                 priv->rx_skbuff[i] = skb;
726
727                 rxbdp++;
728         }
729
730         /* Set the last descriptor in the ring to wrap */
731         rxbdp--;
732         rxbdp->status |= RXBD_WRAP;
733
734         /* If the device has multiple interrupts, register for
735          * them.  Otherwise, only register for the one */
736         if (priv->einfo->device_flags & FSL_GIANFAR_DEV_HAS_MULTI_INTR) {
737                 /* Install our interrupt handlers for Error,
738                  * Transmit, and Receive */
739                 if (request_irq(priv->interruptError, gfar_error,
740                                 0, "enet_error", dev) < 0) {
741                         if (netif_msg_intr(priv))
742                                 printk(KERN_ERR "%s: Can't get IRQ %d\n",
743                                         dev->name, priv->interruptError);
744
745                         err = -1;
746                         goto err_irq_fail;
747                 }
748
749                 if (request_irq(priv->interruptTransmit, gfar_transmit,
750                                 0, "enet_tx", dev) < 0) {
751                         if (netif_msg_intr(priv))
752                                 printk(KERN_ERR "%s: Can't get IRQ %d\n",
753                                         dev->name, priv->interruptTransmit);
754
755                         err = -1;
756
757                         goto tx_irq_fail;
758                 }
759
760                 if (request_irq(priv->interruptReceive, gfar_receive,
761                                 0, "enet_rx", dev) < 0) {
762                         if (netif_msg_intr(priv))
763                                 printk(KERN_ERR "%s: Can't get IRQ %d (receive0)\n",
764                                                 dev->name, priv->interruptReceive);
765
766                         err = -1;
767                         goto rx_irq_fail;
768                 }
769         } else {
770                 if (request_irq(priv->interruptTransmit, gfar_interrupt,
771                                 0, "gfar_interrupt", dev) < 0) {
772                         if (netif_msg_intr(priv))
773                                 printk(KERN_ERR "%s: Can't get IRQ %d\n",
774                                         dev->name, priv->interruptError);
775
776                         err = -1;
777                         goto err_irq_fail;
778                 }
779         }
780
781         phy_start(priv->phydev);
782
783         /* Configure the coalescing support */
784         if (priv->txcoalescing)
785                 gfar_write(&regs->txic,
786                            mk_ic_value(priv->txcount, priv->txtime));
787         else
788                 gfar_write(&regs->txic, 0);
789
790         if (priv->rxcoalescing)
791                 gfar_write(&regs->rxic,
792                            mk_ic_value(priv->rxcount, priv->rxtime));
793         else
794                 gfar_write(&regs->rxic, 0);
795
796         if (priv->rx_csum_enable)
797                 rctrl |= RCTRL_CHECKSUMMING;
798
799         if (priv->extended_hash)
800                 rctrl |= RCTRL_EXTHASH;
801
802         if (priv->vlan_enable)
803                 rctrl |= RCTRL_VLAN;
804
805         /* Init rctrl based on our settings */
806         gfar_write(&priv->regs->rctrl, rctrl);
807
808         if (dev->features & NETIF_F_IP_CSUM)
809                 gfar_write(&priv->regs->tctrl, TCTRL_INIT_CSUM);
810
811         gfar_start(dev);
812
813         return 0;
814
815 rx_irq_fail:
816         free_irq(priv->interruptTransmit, dev);
817 tx_irq_fail:
818         free_irq(priv->interruptError, dev);
819 err_irq_fail:
820 rx_skb_fail:
821         free_skb_resources(priv);
822 tx_skb_fail:
823         dma_free_coherent(NULL,
824                         sizeof(struct txbd8)*priv->tx_ring_size
825                         + sizeof(struct rxbd8)*priv->rx_ring_size,
826                         priv->tx_bd_base,
827                         gfar_read(&regs->tbase0));
828
829         return err;
830 }
831
832 /* Called when something needs to use the ethernet device */
833 /* Returns 0 for success. */
834 static int gfar_enet_open(struct net_device *dev)
835 {
836         int err;
837
838         /* Initialize a bunch of registers */
839         init_registers(dev);
840
841         gfar_set_mac_address(dev);
842
843         err = init_phy(dev);
844
845         if(err)
846                 return err;
847
848         err = startup_gfar(dev);
849
850         netif_start_queue(dev);
851
852         return err;
853 }
854
855 static struct txfcb *gfar_add_fcb(struct sk_buff *skb, struct txbd8 *bdp)
856 {
857         struct txfcb *fcb = (struct txfcb *)skb_push (skb, GMAC_FCB_LEN);
858
859         memset(fcb, 0, GMAC_FCB_LEN);
860
861         /* Flag the bd so the controller looks for the FCB */
862         bdp->status |= TXBD_TOE;
863
864         return fcb;
865 }
866
867 static inline void gfar_tx_checksum(struct sk_buff *skb, struct txfcb *fcb)
868 {
869         int len;
870
871         /* If we're here, it's a IP packet with a TCP or UDP
872          * payload.  We set it to checksum, using a pseudo-header
873          * we provide
874          */
875         fcb->ip = 1;
876         fcb->tup = 1;
877         fcb->ctu = 1;
878         fcb->nph = 1;
879
880         /* Notify the controller what the protocol is */
881         if (skb->nh.iph->protocol == IPPROTO_UDP)
882                 fcb->udp = 1;
883
884         /* l3os is the distance between the start of the
885          * frame (skb->data) and the start of the IP hdr.
886          * l4os is the distance between the start of the
887          * l3 hdr and the l4 hdr */
888         fcb->l3os = (u16)(skb->nh.raw - skb->data - GMAC_FCB_LEN);
889         fcb->l4os = (u16)(skb->h.raw - skb->nh.raw);
890
891         len = skb->nh.iph->tot_len - fcb->l4os;
892
893         /* Provide the pseudoheader csum */
894         fcb->phcs = ~csum_tcpudp_magic(skb->nh.iph->saddr,
895                         skb->nh.iph->daddr, len,
896                         skb->nh.iph->protocol, 0);
897 }
898
899 void gfar_tx_vlan(struct sk_buff *skb, struct txfcb *fcb)
900 {
901         fcb->vln = 1;
902         fcb->vlctl = vlan_tx_tag_get(skb);
903 }
904
905 /* This is called by the kernel when a frame is ready for transmission. */
906 /* It is pointed to by the dev->hard_start_xmit function pointer */
907 static int gfar_start_xmit(struct sk_buff *skb, struct net_device *dev)
908 {
909         struct gfar_private *priv = netdev_priv(dev);
910         struct txfcb *fcb = NULL;
911         struct txbd8 *txbdp;
912
913         /* Update transmit stats */
914         priv->stats.tx_bytes += skb->len;
915
916         /* Lock priv now */
917         spin_lock_irq(&priv->lock);
918
919         /* Point at the first free tx descriptor */
920         txbdp = priv->cur_tx;
921
922         /* Clear all but the WRAP status flags */
923         txbdp->status &= TXBD_WRAP;
924
925         /* Set up checksumming */
926         if ((dev->features & NETIF_F_IP_CSUM)
927                         && (CHECKSUM_HW == skb->ip_summed)) {
928                 fcb = gfar_add_fcb(skb, txbdp);
929                 gfar_tx_checksum(skb, fcb);
930         }
931
932         if (priv->vlan_enable &&
933                         unlikely(priv->vlgrp && vlan_tx_tag_present(skb))) {
934                 if (NULL == fcb)
935                         fcb = gfar_add_fcb(skb, txbdp);
936
937                 gfar_tx_vlan(skb, fcb);
938         }
939
940         /* Set buffer length and pointer */
941         txbdp->length = skb->len;
942         txbdp->bufPtr = dma_map_single(NULL, skb->data,
943                         skb->len, DMA_TO_DEVICE);
944
945         /* Save the skb pointer so we can free it later */
946         priv->tx_skbuff[priv->skb_curtx] = skb;
947
948         /* Update the current skb pointer (wrapping if this was the last) */
949         priv->skb_curtx =
950             (priv->skb_curtx + 1) & TX_RING_MOD_MASK(priv->tx_ring_size);
951
952         /* Flag the BD as interrupt-causing */
953         txbdp->status |= TXBD_INTERRUPT;
954
955         /* Flag the BD as ready to go, last in frame, and  */
956         /* in need of CRC */
957         txbdp->status |= (TXBD_READY | TXBD_LAST | TXBD_CRC);
958
959         dev->trans_start = jiffies;
960
961         /* If this was the last BD in the ring, the next one */
962         /* is at the beginning of the ring */
963         if (txbdp->status & TXBD_WRAP)
964                 txbdp = priv->tx_bd_base;
965         else
966                 txbdp++;
967
968         /* If the next BD still needs to be cleaned up, then the bds
969            are full.  We need to tell the kernel to stop sending us stuff. */
970         if (txbdp == priv->dirty_tx) {
971                 netif_stop_queue(dev);
972
973                 priv->stats.tx_fifo_errors++;
974         }
975
976         /* Update the current txbd to the next one */
977         priv->cur_tx = txbdp;
978
979         /* Tell the DMA to go go go */
980         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
981
982         /* Unlock priv */
983         spin_unlock_irq(&priv->lock);
984
985         return 0;
986 }
987
988 /* Stops the kernel queue, and halts the controller */
989 static int gfar_close(struct net_device *dev)
990 {
991         struct gfar_private *priv = netdev_priv(dev);
992         stop_gfar(dev);
993
994         /* Disconnect from the PHY */
995         phy_disconnect(priv->phydev);
996         priv->phydev = NULL;
997
998         netif_stop_queue(dev);
999
1000         return 0;
1001 }
1002
1003 /* returns a net_device_stats structure pointer */
1004 static struct net_device_stats * gfar_get_stats(struct net_device *dev)
1005 {
1006         struct gfar_private *priv = netdev_priv(dev);
1007
1008         return &(priv->stats);
1009 }
1010
1011 /* Changes the mac address if the controller is not running. */
1012 int gfar_set_mac_address(struct net_device *dev)
1013 {
1014         struct gfar_private *priv = netdev_priv(dev);
1015         int i;
1016         char tmpbuf[MAC_ADDR_LEN];
1017         u32 tempval;
1018
1019         /* Now copy it into the mac registers backwards, cuz */
1020         /* little endian is silly */
1021         for (i = 0; i < MAC_ADDR_LEN; i++)
1022                 tmpbuf[MAC_ADDR_LEN - 1 - i] = dev->dev_addr[i];
1023
1024         gfar_write(&priv->regs->macstnaddr1, *((u32 *) (tmpbuf)));
1025
1026         tempval = *((u32 *) (tmpbuf + 4));
1027
1028         gfar_write(&priv->regs->macstnaddr2, tempval);
1029
1030         return 0;
1031 }
1032
1033
1034 /* Enables and disables VLAN insertion/extraction */
1035 static void gfar_vlan_rx_register(struct net_device *dev,
1036                 struct vlan_group *grp)
1037 {
1038         struct gfar_private *priv = netdev_priv(dev);
1039         unsigned long flags;
1040         u32 tempval;
1041
1042         spin_lock_irqsave(&priv->lock, flags);
1043
1044         priv->vlgrp = grp;
1045
1046         if (grp) {
1047                 /* Enable VLAN tag insertion */
1048                 tempval = gfar_read(&priv->regs->tctrl);
1049                 tempval |= TCTRL_VLINS;
1050
1051                 gfar_write(&priv->regs->tctrl, tempval);
1052                 
1053                 /* Enable VLAN tag extraction */
1054                 tempval = gfar_read(&priv->regs->rctrl);
1055                 tempval |= RCTRL_VLEX;
1056                 gfar_write(&priv->regs->rctrl, tempval);
1057         } else {
1058                 /* Disable VLAN tag insertion */
1059                 tempval = gfar_read(&priv->regs->tctrl);
1060                 tempval &= ~TCTRL_VLINS;
1061                 gfar_write(&priv->regs->tctrl, tempval);
1062
1063                 /* Disable VLAN tag extraction */
1064                 tempval = gfar_read(&priv->regs->rctrl);
1065                 tempval &= ~RCTRL_VLEX;
1066                 gfar_write(&priv->regs->rctrl, tempval);
1067         }
1068
1069         spin_unlock_irqrestore(&priv->lock, flags);
1070 }
1071
1072
1073 static void gfar_vlan_rx_kill_vid(struct net_device *dev, uint16_t vid)
1074 {
1075         struct gfar_private *priv = netdev_priv(dev);
1076         unsigned long flags;
1077
1078         spin_lock_irqsave(&priv->lock, flags);
1079
1080         if (priv->vlgrp)
1081                 priv->vlgrp->vlan_devices[vid] = NULL;
1082
1083         spin_unlock_irqrestore(&priv->lock, flags);
1084 }
1085
1086
1087 static int gfar_change_mtu(struct net_device *dev, int new_mtu)
1088 {
1089         int tempsize, tempval;
1090         struct gfar_private *priv = netdev_priv(dev);
1091         int oldsize = priv->rx_buffer_size;
1092         int frame_size = new_mtu + ETH_HLEN;
1093
1094         if (priv->vlan_enable)
1095                 frame_size += VLAN_ETH_HLEN;
1096
1097         if (gfar_uses_fcb(priv))
1098                 frame_size += GMAC_FCB_LEN;
1099
1100         frame_size += priv->padding;
1101
1102         if ((frame_size < 64) || (frame_size > JUMBO_FRAME_SIZE)) {
1103                 if (netif_msg_drv(priv))
1104                         printk(KERN_ERR "%s: Invalid MTU setting\n",
1105                                         dev->name);
1106                 return -EINVAL;
1107         }
1108
1109         tempsize =
1110             (frame_size & ~(INCREMENTAL_BUFFER_SIZE - 1)) +
1111             INCREMENTAL_BUFFER_SIZE;
1112
1113         /* Only stop and start the controller if it isn't already
1114          * stopped */
1115         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1116                 stop_gfar(dev);
1117
1118         priv->rx_buffer_size = tempsize;
1119
1120         dev->mtu = new_mtu;
1121
1122         gfar_write(&priv->regs->mrblr, priv->rx_buffer_size);
1123         gfar_write(&priv->regs->maxfrm, priv->rx_buffer_size);
1124
1125         /* If the mtu is larger than the max size for standard
1126          * ethernet frames (ie, a jumbo frame), then set maccfg2
1127          * to allow huge frames, and to check the length */
1128         tempval = gfar_read(&priv->regs->maccfg2);
1129
1130         if (priv->rx_buffer_size > DEFAULT_RX_BUFFER_SIZE)
1131                 tempval |= (MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1132         else
1133                 tempval &= ~(MACCFG2_HUGEFRAME | MACCFG2_LENGTHCHECK);
1134
1135         gfar_write(&priv->regs->maccfg2, tempval);
1136
1137         if ((oldsize != tempsize) && (dev->flags & IFF_UP))
1138                 startup_gfar(dev);
1139
1140         return 0;
1141 }
1142
1143 /* gfar_timeout gets called when a packet has not been
1144  * transmitted after a set amount of time.
1145  * For now, assume that clearing out all the structures, and
1146  * starting over will fix the problem. */
1147 static void gfar_timeout(struct net_device *dev)
1148 {
1149         struct gfar_private *priv = netdev_priv(dev);
1150
1151         priv->stats.tx_errors++;
1152
1153         if (dev->flags & IFF_UP) {
1154                 stop_gfar(dev);
1155                 startup_gfar(dev);
1156         }
1157
1158         netif_schedule(dev);
1159 }
1160
1161 /* Interrupt Handler for Transmit complete */
1162 static irqreturn_t gfar_transmit(int irq, void *dev_id, struct pt_regs *regs)
1163 {
1164         struct net_device *dev = (struct net_device *) dev_id;
1165         struct gfar_private *priv = netdev_priv(dev);
1166         struct txbd8 *bdp;
1167
1168         /* Clear IEVENT */
1169         gfar_write(&priv->regs->ievent, IEVENT_TX_MASK);
1170
1171         /* Lock priv */
1172         spin_lock(&priv->lock);
1173         bdp = priv->dirty_tx;
1174         while ((bdp->status & TXBD_READY) == 0) {
1175                 /* If dirty_tx and cur_tx are the same, then either the */
1176                 /* ring is empty or full now (it could only be full in the beginning, */
1177                 /* obviously).  If it is empty, we are done. */
1178                 if ((bdp == priv->cur_tx) && (netif_queue_stopped(dev) == 0))
1179                         break;
1180
1181                 priv->stats.tx_packets++;
1182
1183                 /* Deferred means some collisions occurred during transmit, */
1184                 /* but we eventually sent the packet. */
1185                 if (bdp->status & TXBD_DEF)
1186                         priv->stats.collisions++;
1187
1188                 /* Free the sk buffer associated with this TxBD */
1189                 dev_kfree_skb_irq(priv->tx_skbuff[priv->skb_dirtytx]);
1190                 priv->tx_skbuff[priv->skb_dirtytx] = NULL;
1191                 priv->skb_dirtytx =
1192                     (priv->skb_dirtytx +
1193                      1) & TX_RING_MOD_MASK(priv->tx_ring_size);
1194
1195                 /* update bdp to point at next bd in the ring (wrapping if necessary) */
1196                 if (bdp->status & TXBD_WRAP)
1197                         bdp = priv->tx_bd_base;
1198                 else
1199                         bdp++;
1200
1201                 /* Move dirty_tx to be the next bd */
1202                 priv->dirty_tx = bdp;
1203
1204                 /* We freed a buffer, so now we can restart transmission */
1205                 if (netif_queue_stopped(dev))
1206                         netif_wake_queue(dev);
1207         } /* while ((bdp->status & TXBD_READY) == 0) */
1208
1209         /* If we are coalescing the interrupts, reset the timer */
1210         /* Otherwise, clear it */
1211         if (priv->txcoalescing)
1212                 gfar_write(&priv->regs->txic,
1213                            mk_ic_value(priv->txcount, priv->txtime));
1214         else
1215                 gfar_write(&priv->regs->txic, 0);
1216
1217         spin_unlock(&priv->lock);
1218
1219         return IRQ_HANDLED;
1220 }
1221
1222 struct sk_buff * gfar_new_skb(struct net_device *dev, struct rxbd8 *bdp)
1223 {
1224         struct gfar_private *priv = netdev_priv(dev);
1225         struct sk_buff *skb = NULL;
1226         unsigned int timeout = SKB_ALLOC_TIMEOUT;
1227
1228         /* We have to allocate the skb, so keep trying till we succeed */
1229         while ((!skb) && timeout--)
1230                 skb = dev_alloc_skb(priv->rx_buffer_size + RXBUF_ALIGNMENT);
1231
1232         if (NULL == skb)
1233                 return NULL;
1234
1235         /* We need the data buffer to be aligned properly.  We will reserve
1236          * as many bytes as needed to align the data properly
1237          */
1238         skb_reserve(skb,
1239                     RXBUF_ALIGNMENT -
1240                     (((unsigned) skb->data) & (RXBUF_ALIGNMENT - 1)));
1241
1242         skb->dev = dev;
1243
1244         bdp->bufPtr = dma_map_single(NULL, skb->data,
1245                         priv->rx_buffer_size + RXBUF_ALIGNMENT,
1246                         DMA_FROM_DEVICE);
1247
1248         bdp->length = 0;
1249
1250         /* Mark the buffer empty */
1251         bdp->status |= (RXBD_EMPTY | RXBD_INTERRUPT);
1252
1253         return skb;
1254 }
1255
1256 static inline void count_errors(unsigned short status, struct gfar_private *priv)
1257 {
1258         struct net_device_stats *stats = &priv->stats;
1259         struct gfar_extra_stats *estats = &priv->extra_stats;
1260
1261         /* If the packet was truncated, none of the other errors
1262          * matter */
1263         if (status & RXBD_TRUNCATED) {
1264                 stats->rx_length_errors++;
1265
1266                 estats->rx_trunc++;
1267
1268                 return;
1269         }
1270         /* Count the errors, if there were any */
1271         if (status & (RXBD_LARGE | RXBD_SHORT)) {
1272                 stats->rx_length_errors++;
1273
1274                 if (status & RXBD_LARGE)
1275                         estats->rx_large++;
1276                 else
1277                         estats->rx_short++;
1278         }
1279         if (status & RXBD_NONOCTET) {
1280                 stats->rx_frame_errors++;
1281                 estats->rx_nonoctet++;
1282         }
1283         if (status & RXBD_CRCERR) {
1284                 estats->rx_crcerr++;
1285                 stats->rx_crc_errors++;
1286         }
1287         if (status & RXBD_OVERRUN) {
1288                 estats->rx_overrun++;
1289                 stats->rx_crc_errors++;
1290         }
1291 }
1292
1293 irqreturn_t gfar_receive(int irq, void *dev_id, struct pt_regs *regs)
1294 {
1295         struct net_device *dev = (struct net_device *) dev_id;
1296         struct gfar_private *priv = netdev_priv(dev);
1297
1298 #ifdef CONFIG_GFAR_NAPI
1299         u32 tempval;
1300 #endif
1301
1302         /* Clear IEVENT, so rx interrupt isn't called again
1303          * because of this interrupt */
1304         gfar_write(&priv->regs->ievent, IEVENT_RX_MASK);
1305
1306         /* support NAPI */
1307 #ifdef CONFIG_GFAR_NAPI
1308         if (netif_rx_schedule_prep(dev)) {
1309                 tempval = gfar_read(&priv->regs->imask);
1310                 tempval &= IMASK_RX_DISABLED;
1311                 gfar_write(&priv->regs->imask, tempval);
1312
1313                 __netif_rx_schedule(dev);
1314         } else {
1315                 if (netif_msg_rx_err(priv))
1316                         printk(KERN_DEBUG "%s: receive called twice (%x)[%x]\n",
1317                                 dev->name, gfar_read(&priv->regs->ievent),
1318                                 gfar_read(&priv->regs->imask));
1319         }
1320 #else
1321
1322         spin_lock(&priv->lock);
1323         gfar_clean_rx_ring(dev, priv->rx_ring_size);
1324
1325         /* If we are coalescing interrupts, update the timer */
1326         /* Otherwise, clear it */
1327         if (priv->rxcoalescing)
1328                 gfar_write(&priv->regs->rxic,
1329                            mk_ic_value(priv->rxcount, priv->rxtime));
1330         else
1331                 gfar_write(&priv->regs->rxic, 0);
1332
1333         spin_unlock(&priv->lock);
1334 #endif
1335
1336         return IRQ_HANDLED;
1337 }
1338
1339 static inline int gfar_rx_vlan(struct sk_buff *skb,
1340                 struct vlan_group *vlgrp, unsigned short vlctl)
1341 {
1342 #ifdef CONFIG_GFAR_NAPI
1343         return vlan_hwaccel_receive_skb(skb, vlgrp, vlctl);
1344 #else
1345         return vlan_hwaccel_rx(skb, vlgrp, vlctl);
1346 #endif
1347 }
1348
1349 static inline void gfar_rx_checksum(struct sk_buff *skb, struct rxfcb *fcb)
1350 {
1351         /* If valid headers were found, and valid sums
1352          * were verified, then we tell the kernel that no
1353          * checksumming is necessary.  Otherwise, it is */
1354         if (fcb->cip && !fcb->eip && fcb->ctu && !fcb->etu)
1355                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1356         else
1357                 skb->ip_summed = CHECKSUM_NONE;
1358 }
1359
1360
1361 static inline struct rxfcb *gfar_get_fcb(struct sk_buff *skb)
1362 {
1363         struct rxfcb *fcb = (struct rxfcb *)skb->data;
1364
1365         /* Remove the FCB from the skb */
1366         skb_pull(skb, GMAC_FCB_LEN);
1367
1368         return fcb;
1369 }
1370
1371 /* gfar_process_frame() -- handle one incoming packet if skb
1372  * isn't NULL.  */
1373 static int gfar_process_frame(struct net_device *dev, struct sk_buff *skb,
1374                 int length)
1375 {
1376         struct gfar_private *priv = netdev_priv(dev);
1377         struct rxfcb *fcb = NULL;
1378
1379         if (NULL == skb) {
1380                 if (netif_msg_rx_err(priv))
1381                         printk(KERN_WARNING "%s: Missing skb!!.\n", dev->name);
1382                 priv->stats.rx_dropped++;
1383                 priv->extra_stats.rx_skbmissing++;
1384         } else {
1385                 int ret;
1386
1387                 /* Prep the skb for the packet */
1388                 skb_put(skb, length);
1389
1390                 /* Grab the FCB if there is one */
1391                 if (gfar_uses_fcb(priv))
1392                         fcb = gfar_get_fcb(skb);
1393
1394                 /* Remove the padded bytes, if there are any */
1395                 if (priv->padding)
1396                         skb_pull(skb, priv->padding);
1397
1398                 if (priv->rx_csum_enable)
1399                         gfar_rx_checksum(skb, fcb);
1400
1401                 /* Tell the skb what kind of packet this is */
1402                 skb->protocol = eth_type_trans(skb, dev);
1403
1404                 /* Send the packet up the stack */
1405                 if (unlikely(priv->vlgrp && fcb->vln))
1406                         ret = gfar_rx_vlan(skb, priv->vlgrp, fcb->vlctl);
1407                 else
1408                         ret = RECEIVE(skb);
1409
1410                 if (NET_RX_DROP == ret)
1411                         priv->extra_stats.kernel_dropped++;
1412         }
1413
1414         return 0;
1415 }
1416
1417 /* gfar_clean_rx_ring() -- Processes each frame in the rx ring
1418  *   until the budget/quota has been reached. Returns the number
1419  *   of frames handled
1420  */
1421 int gfar_clean_rx_ring(struct net_device *dev, int rx_work_limit)
1422 {
1423         struct rxbd8 *bdp;
1424         struct sk_buff *skb;
1425         u16 pkt_len;
1426         int howmany = 0;
1427         struct gfar_private *priv = netdev_priv(dev);
1428
1429         /* Get the first full descriptor */
1430         bdp = priv->cur_rx;
1431
1432         while (!((bdp->status & RXBD_EMPTY) || (--rx_work_limit < 0))) {
1433                 skb = priv->rx_skbuff[priv->skb_currx];
1434
1435                 if (!(bdp->status &
1436                       (RXBD_LARGE | RXBD_SHORT | RXBD_NONOCTET
1437                        | RXBD_CRCERR | RXBD_OVERRUN | RXBD_TRUNCATED))) {
1438                         /* Increment the number of packets */
1439                         priv->stats.rx_packets++;
1440                         howmany++;
1441
1442                         /* Remove the FCS from the packet length */
1443                         pkt_len = bdp->length - 4;
1444
1445                         gfar_process_frame(dev, skb, pkt_len);
1446
1447                         priv->stats.rx_bytes += pkt_len;
1448                 } else {
1449                         count_errors(bdp->status, priv);
1450
1451                         if (skb)
1452                                 dev_kfree_skb_any(skb);
1453
1454                         priv->rx_skbuff[priv->skb_currx] = NULL;
1455                 }
1456
1457                 dev->last_rx = jiffies;
1458
1459                 /* Clear the status flags for this buffer */
1460                 bdp->status &= ~RXBD_STATS;
1461
1462                 /* Add another skb for the future */
1463                 skb = gfar_new_skb(dev, bdp);
1464                 priv->rx_skbuff[priv->skb_currx] = skb;
1465
1466                 /* Update to the next pointer */
1467                 if (bdp->status & RXBD_WRAP)
1468                         bdp = priv->rx_bd_base;
1469                 else
1470                         bdp++;
1471
1472                 /* update to point at the next skb */
1473                 priv->skb_currx =
1474                     (priv->skb_currx +
1475                      1) & RX_RING_MOD_MASK(priv->rx_ring_size);
1476
1477         }
1478
1479         /* Update the current rxbd pointer to be the next one */
1480         priv->cur_rx = bdp;
1481
1482         /* If no packets have arrived since the
1483          * last one we processed, clear the IEVENT RX and
1484          * BSY bits so that another interrupt won't be
1485          * generated when we set IMASK */
1486         if (bdp->status & RXBD_EMPTY)
1487                 gfar_write(&priv->regs->ievent, IEVENT_RX_MASK);
1488
1489         return howmany;
1490 }
1491
1492 #ifdef CONFIG_GFAR_NAPI
1493 static int gfar_poll(struct net_device *dev, int *budget)
1494 {
1495         int howmany;
1496         struct gfar_private *priv = netdev_priv(dev);
1497         int rx_work_limit = *budget;
1498
1499         if (rx_work_limit > dev->quota)
1500                 rx_work_limit = dev->quota;
1501
1502         howmany = gfar_clean_rx_ring(dev, rx_work_limit);
1503
1504         dev->quota -= howmany;
1505         rx_work_limit -= howmany;
1506         *budget -= howmany;
1507
1508         if (rx_work_limit >= 0) {
1509                 netif_rx_complete(dev);
1510
1511                 /* Clear the halt bit in RSTAT */
1512                 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT);
1513
1514                 gfar_write(&priv->regs->imask, IMASK_DEFAULT);
1515
1516                 /* If we are coalescing interrupts, update the timer */
1517                 /* Otherwise, clear it */
1518                 if (priv->rxcoalescing)
1519                         gfar_write(&priv->regs->rxic,
1520                                    mk_ic_value(priv->rxcount, priv->rxtime));
1521                 else
1522                         gfar_write(&priv->regs->rxic, 0);
1523         }
1524
1525         return (rx_work_limit < 0) ? 1 : 0;
1526 }
1527 #endif
1528
1529 /* The interrupt handler for devices with one interrupt */
1530 static irqreturn_t gfar_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1531 {
1532         struct net_device *dev = dev_id;
1533         struct gfar_private *priv = netdev_priv(dev);
1534
1535         /* Save ievent for future reference */
1536         u32 events = gfar_read(&priv->regs->ievent);
1537
1538         /* Clear IEVENT */
1539         gfar_write(&priv->regs->ievent, events);
1540
1541         /* Check for reception */
1542         if ((events & IEVENT_RXF0) || (events & IEVENT_RXB0))
1543                 gfar_receive(irq, dev_id, regs);
1544
1545         /* Check for transmit completion */
1546         if ((events & IEVENT_TXF) || (events & IEVENT_TXB))
1547                 gfar_transmit(irq, dev_id, regs);
1548
1549         /* Update error statistics */
1550         if (events & IEVENT_TXE) {
1551                 priv->stats.tx_errors++;
1552
1553                 if (events & IEVENT_LC)
1554                         priv->stats.tx_window_errors++;
1555                 if (events & IEVENT_CRL)
1556                         priv->stats.tx_aborted_errors++;
1557                 if (events & IEVENT_XFUN) {
1558                         if (netif_msg_tx_err(priv))
1559                                 printk(KERN_WARNING "%s: tx underrun. dropped packet\n", dev->name);
1560                         priv->stats.tx_dropped++;
1561                         priv->extra_stats.tx_underrun++;
1562
1563                         /* Reactivate the Tx Queues */
1564                         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
1565                 }
1566         }
1567         if (events & IEVENT_BSY) {
1568                 priv->stats.rx_errors++;
1569                 priv->extra_stats.rx_bsy++;
1570
1571                 gfar_receive(irq, dev_id, regs);
1572
1573 #ifndef CONFIG_GFAR_NAPI
1574                 /* Clear the halt bit in RSTAT */
1575                 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT);
1576 #endif
1577
1578                 if (netif_msg_rx_err(priv))
1579                         printk(KERN_DEBUG "%s: busy error (rhalt: %x)\n",
1580                                         dev->name,
1581                                         gfar_read(&priv->regs->rstat));
1582         }
1583         if (events & IEVENT_BABR) {
1584                 priv->stats.rx_errors++;
1585                 priv->extra_stats.rx_babr++;
1586
1587                 if (netif_msg_rx_err(priv))
1588                         printk(KERN_DEBUG "%s: babbling error\n", dev->name);
1589         }
1590         if (events & IEVENT_EBERR) {
1591                 priv->extra_stats.eberr++;
1592                 if (netif_msg_rx_err(priv))
1593                         printk(KERN_DEBUG "%s: EBERR\n", dev->name);
1594         }
1595         if ((events & IEVENT_RXC) && (netif_msg_rx_err(priv)))
1596                         printk(KERN_DEBUG "%s: control frame\n", dev->name);
1597
1598         if (events & IEVENT_BABT) {
1599                 priv->extra_stats.tx_babt++;
1600                 if (netif_msg_rx_err(priv))
1601                         printk(KERN_DEBUG "%s: babt error\n", dev->name);
1602         }
1603
1604         return IRQ_HANDLED;
1605 }
1606
1607 /* Called every time the controller might need to be made
1608  * aware of new link state.  The PHY code conveys this
1609  * information through variables in the phydev structure, and this
1610  * function converts those variables into the appropriate
1611  * register values, and can bring down the device if needed.
1612  */
1613 static void adjust_link(struct net_device *dev)
1614 {
1615         struct gfar_private *priv = netdev_priv(dev);
1616         struct gfar *regs = priv->regs;
1617         unsigned long flags;
1618         struct phy_device *phydev = priv->phydev;
1619         int new_state = 0;
1620
1621         spin_lock_irqsave(&priv->lock, flags);
1622         if (phydev->link) {
1623                 u32 tempval = gfar_read(&regs->maccfg2);
1624
1625                 /* Now we make sure that we can be in full duplex mode.
1626                  * If not, we operate in half-duplex mode. */
1627                 if (phydev->duplex != priv->oldduplex) {
1628                         new_state = 1;
1629                         if (!(phydev->duplex))
1630                                 tempval &= ~(MACCFG2_FULL_DUPLEX);
1631                         else
1632                                 tempval |= MACCFG2_FULL_DUPLEX;
1633
1634                         priv->oldduplex = phydev->duplex;
1635                 }
1636
1637                 if (phydev->speed != priv->oldspeed) {
1638                         new_state = 1;
1639                         switch (phydev->speed) {
1640                         case 1000:
1641                                 tempval =
1642                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_GMII);
1643                                 break;
1644                         case 100:
1645                         case 10:
1646                                 tempval =
1647                                     ((tempval & ~(MACCFG2_IF)) | MACCFG2_MII);
1648                                 break;
1649                         default:
1650                                 if (netif_msg_link(priv))
1651                                         printk(KERN_WARNING
1652                                                 "%s: Ack!  Speed (%d) is not 10/100/1000!\n",
1653                                                 dev->name, phydev->speed);
1654                                 break;
1655                         }
1656
1657                         priv->oldspeed = phydev->speed;
1658                 }
1659
1660                 gfar_write(&regs->maccfg2, tempval);
1661
1662                 if (!priv->oldlink) {
1663                         new_state = 1;
1664                         priv->oldlink = 1;
1665                         netif_schedule(dev);
1666                 }
1667         } else if (priv->oldlink) {
1668                 new_state = 1;
1669                 priv->oldlink = 0;
1670                 priv->oldspeed = 0;
1671                 priv->oldduplex = -1;
1672         }
1673
1674         if (new_state && netif_msg_link(priv))
1675                 phy_print_status(phydev);
1676
1677         spin_unlock_irqrestore(&priv->lock, flags);
1678 }
1679
1680 /* Update the hash table based on the current list of multicast
1681  * addresses we subscribe to.  Also, change the promiscuity of
1682  * the device based on the flags (this function is called
1683  * whenever dev->flags is changed */
1684 static void gfar_set_multi(struct net_device *dev)
1685 {
1686         struct dev_mc_list *mc_ptr;
1687         struct gfar_private *priv = netdev_priv(dev);
1688         struct gfar *regs = priv->regs;
1689         u32 tempval;
1690
1691         if(dev->flags & IFF_PROMISC) {
1692                 if (netif_msg_drv(priv))
1693                         printk(KERN_INFO "%s: Entering promiscuous mode.\n",
1694                                         dev->name);
1695                 /* Set RCTRL to PROM */
1696                 tempval = gfar_read(&regs->rctrl);
1697                 tempval |= RCTRL_PROM;
1698                 gfar_write(&regs->rctrl, tempval);
1699         } else {
1700                 /* Set RCTRL to not PROM */
1701                 tempval = gfar_read(&regs->rctrl);
1702                 tempval &= ~(RCTRL_PROM);
1703                 gfar_write(&regs->rctrl, tempval);
1704         }
1705         
1706         if(dev->flags & IFF_ALLMULTI) {
1707                 /* Set the hash to rx all multicast frames */
1708                 gfar_write(&regs->igaddr0, 0xffffffff);
1709                 gfar_write(&regs->igaddr1, 0xffffffff);
1710                 gfar_write(&regs->igaddr2, 0xffffffff);
1711                 gfar_write(&regs->igaddr3, 0xffffffff);
1712                 gfar_write(&regs->igaddr4, 0xffffffff);
1713                 gfar_write(&regs->igaddr5, 0xffffffff);
1714                 gfar_write(&regs->igaddr6, 0xffffffff);
1715                 gfar_write(&regs->igaddr7, 0xffffffff);
1716                 gfar_write(&regs->gaddr0, 0xffffffff);
1717                 gfar_write(&regs->gaddr1, 0xffffffff);
1718                 gfar_write(&regs->gaddr2, 0xffffffff);
1719                 gfar_write(&regs->gaddr3, 0xffffffff);
1720                 gfar_write(&regs->gaddr4, 0xffffffff);
1721                 gfar_write(&regs->gaddr5, 0xffffffff);
1722                 gfar_write(&regs->gaddr6, 0xffffffff);
1723                 gfar_write(&regs->gaddr7, 0xffffffff);
1724         } else {
1725                 /* zero out the hash */
1726                 gfar_write(&regs->igaddr0, 0x0);
1727                 gfar_write(&regs->igaddr1, 0x0);
1728                 gfar_write(&regs->igaddr2, 0x0);
1729                 gfar_write(&regs->igaddr3, 0x0);
1730                 gfar_write(&regs->igaddr4, 0x0);
1731                 gfar_write(&regs->igaddr5, 0x0);
1732                 gfar_write(&regs->igaddr6, 0x0);
1733                 gfar_write(&regs->igaddr7, 0x0);
1734                 gfar_write(&regs->gaddr0, 0x0);
1735                 gfar_write(&regs->gaddr1, 0x0);
1736                 gfar_write(&regs->gaddr2, 0x0);
1737                 gfar_write(&regs->gaddr3, 0x0);
1738                 gfar_write(&regs->gaddr4, 0x0);
1739                 gfar_write(&regs->gaddr5, 0x0);
1740                 gfar_write(&regs->gaddr6, 0x0);
1741                 gfar_write(&regs->gaddr7, 0x0);
1742
1743                 if(dev->mc_count == 0)
1744                         return;
1745
1746                 /* Parse the list, and set the appropriate bits */
1747                 for(mc_ptr = dev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
1748                         gfar_set_hash_for_addr(dev, mc_ptr->dmi_addr);
1749                 }
1750         }
1751
1752         return;
1753 }
1754
1755 /* Set the appropriate hash bit for the given addr */
1756 /* The algorithm works like so:
1757  * 1) Take the Destination Address (ie the multicast address), and
1758  * do a CRC on it (little endian), and reverse the bits of the
1759  * result.
1760  * 2) Use the 8 most significant bits as a hash into a 256-entry
1761  * table.  The table is controlled through 8 32-bit registers:
1762  * gaddr0-7.  gaddr0's MSB is entry 0, and gaddr7's LSB is
1763  * gaddr7.  This means that the 3 most significant bits in the
1764  * hash index which gaddr register to use, and the 5 other bits
1765  * indicate which bit (assuming an IBM numbering scheme, which
1766  * for PowerPC (tm) is usually the case) in the register holds
1767  * the entry. */
1768 static void gfar_set_hash_for_addr(struct net_device *dev, u8 *addr)
1769 {
1770         u32 tempval;
1771         struct gfar_private *priv = netdev_priv(dev);
1772         u32 result = ether_crc(MAC_ADDR_LEN, addr);
1773         int width = priv->hash_width;
1774         u8 whichbit = (result >> (32 - width)) & 0x1f;
1775         u8 whichreg = result >> (32 - width + 5);
1776         u32 value = (1 << (31-whichbit));
1777
1778         tempval = gfar_read(priv->hash_regs[whichreg]);
1779         tempval |= value;
1780         gfar_write(priv->hash_regs[whichreg], tempval);
1781
1782         return;
1783 }
1784
1785 /* GFAR error interrupt handler */
1786 static irqreturn_t gfar_error(int irq, void *dev_id, struct pt_regs *regs)
1787 {
1788         struct net_device *dev = dev_id;
1789         struct gfar_private *priv = netdev_priv(dev);
1790
1791         /* Save ievent for future reference */
1792         u32 events = gfar_read(&priv->regs->ievent);
1793
1794         /* Clear IEVENT */
1795         gfar_write(&priv->regs->ievent, IEVENT_ERR_MASK);
1796
1797         /* Hmm... */
1798         if (netif_msg_rx_err(priv) || netif_msg_tx_err(priv))
1799                 printk(KERN_DEBUG "%s: error interrupt (ievent=0x%08x imask=0x%08x)\n",
1800                                 dev->name, events, gfar_read(&priv->regs->imask));
1801
1802         /* Update the error counters */
1803         if (events & IEVENT_TXE) {
1804                 priv->stats.tx_errors++;
1805
1806                 if (events & IEVENT_LC)
1807                         priv->stats.tx_window_errors++;
1808                 if (events & IEVENT_CRL)
1809                         priv->stats.tx_aborted_errors++;
1810                 if (events & IEVENT_XFUN) {
1811                         if (netif_msg_tx_err(priv))
1812                                 printk(KERN_DEBUG "%s: underrun.  packet dropped.\n",
1813                                                 dev->name);
1814                         priv->stats.tx_dropped++;
1815                         priv->extra_stats.tx_underrun++;
1816
1817                         /* Reactivate the Tx Queues */
1818                         gfar_write(&priv->regs->tstat, TSTAT_CLEAR_THALT);
1819                 }
1820                 if (netif_msg_tx_err(priv))
1821                         printk(KERN_DEBUG "%s: Transmit Error\n", dev->name);
1822         }
1823         if (events & IEVENT_BSY) {
1824                 priv->stats.rx_errors++;
1825                 priv->extra_stats.rx_bsy++;
1826
1827                 gfar_receive(irq, dev_id, regs);
1828
1829 #ifndef CONFIG_GFAR_NAPI
1830                 /* Clear the halt bit in RSTAT */
1831                 gfar_write(&priv->regs->rstat, RSTAT_CLEAR_RHALT);
1832 #endif
1833
1834                 if (netif_msg_rx_err(priv))
1835                         printk(KERN_DEBUG "%s: busy error (rhalt: %x)\n",
1836                                         dev->name,
1837                                         gfar_read(&priv->regs->rstat));
1838         }
1839         if (events & IEVENT_BABR) {
1840                 priv->stats.rx_errors++;
1841                 priv->extra_stats.rx_babr++;
1842
1843                 if (netif_msg_rx_err(priv))
1844                         printk(KERN_DEBUG "%s: babbling error\n", dev->name);
1845         }
1846         if (events & IEVENT_EBERR) {
1847                 priv->extra_stats.eberr++;
1848                 if (netif_msg_rx_err(priv))
1849                         printk(KERN_DEBUG "%s: EBERR\n", dev->name);
1850         }
1851         if ((events & IEVENT_RXC) && netif_msg_rx_status(priv))
1852                 if (netif_msg_rx_status(priv))
1853                         printk(KERN_DEBUG "%s: control frame\n", dev->name);
1854
1855         if (events & IEVENT_BABT) {
1856                 priv->extra_stats.tx_babt++;
1857                 if (netif_msg_tx_err(priv))
1858                         printk(KERN_DEBUG "%s: babt error\n", dev->name);
1859         }
1860         return IRQ_HANDLED;
1861 }
1862
1863 /* Structure for a device driver */
1864 static struct device_driver gfar_driver = {
1865         .name = "fsl-gianfar",
1866         .bus = &platform_bus_type,
1867         .probe = gfar_probe,
1868         .remove = gfar_remove,
1869 };
1870
1871 static int __init gfar_init(void)
1872 {
1873         int err = gfar_mdio_init();
1874
1875         if (err)
1876                 return err;
1877
1878         err = driver_register(&gfar_driver);
1879
1880         if (err)
1881                 gfar_mdio_exit();
1882         
1883         return err;
1884 }
1885
1886 static void __exit gfar_exit(void)
1887 {
1888         driver_unregister(&gfar_driver);
1889         gfar_mdio_exit();
1890 }
1891
1892 module_init(gfar_init);
1893 module_exit(gfar_exit);
1894