2 Copyright (C) 2004 - 2008 rt2x00 SourceForge Project
3 <http://rt2x00.serialmonkey.com>
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the
17 Free Software Foundation, Inc.,
18 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
23 Abstract: rt73usb device specific routines.
24 Supported chipsets: rt2571W & rt2671.
27 #include <linux/crc-itu-t.h>
28 #include <linux/delay.h>
29 #include <linux/etherdevice.h>
30 #include <linux/init.h>
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/usb.h>
36 #include "rt2x00usb.h"
41 * All access to the CSR registers will go through the methods
42 * rt73usb_register_read and rt73usb_register_write.
43 * BBP and RF register require indirect register access,
44 * and use the CSR registers BBPCSR and RFCSR to achieve this.
45 * These indirect registers work with busy bits,
46 * and we will try maximal REGISTER_BUSY_COUNT times to access
47 * the register while taking a REGISTER_BUSY_DELAY us delay
48 * between each attampt. When the busy bit is still set at that time,
49 * the access attempt is considered to have failed,
50 * and we will print an error.
51 * The _lock versions must be used if you already hold the usb_cache_mutex
53 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
54 const unsigned int offset, u32 *value)
57 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
58 USB_VENDOR_REQUEST_IN, offset,
59 ®, sizeof(u32), REGISTER_TIMEOUT);
60 *value = le32_to_cpu(reg);
63 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
64 const unsigned int offset, u32 *value)
67 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
68 USB_VENDOR_REQUEST_IN, offset,
69 ®, sizeof(u32), REGISTER_TIMEOUT);
70 *value = le32_to_cpu(reg);
73 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
74 const unsigned int offset,
75 void *value, const u32 length)
77 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
78 USB_VENDOR_REQUEST_IN, offset,
80 REGISTER_TIMEOUT32(length));
83 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
84 const unsigned int offset, u32 value)
86 __le32 reg = cpu_to_le32(value);
87 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
88 USB_VENDOR_REQUEST_OUT, offset,
89 ®, sizeof(u32), REGISTER_TIMEOUT);
92 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
93 const unsigned int offset, u32 value)
95 __le32 reg = cpu_to_le32(value);
96 rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
97 USB_VENDOR_REQUEST_OUT, offset,
98 ®, sizeof(u32), REGISTER_TIMEOUT);
101 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
102 const unsigned int offset,
103 void *value, const u32 length)
105 rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
106 USB_VENDOR_REQUEST_OUT, offset,
108 REGISTER_TIMEOUT32(length));
111 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
116 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
117 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, ®);
118 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
120 udelay(REGISTER_BUSY_DELAY);
126 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
127 const unsigned int word, const u8 value)
131 mutex_lock(&rt2x00dev->usb_cache_mutex);
134 * Wait until the BBP becomes ready.
136 reg = rt73usb_bbp_check(rt2x00dev);
137 if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
141 * Write the data into the BBP.
144 rt2x00_set_field32(®, PHY_CSR3_VALUE, value);
145 rt2x00_set_field32(®, PHY_CSR3_REGNUM, word);
146 rt2x00_set_field32(®, PHY_CSR3_BUSY, 1);
147 rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 0);
149 rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
150 mutex_unlock(&rt2x00dev->usb_cache_mutex);
155 mutex_unlock(&rt2x00dev->usb_cache_mutex);
157 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
160 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
161 const unsigned int word, u8 *value)
165 mutex_lock(&rt2x00dev->usb_cache_mutex);
168 * Wait until the BBP becomes ready.
170 reg = rt73usb_bbp_check(rt2x00dev);
171 if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
175 * Write the request into the BBP.
178 rt2x00_set_field32(®, PHY_CSR3_REGNUM, word);
179 rt2x00_set_field32(®, PHY_CSR3_BUSY, 1);
180 rt2x00_set_field32(®, PHY_CSR3_READ_CONTROL, 1);
182 rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
185 * Wait until the BBP becomes ready.
187 reg = rt73usb_bbp_check(rt2x00dev);
188 if (rt2x00_get_field32(reg, PHY_CSR3_BUSY))
191 *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
192 mutex_unlock(&rt2x00dev->usb_cache_mutex);
197 mutex_unlock(&rt2x00dev->usb_cache_mutex);
199 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
203 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
204 const unsigned int word, const u32 value)
212 mutex_lock(&rt2x00dev->usb_cache_mutex);
214 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
215 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, ®);
216 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
218 udelay(REGISTER_BUSY_DELAY);
221 mutex_unlock(&rt2x00dev->usb_cache_mutex);
222 ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
227 rt2x00_set_field32(®, PHY_CSR4_VALUE, value);
230 * RF5225 and RF2527 contain 21 bits per RF register value,
231 * all others contain 20 bits.
233 rt2x00_set_field32(®, PHY_CSR4_NUMBER_OF_BITS,
234 20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
235 rt2x00_rf(&rt2x00dev->chip, RF2527)));
236 rt2x00_set_field32(®, PHY_CSR4_IF_SELECT, 0);
237 rt2x00_set_field32(®, PHY_CSR4_BUSY, 1);
239 rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
240 rt2x00_rf_write(rt2x00dev, word, value);
241 mutex_unlock(&rt2x00dev->usb_cache_mutex);
244 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
245 #define CSR_OFFSET(__word) ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
247 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
248 const unsigned int word, u32 *data)
250 rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
253 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
254 const unsigned int word, u32 data)
256 rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
259 static const struct rt2x00debug rt73usb_rt2x00debug = {
260 .owner = THIS_MODULE,
262 .read = rt73usb_read_csr,
263 .write = rt73usb_write_csr,
264 .word_size = sizeof(u32),
265 .word_count = CSR_REG_SIZE / sizeof(u32),
268 .read = rt2x00_eeprom_read,
269 .write = rt2x00_eeprom_write,
270 .word_size = sizeof(u16),
271 .word_count = EEPROM_SIZE / sizeof(u16),
274 .read = rt73usb_bbp_read,
275 .write = rt73usb_bbp_write,
276 .word_size = sizeof(u8),
277 .word_count = BBP_SIZE / sizeof(u8),
280 .read = rt2x00_rf_read,
281 .write = rt73usb_rf_write,
282 .word_size = sizeof(u32),
283 .word_count = RF_SIZE / sizeof(u32),
286 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
288 #ifdef CONFIG_RT73USB_LEDS
289 static void rt73usb_brightness_set(struct led_classdev *led_cdev,
290 enum led_brightness brightness)
292 struct rt2x00_led *led =
293 container_of(led_cdev, struct rt2x00_led, led_dev);
294 unsigned int enabled = brightness != LED_OFF;
295 unsigned int a_mode =
296 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_5GHZ);
297 unsigned int bg_mode =
298 (enabled && led->rt2x00dev->curr_band == IEEE80211_BAND_2GHZ);
300 if (led->type == LED_TYPE_RADIO) {
301 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
302 MCU_LEDCS_RADIO_STATUS, enabled);
304 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
305 0, led->rt2x00dev->led_mcu_reg,
307 } else if (led->type == LED_TYPE_ASSOC) {
308 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
309 MCU_LEDCS_LINK_BG_STATUS, bg_mode);
310 rt2x00_set_field16(&led->rt2x00dev->led_mcu_reg,
311 MCU_LEDCS_LINK_A_STATUS, a_mode);
313 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
314 0, led->rt2x00dev->led_mcu_reg,
316 } else if (led->type == LED_TYPE_QUALITY) {
318 * The brightness is divided into 6 levels (0 - 5),
319 * this means we need to convert the brightness
320 * argument into the matching level within that range.
322 rt2x00usb_vendor_request_sw(led->rt2x00dev, USB_LED_CONTROL,
323 brightness / (LED_FULL / 6),
324 led->rt2x00dev->led_mcu_reg,
329 static int rt73usb_blink_set(struct led_classdev *led_cdev,
330 unsigned long *delay_on,
331 unsigned long *delay_off)
333 struct rt2x00_led *led =
334 container_of(led_cdev, struct rt2x00_led, led_dev);
337 rt73usb_register_read(led->rt2x00dev, MAC_CSR14, ®);
338 rt2x00_set_field32(®, MAC_CSR14_ON_PERIOD, *delay_on);
339 rt2x00_set_field32(®, MAC_CSR14_OFF_PERIOD, *delay_off);
340 rt73usb_register_write(led->rt2x00dev, MAC_CSR14, reg);
345 static void rt73usb_init_led(struct rt2x00_dev *rt2x00dev,
346 struct rt2x00_led *led,
349 led->rt2x00dev = rt2x00dev;
351 led->led_dev.brightness_set = rt73usb_brightness_set;
352 led->led_dev.blink_set = rt73usb_blink_set;
353 led->flags = LED_INITIALIZED;
355 #endif /* CONFIG_RT73USB_LEDS */
358 * Configuration handlers.
360 static void rt73usb_config_filter(struct rt2x00_dev *rt2x00dev,
361 const unsigned int filter_flags)
366 * Start configuration steps.
367 * Note that the version error will always be dropped
368 * and broadcast frames will always be accepted since
369 * there is no filter for it at this time.
371 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
372 rt2x00_set_field32(®, TXRX_CSR0_DROP_CRC,
373 !(filter_flags & FIF_FCSFAIL));
374 rt2x00_set_field32(®, TXRX_CSR0_DROP_PHYSICAL,
375 !(filter_flags & FIF_PLCPFAIL));
376 rt2x00_set_field32(®, TXRX_CSR0_DROP_CONTROL,
377 !(filter_flags & FIF_CONTROL));
378 rt2x00_set_field32(®, TXRX_CSR0_DROP_NOT_TO_ME,
379 !(filter_flags & FIF_PROMISC_IN_BSS));
380 rt2x00_set_field32(®, TXRX_CSR0_DROP_TO_DS,
381 !(filter_flags & FIF_PROMISC_IN_BSS) &&
382 !rt2x00dev->intf_ap_count);
383 rt2x00_set_field32(®, TXRX_CSR0_DROP_VERSION_ERROR, 1);
384 rt2x00_set_field32(®, TXRX_CSR0_DROP_MULTICAST,
385 !(filter_flags & FIF_ALLMULTI));
386 rt2x00_set_field32(®, TXRX_CSR0_DROP_BROADCAST, 0);
387 rt2x00_set_field32(®, TXRX_CSR0_DROP_ACK_CTS,
388 !(filter_flags & FIF_CONTROL));
389 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
392 static void rt73usb_config_intf(struct rt2x00_dev *rt2x00dev,
393 struct rt2x00_intf *intf,
394 struct rt2x00intf_conf *conf,
395 const unsigned int flags)
397 unsigned int beacon_base;
400 if (flags & CONFIG_UPDATE_TYPE) {
402 * Clear current synchronisation setup.
403 * For the Beacon base registers we only need to clear
404 * the first byte since that byte contains the VALID and OWNER
405 * bits which (when set to 0) will invalidate the entire beacon.
407 beacon_base = HW_BEACON_OFFSET(intf->beacon->entry_idx);
408 rt73usb_register_write(rt2x00dev, beacon_base, 0);
411 * Enable synchronisation.
413 rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®);
414 rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 1);
415 rt2x00_set_field32(®, TXRX_CSR9_TSF_SYNC, conf->sync);
416 rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 1);
417 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
420 if (flags & CONFIG_UPDATE_MAC) {
421 reg = le32_to_cpu(conf->mac[1]);
422 rt2x00_set_field32(®, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
423 conf->mac[1] = cpu_to_le32(reg);
425 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2,
426 conf->mac, sizeof(conf->mac));
429 if (flags & CONFIG_UPDATE_BSSID) {
430 reg = le32_to_cpu(conf->bssid[1]);
431 rt2x00_set_field32(®, MAC_CSR5_BSS_ID_MASK, 3);
432 conf->bssid[1] = cpu_to_le32(reg);
434 rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4,
435 conf->bssid, sizeof(conf->bssid));
439 static void rt73usb_config_erp(struct rt2x00_dev *rt2x00dev,
440 struct rt2x00lib_erp *erp)
444 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
445 rt2x00_set_field32(®, TXRX_CSR0_RX_ACK_TIMEOUT, erp->ack_timeout);
446 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
448 rt73usb_register_read(rt2x00dev, TXRX_CSR4, ®);
449 rt2x00_set_field32(®, TXRX_CSR4_AUTORESPOND_PREAMBLE,
450 !!erp->short_preamble);
451 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
454 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
455 const int basic_rate_mask)
457 rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
460 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
461 struct rf_channel *rf, const int txpower)
467 rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
468 rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
470 smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
471 rt2x00_rf(&rt2x00dev->chip, RF2527));
473 rt73usb_bbp_read(rt2x00dev, 3, &r3);
474 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
475 rt73usb_bbp_write(rt2x00dev, 3, r3);
478 if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
479 r94 += txpower - MAX_TXPOWER;
480 else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
482 rt73usb_bbp_write(rt2x00dev, 94, r94);
484 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
485 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
486 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
487 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
489 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
490 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
491 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
492 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
494 rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
495 rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
496 rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
497 rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
502 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
505 struct rf_channel rf;
507 rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
508 rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
509 rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
510 rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
512 rt73usb_config_channel(rt2x00dev, &rf, txpower);
515 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
516 struct antenna_setup *ant)
523 rt73usb_bbp_read(rt2x00dev, 3, &r3);
524 rt73usb_bbp_read(rt2x00dev, 4, &r4);
525 rt73usb_bbp_read(rt2x00dev, 77, &r77);
527 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
530 * Configure the RX antenna.
533 case ANTENNA_HW_DIVERSITY:
534 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
535 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
536 && (rt2x00dev->curr_band != IEEE80211_BAND_5GHZ);
537 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
540 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
541 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
542 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
543 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
545 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
549 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
550 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
551 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ)
552 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
554 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
558 rt73usb_bbp_write(rt2x00dev, 77, r77);
559 rt73usb_bbp_write(rt2x00dev, 3, r3);
560 rt73usb_bbp_write(rt2x00dev, 4, r4);
563 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
564 struct antenna_setup *ant)
570 rt73usb_bbp_read(rt2x00dev, 3, &r3);
571 rt73usb_bbp_read(rt2x00dev, 4, &r4);
572 rt73usb_bbp_read(rt2x00dev, 77, &r77);
574 rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
575 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
576 !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
579 * Configure the RX antenna.
582 case ANTENNA_HW_DIVERSITY:
583 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
586 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
587 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
591 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
592 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
596 rt73usb_bbp_write(rt2x00dev, 77, r77);
597 rt73usb_bbp_write(rt2x00dev, 3, r3);
598 rt73usb_bbp_write(rt2x00dev, 4, r4);
604 * value[0] -> non-LNA
610 static const struct antenna_sel antenna_sel_a[] = {
611 { 96, { 0x58, 0x78 } },
612 { 104, { 0x38, 0x48 } },
613 { 75, { 0xfe, 0x80 } },
614 { 86, { 0xfe, 0x80 } },
615 { 88, { 0xfe, 0x80 } },
616 { 35, { 0x60, 0x60 } },
617 { 97, { 0x58, 0x58 } },
618 { 98, { 0x58, 0x58 } },
621 static const struct antenna_sel antenna_sel_bg[] = {
622 { 96, { 0x48, 0x68 } },
623 { 104, { 0x2c, 0x3c } },
624 { 75, { 0xfe, 0x80 } },
625 { 86, { 0xfe, 0x80 } },
626 { 88, { 0xfe, 0x80 } },
627 { 35, { 0x50, 0x50 } },
628 { 97, { 0x48, 0x48 } },
629 { 98, { 0x48, 0x48 } },
632 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
633 struct antenna_setup *ant)
635 const struct antenna_sel *sel;
641 * We should never come here because rt2x00lib is supposed
642 * to catch this and send us the correct antenna explicitely.
644 BUG_ON(ant->rx == ANTENNA_SW_DIVERSITY ||
645 ant->tx == ANTENNA_SW_DIVERSITY);
647 if (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ) {
649 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
651 sel = antenna_sel_bg;
652 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
655 for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
656 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
658 rt73usb_register_read(rt2x00dev, PHY_CSR0, ®);
660 rt2x00_set_field32(®, PHY_CSR0_PA_PE_BG,
661 (rt2x00dev->curr_band == IEEE80211_BAND_2GHZ));
662 rt2x00_set_field32(®, PHY_CSR0_PA_PE_A,
663 (rt2x00dev->curr_band == IEEE80211_BAND_5GHZ));
665 rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
667 if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
668 rt2x00_rf(&rt2x00dev->chip, RF5225))
669 rt73usb_config_antenna_5x(rt2x00dev, ant);
670 else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
671 rt2x00_rf(&rt2x00dev->chip, RF2527))
672 rt73usb_config_antenna_2x(rt2x00dev, ant);
675 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
676 struct rt2x00lib_conf *libconf)
680 rt73usb_register_read(rt2x00dev, MAC_CSR9, ®);
681 rt2x00_set_field32(®, MAC_CSR9_SLOT_TIME, libconf->slot_time);
682 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
684 rt73usb_register_read(rt2x00dev, MAC_CSR8, ®);
685 rt2x00_set_field32(®, MAC_CSR8_SIFS, libconf->sifs);
686 rt2x00_set_field32(®, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
687 rt2x00_set_field32(®, MAC_CSR8_EIFS, libconf->eifs);
688 rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
690 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
691 rt2x00_set_field32(®, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
692 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
694 rt73usb_register_read(rt2x00dev, TXRX_CSR4, ®);
695 rt2x00_set_field32(®, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
696 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
698 rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®);
699 rt2x00_set_field32(®, TXRX_CSR9_BEACON_INTERVAL,
700 libconf->conf->beacon_int * 16);
701 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
704 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
705 struct rt2x00lib_conf *libconf,
706 const unsigned int flags)
708 if (flags & CONFIG_UPDATE_PHYMODE)
709 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
710 if (flags & CONFIG_UPDATE_CHANNEL)
711 rt73usb_config_channel(rt2x00dev, &libconf->rf,
712 libconf->conf->power_level);
713 if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
714 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
715 if (flags & CONFIG_UPDATE_ANTENNA)
716 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
717 if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
718 rt73usb_config_duration(rt2x00dev, libconf);
724 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
725 struct link_qual *qual)
730 * Update FCS error count from register.
732 rt73usb_register_read(rt2x00dev, STA_CSR0, ®);
733 qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
736 * Update False CCA count from register.
738 rt73usb_register_read(rt2x00dev, STA_CSR1, ®);
739 qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
742 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
744 rt73usb_bbp_write(rt2x00dev, 17, 0x20);
745 rt2x00dev->link.vgc_level = 0x20;
748 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
750 int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
755 rt73usb_bbp_read(rt2x00dev, 17, &r17);
758 * Determine r17 bounds.
760 if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
764 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
772 } else if (rssi > -84) {
780 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
787 * If we are not associated, we should go straight to the
788 * dynamic CCA tuning.
790 if (!rt2x00dev->intf_associated)
791 goto dynamic_cca_tune;
794 * Special big-R17 for very short distance
798 rt73usb_bbp_write(rt2x00dev, 17, 0x60);
803 * Special big-R17 for short distance
807 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
812 * Special big-R17 for middle-short distance
816 if (r17 != low_bound)
817 rt73usb_bbp_write(rt2x00dev, 17, low_bound);
822 * Special mid-R17 for middle distance
825 if (r17 != (low_bound + 0x10))
826 rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
831 * Special case: Change up_bound based on the rssi.
832 * Lower up_bound when rssi is weaker then -74 dBm.
834 up_bound -= 2 * (-74 - rssi);
835 if (low_bound > up_bound)
836 up_bound = low_bound;
838 if (r17 > up_bound) {
839 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
846 * r17 does not yet exceed upper limit, continue and base
847 * the r17 tuning on the false CCA count.
849 if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
853 rt73usb_bbp_write(rt2x00dev, 17, r17);
854 } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
858 rt73usb_bbp_write(rt2x00dev, 17, r17);
865 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
867 return FIRMWARE_RT2571;
870 static u16 rt73usb_get_firmware_crc(const void *data, const size_t len)
875 * Use the crc itu-t algorithm.
876 * The last 2 bytes in the firmware array are the crc checksum itself,
877 * this means that we should never pass those 2 bytes to the crc
880 crc = crc_itu_t(0, data, len - 2);
881 crc = crc_itu_t_byte(crc, 0);
882 crc = crc_itu_t_byte(crc, 0);
887 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, const void *data,
893 const char *ptr = data;
898 * Wait for stable hardware.
900 for (i = 0; i < 100; i++) {
901 rt73usb_register_read(rt2x00dev, MAC_CSR0, ®);
908 ERROR(rt2x00dev, "Unstable hardware.\n");
913 * Write firmware to device.
914 * We setup a seperate cache for this action,
915 * since we are going to write larger chunks of data
916 * then normally used cache size.
918 cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
920 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
924 for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
925 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
927 memcpy(cache, ptr, buflen);
929 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
930 USB_VENDOR_REQUEST_OUT,
931 FIRMWARE_IMAGE_BASE + i, 0,
933 REGISTER_TIMEOUT32(buflen));
941 * Send firmware request to device to load firmware,
942 * we need to specify a long timeout time.
944 status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
945 0, USB_MODE_FIRMWARE,
946 REGISTER_TIMEOUT_FIRMWARE);
948 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
956 * Initialization functions.
958 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
962 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
963 rt2x00_set_field32(®, TXRX_CSR0_AUTO_TX_SEQ, 1);
964 rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX, 0);
965 rt2x00_set_field32(®, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
966 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
968 rt73usb_register_read(rt2x00dev, TXRX_CSR1, ®);
969 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
970 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID0_VALID, 1);
971 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
972 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID1_VALID, 1);
973 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
974 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID2_VALID, 1);
975 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
976 rt2x00_set_field32(®, TXRX_CSR1_BBP_ID3_VALID, 1);
977 rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
980 * CCK TXD BBP registers
982 rt73usb_register_read(rt2x00dev, TXRX_CSR2, ®);
983 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID0, 13);
984 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID0_VALID, 1);
985 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID1, 12);
986 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID1_VALID, 1);
987 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID2, 11);
988 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID2_VALID, 1);
989 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID3, 10);
990 rt2x00_set_field32(®, TXRX_CSR2_BBP_ID3_VALID, 1);
991 rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
994 * OFDM TXD BBP registers
996 rt73usb_register_read(rt2x00dev, TXRX_CSR3, ®);
997 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID0, 7);
998 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID0_VALID, 1);
999 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID1, 6);
1000 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID1_VALID, 1);
1001 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID2, 5);
1002 rt2x00_set_field32(®, TXRX_CSR3_BBP_ID2_VALID, 1);
1003 rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
1005 rt73usb_register_read(rt2x00dev, TXRX_CSR7, ®);
1006 rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_6MBS, 59);
1007 rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_9MBS, 53);
1008 rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_12MBS, 49);
1009 rt2x00_set_field32(®, TXRX_CSR7_ACK_CTS_18MBS, 46);
1010 rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
1012 rt73usb_register_read(rt2x00dev, TXRX_CSR8, ®);
1013 rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_24MBS, 44);
1014 rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_36MBS, 42);
1015 rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_48MBS, 42);
1016 rt2x00_set_field32(®, TXRX_CSR8_ACK_CTS_54MBS, 42);
1017 rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
1019 rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®);
1020 rt2x00_set_field32(®, TXRX_CSR9_BEACON_INTERVAL, 0);
1021 rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0);
1022 rt2x00_set_field32(®, TXRX_CSR9_TSF_SYNC, 0);
1023 rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0);
1024 rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
1025 rt2x00_set_field32(®, TXRX_CSR9_TIMESTAMP_COMPENSATE, 0);
1026 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1028 rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
1030 rt73usb_register_read(rt2x00dev, MAC_CSR6, ®);
1031 rt2x00_set_field32(®, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
1032 rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
1034 rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
1036 if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
1039 rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
1042 * Invalidate all Shared Keys (SEC_CSR0),
1043 * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
1045 rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
1046 rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
1047 rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
1050 if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1051 rt2x00_rf(&rt2x00dev->chip, RF2527))
1052 rt2x00_set_field32(®, PHY_CSR1_RF_RPI, 1);
1053 rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1055 rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1056 rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1057 rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1059 rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, ®);
1060 rt2x00_set_field32(®, AC_TXOP_CSR0_AC0_TX_OP, 0);
1061 rt2x00_set_field32(®, AC_TXOP_CSR0_AC1_TX_OP, 0);
1062 rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1064 rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, ®);
1065 rt2x00_set_field32(®, AC_TXOP_CSR1_AC2_TX_OP, 192);
1066 rt2x00_set_field32(®, AC_TXOP_CSR1_AC3_TX_OP, 48);
1067 rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1069 rt73usb_register_read(rt2x00dev, MAC_CSR9, ®);
1070 rt2x00_set_field32(®, MAC_CSR9_CW_SELECT, 0);
1071 rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1075 * For the Beacon base registers we only need to clear
1076 * the first byte since that byte contains the VALID and OWNER
1077 * bits which (when set to 0) will invalidate the entire beacon.
1079 rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
1080 rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
1081 rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
1082 rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
1085 * We must clear the error counters.
1086 * These registers are cleared on read,
1087 * so we may pass a useless variable to store the value.
1089 rt73usb_register_read(rt2x00dev, STA_CSR0, ®);
1090 rt73usb_register_read(rt2x00dev, STA_CSR1, ®);
1091 rt73usb_register_read(rt2x00dev, STA_CSR2, ®);
1094 * Reset MAC and BBP registers.
1096 rt73usb_register_read(rt2x00dev, MAC_CSR1, ®);
1097 rt2x00_set_field32(®, MAC_CSR1_SOFT_RESET, 1);
1098 rt2x00_set_field32(®, MAC_CSR1_BBP_RESET, 1);
1099 rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1101 rt73usb_register_read(rt2x00dev, MAC_CSR1, ®);
1102 rt2x00_set_field32(®, MAC_CSR1_SOFT_RESET, 0);
1103 rt2x00_set_field32(®, MAC_CSR1_BBP_RESET, 0);
1104 rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1106 rt73usb_register_read(rt2x00dev, MAC_CSR1, ®);
1107 rt2x00_set_field32(®, MAC_CSR1_HOST_READY, 1);
1108 rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1113 static int rt73usb_wait_bbp_ready(struct rt2x00_dev *rt2x00dev)
1118 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1119 rt73usb_bbp_read(rt2x00dev, 0, &value);
1120 if ((value != 0xff) && (value != 0x00))
1122 udelay(REGISTER_BUSY_DELAY);
1125 ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1129 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1136 if (unlikely(rt73usb_wait_bbp_ready(rt2x00dev)))
1139 rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1140 rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1141 rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1142 rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1143 rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1144 rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1145 rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1146 rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1147 rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1148 rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1149 rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1150 rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1151 rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1152 rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1153 rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1154 rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1155 rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1156 rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1157 rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1158 rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1159 rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1160 rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1161 rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1162 rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1163 rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1165 for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1166 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1168 if (eeprom != 0xffff && eeprom != 0x0000) {
1169 reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1170 value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1171 rt73usb_bbp_write(rt2x00dev, reg_id, value);
1179 * Device state switch handlers.
1181 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1182 enum dev_state state)
1186 rt73usb_register_read(rt2x00dev, TXRX_CSR0, ®);
1187 rt2x00_set_field32(®, TXRX_CSR0_DISABLE_RX,
1188 (state == STATE_RADIO_RX_OFF) ||
1189 (state == STATE_RADIO_RX_OFF_LINK));
1190 rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1193 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1196 * Initialize all registers.
1198 if (unlikely(rt73usb_init_registers(rt2x00dev) ||
1199 rt73usb_init_bbp(rt2x00dev)))
1205 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1207 rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1210 * Disable synchronisation.
1212 rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1214 rt2x00usb_disable_radio(rt2x00dev);
1217 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1223 put_to_sleep = (state != STATE_AWAKE);
1225 rt73usb_register_read(rt2x00dev, MAC_CSR12, ®);
1226 rt2x00_set_field32(®, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1227 rt2x00_set_field32(®, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1228 rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1231 * Device is not guaranteed to be in the requested state yet.
1232 * We must wait until the register indicates that the
1233 * device has entered the correct state.
1235 for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1236 rt73usb_register_read(rt2x00dev, MAC_CSR12, ®);
1237 state = rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1238 if (state == !put_to_sleep)
1246 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1247 enum dev_state state)
1252 case STATE_RADIO_ON:
1253 retval = rt73usb_enable_radio(rt2x00dev);
1255 case STATE_RADIO_OFF:
1256 rt73usb_disable_radio(rt2x00dev);
1258 case STATE_RADIO_RX_ON:
1259 case STATE_RADIO_RX_ON_LINK:
1260 case STATE_RADIO_RX_OFF:
1261 case STATE_RADIO_RX_OFF_LINK:
1262 rt73usb_toggle_rx(rt2x00dev, state);
1264 case STATE_RADIO_IRQ_ON:
1265 case STATE_RADIO_IRQ_OFF:
1266 /* No support, but no error either */
1268 case STATE_DEEP_SLEEP:
1272 retval = rt73usb_set_state(rt2x00dev, state);
1279 if (unlikely(retval))
1280 ERROR(rt2x00dev, "Device failed to enter state %d (%d).\n",
1287 * TX descriptor initialization
1289 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1290 struct sk_buff *skb,
1291 struct txentry_desc *txdesc)
1293 struct skb_frame_desc *skbdesc = get_skb_frame_desc(skb);
1294 __le32 *txd = skbdesc->desc;
1298 * Start writing the descriptor words.
1300 rt2x00_desc_read(txd, 1, &word);
1301 rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, txdesc->queue);
1302 rt2x00_set_field32(&word, TXD_W1_AIFSN, txdesc->aifs);
1303 rt2x00_set_field32(&word, TXD_W1_CWMIN, txdesc->cw_min);
1304 rt2x00_set_field32(&word, TXD_W1_CWMAX, txdesc->cw_max);
1305 rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1306 rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1307 rt2x00_desc_write(txd, 1, word);
1309 rt2x00_desc_read(txd, 2, &word);
1310 rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, txdesc->signal);
1311 rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, txdesc->service);
1312 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, txdesc->length_low);
1313 rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, txdesc->length_high);
1314 rt2x00_desc_write(txd, 2, word);
1316 rt2x00_desc_read(txd, 5, &word);
1317 rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1318 TXPOWER_TO_DEV(rt2x00dev->tx_power));
1319 rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1320 rt2x00_desc_write(txd, 5, word);
1322 rt2x00_desc_read(txd, 0, &word);
1323 rt2x00_set_field32(&word, TXD_W0_BURST,
1324 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1325 rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1326 rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1327 test_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags));
1328 rt2x00_set_field32(&word, TXD_W0_ACK,
1329 test_bit(ENTRY_TXD_ACK, &txdesc->flags));
1330 rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1331 test_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags));
1332 rt2x00_set_field32(&word, TXD_W0_OFDM,
1333 test_bit(ENTRY_TXD_OFDM_RATE, &txdesc->flags));
1334 rt2x00_set_field32(&word, TXD_W0_IFS, txdesc->ifs);
1335 rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1336 test_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags));
1337 rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1338 rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT,
1339 skb->len - skbdesc->desc_len);
1340 rt2x00_set_field32(&word, TXD_W0_BURST2,
1341 test_bit(ENTRY_TXD_BURST, &txdesc->flags));
1342 rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1343 rt2x00_desc_write(txd, 0, word);
1347 * TX data initialization
1349 static void rt73usb_write_beacon(struct queue_entry *entry)
1351 struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
1352 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1353 unsigned int beacon_base;
1357 * Add the descriptor in front of the skb.
1359 skb_push(entry->skb, entry->queue->desc_size);
1360 memcpy(entry->skb->data, skbdesc->desc, skbdesc->desc_len);
1361 skbdesc->desc = entry->skb->data;
1364 * Disable beaconing while we are reloading the beacon data,
1365 * otherwise we might be sending out invalid data.
1367 rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®);
1368 rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 0);
1369 rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 0);
1370 rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 0);
1371 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1374 * Write entire beacon with descriptor to register.
1376 beacon_base = HW_BEACON_OFFSET(entry->entry_idx);
1377 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
1378 USB_VENDOR_REQUEST_OUT, beacon_base, 0,
1379 entry->skb->data, entry->skb->len,
1380 REGISTER_TIMEOUT32(entry->skb->len));
1383 * Clean up the beacon skb.
1385 dev_kfree_skb(entry->skb);
1389 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1390 struct sk_buff *skb)
1395 * The length _must_ be a multiple of 4,
1396 * but it must _not_ be a multiple of the USB packet size.
1398 length = roundup(skb->len, 4);
1399 length += (4 * !(length % rt2x00dev->usb_maxpacket));
1404 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1405 const enum data_queue_qid queue)
1409 if (queue != QID_BEACON) {
1410 rt2x00usb_kick_tx_queue(rt2x00dev, queue);
1415 * For Wi-Fi faily generated beacons between participating stations.
1416 * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1418 rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1420 rt73usb_register_read(rt2x00dev, TXRX_CSR9, ®);
1421 if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1422 rt2x00_set_field32(®, TXRX_CSR9_TSF_TICKING, 1);
1423 rt2x00_set_field32(®, TXRX_CSR9_TBTT_ENABLE, 1);
1424 rt2x00_set_field32(®, TXRX_CSR9_BEACON_GEN, 1);
1425 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1430 * RX control handlers
1432 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1438 lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1453 if (rt2x00dev->rx_status.band == IEEE80211_BAND_5GHZ) {
1454 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1455 if (lna == 3 || lna == 2)
1464 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1465 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1467 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1470 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1471 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1474 return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1477 static void rt73usb_fill_rxdone(struct queue_entry *entry,
1478 struct rxdone_entry_desc *rxdesc)
1480 struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
1481 __le32 *rxd = (__le32 *)entry->skb->data;
1486 * Copy descriptor to the skbdesc->desc buffer, making it safe from moving of
1487 * frame data in rt2x00usb.
1489 memcpy(skbdesc->desc, rxd, skbdesc->desc_len);
1490 rxd = (__le32 *)skbdesc->desc;
1493 * It is now safe to read the descriptor on all architectures.
1495 rt2x00_desc_read(rxd, 0, &word0);
1496 rt2x00_desc_read(rxd, 1, &word1);
1498 if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1499 rxdesc->flags |= RX_FLAG_FAILED_FCS_CRC;
1502 * Obtain the status about this packet.
1503 * When frame was received with an OFDM bitrate,
1504 * the signal is the PLCP value. If it was received with
1505 * a CCK bitrate the signal is the rate in 100kbit/s.
1507 rxdesc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1508 rxdesc->rssi = rt73usb_agc_to_rssi(entry->queue->rt2x00dev, word1);
1509 rxdesc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1511 if (rt2x00_get_field32(word0, RXD_W0_OFDM))
1512 rxdesc->dev_flags |= RXDONE_SIGNAL_PLCP;
1513 if (rt2x00_get_field32(word0, RXD_W0_MY_BSS))
1514 rxdesc->dev_flags |= RXDONE_MY_BSS;
1517 * Set skb pointers, and update frame information.
1519 skb_pull(entry->skb, entry->queue->desc_size);
1520 skb_trim(entry->skb, rxdesc->size);
1524 * Device probe functions.
1526 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1532 rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1535 * Start validation of the data that has been read.
1537 mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1538 if (!is_valid_ether_addr(mac)) {
1539 DECLARE_MAC_BUF(macbuf);
1541 random_ether_addr(mac);
1542 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1545 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1546 if (word == 0xffff) {
1547 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1548 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1550 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1552 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1553 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1554 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1555 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1556 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1557 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1560 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1561 if (word == 0xffff) {
1562 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1563 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1564 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1567 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1568 if (word == 0xffff) {
1569 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1570 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1571 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1572 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1573 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1574 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1575 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1576 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1577 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1579 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1580 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1583 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1584 if (word == 0xffff) {
1585 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1586 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1587 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1588 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1591 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1592 if (word == 0xffff) {
1593 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1594 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1595 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1596 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1598 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1599 if (value < -10 || value > 10)
1600 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1601 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1602 if (value < -10 || value > 10)
1603 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1604 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1607 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1608 if (word == 0xffff) {
1609 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1610 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1611 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1612 EEPROM(rt2x00dev, "RSSI OFFSET A: 0x%04x\n", word);
1614 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1615 if (value < -10 || value > 10)
1616 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1617 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1618 if (value < -10 || value > 10)
1619 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1620 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1626 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1633 * Read EEPROM word for configuration.
1635 rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1638 * Identify RF chipset.
1640 value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1641 rt73usb_register_read(rt2x00dev, MAC_CSR0, ®);
1642 rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1644 if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1645 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1649 if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1650 !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1651 !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1652 !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1653 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1658 * Identify default antenna configuration.
1660 rt2x00dev->default_ant.tx =
1661 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1662 rt2x00dev->default_ant.rx =
1663 rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1666 * Read the Frame type.
1668 if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1669 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1672 * Read frequency offset.
1674 rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1675 rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1678 * Read external LNA informations.
1680 rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1682 if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1683 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1684 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1688 * Store led settings, for correct led behaviour.
1690 #ifdef CONFIG_RT73USB_LEDS
1691 rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1693 rt73usb_init_led(rt2x00dev, &rt2x00dev->led_radio, LED_TYPE_RADIO);
1694 rt73usb_init_led(rt2x00dev, &rt2x00dev->led_assoc, LED_TYPE_ASSOC);
1695 if (value == LED_MODE_SIGNAL_STRENGTH)
1696 rt73usb_init_led(rt2x00dev, &rt2x00dev->led_qual,
1699 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_LED_MODE, value);
1700 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_0,
1701 rt2x00_get_field16(eeprom,
1702 EEPROM_LED_POLARITY_GPIO_0));
1703 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_1,
1704 rt2x00_get_field16(eeprom,
1705 EEPROM_LED_POLARITY_GPIO_1));
1706 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_2,
1707 rt2x00_get_field16(eeprom,
1708 EEPROM_LED_POLARITY_GPIO_2));
1709 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_3,
1710 rt2x00_get_field16(eeprom,
1711 EEPROM_LED_POLARITY_GPIO_3));
1712 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_GPIO_4,
1713 rt2x00_get_field16(eeprom,
1714 EEPROM_LED_POLARITY_GPIO_4));
1715 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_ACT,
1716 rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1717 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_BG,
1718 rt2x00_get_field16(eeprom,
1719 EEPROM_LED_POLARITY_RDY_G));
1720 rt2x00_set_field16(&rt2x00dev->led_mcu_reg, MCU_LEDCS_POLARITY_READY_A,
1721 rt2x00_get_field16(eeprom,
1722 EEPROM_LED_POLARITY_RDY_A));
1723 #endif /* CONFIG_RT73USB_LEDS */
1729 * RF value list for RF2528
1732 static const struct rf_channel rf_vals_bg_2528[] = {
1733 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1734 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1735 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1736 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1737 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1738 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1739 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1740 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1741 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1742 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1743 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1744 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1745 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1746 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1750 * RF value list for RF5226
1751 * Supports: 2.4 GHz & 5.2 GHz
1753 static const struct rf_channel rf_vals_5226[] = {
1754 { 1, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1755 { 2, 0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1756 { 3, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1757 { 4, 0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1758 { 5, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1759 { 6, 0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1760 { 7, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1761 { 8, 0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1762 { 9, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1763 { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1764 { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1765 { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1766 { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1767 { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1769 /* 802.11 UNI / HyperLan 2 */
1770 { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1771 { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1772 { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1773 { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1774 { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1775 { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1776 { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1777 { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1779 /* 802.11 HyperLan 2 */
1780 { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1781 { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1782 { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1783 { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1784 { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1785 { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1786 { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1787 { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1788 { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1789 { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1792 { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1793 { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1794 { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1795 { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1796 { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1797 { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1799 /* MMAC(Japan)J52 ch 34,38,42,46 */
1800 { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1801 { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1802 { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1803 { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1807 * RF value list for RF5225 & RF2527
1808 * Supports: 2.4 GHz & 5.2 GHz
1810 static const struct rf_channel rf_vals_5225_2527[] = {
1811 { 1, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1812 { 2, 0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1813 { 3, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1814 { 4, 0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1815 { 5, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1816 { 6, 0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1817 { 7, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1818 { 8, 0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1819 { 9, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1820 { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1821 { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1822 { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1823 { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1824 { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1826 /* 802.11 UNI / HyperLan 2 */
1827 { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1828 { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1829 { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1830 { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1831 { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1832 { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1833 { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1834 { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1836 /* 802.11 HyperLan 2 */
1837 { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1838 { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1839 { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1840 { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1841 { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1842 { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1843 { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1844 { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1845 { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1846 { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1849 { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1850 { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1851 { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1852 { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1853 { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1854 { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1856 /* MMAC(Japan)J52 ch 34,38,42,46 */
1857 { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1858 { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1859 { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1860 { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1864 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1866 struct hw_mode_spec *spec = &rt2x00dev->spec;
1871 * Initialize all hw fields.
1873 rt2x00dev->hw->flags =
1874 IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1875 IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1876 IEEE80211_HW_SIGNAL_DBM;
1877 rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1879 SET_IEEE80211_DEV(rt2x00dev->hw, rt2x00dev->dev);
1880 SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1881 rt2x00_eeprom_addr(rt2x00dev,
1882 EEPROM_MAC_ADDR_0));
1885 * Convert tx_power array in eeprom.
1887 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1888 for (i = 0; i < 14; i++)
1889 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1892 * Initialize hw_mode information.
1894 spec->supported_bands = SUPPORT_BAND_2GHZ;
1895 spec->supported_rates = SUPPORT_RATE_CCK | SUPPORT_RATE_OFDM;
1896 spec->tx_power_a = NULL;
1897 spec->tx_power_bg = txpower;
1898 spec->tx_power_default = DEFAULT_TXPOWER;
1900 if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1901 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1902 spec->channels = rf_vals_bg_2528;
1903 } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1904 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1905 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1906 spec->channels = rf_vals_5226;
1907 } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1908 spec->num_channels = 14;
1909 spec->channels = rf_vals_5225_2527;
1910 } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1911 spec->supported_bands |= SUPPORT_BAND_5GHZ;
1912 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1913 spec->channels = rf_vals_5225_2527;
1916 if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1917 rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1918 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1919 for (i = 0; i < 14; i++)
1920 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1922 spec->tx_power_a = txpower;
1926 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1931 * Allocate eeprom data.
1933 retval = rt73usb_validate_eeprom(rt2x00dev);
1937 retval = rt73usb_init_eeprom(rt2x00dev);
1942 * Initialize hw specifications.
1944 rt73usb_probe_hw_mode(rt2x00dev);
1947 * This device requires firmware.
1949 __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1950 __set_bit(DRIVER_REQUIRE_SCHEDULED, &rt2x00dev->flags);
1953 * Set the rssi offset.
1955 rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1961 * IEEE80211 stack callback functions.
1963 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1964 u32 short_retry, u32 long_retry)
1966 struct rt2x00_dev *rt2x00dev = hw->priv;
1969 rt73usb_register_read(rt2x00dev, TXRX_CSR4, ®);
1970 rt2x00_set_field32(®, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1971 rt2x00_set_field32(®, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1972 rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1979 * Mac80211 demands get_tsf must be atomic.
1980 * This is not possible for rt73usb since all register access
1981 * functions require sleeping. Untill mac80211 no longer needs
1982 * get_tsf to be atomic, this function should be disabled.
1984 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1986 struct rt2x00_dev *rt2x00dev = hw->priv;
1990 rt73usb_register_read(rt2x00dev, TXRX_CSR13, ®);
1991 tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1992 rt73usb_register_read(rt2x00dev, TXRX_CSR12, ®);
1993 tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1998 #define rt73usb_get_tsf NULL
2001 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2003 .start = rt2x00mac_start,
2004 .stop = rt2x00mac_stop,
2005 .add_interface = rt2x00mac_add_interface,
2006 .remove_interface = rt2x00mac_remove_interface,
2007 .config = rt2x00mac_config,
2008 .config_interface = rt2x00mac_config_interface,
2009 .configure_filter = rt2x00mac_configure_filter,
2010 .get_stats = rt2x00mac_get_stats,
2011 .set_retry_limit = rt73usb_set_retry_limit,
2012 .bss_info_changed = rt2x00mac_bss_info_changed,
2013 .conf_tx = rt2x00mac_conf_tx,
2014 .get_tx_stats = rt2x00mac_get_tx_stats,
2015 .get_tsf = rt73usb_get_tsf,
2018 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2019 .probe_hw = rt73usb_probe_hw,
2020 .get_firmware_name = rt73usb_get_firmware_name,
2021 .get_firmware_crc = rt73usb_get_firmware_crc,
2022 .load_firmware = rt73usb_load_firmware,
2023 .initialize = rt2x00usb_initialize,
2024 .uninitialize = rt2x00usb_uninitialize,
2025 .init_rxentry = rt2x00usb_init_rxentry,
2026 .init_txentry = rt2x00usb_init_txentry,
2027 .set_device_state = rt73usb_set_device_state,
2028 .link_stats = rt73usb_link_stats,
2029 .reset_tuner = rt73usb_reset_tuner,
2030 .link_tuner = rt73usb_link_tuner,
2031 .write_tx_desc = rt73usb_write_tx_desc,
2032 .write_tx_data = rt2x00usb_write_tx_data,
2033 .write_beacon = rt73usb_write_beacon,
2034 .get_tx_data_len = rt73usb_get_tx_data_len,
2035 .kick_tx_queue = rt73usb_kick_tx_queue,
2036 .fill_rxdone = rt73usb_fill_rxdone,
2037 .config_filter = rt73usb_config_filter,
2038 .config_intf = rt73usb_config_intf,
2039 .config_erp = rt73usb_config_erp,
2040 .config = rt73usb_config,
2043 static const struct data_queue_desc rt73usb_queue_rx = {
2044 .entry_num = RX_ENTRIES,
2045 .data_size = DATA_FRAME_SIZE,
2046 .desc_size = RXD_DESC_SIZE,
2047 .priv_size = sizeof(struct queue_entry_priv_usb),
2050 static const struct data_queue_desc rt73usb_queue_tx = {
2051 .entry_num = TX_ENTRIES,
2052 .data_size = DATA_FRAME_SIZE,
2053 .desc_size = TXD_DESC_SIZE,
2054 .priv_size = sizeof(struct queue_entry_priv_usb),
2057 static const struct data_queue_desc rt73usb_queue_bcn = {
2058 .entry_num = 4 * BEACON_ENTRIES,
2059 .data_size = MGMT_FRAME_SIZE,
2060 .desc_size = TXINFO_SIZE,
2061 .priv_size = sizeof(struct queue_entry_priv_usb),
2064 static const struct rt2x00_ops rt73usb_ops = {
2065 .name = KBUILD_MODNAME,
2068 .eeprom_size = EEPROM_SIZE,
2070 .tx_queues = NUM_TX_QUEUES,
2071 .rx = &rt73usb_queue_rx,
2072 .tx = &rt73usb_queue_tx,
2073 .bcn = &rt73usb_queue_bcn,
2074 .lib = &rt73usb_rt2x00_ops,
2075 .hw = &rt73usb_mac80211_ops,
2076 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2077 .debugfs = &rt73usb_rt2x00debug,
2078 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2082 * rt73usb module information.
2084 static struct usb_device_id rt73usb_device_table[] = {
2086 { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2088 { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2090 { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2091 { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2093 { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2094 { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2095 { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2096 { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2098 { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2100 { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2102 { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2103 { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2105 { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2107 { USB_DEVICE(0x07aa, 0x002e), USB_DEVICE_DATA(&rt73usb_ops) },
2109 { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2110 { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2111 { USB_DEVICE(0x07d1, 0x3c06), USB_DEVICE_DATA(&rt73usb_ops) },
2112 { USB_DEVICE(0x07d1, 0x3c07), USB_DEVICE_DATA(&rt73usb_ops) },
2114 { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2116 { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2117 { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2119 { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2121 { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2122 { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2124 { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2125 { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2127 { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2128 { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2129 { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2130 { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2132 { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2133 { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2135 { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2136 { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2137 { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2139 { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2141 { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2142 { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2144 { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2146 { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2147 { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2151 MODULE_AUTHOR(DRV_PROJECT);
2152 MODULE_VERSION(DRV_VERSION);
2153 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2154 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2155 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2156 MODULE_FIRMWARE(FIRMWARE_RT2571);
2157 MODULE_LICENSE("GPL");
2159 static struct usb_driver rt73usb_driver = {
2160 .name = KBUILD_MODNAME,
2161 .id_table = rt73usb_device_table,
2162 .probe = rt2x00usb_probe,
2163 .disconnect = rt2x00usb_disconnect,
2164 .suspend = rt2x00usb_suspend,
2165 .resume = rt2x00usb_resume,
2168 static int __init rt73usb_init(void)
2170 return usb_register(&rt73usb_driver);
2173 static void __exit rt73usb_exit(void)
2175 usb_deregister(&rt73usb_driver);
2178 module_init(rt73usb_init);
2179 module_exit(rt73usb_exit);