1 /* sun3lance.c: Ethernet driver for SUN3 Lance chip */
4 Sun3 Lance ethernet driver, by Sam Creasey (sammy@users.qual.net).
5 This driver is a part of the linux kernel, and is thus distributed
6 under the GNU General Public License.
8 The values used in LANCE_OBIO and LANCE_IRQ seem to be empirically
9 true for the correct IRQ and address of the lance registers. They
10 have not been widely tested, however. What we probably need is a
11 "proper" way to search for a device in the sun3's prom, but, alas,
12 linux has no such thing.
14 This driver is largely based on atarilance.c, by Roman Hodek. Other
15 sources of inspiration were the NetBSD sun3 am7990 driver, and the
16 linux sparc lance driver (sunlance.c).
18 There are more assumptions made throughout this driver, it almost
19 certainly still needs work, but it does work at least for RARP/BOOTP and
20 mounting the root NFS filesystem.
24 static char *version = "sun3lance.c: v1.2 1/12/2001 Sam Creasey (sammy@sammy.net)\n";
26 #include <linux/module.h>
27 #include <linux/stddef.h>
28 #include <linux/kernel.h>
29 #include <linux/string.h>
30 #include <linux/errno.h>
31 #include <linux/slab.h>
32 #include <linux/interrupt.h>
33 #include <linux/init.h>
34 #include <linux/ioport.h>
35 #include <linux/delay.h>
36 #include <linux/netdevice.h>
37 #include <linux/etherdevice.h>
38 #include <linux/skbuff.h>
39 #include <linux/bitops.h>
41 #include <asm/cacheflush.h>
42 #include <asm/setup.h>
45 #include <asm/pgtable.h>
47 #include <asm/idprom.h>
48 #include <asm/machines.h>
51 #include <asm/sun3mmu.h>
53 #include <asm/sun3xprom.h>
56 /* sun3/60 addr/irq for the lance chip. If your sun is different,
58 #define LANCE_OBIO 0x120000
59 #define LANCE_IRQ IRQ_AUTO_3
62 * 0 = silent, print only serious errors
63 * 1 = normal, print error messages
64 * 2 = debug, print debug infos
65 * 3 = debug, print even more debug infos (packet data)
71 static int lance_debug = LANCE_DEBUG;
73 static int lance_debug = 1;
75 module_param(lance_debug, int, 0);
76 MODULE_PARM_DESC(lance_debug, "SUN3 Lance debug level (0-3)");
77 MODULE_LICENSE("GPL");
79 #define DPRINTK(n,a) \
81 if (lance_debug >= n) \
86 /* we're only using 32k of memory, so we use 4 TX
87 buffers and 16 RX buffers. These values are expressed as log2. */
89 #define TX_LOG_RING_SIZE 3
90 #define RX_LOG_RING_SIZE 5
92 /* These are the derived values */
94 #define TX_RING_SIZE (1 << TX_LOG_RING_SIZE)
95 #define TX_RING_LEN_BITS (TX_LOG_RING_SIZE << 5)
96 #define TX_RING_MOD_MASK (TX_RING_SIZE - 1)
98 #define RX_RING_SIZE (1 << RX_LOG_RING_SIZE)
99 #define RX_RING_LEN_BITS (RX_LOG_RING_SIZE << 5)
100 #define RX_RING_MOD_MASK (RX_RING_SIZE - 1)
102 /* Definitions for packet buffer access: */
103 #define PKT_BUF_SZ 1544
105 /* Get the address of a packet buffer corresponding to a given buffer head */
106 #define PKTBUF_ADDR(head) (void *)((unsigned long)(MEM) | (head)->base)
109 /* The LANCE Rx and Tx ring descriptors. */
110 struct lance_rx_head {
111 unsigned short base; /* Low word of base addr */
112 volatile unsigned char flag;
113 unsigned char base_hi; /* High word of base addr (unused) */
114 short buf_length; /* This length is 2s complement! */
115 volatile short msg_length; /* This length is "normal". */
118 struct lance_tx_head {
119 unsigned short base; /* Low word of base addr */
120 volatile unsigned char flag;
121 unsigned char base_hi; /* High word of base addr (unused) */
122 short length; /* Length is 2s complement! */
126 /* The LANCE initialization block, described in databook. */
127 struct lance_init_block {
128 unsigned short mode; /* Pre-set mode */
129 unsigned char hwaddr[6]; /* Physical ethernet address */
130 unsigned int filter[2]; /* Multicast filter (unused). */
131 /* Receive and transmit ring base, along with length bits. */
136 unsigned short pad[4]; /* is thie needed? */
139 /* The whole layout of the Lance shared memory */
140 struct lance_memory {
141 struct lance_init_block init;
142 struct lance_tx_head tx_head[TX_RING_SIZE];
143 struct lance_rx_head rx_head[RX_RING_SIZE];
144 char rx_data[RX_RING_SIZE][PKT_BUF_SZ];
145 char tx_data[TX_RING_SIZE][PKT_BUF_SZ];
148 /* The driver's private device structure */
150 struct lance_private {
151 volatile unsigned short *iobase;
152 struct lance_memory *mem;
153 int new_rx, new_tx; /* The next free ring entry */
154 int old_tx, old_rx; /* ring entry to be processed */
155 struct net_device_stats stats;
156 /* These two must be longs for set_bit() */
161 /* I/O register access macros */
164 #define DREG lp->iobase[0]
165 #define AREG lp->iobase[1]
166 #define REGA(a) (*( AREG = (a), &DREG ))
168 /* Definitions for the Lance */
171 #define TMD1_ENP 0x01 /* end of packet */
172 #define TMD1_STP 0x02 /* start of packet */
173 #define TMD1_DEF 0x04 /* deferred */
174 #define TMD1_ONE 0x08 /* one retry needed */
175 #define TMD1_MORE 0x10 /* more than one retry needed */
176 #define TMD1_ERR 0x40 /* error summary */
177 #define TMD1_OWN 0x80 /* ownership (set: chip owns) */
179 #define TMD1_OWN_CHIP TMD1_OWN
180 #define TMD1_OWN_HOST 0
182 /* tx_head misc field */
183 #define TMD3_TDR 0x03FF /* Time Domain Reflectometry counter */
184 #define TMD3_RTRY 0x0400 /* failed after 16 retries */
185 #define TMD3_LCAR 0x0800 /* carrier lost */
186 #define TMD3_LCOL 0x1000 /* late collision */
187 #define TMD3_UFLO 0x4000 /* underflow (late memory) */
188 #define TMD3_BUFF 0x8000 /* buffering error (no ENP) */
191 #define RMD1_ENP 0x01 /* end of packet */
192 #define RMD1_STP 0x02 /* start of packet */
193 #define RMD1_BUFF 0x04 /* buffer error */
194 #define RMD1_CRC 0x08 /* CRC error */
195 #define RMD1_OFLO 0x10 /* overflow */
196 #define RMD1_FRAM 0x20 /* framing error */
197 #define RMD1_ERR 0x40 /* error summary */
198 #define RMD1_OWN 0x80 /* ownership (set: ship owns) */
200 #define RMD1_OWN_CHIP RMD1_OWN
201 #define RMD1_OWN_HOST 0
204 #define CSR0 0 /* mode/status */
205 #define CSR1 1 /* init block addr (low) */
206 #define CSR2 2 /* init block addr (high) */
207 #define CSR3 3 /* misc */
208 #define CSR8 8 /* address filter */
209 #define CSR15 15 /* promiscuous mode */
212 /* (R=readable, W=writeable, S=set on write, C=clear on write) */
213 #define CSR0_INIT 0x0001 /* initialize (RS) */
214 #define CSR0_STRT 0x0002 /* start (RS) */
215 #define CSR0_STOP 0x0004 /* stop (RS) */
216 #define CSR0_TDMD 0x0008 /* transmit demand (RS) */
217 #define CSR0_TXON 0x0010 /* transmitter on (R) */
218 #define CSR0_RXON 0x0020 /* receiver on (R) */
219 #define CSR0_INEA 0x0040 /* interrupt enable (RW) */
220 #define CSR0_INTR 0x0080 /* interrupt active (R) */
221 #define CSR0_IDON 0x0100 /* initialization done (RC) */
222 #define CSR0_TINT 0x0200 /* transmitter interrupt (RC) */
223 #define CSR0_RINT 0x0400 /* receiver interrupt (RC) */
224 #define CSR0_MERR 0x0800 /* memory error (RC) */
225 #define CSR0_MISS 0x1000 /* missed frame (RC) */
226 #define CSR0_CERR 0x2000 /* carrier error (no heartbeat :-) (RC) */
227 #define CSR0_BABL 0x4000 /* babble: tx-ed too many bits (RC) */
228 #define CSR0_ERR 0x8000 /* error (RC) */
231 #define CSR3_BCON 0x0001 /* byte control */
232 #define CSR3_ACON 0x0002 /* ALE control */
233 #define CSR3_BSWP 0x0004 /* byte swap (1=big endian) */
235 /***************************** Prototypes *****************************/
237 static int lance_probe( struct net_device *dev);
238 static int lance_open( struct net_device *dev );
239 static void lance_init_ring( struct net_device *dev );
240 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev );
241 static irqreturn_t lance_interrupt( int irq, void *dev_id);
242 static int lance_rx( struct net_device *dev );
243 static int lance_close( struct net_device *dev );
244 static struct net_device_stats *lance_get_stats( struct net_device *dev );
245 static void set_multicast_list( struct net_device *dev );
247 /************************* End of Prototypes **************************/
249 struct net_device * __init sun3lance_probe(int unit)
251 struct net_device *dev;
255 /* check that this machine has an onboard lance */
256 switch(idprom->id_machtype) {
257 case SM_SUN3|SM_3_50:
258 case SM_SUN3|SM_3_60:
259 case SM_SUN3X|SM_3_80:
260 /* these machines have lance */
264 return ERR_PTR(-ENODEV);
268 return ERR_PTR(-ENODEV);
270 dev = alloc_etherdev(sizeof(struct lance_private));
272 return ERR_PTR(-ENOMEM);
274 sprintf(dev->name, "eth%d", unit);
275 netdev_boot_setup_check(dev);
277 SET_MODULE_OWNER(dev);
279 if (!lance_probe(dev))
282 err = register_netdev(dev);
290 iounmap((void __iomem *)dev->base_addr);
297 static int __init lance_probe( struct net_device *dev)
299 unsigned long ioaddr;
301 struct lance_private *lp;
303 static int did_version;
304 volatile unsigned short *ioaddr_probe;
305 unsigned short tmp1, tmp2;
308 ioaddr = (unsigned long)ioremap(LANCE_OBIO, PAGE_SIZE);
312 ioaddr = SUN3X_LANCE;
315 /* test to see if there's really a lance here */
316 /* (CSRO_INIT shouldn't be readable) */
318 ioaddr_probe = (volatile unsigned short *)ioaddr;
319 tmp1 = ioaddr_probe[0];
320 tmp2 = ioaddr_probe[1];
322 ioaddr_probe[1] = CSR0;
323 ioaddr_probe[0] = CSR0_INIT | CSR0_STOP;
325 if(ioaddr_probe[0] != CSR0_STOP) {
326 ioaddr_probe[0] = tmp1;
327 ioaddr_probe[1] = tmp2;
330 iounmap((void __iomem *)ioaddr);
335 lp = netdev_priv(dev);
338 MEM = dvma_malloc_align(sizeof(struct lance_memory), 0x10000);
340 lp->iobase = (volatile unsigned short *)ioaddr;
341 dev->base_addr = (unsigned long)ioaddr; /* informational only */
343 REGA(CSR0) = CSR0_STOP;
345 request_irq(LANCE_IRQ, lance_interrupt, IRQF_DISABLED, "SUN3 Lance", dev);
346 dev->irq = (unsigned short)LANCE_IRQ;
349 printk("%s: SUN3 Lance at io %#lx, mem %#lx, irq %d, hwaddr ",
351 (unsigned long)ioaddr,
355 /* copy in the ethernet address from the prom */
356 for(i = 0; i < 6 ; i++)
357 dev->dev_addr[i] = idprom->id_ethaddr[i];
359 /* tell the card it's ether address, bytes swapped */
360 MEM->init.hwaddr[0] = dev->dev_addr[1];
361 MEM->init.hwaddr[1] = dev->dev_addr[0];
362 MEM->init.hwaddr[2] = dev->dev_addr[3];
363 MEM->init.hwaddr[3] = dev->dev_addr[2];
364 MEM->init.hwaddr[4] = dev->dev_addr[5];
365 MEM->init.hwaddr[5] = dev->dev_addr[4];
367 for( i = 0; i < 6; ++i )
368 printk( "%02x%s", dev->dev_addr[i], (i < 5) ? ":" : "\n" );
370 MEM->init.mode = 0x0000;
371 MEM->init.filter[0] = 0x00000000;
372 MEM->init.filter[1] = 0x00000000;
373 MEM->init.rdra = dvma_vtob(MEM->rx_head);
374 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) |
375 (dvma_vtob(MEM->rx_head) >> 16);
376 MEM->init.tdra = dvma_vtob(MEM->tx_head);
377 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) |
378 (dvma_vtob(MEM->tx_head) >> 16);
380 DPRINTK(2, ("initaddr: %08lx rx_ring: %08lx tx_ring: %08lx\n",
381 dvma_vtob(&(MEM->init)), dvma_vtob(MEM->rx_head),
382 (dvma_vtob(MEM->tx_head))));
384 if (did_version++ == 0)
387 /* The LANCE-specific entries in the device structure. */
388 dev->open = &lance_open;
389 dev->hard_start_xmit = &lance_start_xmit;
390 dev->stop = &lance_close;
391 dev->get_stats = &lance_get_stats;
392 dev->set_multicast_list = &set_multicast_list;
393 dev->set_mac_address = NULL;
394 // KLUDGE -- REMOVE ME
395 set_bit(__LINK_STATE_PRESENT, &dev->state);
398 memset( &lp->stats, 0, sizeof(lp->stats) );
403 static int lance_open( struct net_device *dev )
405 struct lance_private *lp = netdev_priv(dev);
408 DPRINTK( 2, ( "%s: lance_open()\n", dev->name ));
410 REGA(CSR0) = CSR0_STOP;
412 lance_init_ring(dev);
414 /* From now on, AREG is kept to point to CSR0 */
415 REGA(CSR0) = CSR0_INIT;
419 if (DREG & CSR0_IDON)
421 if (i < 0 || (DREG & CSR0_ERR)) {
422 DPRINTK( 2, ( "lance_open(): opening %s failed, i=%d, csr0=%04x\n",
423 dev->name, i, DREG ));
428 DREG = CSR0_IDON | CSR0_STRT | CSR0_INEA;
430 netif_start_queue(dev);
432 DPRINTK( 2, ( "%s: LANCE is open, csr0 %04x\n", dev->name, DREG ));
438 /* Initialize the LANCE Rx and Tx rings. */
440 static void lance_init_ring( struct net_device *dev )
442 struct lance_private *lp = netdev_priv(dev);
447 lp->new_rx = lp->new_tx = 0;
448 lp->old_rx = lp->old_tx = 0;
450 for( i = 0; i < TX_RING_SIZE; i++ ) {
451 MEM->tx_head[i].base = dvma_vtob(MEM->tx_data[i]);
452 MEM->tx_head[i].flag = 0;
453 MEM->tx_head[i].base_hi =
454 (dvma_vtob(MEM->tx_data[i])) >>16;
455 MEM->tx_head[i].length = 0;
456 MEM->tx_head[i].misc = 0;
459 for( i = 0; i < RX_RING_SIZE; i++ ) {
460 MEM->rx_head[i].base = dvma_vtob(MEM->rx_data[i]);
461 MEM->rx_head[i].flag = RMD1_OWN_CHIP;
462 MEM->rx_head[i].base_hi =
463 (dvma_vtob(MEM->rx_data[i])) >> 16;
464 MEM->rx_head[i].buf_length = -PKT_BUF_SZ | 0xf000;
465 MEM->rx_head[i].msg_length = 0;
468 /* tell the card it's ether address, bytes swapped */
469 MEM->init.hwaddr[0] = dev->dev_addr[1];
470 MEM->init.hwaddr[1] = dev->dev_addr[0];
471 MEM->init.hwaddr[2] = dev->dev_addr[3];
472 MEM->init.hwaddr[3] = dev->dev_addr[2];
473 MEM->init.hwaddr[4] = dev->dev_addr[5];
474 MEM->init.hwaddr[5] = dev->dev_addr[4];
476 MEM->init.mode = 0x0000;
477 MEM->init.filter[0] = 0x00000000;
478 MEM->init.filter[1] = 0x00000000;
479 MEM->init.rdra = dvma_vtob(MEM->rx_head);
480 MEM->init.rlen = (RX_LOG_RING_SIZE << 13) |
481 (dvma_vtob(MEM->rx_head) >> 16);
482 MEM->init.tdra = dvma_vtob(MEM->tx_head);
483 MEM->init.tlen = (TX_LOG_RING_SIZE << 13) |
484 (dvma_vtob(MEM->tx_head) >> 16);
487 /* tell the lance the address of its init block */
488 REGA(CSR1) = dvma_vtob(&(MEM->init));
489 REGA(CSR2) = dvma_vtob(&(MEM->init)) >> 16;
492 REGA(CSR3) = CSR3_BSWP | CSR3_ACON | CSR3_BCON;
494 REGA(CSR3) = CSR3_BSWP;
500 static int lance_start_xmit( struct sk_buff *skb, struct net_device *dev )
502 struct lance_private *lp = netdev_priv(dev);
504 struct lance_tx_head *head;
507 DPRINTK( 1, ( "%s: transmit start.\n",
510 /* Transmitter timeout, serious problems. */
511 if (netif_queue_stopped(dev)) {
512 int tickssofar = jiffies - dev->trans_start;
516 DPRINTK( 1, ( "%s: transmit timed out, status %04x, resetting.\n",
520 * Always set BSWP after a STOP as STOP puts it back into
521 * little endian mode.
523 REGA(CSR3) = CSR3_BSWP;
524 lp->stats.tx_errors++;
526 if(lance_debug >= 2) {
528 printk("Ring data: old_tx %d new_tx %d%s new_rx %d\n",
529 lp->old_tx, lp->new_tx,
530 lp->tx_full ? " (full)" : "",
532 for( i = 0 ; i < RX_RING_SIZE; i++ )
533 printk( "rx #%d: base=%04x blen=%04x mlen=%04x\n",
534 i, MEM->rx_head[i].base,
535 -MEM->rx_head[i].buf_length,
536 MEM->rx_head[i].msg_length);
537 for( i = 0 ; i < TX_RING_SIZE; i++ )
538 printk("tx #%d: base=%04x len=%04x misc=%04x\n",
539 i, MEM->tx_head[i].base,
540 -MEM->tx_head[i].length,
541 MEM->tx_head[i].misc );
544 lance_init_ring(dev);
545 REGA( CSR0 ) = CSR0_INEA | CSR0_INIT | CSR0_STRT;
547 netif_start_queue(dev);
548 dev->trans_start = jiffies;
554 /* Block a timer-based transmit from overlapping. This could better be
555 done with atomic_swap(1, dev->tbusy), but set_bit() works as well. */
557 /* Block a timer-based transmit from overlapping with us by
558 stopping the queue for a bit... */
560 netif_stop_queue(dev);
562 if (test_and_set_bit( 0, (void*)&lp->lock ) != 0) {
563 printk( "%s: tx queue lock!.\n", dev->name);
564 /* don't clear dev->tbusy flag. */
569 DPRINTK( 2, ( "%s: lance_start_xmit() called, csr0 %4.4x.\n",
573 /* this weirdness doesn't appear on sun3... */
574 if(!(DREG & CSR0_INIT)) {
575 DPRINTK( 1, ("INIT not set, reinitializing...\n"));
576 REGA( CSR0 ) = CSR0_STOP;
577 lance_init_ring(dev);
578 REGA( CSR0 ) = CSR0_INIT | CSR0_STRT;
582 /* Fill in a Tx ring entry */
584 if (lance_debug >= 2) {
587 printk( "%s: TX pkt %d type 0x%04x from ", dev->name,
588 lp->new_tx, ((u_short *)skb->data)[6]);
589 for( p = &((u_char *)skb->data)[6], i = 0; i < 6; i++ )
590 printk("%02x%s", *p++, i != 5 ? ":" : "" );
592 for( p = (u_char *)skb->data, i = 0; i < 6; i++ )
593 printk("%02x%s", *p++, i != 5 ? ":" : "" );
594 printk(" data at 0x%08x len %d\n", (int)skb->data,
598 /* We're not prepared for the int until the last flags are set/reset.
599 * And the int may happen already after setting the OWN_CHIP... */
600 local_irq_save(flags);
602 /* Mask to ring buffer boundary. */
604 head = &(MEM->tx_head[entry]);
606 /* Caution: the write order is important here, set the "ownership" bits
610 /* the sun3's lance needs it's buffer padded to the minimum
612 len = (ETH_ZLEN < skb->len) ? skb->len : ETH_ZLEN;
614 // head->length = -len;
615 head->length = (-len) | 0xf000;
618 memcpy( PKTBUF_ADDR(head), (void *)skb->data, skb->len );
620 memset(PKTBUF_ADDR(head) + skb->len, 0, len-skb->len);
622 head->flag = TMD1_OWN_CHIP | TMD1_ENP | TMD1_STP;
623 lp->new_tx = (lp->new_tx + 1) & TX_RING_MOD_MASK;
624 lp->stats.tx_bytes += skb->len;
626 /* Trigger an immediate send poll. */
627 REGA(CSR0) = CSR0_INEA | CSR0_TDMD | CSR0_STRT;
629 DPRINTK( 2, ( "%s: lance_start_xmit() exiting, csr0 %4.4x.\n",
631 dev->trans_start = jiffies;
632 dev_kfree_skb( skb );
635 if ((MEM->tx_head[(entry+1) & TX_RING_MOD_MASK].flag & TMD1_OWN) ==
637 netif_start_queue(dev);
639 local_irq_restore(flags);
644 /* The LANCE interrupt handler. */
646 static irqreturn_t lance_interrupt( int irq, void *dev_id)
648 struct net_device *dev = dev_id;
649 struct lance_private *lp = netdev_priv(dev);
651 static int in_interrupt;
654 DPRINTK( 1, ( "lance_interrupt(): invalid dev_id\n" ));
659 DPRINTK( 2, ( "%s: Re-entering the interrupt handler.\n", dev->name ));
669 DREG = csr0 & (CSR0_TINT | CSR0_RINT | CSR0_IDON);
673 DREG = CSR0_BABL | CSR0_MERR | CSR0_CERR | CSR0_MISS;
676 DPRINTK( 2, ( "%s: interrupt csr0=%04x new csr=%04x.\n",
677 dev->name, csr0, DREG ));
679 if (csr0 & CSR0_TINT) { /* Tx-done interrupt */
680 int old_tx = lp->old_tx;
682 // if(lance_debug >= 3) {
685 // printk("%s: tx int\n", dev->name);
687 // for(i = 0; i < TX_RING_SIZE; i++)
688 // printk("ring %d flag=%04x\n", i,
689 // MEM->tx_head[i].flag);
692 while( old_tx != lp->new_tx) {
693 struct lance_tx_head *head = &(MEM->tx_head[old_tx]);
695 DPRINTK(3, ("on tx_ring %d\n", old_tx));
697 if (head->flag & TMD1_OWN_CHIP)
698 break; /* It still hasn't been Txed */
700 if (head->flag & TMD1_ERR) {
701 int status = head->misc;
702 lp->stats.tx_errors++;
703 if (status & TMD3_RTRY) lp->stats.tx_aborted_errors++;
704 if (status & TMD3_LCAR) lp->stats.tx_carrier_errors++;
705 if (status & TMD3_LCOL) lp->stats.tx_window_errors++;
706 if (status & (TMD3_UFLO | TMD3_BUFF)) {
707 lp->stats.tx_fifo_errors++;
708 printk("%s: Tx FIFO error\n",
710 REGA(CSR0) = CSR0_STOP;
711 REGA(CSR3) = CSR3_BSWP;
712 lance_init_ring(dev);
713 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
716 } else if(head->flag & (TMD1_ENP | TMD1_STP)) {
718 head->flag &= ~(TMD1_ENP | TMD1_STP);
719 if(head->flag & (TMD1_ONE | TMD1_MORE))
720 lp->stats.collisions++;
722 lp->stats.tx_packets++;
723 DPRINTK(3, ("cleared tx ring %d\n", old_tx));
725 old_tx = (old_tx +1) & TX_RING_MOD_MASK;
732 if (netif_queue_stopped(dev)) {
733 /* The ring is no longer full, clear tbusy. */
734 netif_start_queue(dev);
735 netif_wake_queue(dev);
738 if (csr0 & CSR0_RINT) /* Rx interrupt */
741 /* Log misc errors. */
742 if (csr0 & CSR0_BABL) lp->stats.tx_errors++; /* Tx babble. */
743 if (csr0 & CSR0_MISS) lp->stats.rx_errors++; /* Missed a Rx frame. */
744 if (csr0 & CSR0_MERR) {
745 DPRINTK( 1, ( "%s: Bus master arbitration failure (?!?), "
746 "status %04x.\n", dev->name, csr0 ));
747 /* Restart the chip. */
748 REGA(CSR0) = CSR0_STOP;
749 REGA(CSR3) = CSR3_BSWP;
750 lance_init_ring(dev);
751 REGA(CSR0) = CSR0_STRT | CSR0_INEA;
755 /* Clear any other interrupt, and set interrupt enable. */
756 // DREG = CSR0_BABL | CSR0_CERR | CSR0_MISS | CSR0_MERR |
757 // CSR0_IDON | CSR0_INEA;
759 REGA(CSR0) = CSR0_INEA;
761 if(DREG & (CSR0_RINT | CSR0_TINT)) {
762 DPRINTK(2, ("restarting interrupt, csr0=%#04x\n", DREG));
766 DPRINTK( 2, ( "%s: exiting interrupt, csr0=%#04x.\n",
772 /* get packet, toss into skbuff */
773 static int lance_rx( struct net_device *dev )
775 struct lance_private *lp = netdev_priv(dev);
776 int entry = lp->new_rx;
778 /* If we own the next entry, it's a new packet. Send it up. */
779 while( (MEM->rx_head[entry].flag & RMD1_OWN) == RMD1_OWN_HOST ) {
780 struct lance_rx_head *head = &(MEM->rx_head[entry]);
781 int status = head->flag;
783 if (status != (RMD1_ENP|RMD1_STP)) { /* There was an error. */
784 /* There is a tricky error noted by John Murphy,
785 <murf@perftech.com> to Russ Nelson: Even with
786 full-sized buffers it's possible for a jabber packet to use two
787 buffers, with only the last correctly noting the error. */
788 if (status & RMD1_ENP) /* Only count a general error at the */
789 lp->stats.rx_errors++; /* end of a packet.*/
790 if (status & RMD1_FRAM) lp->stats.rx_frame_errors++;
791 if (status & RMD1_OFLO) lp->stats.rx_over_errors++;
792 if (status & RMD1_CRC) lp->stats.rx_crc_errors++;
793 if (status & RMD1_BUFF) lp->stats.rx_fifo_errors++;
794 head->flag &= (RMD1_ENP|RMD1_STP);
796 /* Malloc up new buffer, compatible with net-3. */
797 // short pkt_len = head->msg_length;// & 0xfff;
798 short pkt_len = (head->msg_length & 0xfff) - 4;
802 printk( "%s: Runt packet!\n", dev->name );
803 lp->stats.rx_errors++;
806 skb = dev_alloc_skb( pkt_len+2 );
808 DPRINTK( 1, ( "%s: Memory squeeze, deferring packet.\n",
811 lp->stats.rx_dropped++;
812 head->msg_length = 0;
813 head->flag |= RMD1_OWN_CHIP;
814 lp->new_rx = (lp->new_rx+1) &
819 if (lance_debug >= 3) {
820 u_char *data = PKTBUF_ADDR(head), *p;
821 printk( "%s: RX pkt %d type 0x%04x from ", dev->name, entry, ((u_short *)data)[6]);
822 for( p = &data[6], i = 0; i < 6; i++ )
823 printk("%02x%s", *p++, i != 5 ? ":" : "" );
825 for( p = data, i = 0; i < 6; i++ )
826 printk("%02x%s", *p++, i != 5 ? ":" : "" );
827 printk(" data %02x %02x %02x %02x %02x %02x %02x %02x "
829 data[15], data[16], data[17], data[18],
830 data[19], data[20], data[21], data[22],
834 if (lance_debug >= 3) {
835 u_char *data = PKTBUF_ADDR(head);
836 printk( "%s: RX pkt %d type 0x%04x len %d\n ", dev->name, entry, ((u_short *)data)[6], pkt_len);
841 skb_reserve( skb, 2 ); /* 16 byte align */
842 skb_put( skb, pkt_len ); /* Make room */
843 // memcpy( skb->data, PKTBUF_ADDR(head), pkt_len );
844 eth_copy_and_sum(skb,
848 skb->protocol = eth_type_trans( skb, dev );
850 dev->last_rx = jiffies;
851 lp->stats.rx_packets++;
852 lp->stats.rx_bytes += pkt_len;
856 // head->buf_length = -PKT_BUF_SZ | 0xf000;
857 head->msg_length = 0;
858 head->flag = RMD1_OWN_CHIP;
860 entry = lp->new_rx = (lp->new_rx +1) & RX_RING_MOD_MASK;
863 /* From lance.c (Donald Becker): */
864 /* We should check that at least two ring entries are free.
865 If not, we should free one and mark stats->rx_dropped++. */
871 static int lance_close( struct net_device *dev )
873 struct lance_private *lp = netdev_priv(dev);
875 netif_stop_queue(dev);
879 DPRINTK( 2, ( "%s: Shutting down ethercard, status was %2.2x.\n",
882 /* We stop the LANCE here -- it occasionally polls
883 memory if we don't. */
889 static struct net_device_stats *lance_get_stats( struct net_device *dev )
891 struct lance_private *lp = netdev_priv(dev);
897 /* Set or clear the multicast filter for this adaptor.
898 num_addrs == -1 Promiscuous mode, receive all packets
899 num_addrs == 0 Normal mode, clear multicast list
900 num_addrs > 0 Multicast mode, receive normal and MC packets, and do
901 best-effort filtering.
904 /* completely untested on a sun3 */
905 static void set_multicast_list( struct net_device *dev )
907 struct lance_private *lp = netdev_priv(dev);
909 if(netif_queue_stopped(dev))
910 /* Only possible if board is already started */
913 /* We take the simple way out and always enable promiscuous mode. */
914 DREG = CSR0_STOP; /* Temporarily stop the lance. */
916 if (dev->flags & IFF_PROMISC) {
917 /* Log any net taps. */
918 DPRINTK( 3, ( "%s: Promiscuous mode enabled.\n", dev->name ));
919 REGA( CSR15 ) = 0x8000; /* Set promiscuous mode */
921 short multicast_table[4];
922 int num_addrs = dev->mc_count;
924 /* We don't use the multicast table, but rely on upper-layer
926 memset( multicast_table, (num_addrs == 0) ? 0 : -1,
927 sizeof(multicast_table) );
928 for( i = 0; i < 4; i++ )
929 REGA( CSR8+i ) = multicast_table[i];
930 REGA( CSR15 ) = 0; /* Unset promiscuous mode */
934 * Always set BSWP after a STOP as STOP puts it back into
935 * little endian mode.
937 REGA( CSR3 ) = CSR3_BSWP;
939 /* Resume normal operation and reset AREG to CSR0 */
940 REGA( CSR0 ) = CSR0_IDON | CSR0_INEA | CSR0_STRT;
946 static struct net_device *sun3lance_dev;
948 int __init init_module(void)
950 sun3lance_dev = sun3lance_probe(-1);
951 if (IS_ERR(sun3lance_dev))
952 return PTR_ERR(sun3lance_dev);
956 void __exit cleanup_module(void)
958 unregister_netdev(sun3lance_dev);
960 iounmap((void __iomem *)sun3lance_dev->base_addr);
962 free_netdev(sun3lance_dev);