2 * drivers/s390/net/qeth_core_main.c
4 * Copyright IBM Corp. 2007
5 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>,
6 * Frank Pavlic <fpavlic@de.ibm.com>,
7 * Thomas Spatzier <tspat@de.ibm.com>,
8 * Frank Blaschka <frank.blaschka@de.ibm.com>
11 #define KMSG_COMPONENT "qeth"
12 #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
14 #include <linux/module.h>
15 #include <linux/moduleparam.h>
16 #include <linux/string.h>
17 #include <linux/errno.h>
18 #include <linux/kernel.h>
20 #include <linux/ipv6.h>
21 #include <linux/tcp.h>
22 #include <linux/mii.h>
23 #include <linux/kthread.h>
25 #include <asm/ebcdic.h>
27 #include <asm/s390_rdev.h>
29 #include "qeth_core.h"
30 #include "qeth_core_offl.h"
32 struct qeth_dbf_info qeth_dbf[QETH_DBF_INFOS] = {
33 /* define dbf - Name, Pages, Areas, Maxlen, Level, View, Handle */
35 [QETH_DBF_SETUP] = {"qeth_setup",
36 8, 1, 8, 5, &debug_hex_ascii_view, NULL},
37 [QETH_DBF_QERR] = {"qeth_qerr",
38 2, 1, 8, 2, &debug_hex_ascii_view, NULL},
39 [QETH_DBF_TRACE] = {"qeth_trace",
40 4, 1, 8, 3, &debug_hex_ascii_view, NULL},
41 [QETH_DBF_MSG] = {"qeth_msg",
42 8, 1, 128, 3, &debug_sprintf_view, NULL},
43 [QETH_DBF_SENSE] = {"qeth_sense",
44 2, 1, 64, 2, &debug_hex_ascii_view, NULL},
45 [QETH_DBF_MISC] = {"qeth_misc",
46 2, 1, 256, 2, &debug_hex_ascii_view, NULL},
47 [QETH_DBF_CTRL] = {"qeth_control",
48 8, 1, QETH_DBF_CTRL_LEN, 5, &debug_hex_ascii_view, NULL},
50 EXPORT_SYMBOL_GPL(qeth_dbf);
52 struct qeth_card_list_struct qeth_core_card_list;
53 EXPORT_SYMBOL_GPL(qeth_core_card_list);
54 struct kmem_cache *qeth_core_header_cache;
55 EXPORT_SYMBOL_GPL(qeth_core_header_cache);
57 static struct device *qeth_core_root_dev;
58 static unsigned int known_devices[][10] = QETH_MODELLIST_ARRAY;
59 static struct lock_class_key qdio_out_skb_queue_key;
61 static void qeth_send_control_data_cb(struct qeth_channel *,
62 struct qeth_cmd_buffer *);
63 static int qeth_issue_next_read(struct qeth_card *);
64 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *);
65 static void qeth_setup_ccw(struct qeth_channel *, unsigned char *, __u32);
66 static void qeth_free_buffer_pool(struct qeth_card *);
67 static int qeth_qdio_establish(struct qeth_card *);
70 static inline void __qeth_fill_buffer_frag(struct sk_buff *skb,
71 struct qdio_buffer *buffer, int is_tso,
72 int *next_element_to_fill)
74 struct skb_frag_struct *frag;
77 int element, cnt, dlen;
79 fragno = skb_shinfo(skb)->nr_frags;
80 element = *next_element_to_fill;
84 buffer->element[element].flags =
85 SBAL_FLAGS_MIDDLE_FRAG;
87 buffer->element[element].flags =
88 SBAL_FLAGS_FIRST_FRAG;
89 dlen = skb->len - skb->data_len;
91 buffer->element[element].addr = skb->data;
92 buffer->element[element].length = dlen;
95 for (cnt = 0; cnt < fragno; cnt++) {
96 frag = &skb_shinfo(skb)->frags[cnt];
97 addr = (page_to_pfn(frag->page) << PAGE_SHIFT) +
99 buffer->element[element].addr = (char *)addr;
100 buffer->element[element].length = frag->size;
101 if (cnt < (fragno - 1))
102 buffer->element[element].flags =
103 SBAL_FLAGS_MIDDLE_FRAG;
105 buffer->element[element].flags =
106 SBAL_FLAGS_LAST_FRAG;
109 *next_element_to_fill = element;
112 static inline const char *qeth_get_cardname(struct qeth_card *card)
114 if (card->info.guestlan) {
115 switch (card->info.type) {
116 case QETH_CARD_TYPE_OSAE:
117 return " Guest LAN QDIO";
118 case QETH_CARD_TYPE_IQD:
119 return " Guest LAN Hiper";
124 switch (card->info.type) {
125 case QETH_CARD_TYPE_OSAE:
126 return " OSD Express";
127 case QETH_CARD_TYPE_IQD:
128 return " HiperSockets";
129 case QETH_CARD_TYPE_OSN:
138 /* max length to be returned: 14 */
139 const char *qeth_get_cardname_short(struct qeth_card *card)
141 if (card->info.guestlan) {
142 switch (card->info.type) {
143 case QETH_CARD_TYPE_OSAE:
144 return "GuestLAN QDIO";
145 case QETH_CARD_TYPE_IQD:
146 return "GuestLAN Hiper";
151 switch (card->info.type) {
152 case QETH_CARD_TYPE_OSAE:
153 switch (card->info.link_type) {
154 case QETH_LINK_TYPE_FAST_ETH:
156 case QETH_LINK_TYPE_HSTR:
158 case QETH_LINK_TYPE_GBIT_ETH:
160 case QETH_LINK_TYPE_10GBIT_ETH:
162 case QETH_LINK_TYPE_LANE_ETH100:
163 return "OSD_FE_LANE";
164 case QETH_LINK_TYPE_LANE_TR:
165 return "OSD_TR_LANE";
166 case QETH_LINK_TYPE_LANE_ETH1000:
167 return "OSD_GbE_LANE";
168 case QETH_LINK_TYPE_LANE:
169 return "OSD_ATM_LANE";
171 return "OSD_Express";
173 case QETH_CARD_TYPE_IQD:
174 return "HiperSockets";
175 case QETH_CARD_TYPE_OSN:
184 void qeth_set_allowed_threads(struct qeth_card *card, unsigned long threads,
185 int clear_start_mask)
189 spin_lock_irqsave(&card->thread_mask_lock, flags);
190 card->thread_allowed_mask = threads;
191 if (clear_start_mask)
192 card->thread_start_mask &= threads;
193 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
194 wake_up(&card->wait_q);
196 EXPORT_SYMBOL_GPL(qeth_set_allowed_threads);
198 int qeth_threads_running(struct qeth_card *card, unsigned long threads)
203 spin_lock_irqsave(&card->thread_mask_lock, flags);
204 rc = (card->thread_running_mask & threads);
205 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
208 EXPORT_SYMBOL_GPL(qeth_threads_running);
210 int qeth_wait_for_threads(struct qeth_card *card, unsigned long threads)
212 return wait_event_interruptible(card->wait_q,
213 qeth_threads_running(card, threads) == 0);
215 EXPORT_SYMBOL_GPL(qeth_wait_for_threads);
217 void qeth_clear_working_pool_list(struct qeth_card *card)
219 struct qeth_buffer_pool_entry *pool_entry, *tmp;
221 QETH_DBF_TEXT(TRACE, 5, "clwrklst");
222 list_for_each_entry_safe(pool_entry, tmp,
223 &card->qdio.in_buf_pool.entry_list, list){
224 list_del(&pool_entry->list);
227 EXPORT_SYMBOL_GPL(qeth_clear_working_pool_list);
229 static int qeth_alloc_buffer_pool(struct qeth_card *card)
231 struct qeth_buffer_pool_entry *pool_entry;
235 QETH_DBF_TEXT(TRACE, 5, "alocpool");
236 for (i = 0; i < card->qdio.init_pool.buf_count; ++i) {
237 pool_entry = kmalloc(sizeof(*pool_entry), GFP_KERNEL);
239 qeth_free_buffer_pool(card);
242 for (j = 0; j < QETH_MAX_BUFFER_ELEMENTS(card); ++j) {
243 ptr = (void *) __get_free_page(GFP_KERNEL);
246 free_page((unsigned long)
247 pool_entry->elements[--j]);
249 qeth_free_buffer_pool(card);
252 pool_entry->elements[j] = ptr;
254 list_add(&pool_entry->init_list,
255 &card->qdio.init_pool.entry_list);
260 int qeth_realloc_buffer_pool(struct qeth_card *card, int bufcnt)
262 QETH_DBF_TEXT(TRACE, 2, "realcbp");
264 if ((card->state != CARD_STATE_DOWN) &&
265 (card->state != CARD_STATE_RECOVER))
268 /* TODO: steel/add buffers from/to a running card's buffer pool (?) */
269 qeth_clear_working_pool_list(card);
270 qeth_free_buffer_pool(card);
271 card->qdio.in_buf_pool.buf_count = bufcnt;
272 card->qdio.init_pool.buf_count = bufcnt;
273 return qeth_alloc_buffer_pool(card);
276 int qeth_set_large_send(struct qeth_card *card,
277 enum qeth_large_send_types type)
281 if (card->dev == NULL) {
282 card->options.large_send = type;
285 if (card->state == CARD_STATE_UP)
286 netif_tx_disable(card->dev);
287 card->options.large_send = type;
288 switch (card->options.large_send) {
289 case QETH_LARGE_SEND_EDDP:
290 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
293 case QETH_LARGE_SEND_TSO:
294 if (qeth_is_supported(card, IPA_OUTBOUND_TSO)) {
295 card->dev->features |= NETIF_F_TSO | NETIF_F_SG |
298 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
300 card->options.large_send = QETH_LARGE_SEND_NO;
304 default: /* includes QETH_LARGE_SEND_NO */
305 card->dev->features &= ~(NETIF_F_TSO | NETIF_F_SG |
309 if (card->state == CARD_STATE_UP)
310 netif_wake_queue(card->dev);
313 EXPORT_SYMBOL_GPL(qeth_set_large_send);
315 static int qeth_issue_next_read(struct qeth_card *card)
318 struct qeth_cmd_buffer *iob;
320 QETH_DBF_TEXT(TRACE, 5, "issnxrd");
321 if (card->read.state != CH_STATE_UP)
323 iob = qeth_get_buffer(&card->read);
325 dev_warn(&card->gdev->dev, "The qeth device driver "
326 "failed to recover an error on the device\n");
327 QETH_DBF_MESSAGE(2, "%s issue_next_read failed: no iob "
328 "available\n", dev_name(&card->gdev->dev));
331 qeth_setup_ccw(&card->read, iob->data, QETH_BUFSIZE);
332 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
333 rc = ccw_device_start(card->read.ccwdev, &card->read.ccw,
336 QETH_DBF_MESSAGE(2, "%s error in starting next read ccw! "
337 "rc=%i\n", dev_name(&card->gdev->dev), rc);
338 atomic_set(&card->read.irq_pending, 0);
339 qeth_schedule_recovery(card);
340 wake_up(&card->wait_q);
345 static struct qeth_reply *qeth_alloc_reply(struct qeth_card *card)
347 struct qeth_reply *reply;
349 reply = kzalloc(sizeof(struct qeth_reply), GFP_ATOMIC);
351 atomic_set(&reply->refcnt, 1);
352 atomic_set(&reply->received, 0);
358 static void qeth_get_reply(struct qeth_reply *reply)
360 WARN_ON(atomic_read(&reply->refcnt) <= 0);
361 atomic_inc(&reply->refcnt);
364 static void qeth_put_reply(struct qeth_reply *reply)
366 WARN_ON(atomic_read(&reply->refcnt) <= 0);
367 if (atomic_dec_and_test(&reply->refcnt))
371 static void qeth_issue_ipa_msg(struct qeth_ipa_cmd *cmd, int rc,
372 struct qeth_card *card)
375 int com = cmd->hdr.command;
376 ipa_name = qeth_get_ipa_cmd_name(com);
378 QETH_DBF_MESSAGE(2, "IPA: %s(x%X) for %s returned x%X \"%s\"\n",
379 ipa_name, com, QETH_CARD_IFNAME(card),
380 rc, qeth_get_ipa_msg(rc));
382 QETH_DBF_MESSAGE(5, "IPA: %s(x%X) for %s succeeded\n",
383 ipa_name, com, QETH_CARD_IFNAME(card));
386 static struct qeth_ipa_cmd *qeth_check_ipa_data(struct qeth_card *card,
387 struct qeth_cmd_buffer *iob)
389 struct qeth_ipa_cmd *cmd = NULL;
391 QETH_DBF_TEXT(TRACE, 5, "chkipad");
392 if (IS_IPA(iob->data)) {
393 cmd = (struct qeth_ipa_cmd *) PDU_ENCAPSULATION(iob->data);
394 if (IS_IPA_REPLY(cmd)) {
395 if (cmd->hdr.command < IPA_CMD_SETCCID ||
396 cmd->hdr.command > IPA_CMD_MODCCID)
397 qeth_issue_ipa_msg(cmd,
398 cmd->hdr.return_code, card);
401 switch (cmd->hdr.command) {
402 case IPA_CMD_STOPLAN:
403 dev_warn(&card->gdev->dev,
404 "The link for interface %s on CHPID"
406 QETH_CARD_IFNAME(card),
408 card->lan_online = 0;
409 if (card->dev && netif_carrier_ok(card->dev))
410 netif_carrier_off(card->dev);
412 case IPA_CMD_STARTLAN:
413 dev_info(&card->gdev->dev,
414 "The link for %s on CHPID 0x%X has"
416 QETH_CARD_IFNAME(card),
418 netif_carrier_on(card->dev);
419 card->lan_online = 1;
420 qeth_schedule_recovery(card);
422 case IPA_CMD_MODCCID:
424 case IPA_CMD_REGISTER_LOCAL_ADDR:
425 QETH_DBF_TEXT(TRACE, 3, "irla");
427 case IPA_CMD_UNREGISTER_LOCAL_ADDR:
428 QETH_DBF_TEXT(TRACE, 3, "urla");
431 QETH_DBF_MESSAGE(2, "Received data is IPA "
432 "but not a reply!\n");
440 void qeth_clear_ipacmd_list(struct qeth_card *card)
442 struct qeth_reply *reply, *r;
445 QETH_DBF_TEXT(TRACE, 4, "clipalst");
447 spin_lock_irqsave(&card->lock, flags);
448 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
449 qeth_get_reply(reply);
451 atomic_inc(&reply->received);
452 list_del_init(&reply->list);
453 wake_up(&reply->wait_q);
454 qeth_put_reply(reply);
456 spin_unlock_irqrestore(&card->lock, flags);
458 EXPORT_SYMBOL_GPL(qeth_clear_ipacmd_list);
460 static int qeth_check_idx_response(unsigned char *buffer)
465 QETH_DBF_HEX(CTRL, 2, buffer, QETH_DBF_CTRL_LEN);
466 if ((buffer[2] & 0xc0) == 0xc0) {
467 QETH_DBF_MESSAGE(2, "received an IDX TERMINATE "
468 "with cause code 0x%02x%s\n",
470 ((buffer[4] == 0x22) ?
471 " -- try another portname" : ""));
472 QETH_DBF_TEXT(TRACE, 2, "ckidxres");
473 QETH_DBF_TEXT(TRACE, 2, " idxterm");
474 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
480 static void qeth_setup_ccw(struct qeth_channel *channel, unsigned char *iob,
483 struct qeth_card *card;
485 QETH_DBF_TEXT(TRACE, 4, "setupccw");
486 card = CARD_FROM_CDEV(channel->ccwdev);
487 if (channel == &card->read)
488 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
490 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
491 channel->ccw.count = len;
492 channel->ccw.cda = (__u32) __pa(iob);
495 static struct qeth_cmd_buffer *__qeth_get_buffer(struct qeth_channel *channel)
499 QETH_DBF_TEXT(TRACE, 6, "getbuff");
500 index = channel->io_buf_no;
502 if (channel->iob[index].state == BUF_STATE_FREE) {
503 channel->iob[index].state = BUF_STATE_LOCKED;
504 channel->io_buf_no = (channel->io_buf_no + 1) %
506 memset(channel->iob[index].data, 0, QETH_BUFSIZE);
507 return channel->iob + index;
509 index = (index + 1) % QETH_CMD_BUFFER_NO;
510 } while (index != channel->io_buf_no);
515 void qeth_release_buffer(struct qeth_channel *channel,
516 struct qeth_cmd_buffer *iob)
520 QETH_DBF_TEXT(TRACE, 6, "relbuff");
521 spin_lock_irqsave(&channel->iob_lock, flags);
522 memset(iob->data, 0, QETH_BUFSIZE);
523 iob->state = BUF_STATE_FREE;
524 iob->callback = qeth_send_control_data_cb;
526 spin_unlock_irqrestore(&channel->iob_lock, flags);
528 EXPORT_SYMBOL_GPL(qeth_release_buffer);
530 static struct qeth_cmd_buffer *qeth_get_buffer(struct qeth_channel *channel)
532 struct qeth_cmd_buffer *buffer = NULL;
535 spin_lock_irqsave(&channel->iob_lock, flags);
536 buffer = __qeth_get_buffer(channel);
537 spin_unlock_irqrestore(&channel->iob_lock, flags);
541 struct qeth_cmd_buffer *qeth_wait_for_buffer(struct qeth_channel *channel)
543 struct qeth_cmd_buffer *buffer;
544 wait_event(channel->wait_q,
545 ((buffer = qeth_get_buffer(channel)) != NULL));
548 EXPORT_SYMBOL_GPL(qeth_wait_for_buffer);
550 void qeth_clear_cmd_buffers(struct qeth_channel *channel)
554 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
555 qeth_release_buffer(channel, &channel->iob[cnt]);
557 channel->io_buf_no = 0;
559 EXPORT_SYMBOL_GPL(qeth_clear_cmd_buffers);
561 static void qeth_send_control_data_cb(struct qeth_channel *channel,
562 struct qeth_cmd_buffer *iob)
564 struct qeth_card *card;
565 struct qeth_reply *reply, *r;
566 struct qeth_ipa_cmd *cmd;
570 QETH_DBF_TEXT(TRACE, 4, "sndctlcb");
572 card = CARD_FROM_CDEV(channel->ccwdev);
573 if (qeth_check_idx_response(iob->data)) {
574 qeth_clear_ipacmd_list(card);
575 qeth_schedule_recovery(card);
579 cmd = qeth_check_ipa_data(card, iob);
580 if ((cmd == NULL) && (card->state != CARD_STATE_DOWN))
582 /*in case of OSN : check if cmd is set */
583 if (card->info.type == QETH_CARD_TYPE_OSN &&
585 cmd->hdr.command != IPA_CMD_STARTLAN &&
586 card->osn_info.assist_cb != NULL) {
587 card->osn_info.assist_cb(card->dev, cmd);
591 spin_lock_irqsave(&card->lock, flags);
592 list_for_each_entry_safe(reply, r, &card->cmd_waiter_list, list) {
593 if ((reply->seqno == QETH_IDX_COMMAND_SEQNO) ||
594 ((cmd) && (reply->seqno == cmd->hdr.seqno))) {
595 qeth_get_reply(reply);
596 list_del_init(&reply->list);
597 spin_unlock_irqrestore(&card->lock, flags);
599 if (reply->callback != NULL) {
601 reply->offset = (__u16)((char *)cmd -
603 keep_reply = reply->callback(card,
607 keep_reply = reply->callback(card,
612 reply->rc = (u16) cmd->hdr.return_code;
616 spin_lock_irqsave(&card->lock, flags);
617 list_add_tail(&reply->list,
618 &card->cmd_waiter_list);
619 spin_unlock_irqrestore(&card->lock, flags);
621 atomic_inc(&reply->received);
622 wake_up(&reply->wait_q);
624 qeth_put_reply(reply);
628 spin_unlock_irqrestore(&card->lock, flags);
630 memcpy(&card->seqno.pdu_hdr_ack,
631 QETH_PDU_HEADER_SEQ_NO(iob->data),
633 qeth_release_buffer(channel, iob);
636 static int qeth_setup_channel(struct qeth_channel *channel)
640 QETH_DBF_TEXT(SETUP, 2, "setupch");
641 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++) {
642 channel->iob[cnt].data = (char *)
643 kmalloc(QETH_BUFSIZE, GFP_DMA|GFP_KERNEL);
644 if (channel->iob[cnt].data == NULL)
646 channel->iob[cnt].state = BUF_STATE_FREE;
647 channel->iob[cnt].channel = channel;
648 channel->iob[cnt].callback = qeth_send_control_data_cb;
649 channel->iob[cnt].rc = 0;
651 if (cnt < QETH_CMD_BUFFER_NO) {
653 kfree(channel->iob[cnt].data);
657 channel->io_buf_no = 0;
658 atomic_set(&channel->irq_pending, 0);
659 spin_lock_init(&channel->iob_lock);
661 init_waitqueue_head(&channel->wait_q);
665 static int qeth_set_thread_start_bit(struct qeth_card *card,
666 unsigned long thread)
670 spin_lock_irqsave(&card->thread_mask_lock, flags);
671 if (!(card->thread_allowed_mask & thread) ||
672 (card->thread_start_mask & thread)) {
673 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
676 card->thread_start_mask |= thread;
677 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
681 void qeth_clear_thread_start_bit(struct qeth_card *card, unsigned long thread)
685 spin_lock_irqsave(&card->thread_mask_lock, flags);
686 card->thread_start_mask &= ~thread;
687 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
688 wake_up(&card->wait_q);
690 EXPORT_SYMBOL_GPL(qeth_clear_thread_start_bit);
692 void qeth_clear_thread_running_bit(struct qeth_card *card, unsigned long thread)
696 spin_lock_irqsave(&card->thread_mask_lock, flags);
697 card->thread_running_mask &= ~thread;
698 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
699 wake_up(&card->wait_q);
701 EXPORT_SYMBOL_GPL(qeth_clear_thread_running_bit);
703 static int __qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
708 spin_lock_irqsave(&card->thread_mask_lock, flags);
709 if (card->thread_start_mask & thread) {
710 if ((card->thread_allowed_mask & thread) &&
711 !(card->thread_running_mask & thread)) {
713 card->thread_start_mask &= ~thread;
714 card->thread_running_mask |= thread;
718 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
722 int qeth_do_run_thread(struct qeth_card *card, unsigned long thread)
726 wait_event(card->wait_q,
727 (rc = __qeth_do_run_thread(card, thread)) >= 0);
730 EXPORT_SYMBOL_GPL(qeth_do_run_thread);
732 void qeth_schedule_recovery(struct qeth_card *card)
734 QETH_DBF_TEXT(TRACE, 2, "startrec");
735 if (qeth_set_thread_start_bit(card, QETH_RECOVER_THREAD) == 0)
736 schedule_work(&card->kernel_thread_starter);
738 EXPORT_SYMBOL_GPL(qeth_schedule_recovery);
740 static int qeth_get_problem(struct ccw_device *cdev, struct irb *irb)
745 sense = (char *) irb->ecw;
746 cstat = irb->scsw.cmd.cstat;
747 dstat = irb->scsw.cmd.dstat;
749 if (cstat & (SCHN_STAT_CHN_CTRL_CHK | SCHN_STAT_INTF_CTRL_CHK |
750 SCHN_STAT_CHN_DATA_CHK | SCHN_STAT_CHAIN_CHECK |
751 SCHN_STAT_PROT_CHECK | SCHN_STAT_PROG_CHECK)) {
752 QETH_DBF_TEXT(TRACE, 2, "CGENCHK");
753 dev_warn(&cdev->dev, "The qeth device driver "
754 "failed to recover an error on the device\n");
755 QETH_DBF_MESSAGE(2, "%s check on device dstat=x%x, cstat=x%x ",
756 dev_name(&cdev->dev), dstat, cstat);
757 print_hex_dump(KERN_WARNING, "qeth: irb ", DUMP_PREFIX_OFFSET,
762 if (dstat & DEV_STAT_UNIT_CHECK) {
763 if (sense[SENSE_RESETTING_EVENT_BYTE] &
764 SENSE_RESETTING_EVENT_FLAG) {
765 QETH_DBF_TEXT(TRACE, 2, "REVIND");
768 if (sense[SENSE_COMMAND_REJECT_BYTE] &
769 SENSE_COMMAND_REJECT_FLAG) {
770 QETH_DBF_TEXT(TRACE, 2, "CMDREJi");
773 if ((sense[2] == 0xaf) && (sense[3] == 0xfe)) {
774 QETH_DBF_TEXT(TRACE, 2, "AFFE");
777 if ((!sense[0]) && (!sense[1]) && (!sense[2]) && (!sense[3])) {
778 QETH_DBF_TEXT(TRACE, 2, "ZEROSEN");
781 QETH_DBF_TEXT(TRACE, 2, "DGENCHK");
787 static long __qeth_check_irb_error(struct ccw_device *cdev,
788 unsigned long intparm, struct irb *irb)
793 switch (PTR_ERR(irb)) {
795 QETH_DBF_MESSAGE(2, "%s i/o-error on device\n",
796 dev_name(&cdev->dev));
797 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
798 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -EIO);
801 dev_warn(&cdev->dev, "A hardware operation timed out"
803 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
804 QETH_DBF_TEXT_(TRACE, 2, " rc%d", -ETIMEDOUT);
805 if (intparm == QETH_RCD_PARM) {
806 struct qeth_card *card = CARD_FROM_CDEV(cdev);
808 if (card && (card->data.ccwdev == cdev)) {
809 card->data.state = CH_STATE_DOWN;
810 wake_up(&card->wait_q);
815 QETH_DBF_MESSAGE(2, "%s unknown error %ld on device\n",
816 dev_name(&cdev->dev), PTR_ERR(irb));
817 QETH_DBF_TEXT(TRACE, 2, "ckirberr");
818 QETH_DBF_TEXT(TRACE, 2, " rc???");
823 static void qeth_irq(struct ccw_device *cdev, unsigned long intparm,
828 struct qeth_cmd_buffer *buffer;
829 struct qeth_channel *channel;
830 struct qeth_card *card;
831 struct qeth_cmd_buffer *iob;
834 QETH_DBF_TEXT(TRACE, 5, "irq");
836 if (__qeth_check_irb_error(cdev, intparm, irb))
838 cstat = irb->scsw.cmd.cstat;
839 dstat = irb->scsw.cmd.dstat;
841 card = CARD_FROM_CDEV(cdev);
845 if (card->read.ccwdev == cdev) {
846 channel = &card->read;
847 QETH_DBF_TEXT(TRACE, 5, "read");
848 } else if (card->write.ccwdev == cdev) {
849 channel = &card->write;
850 QETH_DBF_TEXT(TRACE, 5, "write");
852 channel = &card->data;
853 QETH_DBF_TEXT(TRACE, 5, "data");
855 atomic_set(&channel->irq_pending, 0);
857 if (irb->scsw.cmd.fctl & (SCSW_FCTL_CLEAR_FUNC))
858 channel->state = CH_STATE_STOPPED;
860 if (irb->scsw.cmd.fctl & (SCSW_FCTL_HALT_FUNC))
861 channel->state = CH_STATE_HALTED;
863 /*let's wake up immediately on data channel*/
864 if ((channel == &card->data) && (intparm != 0) &&
865 (intparm != QETH_RCD_PARM))
868 if (intparm == QETH_CLEAR_CHANNEL_PARM) {
869 QETH_DBF_TEXT(TRACE, 6, "clrchpar");
870 /* we don't have to handle this further */
873 if (intparm == QETH_HALT_CHANNEL_PARM) {
874 QETH_DBF_TEXT(TRACE, 6, "hltchpar");
875 /* we don't have to handle this further */
878 if ((dstat & DEV_STAT_UNIT_EXCEP) ||
879 (dstat & DEV_STAT_UNIT_CHECK) ||
881 if (irb->esw.esw0.erw.cons) {
882 dev_warn(&channel->ccwdev->dev,
883 "The qeth device driver failed to recover "
884 "an error on the device\n");
885 QETH_DBF_MESSAGE(2, "%s sense data available. cstat "
887 dev_name(&channel->ccwdev->dev), cstat, dstat);
888 print_hex_dump(KERN_WARNING, "qeth: irb ",
889 DUMP_PREFIX_OFFSET, 16, 1, irb, 32, 1);
890 print_hex_dump(KERN_WARNING, "qeth: sense data ",
891 DUMP_PREFIX_OFFSET, 16, 1, irb->ecw, 32, 1);
893 if (intparm == QETH_RCD_PARM) {
894 channel->state = CH_STATE_DOWN;
897 rc = qeth_get_problem(cdev, irb);
899 qeth_clear_ipacmd_list(card);
900 qeth_schedule_recovery(card);
905 if (intparm == QETH_RCD_PARM) {
906 channel->state = CH_STATE_RCD_DONE;
910 buffer = (struct qeth_cmd_buffer *) __va((addr_t)intparm);
911 buffer->state = BUF_STATE_PROCESSED;
913 if (channel == &card->data)
915 if (channel == &card->read &&
916 channel->state == CH_STATE_UP)
917 qeth_issue_next_read(card);
920 index = channel->buf_no;
921 while (iob[index].state == BUF_STATE_PROCESSED) {
922 if (iob[index].callback != NULL)
923 iob[index].callback(channel, iob + index);
925 index = (index + 1) % QETH_CMD_BUFFER_NO;
927 channel->buf_no = index;
929 wake_up(&card->wait_q);
933 static void qeth_clear_output_buffer(struct qeth_qdio_out_q *queue,
934 struct qeth_qdio_out_buffer *buf)
939 /* is PCI flag set on buffer? */
940 if (buf->buffer->element[0].flags & 0x40)
941 atomic_dec(&queue->set_pci_flags_count);
943 skb = skb_dequeue(&buf->skb_list);
945 atomic_dec(&skb->users);
946 dev_kfree_skb_any(skb);
947 skb = skb_dequeue(&buf->skb_list);
949 qeth_eddp_buf_release_contexts(buf);
950 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(queue->card); ++i) {
951 if (buf->buffer->element[i].addr && buf->is_header[i])
952 kmem_cache_free(qeth_core_header_cache,
953 buf->buffer->element[i].addr);
954 buf->is_header[i] = 0;
955 buf->buffer->element[i].length = 0;
956 buf->buffer->element[i].addr = NULL;
957 buf->buffer->element[i].flags = 0;
959 buf->next_element_to_fill = 0;
960 atomic_set(&buf->state, QETH_QDIO_BUF_EMPTY);
963 void qeth_clear_qdio_buffers(struct qeth_card *card)
967 QETH_DBF_TEXT(TRACE, 2, "clearqdbf");
968 /* clear outbound buffers to free skbs */
969 for (i = 0; i < card->qdio.no_out_queues; ++i)
970 if (card->qdio.out_qs[i]) {
971 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
972 qeth_clear_output_buffer(card->qdio.out_qs[i],
973 &card->qdio.out_qs[i]->bufs[j]);
976 EXPORT_SYMBOL_GPL(qeth_clear_qdio_buffers);
978 static void qeth_free_buffer_pool(struct qeth_card *card)
980 struct qeth_buffer_pool_entry *pool_entry, *tmp;
982 QETH_DBF_TEXT(TRACE, 5, "freepool");
983 list_for_each_entry_safe(pool_entry, tmp,
984 &card->qdio.init_pool.entry_list, init_list){
985 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i)
986 free_page((unsigned long)pool_entry->elements[i]);
987 list_del(&pool_entry->init_list);
992 static void qeth_free_qdio_buffers(struct qeth_card *card)
996 QETH_DBF_TEXT(TRACE, 2, "freeqdbf");
997 if (atomic_xchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED) ==
998 QETH_QDIO_UNINITIALIZED)
1000 kfree(card->qdio.in_q);
1001 card->qdio.in_q = NULL;
1002 /* inbound buffer pool */
1003 qeth_free_buffer_pool(card);
1004 /* free outbound qdio_qs */
1005 if (card->qdio.out_qs) {
1006 for (i = 0; i < card->qdio.no_out_queues; ++i) {
1007 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j)
1008 qeth_clear_output_buffer(card->qdio.out_qs[i],
1009 &card->qdio.out_qs[i]->bufs[j]);
1010 kfree(card->qdio.out_qs[i]);
1012 kfree(card->qdio.out_qs);
1013 card->qdio.out_qs = NULL;
1017 static void qeth_clean_channel(struct qeth_channel *channel)
1021 QETH_DBF_TEXT(SETUP, 2, "freech");
1022 for (cnt = 0; cnt < QETH_CMD_BUFFER_NO; cnt++)
1023 kfree(channel->iob[cnt].data);
1026 static int qeth_is_1920_device(struct qeth_card *card)
1028 int single_queue = 0;
1029 struct ccw_device *ccwdev;
1030 struct channelPath_dsc {
1041 QETH_DBF_TEXT(SETUP, 2, "chk_1920");
1043 ccwdev = card->data.ccwdev;
1044 chp_dsc = (struct channelPath_dsc *)ccw_device_get_chp_desc(ccwdev, 0);
1045 if (chp_dsc != NULL) {
1046 /* CHPP field bit 6 == 1 -> single queue */
1047 single_queue = ((chp_dsc->chpp & 0x02) == 0x02);
1050 QETH_DBF_TEXT_(SETUP, 2, "rc:%x", single_queue);
1051 return single_queue;
1054 static void qeth_init_qdio_info(struct qeth_card *card)
1056 QETH_DBF_TEXT(SETUP, 4, "intqdinf");
1057 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
1059 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1060 card->qdio.init_pool.buf_count = QETH_IN_BUF_COUNT_DEFAULT;
1061 card->qdio.in_buf_pool.buf_count = card->qdio.init_pool.buf_count;
1062 INIT_LIST_HEAD(&card->qdio.in_buf_pool.entry_list);
1063 INIT_LIST_HEAD(&card->qdio.init_pool.entry_list);
1066 static void qeth_set_intial_options(struct qeth_card *card)
1068 card->options.route4.type = NO_ROUTER;
1069 card->options.route6.type = NO_ROUTER;
1070 card->options.checksum_type = QETH_CHECKSUM_DEFAULT;
1071 card->options.broadcast_mode = QETH_TR_BROADCAST_ALLRINGS;
1072 card->options.macaddr_mode = QETH_TR_MACADDR_NONCANONICAL;
1073 card->options.fake_broadcast = 0;
1074 card->options.add_hhlen = DEFAULT_ADD_HHLEN;
1075 card->options.fake_ll = 0;
1076 card->options.performance_stats = 0;
1077 card->options.rx_sg_cb = QETH_RX_SG_CB;
1080 static int qeth_do_start_thread(struct qeth_card *card, unsigned long thread)
1082 unsigned long flags;
1085 spin_lock_irqsave(&card->thread_mask_lock, flags);
1086 QETH_DBF_TEXT_(TRACE, 4, " %02x%02x%02x",
1087 (u8) card->thread_start_mask,
1088 (u8) card->thread_allowed_mask,
1089 (u8) card->thread_running_mask);
1090 rc = (card->thread_start_mask & thread);
1091 spin_unlock_irqrestore(&card->thread_mask_lock, flags);
1095 static void qeth_start_kernel_thread(struct work_struct *work)
1097 struct qeth_card *card = container_of(work, struct qeth_card,
1098 kernel_thread_starter);
1099 QETH_DBF_TEXT(TRACE , 2, "strthrd");
1101 if (card->read.state != CH_STATE_UP &&
1102 card->write.state != CH_STATE_UP)
1104 if (qeth_do_start_thread(card, QETH_RECOVER_THREAD))
1105 kthread_run(card->discipline.recover, (void *) card,
1109 static int qeth_setup_card(struct qeth_card *card)
1112 QETH_DBF_TEXT(SETUP, 2, "setupcrd");
1113 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1115 card->read.state = CH_STATE_DOWN;
1116 card->write.state = CH_STATE_DOWN;
1117 card->data.state = CH_STATE_DOWN;
1118 card->state = CARD_STATE_DOWN;
1119 card->lan_online = 0;
1120 card->use_hard_stop = 0;
1122 spin_lock_init(&card->vlanlock);
1123 spin_lock_init(&card->mclock);
1124 card->vlangrp = NULL;
1125 spin_lock_init(&card->lock);
1126 spin_lock_init(&card->ip_lock);
1127 spin_lock_init(&card->thread_mask_lock);
1128 card->thread_start_mask = 0;
1129 card->thread_allowed_mask = 0;
1130 card->thread_running_mask = 0;
1131 INIT_WORK(&card->kernel_thread_starter, qeth_start_kernel_thread);
1132 INIT_LIST_HEAD(&card->ip_list);
1133 card->ip_tbd_list = kmalloc(sizeof(struct list_head), GFP_KERNEL);
1134 if (!card->ip_tbd_list) {
1135 QETH_DBF_TEXT(SETUP, 0, "iptbdnom");
1138 INIT_LIST_HEAD(card->ip_tbd_list);
1139 INIT_LIST_HEAD(&card->cmd_waiter_list);
1140 init_waitqueue_head(&card->wait_q);
1141 /* intial options */
1142 qeth_set_intial_options(card);
1143 /* IP address takeover */
1144 INIT_LIST_HEAD(&card->ipato.entries);
1145 card->ipato.enabled = 0;
1146 card->ipato.invert4 = 0;
1147 card->ipato.invert6 = 0;
1148 /* init QDIO stuff */
1149 qeth_init_qdio_info(card);
1153 static void qeth_core_sl_print(struct seq_file *m, struct service_level *slr)
1155 struct qeth_card *card = container_of(slr, struct qeth_card,
1156 qeth_service_level);
1157 seq_printf(m, "qeth: %s firmware level %s\n", CARD_BUS_ID(card),
1158 card->info.mcl_level);
1161 static struct qeth_card *qeth_alloc_card(void)
1163 struct qeth_card *card;
1165 QETH_DBF_TEXT(SETUP, 2, "alloccrd");
1166 card = kzalloc(sizeof(struct qeth_card), GFP_DMA|GFP_KERNEL);
1169 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
1170 if (qeth_setup_channel(&card->read)) {
1174 if (qeth_setup_channel(&card->write)) {
1175 qeth_clean_channel(&card->read);
1179 card->options.layer2 = -1;
1180 card->qeth_service_level.seq_print = qeth_core_sl_print;
1181 register_service_level(&card->qeth_service_level);
1185 static int qeth_determine_card_type(struct qeth_card *card)
1189 QETH_DBF_TEXT(SETUP, 2, "detcdtyp");
1191 card->qdio.do_prio_queueing = QETH_PRIOQ_DEFAULT;
1192 card->qdio.default_out_queue = QETH_DEFAULT_QUEUE;
1193 while (known_devices[i][4]) {
1194 if ((CARD_RDEV(card)->id.dev_type == known_devices[i][2]) &&
1195 (CARD_RDEV(card)->id.dev_model == known_devices[i][3])) {
1196 card->info.type = known_devices[i][4];
1197 card->qdio.no_out_queues = known_devices[i][8];
1198 card->info.is_multicast_different = known_devices[i][9];
1199 if (qeth_is_1920_device(card)) {
1200 dev_info(&card->gdev->dev,
1201 "Priority Queueing not supported\n");
1202 card->qdio.no_out_queues = 1;
1203 card->qdio.default_out_queue = 0;
1209 card->info.type = QETH_CARD_TYPE_UNKNOWN;
1210 dev_err(&card->gdev->dev, "The adapter hardware is of an "
1215 static int qeth_clear_channel(struct qeth_channel *channel)
1217 unsigned long flags;
1218 struct qeth_card *card;
1221 QETH_DBF_TEXT(TRACE, 3, "clearch");
1222 card = CARD_FROM_CDEV(channel->ccwdev);
1223 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1224 rc = ccw_device_clear(channel->ccwdev, QETH_CLEAR_CHANNEL_PARM);
1225 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1229 rc = wait_event_interruptible_timeout(card->wait_q,
1230 channel->state == CH_STATE_STOPPED, QETH_TIMEOUT);
1231 if (rc == -ERESTARTSYS)
1233 if (channel->state != CH_STATE_STOPPED)
1235 channel->state = CH_STATE_DOWN;
1239 static int qeth_halt_channel(struct qeth_channel *channel)
1241 unsigned long flags;
1242 struct qeth_card *card;
1245 QETH_DBF_TEXT(TRACE, 3, "haltch");
1246 card = CARD_FROM_CDEV(channel->ccwdev);
1247 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1248 rc = ccw_device_halt(channel->ccwdev, QETH_HALT_CHANNEL_PARM);
1249 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1253 rc = wait_event_interruptible_timeout(card->wait_q,
1254 channel->state == CH_STATE_HALTED, QETH_TIMEOUT);
1255 if (rc == -ERESTARTSYS)
1257 if (channel->state != CH_STATE_HALTED)
1262 static int qeth_halt_channels(struct qeth_card *card)
1264 int rc1 = 0, rc2 = 0, rc3 = 0;
1266 QETH_DBF_TEXT(TRACE, 3, "haltchs");
1267 rc1 = qeth_halt_channel(&card->read);
1268 rc2 = qeth_halt_channel(&card->write);
1269 rc3 = qeth_halt_channel(&card->data);
1277 static int qeth_clear_channels(struct qeth_card *card)
1279 int rc1 = 0, rc2 = 0, rc3 = 0;
1281 QETH_DBF_TEXT(TRACE, 3, "clearchs");
1282 rc1 = qeth_clear_channel(&card->read);
1283 rc2 = qeth_clear_channel(&card->write);
1284 rc3 = qeth_clear_channel(&card->data);
1292 static int qeth_clear_halt_card(struct qeth_card *card, int halt)
1296 QETH_DBF_TEXT(TRACE, 3, "clhacrd");
1297 QETH_DBF_HEX(TRACE, 3, &card, sizeof(void *));
1300 rc = qeth_halt_channels(card);
1303 return qeth_clear_channels(card);
1306 int qeth_qdio_clear_card(struct qeth_card *card, int use_halt)
1310 QETH_DBF_TEXT(TRACE, 3, "qdioclr");
1311 switch (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ESTABLISHED,
1312 QETH_QDIO_CLEANING)) {
1313 case QETH_QDIO_ESTABLISHED:
1314 if (card->info.type == QETH_CARD_TYPE_IQD)
1315 rc = qdio_cleanup(CARD_DDEV(card),
1316 QDIO_FLAG_CLEANUP_USING_HALT);
1318 rc = qdio_cleanup(CARD_DDEV(card),
1319 QDIO_FLAG_CLEANUP_USING_CLEAR);
1321 QETH_DBF_TEXT_(TRACE, 3, "1err%d", rc);
1322 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
1324 case QETH_QDIO_CLEANING:
1329 rc = qeth_clear_halt_card(card, use_halt);
1331 QETH_DBF_TEXT_(TRACE, 3, "2err%d", rc);
1332 card->state = CARD_STATE_DOWN;
1335 EXPORT_SYMBOL_GPL(qeth_qdio_clear_card);
1337 static int qeth_read_conf_data(struct qeth_card *card, void **buffer,
1343 struct qeth_channel *channel = &card->data;
1344 unsigned long flags;
1347 * scan for RCD command in extended SenseID data
1349 ciw = ccw_device_get_ciw(channel->ccwdev, CIW_TYPE_RCD);
1350 if (!ciw || ciw->cmd == 0)
1352 rcd_buf = kzalloc(ciw->count, GFP_KERNEL | GFP_DMA);
1356 channel->ccw.cmd_code = ciw->cmd;
1357 channel->ccw.cda = (__u32) __pa(rcd_buf);
1358 channel->ccw.count = ciw->count;
1359 channel->ccw.flags = CCW_FLAG_SLI;
1360 channel->state = CH_STATE_RCD;
1361 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1362 ret = ccw_device_start_timeout(channel->ccwdev, &channel->ccw,
1363 QETH_RCD_PARM, LPM_ANYPATH, 0,
1365 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1367 wait_event(card->wait_q,
1368 (channel->state == CH_STATE_RCD_DONE ||
1369 channel->state == CH_STATE_DOWN));
1370 if (channel->state == CH_STATE_DOWN)
1373 channel->state = CH_STATE_DOWN;
1379 *length = ciw->count;
1385 static int qeth_get_unitaddr(struct qeth_card *card)
1391 QETH_DBF_TEXT(SETUP, 2, "getunit");
1392 rc = qeth_read_conf_data(card, (void **) &prcd, &length);
1394 QETH_DBF_MESSAGE(2, "%s qeth_read_conf_data returned %i\n",
1395 dev_name(&card->gdev->dev), rc);
1398 card->info.chpid = prcd[30];
1399 card->info.unit_addr2 = prcd[31];
1400 card->info.cula = prcd[63];
1401 card->info.guestlan = ((prcd[0x10] == _ascebc['V']) &&
1402 (prcd[0x11] == _ascebc['M']));
1407 static void qeth_init_tokens(struct qeth_card *card)
1409 card->token.issuer_rm_w = 0x00010103UL;
1410 card->token.cm_filter_w = 0x00010108UL;
1411 card->token.cm_connection_w = 0x0001010aUL;
1412 card->token.ulp_filter_w = 0x0001010bUL;
1413 card->token.ulp_connection_w = 0x0001010dUL;
1416 static void qeth_init_func_level(struct qeth_card *card)
1418 if (card->ipato.enabled) {
1419 if (card->info.type == QETH_CARD_TYPE_IQD)
1420 card->info.func_level =
1421 QETH_IDX_FUNC_LEVEL_IQD_ENA_IPAT;
1423 card->info.func_level =
1424 QETH_IDX_FUNC_LEVEL_OSAE_ENA_IPAT;
1426 if (card->info.type == QETH_CARD_TYPE_IQD)
1427 /*FIXME:why do we have same values for dis and ena for
1429 card->info.func_level =
1430 QETH_IDX_FUNC_LEVEL_IQD_DIS_IPAT;
1432 card->info.func_level =
1433 QETH_IDX_FUNC_LEVEL_OSAE_DIS_IPAT;
1437 static int qeth_idx_activate_get_answer(struct qeth_channel *channel,
1438 void (*idx_reply_cb)(struct qeth_channel *,
1439 struct qeth_cmd_buffer *))
1441 struct qeth_cmd_buffer *iob;
1442 unsigned long flags;
1444 struct qeth_card *card;
1446 QETH_DBF_TEXT(SETUP, 2, "idxanswr");
1447 card = CARD_FROM_CDEV(channel->ccwdev);
1448 iob = qeth_get_buffer(channel);
1449 iob->callback = idx_reply_cb;
1450 memcpy(&channel->ccw, READ_CCW, sizeof(struct ccw1));
1451 channel->ccw.count = QETH_BUFSIZE;
1452 channel->ccw.cda = (__u32) __pa(iob->data);
1454 wait_event(card->wait_q,
1455 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1456 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1457 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1458 rc = ccw_device_start(channel->ccwdev,
1459 &channel->ccw, (addr_t) iob, 0, 0);
1460 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1463 QETH_DBF_MESSAGE(2, "Error2 in activating channel rc=%d\n", rc);
1464 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
1465 atomic_set(&channel->irq_pending, 0);
1466 wake_up(&card->wait_q);
1469 rc = wait_event_interruptible_timeout(card->wait_q,
1470 channel->state == CH_STATE_UP, QETH_TIMEOUT);
1471 if (rc == -ERESTARTSYS)
1473 if (channel->state != CH_STATE_UP) {
1475 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
1476 qeth_clear_cmd_buffers(channel);
1482 static int qeth_idx_activate_channel(struct qeth_channel *channel,
1483 void (*idx_reply_cb)(struct qeth_channel *,
1484 struct qeth_cmd_buffer *))
1486 struct qeth_card *card;
1487 struct qeth_cmd_buffer *iob;
1488 unsigned long flags;
1492 struct ccw_dev_id temp_devid;
1494 card = CARD_FROM_CDEV(channel->ccwdev);
1496 QETH_DBF_TEXT(SETUP, 2, "idxactch");
1498 iob = qeth_get_buffer(channel);
1499 iob->callback = idx_reply_cb;
1500 memcpy(&channel->ccw, WRITE_CCW, sizeof(struct ccw1));
1501 channel->ccw.count = IDX_ACTIVATE_SIZE;
1502 channel->ccw.cda = (__u32) __pa(iob->data);
1503 if (channel == &card->write) {
1504 memcpy(iob->data, IDX_ACTIVATE_WRITE, IDX_ACTIVATE_SIZE);
1505 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1506 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1507 card->seqno.trans_hdr++;
1509 memcpy(iob->data, IDX_ACTIVATE_READ, IDX_ACTIVATE_SIZE);
1510 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1511 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1513 tmp = ((__u8)card->info.portno) | 0x80;
1514 memcpy(QETH_IDX_ACT_PNO(iob->data), &tmp, 1);
1515 memcpy(QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1516 &card->token.issuer_rm_w, QETH_MPC_TOKEN_LENGTH);
1517 memcpy(QETH_IDX_ACT_FUNC_LEVEL(iob->data),
1518 &card->info.func_level, sizeof(__u16));
1519 ccw_device_get_id(CARD_DDEV(card), &temp_devid);
1520 memcpy(QETH_IDX_ACT_QDIO_DEV_CUA(iob->data), &temp_devid.devno, 2);
1521 temp = (card->info.cula << 8) + card->info.unit_addr2;
1522 memcpy(QETH_IDX_ACT_QDIO_DEV_REALADDR(iob->data), &temp, 2);
1524 wait_event(card->wait_q,
1525 atomic_cmpxchg(&channel->irq_pending, 0, 1) == 0);
1526 QETH_DBF_TEXT(SETUP, 6, "noirqpnd");
1527 spin_lock_irqsave(get_ccwdev_lock(channel->ccwdev), flags);
1528 rc = ccw_device_start(channel->ccwdev,
1529 &channel->ccw, (addr_t) iob, 0, 0);
1530 spin_unlock_irqrestore(get_ccwdev_lock(channel->ccwdev), flags);
1533 QETH_DBF_MESSAGE(2, "Error1 in activating channel. rc=%d\n",
1535 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
1536 atomic_set(&channel->irq_pending, 0);
1537 wake_up(&card->wait_q);
1540 rc = wait_event_interruptible_timeout(card->wait_q,
1541 channel->state == CH_STATE_ACTIVATING, QETH_TIMEOUT);
1542 if (rc == -ERESTARTSYS)
1544 if (channel->state != CH_STATE_ACTIVATING) {
1545 dev_warn(&channel->ccwdev->dev, "The qeth device driver"
1546 " failed to recover an error on the device\n");
1547 QETH_DBF_MESSAGE(2, "%s IDX activate timed out\n",
1548 dev_name(&channel->ccwdev->dev));
1549 QETH_DBF_TEXT_(SETUP, 2, "2err%d", -ETIME);
1550 qeth_clear_cmd_buffers(channel);
1553 return qeth_idx_activate_get_answer(channel, idx_reply_cb);
1556 static int qeth_peer_func_level(int level)
1558 if ((level & 0xff) == 8)
1559 return (level & 0xff) + 0x400;
1560 if (((level >> 8) & 3) == 1)
1561 return (level & 0xff) + 0x200;
1565 static void qeth_idx_write_cb(struct qeth_channel *channel,
1566 struct qeth_cmd_buffer *iob)
1568 struct qeth_card *card;
1571 QETH_DBF_TEXT(SETUP , 2, "idxwrcb");
1573 if (channel->state == CH_STATE_DOWN) {
1574 channel->state = CH_STATE_ACTIVATING;
1577 card = CARD_FROM_CDEV(channel->ccwdev);
1579 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1580 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1581 dev_err(&card->write.ccwdev->dev,
1582 "The adapter is used exclusively by another "
1585 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel:"
1586 " negative reply\n",
1587 dev_name(&card->write.ccwdev->dev));
1590 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1591 if ((temp & ~0x0100) != qeth_peer_func_level(card->info.func_level)) {
1592 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on write channel: "
1593 "function level mismatch (sent: 0x%x, received: "
1594 "0x%x)\n", dev_name(&card->write.ccwdev->dev),
1595 card->info.func_level, temp);
1598 channel->state = CH_STATE_UP;
1600 qeth_release_buffer(channel, iob);
1603 static void qeth_idx_read_cb(struct qeth_channel *channel,
1604 struct qeth_cmd_buffer *iob)
1606 struct qeth_card *card;
1609 QETH_DBF_TEXT(SETUP , 2, "idxrdcb");
1610 if (channel->state == CH_STATE_DOWN) {
1611 channel->state = CH_STATE_ACTIVATING;
1615 card = CARD_FROM_CDEV(channel->ccwdev);
1616 if (qeth_check_idx_response(iob->data))
1619 if (!(QETH_IS_IDX_ACT_POS_REPLY(iob->data))) {
1620 if (QETH_IDX_ACT_CAUSE_CODE(iob->data) == 0x19)
1621 dev_err(&card->write.ccwdev->dev,
1622 "The adapter is used exclusively by another "
1625 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel:"
1626 " negative reply\n",
1627 dev_name(&card->read.ccwdev->dev));
1632 * temporary fix for microcode bug
1633 * to revert it,replace OR by AND
1635 if ((!QETH_IDX_NO_PORTNAME_REQUIRED(iob->data)) ||
1636 (card->info.type == QETH_CARD_TYPE_OSAE))
1637 card->info.portname_required = 1;
1639 memcpy(&temp, QETH_IDX_ACT_FUNC_LEVEL(iob->data), 2);
1640 if (temp != qeth_peer_func_level(card->info.func_level)) {
1641 QETH_DBF_MESSAGE(2, "%s IDX_ACTIVATE on read channel: function "
1642 "level mismatch (sent: 0x%x, received: 0x%x)\n",
1643 dev_name(&card->read.ccwdev->dev),
1644 card->info.func_level, temp);
1647 memcpy(&card->token.issuer_rm_r,
1648 QETH_IDX_ACT_ISSUER_RM_TOKEN(iob->data),
1649 QETH_MPC_TOKEN_LENGTH);
1650 memcpy(&card->info.mcl_level[0],
1651 QETH_IDX_REPLY_LEVEL(iob->data), QETH_MCL_LENGTH);
1652 channel->state = CH_STATE_UP;
1654 qeth_release_buffer(channel, iob);
1657 void qeth_prepare_control_data(struct qeth_card *card, int len,
1658 struct qeth_cmd_buffer *iob)
1660 qeth_setup_ccw(&card->write, iob->data, len);
1661 iob->callback = qeth_release_buffer;
1663 memcpy(QETH_TRANSPORT_HEADER_SEQ_NO(iob->data),
1664 &card->seqno.trans_hdr, QETH_SEQ_NO_LENGTH);
1665 card->seqno.trans_hdr++;
1666 memcpy(QETH_PDU_HEADER_SEQ_NO(iob->data),
1667 &card->seqno.pdu_hdr, QETH_SEQ_NO_LENGTH);
1668 card->seqno.pdu_hdr++;
1669 memcpy(QETH_PDU_HEADER_ACK_SEQ_NO(iob->data),
1670 &card->seqno.pdu_hdr_ack, QETH_SEQ_NO_LENGTH);
1671 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1673 EXPORT_SYMBOL_GPL(qeth_prepare_control_data);
1675 int qeth_send_control_data(struct qeth_card *card, int len,
1676 struct qeth_cmd_buffer *iob,
1677 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
1682 unsigned long flags;
1683 struct qeth_reply *reply = NULL;
1684 unsigned long timeout;
1686 QETH_DBF_TEXT(TRACE, 2, "sendctl");
1688 reply = qeth_alloc_reply(card);
1692 reply->callback = reply_cb;
1693 reply->param = reply_param;
1694 if (card->state == CARD_STATE_DOWN)
1695 reply->seqno = QETH_IDX_COMMAND_SEQNO;
1697 reply->seqno = card->seqno.ipa++;
1698 init_waitqueue_head(&reply->wait_q);
1699 spin_lock_irqsave(&card->lock, flags);
1700 list_add_tail(&reply->list, &card->cmd_waiter_list);
1701 spin_unlock_irqrestore(&card->lock, flags);
1702 QETH_DBF_HEX(CTRL, 2, iob->data, QETH_DBF_CTRL_LEN);
1704 while (atomic_cmpxchg(&card->write.irq_pending, 0, 1)) ;
1705 qeth_prepare_control_data(card, len, iob);
1707 if (IS_IPA(iob->data))
1708 timeout = jiffies + QETH_IPA_TIMEOUT;
1710 timeout = jiffies + QETH_TIMEOUT;
1712 QETH_DBF_TEXT(TRACE, 6, "noirqpnd");
1713 spin_lock_irqsave(get_ccwdev_lock(card->write.ccwdev), flags);
1714 rc = ccw_device_start(card->write.ccwdev, &card->write.ccw,
1715 (addr_t) iob, 0, 0);
1716 spin_unlock_irqrestore(get_ccwdev_lock(card->write.ccwdev), flags);
1718 QETH_DBF_MESSAGE(2, "%s qeth_send_control_data: "
1719 "ccw_device_start rc = %i\n",
1720 dev_name(&card->write.ccwdev->dev), rc);
1721 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
1722 spin_lock_irqsave(&card->lock, flags);
1723 list_del_init(&reply->list);
1724 qeth_put_reply(reply);
1725 spin_unlock_irqrestore(&card->lock, flags);
1726 qeth_release_buffer(iob->channel, iob);
1727 atomic_set(&card->write.irq_pending, 0);
1728 wake_up(&card->wait_q);
1731 while (!atomic_read(&reply->received)) {
1732 if (time_after(jiffies, timeout)) {
1733 spin_lock_irqsave(&reply->card->lock, flags);
1734 list_del_init(&reply->list);
1735 spin_unlock_irqrestore(&reply->card->lock, flags);
1737 atomic_inc(&reply->received);
1738 wake_up(&reply->wait_q);
1743 qeth_put_reply(reply);
1746 EXPORT_SYMBOL_GPL(qeth_send_control_data);
1748 static int qeth_cm_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1751 struct qeth_cmd_buffer *iob;
1753 QETH_DBF_TEXT(SETUP, 2, "cmenblcb");
1755 iob = (struct qeth_cmd_buffer *) data;
1756 memcpy(&card->token.cm_filter_r,
1757 QETH_CM_ENABLE_RESP_FILTER_TOKEN(iob->data),
1758 QETH_MPC_TOKEN_LENGTH);
1759 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1763 static int qeth_cm_enable(struct qeth_card *card)
1766 struct qeth_cmd_buffer *iob;
1768 QETH_DBF_TEXT(SETUP, 2, "cmenable");
1770 iob = qeth_wait_for_buffer(&card->write);
1771 memcpy(iob->data, CM_ENABLE, CM_ENABLE_SIZE);
1772 memcpy(QETH_CM_ENABLE_ISSUER_RM_TOKEN(iob->data),
1773 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1774 memcpy(QETH_CM_ENABLE_FILTER_TOKEN(iob->data),
1775 &card->token.cm_filter_w, QETH_MPC_TOKEN_LENGTH);
1777 rc = qeth_send_control_data(card, CM_ENABLE_SIZE, iob,
1778 qeth_cm_enable_cb, NULL);
1782 static int qeth_cm_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1786 struct qeth_cmd_buffer *iob;
1788 QETH_DBF_TEXT(SETUP, 2, "cmsetpcb");
1790 iob = (struct qeth_cmd_buffer *) data;
1791 memcpy(&card->token.cm_connection_r,
1792 QETH_CM_SETUP_RESP_DEST_ADDR(iob->data),
1793 QETH_MPC_TOKEN_LENGTH);
1794 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1798 static int qeth_cm_setup(struct qeth_card *card)
1801 struct qeth_cmd_buffer *iob;
1803 QETH_DBF_TEXT(SETUP, 2, "cmsetup");
1805 iob = qeth_wait_for_buffer(&card->write);
1806 memcpy(iob->data, CM_SETUP, CM_SETUP_SIZE);
1807 memcpy(QETH_CM_SETUP_DEST_ADDR(iob->data),
1808 &card->token.issuer_rm_r, QETH_MPC_TOKEN_LENGTH);
1809 memcpy(QETH_CM_SETUP_CONNECTION_TOKEN(iob->data),
1810 &card->token.cm_connection_w, QETH_MPC_TOKEN_LENGTH);
1811 memcpy(QETH_CM_SETUP_FILTER_TOKEN(iob->data),
1812 &card->token.cm_filter_r, QETH_MPC_TOKEN_LENGTH);
1813 rc = qeth_send_control_data(card, CM_SETUP_SIZE, iob,
1814 qeth_cm_setup_cb, NULL);
1819 static inline int qeth_get_initial_mtu_for_card(struct qeth_card *card)
1821 switch (card->info.type) {
1822 case QETH_CARD_TYPE_UNKNOWN:
1824 case QETH_CARD_TYPE_IQD:
1825 return card->info.max_mtu;
1826 case QETH_CARD_TYPE_OSAE:
1827 switch (card->info.link_type) {
1828 case QETH_LINK_TYPE_HSTR:
1829 case QETH_LINK_TYPE_LANE_TR:
1839 static inline int qeth_get_max_mtu_for_card(int cardtype)
1843 case QETH_CARD_TYPE_UNKNOWN:
1844 case QETH_CARD_TYPE_OSAE:
1845 case QETH_CARD_TYPE_OSN:
1847 case QETH_CARD_TYPE_IQD:
1854 static inline int qeth_get_mtu_out_of_mpc(int cardtype)
1857 case QETH_CARD_TYPE_IQD:
1864 static inline int qeth_get_mtu_outof_framesize(int framesize)
1866 switch (framesize) {
1880 static inline int qeth_mtu_is_valid(struct qeth_card *card, int mtu)
1882 switch (card->info.type) {
1883 case QETH_CARD_TYPE_OSAE:
1884 return ((mtu >= 576) && (mtu <= 61440));
1885 case QETH_CARD_TYPE_IQD:
1886 return ((mtu >= 576) &&
1887 (mtu <= card->info.max_mtu + 4096 - 32));
1888 case QETH_CARD_TYPE_OSN:
1889 case QETH_CARD_TYPE_UNKNOWN:
1895 static int qeth_ulp_enable_cb(struct qeth_card *card, struct qeth_reply *reply,
1899 __u16 mtu, framesize;
1902 struct qeth_cmd_buffer *iob;
1904 QETH_DBF_TEXT(SETUP, 2, "ulpenacb");
1906 iob = (struct qeth_cmd_buffer *) data;
1907 memcpy(&card->token.ulp_filter_r,
1908 QETH_ULP_ENABLE_RESP_FILTER_TOKEN(iob->data),
1909 QETH_MPC_TOKEN_LENGTH);
1910 if (qeth_get_mtu_out_of_mpc(card->info.type)) {
1911 memcpy(&framesize, QETH_ULP_ENABLE_RESP_MAX_MTU(iob->data), 2);
1912 mtu = qeth_get_mtu_outof_framesize(framesize);
1915 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1918 card->info.max_mtu = mtu;
1919 card->info.initial_mtu = mtu;
1920 card->qdio.in_buf_size = mtu + 2 * PAGE_SIZE;
1922 card->info.initial_mtu = qeth_get_initial_mtu_for_card(card);
1923 card->info.max_mtu = qeth_get_max_mtu_for_card(card->info.type);
1924 card->qdio.in_buf_size = QETH_IN_BUF_SIZE_DEFAULT;
1927 memcpy(&len, QETH_ULP_ENABLE_RESP_DIFINFO_LEN(iob->data), 2);
1928 if (len >= QETH_MPC_DIFINFO_LEN_INDICATES_LINK_TYPE) {
1930 QETH_ULP_ENABLE_RESP_LINK_TYPE(iob->data), 1);
1931 card->info.link_type = link_type;
1933 card->info.link_type = 0;
1934 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1938 static int qeth_ulp_enable(struct qeth_card *card)
1942 struct qeth_cmd_buffer *iob;
1944 /*FIXME: trace view callbacks*/
1945 QETH_DBF_TEXT(SETUP, 2, "ulpenabl");
1947 iob = qeth_wait_for_buffer(&card->write);
1948 memcpy(iob->data, ULP_ENABLE, ULP_ENABLE_SIZE);
1950 *(QETH_ULP_ENABLE_LINKNUM(iob->data)) =
1951 (__u8) card->info.portno;
1952 if (card->options.layer2)
1953 if (card->info.type == QETH_CARD_TYPE_OSN)
1954 prot_type = QETH_PROT_OSN2;
1956 prot_type = QETH_PROT_LAYER2;
1958 prot_type = QETH_PROT_TCPIP;
1960 memcpy(QETH_ULP_ENABLE_PROT_TYPE(iob->data), &prot_type, 1);
1961 memcpy(QETH_ULP_ENABLE_DEST_ADDR(iob->data),
1962 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
1963 memcpy(QETH_ULP_ENABLE_FILTER_TOKEN(iob->data),
1964 &card->token.ulp_filter_w, QETH_MPC_TOKEN_LENGTH);
1965 memcpy(QETH_ULP_ENABLE_PORTNAME_AND_LL(iob->data),
1966 card->info.portname, 9);
1967 rc = qeth_send_control_data(card, ULP_ENABLE_SIZE, iob,
1968 qeth_ulp_enable_cb, NULL);
1973 static int qeth_ulp_setup_cb(struct qeth_card *card, struct qeth_reply *reply,
1976 struct qeth_cmd_buffer *iob;
1978 QETH_DBF_TEXT(SETUP, 2, "ulpstpcb");
1980 iob = (struct qeth_cmd_buffer *) data;
1981 memcpy(&card->token.ulp_connection_r,
1982 QETH_ULP_SETUP_RESP_CONNECTION_TOKEN(iob->data),
1983 QETH_MPC_TOKEN_LENGTH);
1984 QETH_DBF_TEXT_(SETUP, 2, " rc%d", iob->rc);
1988 static int qeth_ulp_setup(struct qeth_card *card)
1992 struct qeth_cmd_buffer *iob;
1993 struct ccw_dev_id dev_id;
1995 QETH_DBF_TEXT(SETUP, 2, "ulpsetup");
1997 iob = qeth_wait_for_buffer(&card->write);
1998 memcpy(iob->data, ULP_SETUP, ULP_SETUP_SIZE);
2000 memcpy(QETH_ULP_SETUP_DEST_ADDR(iob->data),
2001 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2002 memcpy(QETH_ULP_SETUP_CONNECTION_TOKEN(iob->data),
2003 &card->token.ulp_connection_w, QETH_MPC_TOKEN_LENGTH);
2004 memcpy(QETH_ULP_SETUP_FILTER_TOKEN(iob->data),
2005 &card->token.ulp_filter_r, QETH_MPC_TOKEN_LENGTH);
2007 ccw_device_get_id(CARD_DDEV(card), &dev_id);
2008 memcpy(QETH_ULP_SETUP_CUA(iob->data), &dev_id.devno, 2);
2009 temp = (card->info.cula << 8) + card->info.unit_addr2;
2010 memcpy(QETH_ULP_SETUP_REAL_DEVADDR(iob->data), &temp, 2);
2011 rc = qeth_send_control_data(card, ULP_SETUP_SIZE, iob,
2012 qeth_ulp_setup_cb, NULL);
2016 static int qeth_alloc_qdio_buffers(struct qeth_card *card)
2020 QETH_DBF_TEXT(SETUP, 2, "allcqdbf");
2022 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_UNINITIALIZED,
2023 QETH_QDIO_ALLOCATED) != QETH_QDIO_UNINITIALIZED)
2026 card->qdio.in_q = kmalloc(sizeof(struct qeth_qdio_q),
2028 if (!card->qdio.in_q)
2030 QETH_DBF_TEXT(SETUP, 2, "inq");
2031 QETH_DBF_HEX(SETUP, 2, &card->qdio.in_q, sizeof(void *));
2032 memset(card->qdio.in_q, 0, sizeof(struct qeth_qdio_q));
2033 /* give inbound qeth_qdio_buffers their qdio_buffers */
2034 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
2035 card->qdio.in_q->bufs[i].buffer =
2036 &card->qdio.in_q->qdio_bufs[i];
2037 /* inbound buffer pool */
2038 if (qeth_alloc_buffer_pool(card))
2042 kmalloc(card->qdio.no_out_queues *
2043 sizeof(struct qeth_qdio_out_q *), GFP_KERNEL);
2044 if (!card->qdio.out_qs)
2046 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2047 card->qdio.out_qs[i] = kmalloc(sizeof(struct qeth_qdio_out_q),
2049 if (!card->qdio.out_qs[i])
2051 QETH_DBF_TEXT_(SETUP, 2, "outq %i", i);
2052 QETH_DBF_HEX(SETUP, 2, &card->qdio.out_qs[i], sizeof(void *));
2053 memset(card->qdio.out_qs[i], 0, sizeof(struct qeth_qdio_out_q));
2054 card->qdio.out_qs[i]->queue_no = i;
2055 /* give outbound qeth_qdio_buffers their qdio_buffers */
2056 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2057 card->qdio.out_qs[i]->bufs[j].buffer =
2058 &card->qdio.out_qs[i]->qdio_bufs[j];
2059 skb_queue_head_init(&card->qdio.out_qs[i]->bufs[j].
2062 &card->qdio.out_qs[i]->bufs[j].skb_list.lock,
2063 &qdio_out_skb_queue_key);
2064 INIT_LIST_HEAD(&card->qdio.out_qs[i]->bufs[j].ctx_list);
2071 kfree(card->qdio.out_qs[--i]);
2072 kfree(card->qdio.out_qs);
2073 card->qdio.out_qs = NULL;
2075 qeth_free_buffer_pool(card);
2077 kfree(card->qdio.in_q);
2078 card->qdio.in_q = NULL;
2080 atomic_set(&card->qdio.state, QETH_QDIO_UNINITIALIZED);
2084 static void qeth_create_qib_param_field(struct qeth_card *card,
2088 param_field[0] = _ascebc['P'];
2089 param_field[1] = _ascebc['C'];
2090 param_field[2] = _ascebc['I'];
2091 param_field[3] = _ascebc['T'];
2092 *((unsigned int *) (¶m_field[4])) = QETH_PCI_THRESHOLD_A(card);
2093 *((unsigned int *) (¶m_field[8])) = QETH_PCI_THRESHOLD_B(card);
2094 *((unsigned int *) (¶m_field[12])) = QETH_PCI_TIMER_VALUE(card);
2097 static void qeth_create_qib_param_field_blkt(struct qeth_card *card,
2100 param_field[16] = _ascebc['B'];
2101 param_field[17] = _ascebc['L'];
2102 param_field[18] = _ascebc['K'];
2103 param_field[19] = _ascebc['T'];
2104 *((unsigned int *) (¶m_field[20])) = card->info.blkt.time_total;
2105 *((unsigned int *) (¶m_field[24])) = card->info.blkt.inter_packet;
2106 *((unsigned int *) (¶m_field[28])) =
2107 card->info.blkt.inter_packet_jumbo;
2110 static int qeth_qdio_activate(struct qeth_card *card)
2112 QETH_DBF_TEXT(SETUP, 3, "qdioact");
2113 return qdio_activate(CARD_DDEV(card));
2116 static int qeth_dm_act(struct qeth_card *card)
2119 struct qeth_cmd_buffer *iob;
2121 QETH_DBF_TEXT(SETUP, 2, "dmact");
2123 iob = qeth_wait_for_buffer(&card->write);
2124 memcpy(iob->data, DM_ACT, DM_ACT_SIZE);
2126 memcpy(QETH_DM_ACT_DEST_ADDR(iob->data),
2127 &card->token.cm_connection_r, QETH_MPC_TOKEN_LENGTH);
2128 memcpy(QETH_DM_ACT_CONNECTION_TOKEN(iob->data),
2129 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2130 rc = qeth_send_control_data(card, DM_ACT_SIZE, iob, NULL, NULL);
2134 static int qeth_mpc_initialize(struct qeth_card *card)
2138 QETH_DBF_TEXT(SETUP, 2, "mpcinit");
2140 rc = qeth_issue_next_read(card);
2142 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2145 rc = qeth_cm_enable(card);
2147 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
2150 rc = qeth_cm_setup(card);
2152 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
2155 rc = qeth_ulp_enable(card);
2157 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
2160 rc = qeth_ulp_setup(card);
2162 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2165 rc = qeth_alloc_qdio_buffers(card);
2167 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
2170 rc = qeth_qdio_establish(card);
2172 QETH_DBF_TEXT_(SETUP, 2, "6err%d", rc);
2173 qeth_free_qdio_buffers(card);
2176 rc = qeth_qdio_activate(card);
2178 QETH_DBF_TEXT_(SETUP, 2, "7err%d", rc);
2181 rc = qeth_dm_act(card);
2183 QETH_DBF_TEXT_(SETUP, 2, "8err%d", rc);
2189 qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
2193 static void qeth_print_status_with_portname(struct qeth_card *card)
2198 sprintf(dbf_text, "%s", card->info.portname + 1);
2199 for (i = 0; i < 8; i++)
2201 (char) _ebcasc[(__u8) dbf_text[i]];
2203 dev_info(&card->gdev->dev, "Device is a%s card%s%s%s\n"
2204 "with link type %s (portname: %s)\n",
2205 qeth_get_cardname(card),
2206 (card->info.mcl_level[0]) ? " (level: " : "",
2207 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2208 (card->info.mcl_level[0]) ? ")" : "",
2209 qeth_get_cardname_short(card),
2214 static void qeth_print_status_no_portname(struct qeth_card *card)
2216 if (card->info.portname[0])
2217 dev_info(&card->gdev->dev, "Device is a%s "
2218 "card%s%s%s\nwith link type %s "
2219 "(no portname needed by interface).\n",
2220 qeth_get_cardname(card),
2221 (card->info.mcl_level[0]) ? " (level: " : "",
2222 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2223 (card->info.mcl_level[0]) ? ")" : "",
2224 qeth_get_cardname_short(card));
2226 dev_info(&card->gdev->dev, "Device is a%s "
2227 "card%s%s%s\nwith link type %s.\n",
2228 qeth_get_cardname(card),
2229 (card->info.mcl_level[0]) ? " (level: " : "",
2230 (card->info.mcl_level[0]) ? card->info.mcl_level : "",
2231 (card->info.mcl_level[0]) ? ")" : "",
2232 qeth_get_cardname_short(card));
2235 void qeth_print_status_message(struct qeth_card *card)
2237 switch (card->info.type) {
2238 case QETH_CARD_TYPE_OSAE:
2239 /* VM will use a non-zero first character
2240 * to indicate a HiperSockets like reporting
2241 * of the level OSA sets the first character to zero
2243 if (!card->info.mcl_level[0]) {
2244 sprintf(card->info.mcl_level, "%02x%02x",
2245 card->info.mcl_level[2],
2246 card->info.mcl_level[3]);
2248 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2252 case QETH_CARD_TYPE_IQD:
2253 if (card->info.guestlan) {
2254 card->info.mcl_level[0] = (char) _ebcasc[(__u8)
2255 card->info.mcl_level[0]];
2256 card->info.mcl_level[1] = (char) _ebcasc[(__u8)
2257 card->info.mcl_level[1]];
2258 card->info.mcl_level[2] = (char) _ebcasc[(__u8)
2259 card->info.mcl_level[2]];
2260 card->info.mcl_level[3] = (char) _ebcasc[(__u8)
2261 card->info.mcl_level[3]];
2262 card->info.mcl_level[QETH_MCL_LENGTH] = 0;
2266 memset(&card->info.mcl_level[0], 0, QETH_MCL_LENGTH + 1);
2268 if (card->info.portname_required)
2269 qeth_print_status_with_portname(card);
2271 qeth_print_status_no_portname(card);
2273 EXPORT_SYMBOL_GPL(qeth_print_status_message);
2275 static void qeth_initialize_working_pool_list(struct qeth_card *card)
2277 struct qeth_buffer_pool_entry *entry;
2279 QETH_DBF_TEXT(TRACE, 5, "inwrklst");
2281 list_for_each_entry(entry,
2282 &card->qdio.init_pool.entry_list, init_list) {
2283 qeth_put_buffer_pool_entry(card, entry);
2287 static inline struct qeth_buffer_pool_entry *qeth_find_free_buffer_pool_entry(
2288 struct qeth_card *card)
2290 struct list_head *plh;
2291 struct qeth_buffer_pool_entry *entry;
2295 if (list_empty(&card->qdio.in_buf_pool.entry_list))
2298 list_for_each(plh, &card->qdio.in_buf_pool.entry_list) {
2299 entry = list_entry(plh, struct qeth_buffer_pool_entry, list);
2301 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2302 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2308 list_del_init(&entry->list);
2313 /* no free buffer in pool so take first one and swap pages */
2314 entry = list_entry(card->qdio.in_buf_pool.entry_list.next,
2315 struct qeth_buffer_pool_entry, list);
2316 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2317 if (page_count(virt_to_page(entry->elements[i])) > 1) {
2318 page = alloc_page(GFP_ATOMIC);
2322 free_page((unsigned long)entry->elements[i]);
2323 entry->elements[i] = page_address(page);
2324 if (card->options.performance_stats)
2325 card->perf_stats.sg_alloc_page_rx++;
2329 list_del_init(&entry->list);
2333 static int qeth_init_input_buffer(struct qeth_card *card,
2334 struct qeth_qdio_buffer *buf)
2336 struct qeth_buffer_pool_entry *pool_entry;
2339 pool_entry = qeth_find_free_buffer_pool_entry(card);
2344 * since the buffer is accessed only from the input_tasklet
2345 * there shouldn't be a need to synchronize; also, since we use
2346 * the QETH_IN_BUF_REQUEUE_THRESHOLD we should never run out off
2350 buf->pool_entry = pool_entry;
2351 for (i = 0; i < QETH_MAX_BUFFER_ELEMENTS(card); ++i) {
2352 buf->buffer->element[i].length = PAGE_SIZE;
2353 buf->buffer->element[i].addr = pool_entry->elements[i];
2354 if (i == QETH_MAX_BUFFER_ELEMENTS(card) - 1)
2355 buf->buffer->element[i].flags = SBAL_FLAGS_LAST_ENTRY;
2357 buf->buffer->element[i].flags = 0;
2362 int qeth_init_qdio_queues(struct qeth_card *card)
2367 QETH_DBF_TEXT(SETUP, 2, "initqdqs");
2370 memset(card->qdio.in_q->qdio_bufs, 0,
2371 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2372 qeth_initialize_working_pool_list(card);
2373 /*give only as many buffers to hardware as we have buffer pool entries*/
2374 for (i = 0; i < card->qdio.in_buf_pool.buf_count - 1; ++i)
2375 qeth_init_input_buffer(card, &card->qdio.in_q->bufs[i]);
2376 card->qdio.in_q->next_buf_to_init =
2377 card->qdio.in_buf_pool.buf_count - 1;
2378 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0, 0,
2379 card->qdio.in_buf_pool.buf_count - 1);
2381 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
2384 /* outbound queue */
2385 for (i = 0; i < card->qdio.no_out_queues; ++i) {
2386 memset(card->qdio.out_qs[i]->qdio_bufs, 0,
2387 QDIO_MAX_BUFFERS_PER_Q * sizeof(struct qdio_buffer));
2388 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j) {
2389 qeth_clear_output_buffer(card->qdio.out_qs[i],
2390 &card->qdio.out_qs[i]->bufs[j]);
2392 card->qdio.out_qs[i]->card = card;
2393 card->qdio.out_qs[i]->next_buf_to_fill = 0;
2394 card->qdio.out_qs[i]->do_pack = 0;
2395 atomic_set(&card->qdio.out_qs[i]->used_buffers, 0);
2396 atomic_set(&card->qdio.out_qs[i]->set_pci_flags_count, 0);
2397 atomic_set(&card->qdio.out_qs[i]->state,
2398 QETH_OUT_Q_UNLOCKED);
2402 EXPORT_SYMBOL_GPL(qeth_init_qdio_queues);
2404 static inline __u8 qeth_get_ipa_adp_type(enum qeth_link_types link_type)
2406 switch (link_type) {
2407 case QETH_LINK_TYPE_HSTR:
2414 static void qeth_fill_ipacmd_header(struct qeth_card *card,
2415 struct qeth_ipa_cmd *cmd, __u8 command,
2416 enum qeth_prot_versions prot)
2418 memset(cmd, 0, sizeof(struct qeth_ipa_cmd));
2419 cmd->hdr.command = command;
2420 cmd->hdr.initiator = IPA_CMD_INITIATOR_HOST;
2421 cmd->hdr.seqno = card->seqno.ipa;
2422 cmd->hdr.adapter_type = qeth_get_ipa_adp_type(card->info.link_type);
2423 cmd->hdr.rel_adapter_no = (__u8) card->info.portno;
2424 if (card->options.layer2)
2425 cmd->hdr.prim_version_no = 2;
2427 cmd->hdr.prim_version_no = 1;
2428 cmd->hdr.param_count = 1;
2429 cmd->hdr.prot_version = prot;
2430 cmd->hdr.ipa_supported = 0;
2431 cmd->hdr.ipa_enabled = 0;
2434 struct qeth_cmd_buffer *qeth_get_ipacmd_buffer(struct qeth_card *card,
2435 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2437 struct qeth_cmd_buffer *iob;
2438 struct qeth_ipa_cmd *cmd;
2440 iob = qeth_wait_for_buffer(&card->write);
2441 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2442 qeth_fill_ipacmd_header(card, cmd, ipacmd, prot);
2446 EXPORT_SYMBOL_GPL(qeth_get_ipacmd_buffer);
2448 void qeth_prepare_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2451 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
2452 memcpy(QETH_IPA_CMD_PROT_TYPE(iob->data), &prot_type, 1);
2453 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
2454 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
2456 EXPORT_SYMBOL_GPL(qeth_prepare_ipa_cmd);
2458 int qeth_send_ipa_cmd(struct qeth_card *card, struct qeth_cmd_buffer *iob,
2459 int (*reply_cb)(struct qeth_card *, struct qeth_reply*,
2466 QETH_DBF_TEXT(TRACE, 4, "sendipa");
2468 if (card->options.layer2)
2469 if (card->info.type == QETH_CARD_TYPE_OSN)
2470 prot_type = QETH_PROT_OSN2;
2472 prot_type = QETH_PROT_LAYER2;
2474 prot_type = QETH_PROT_TCPIP;
2475 qeth_prepare_ipa_cmd(card, iob, prot_type);
2476 rc = qeth_send_control_data(card, IPA_CMD_LENGTH,
2477 iob, reply_cb, reply_param);
2480 EXPORT_SYMBOL_GPL(qeth_send_ipa_cmd);
2482 static int qeth_send_startstoplan(struct qeth_card *card,
2483 enum qeth_ipa_cmds ipacmd, enum qeth_prot_versions prot)
2486 struct qeth_cmd_buffer *iob;
2488 iob = qeth_get_ipacmd_buffer(card, ipacmd, prot);
2489 rc = qeth_send_ipa_cmd(card, iob, NULL, NULL);
2494 int qeth_send_startlan(struct qeth_card *card)
2498 QETH_DBF_TEXT(SETUP, 2, "strtlan");
2500 rc = qeth_send_startstoplan(card, IPA_CMD_STARTLAN, 0);
2503 EXPORT_SYMBOL_GPL(qeth_send_startlan);
2505 int qeth_send_stoplan(struct qeth_card *card)
2510 * TODO: according to the IPA format document page 14,
2511 * TCP/IP (we!) never issue a STOPLAN
2514 QETH_DBF_TEXT(SETUP, 2, "stoplan");
2516 rc = qeth_send_startstoplan(card, IPA_CMD_STOPLAN, 0);
2519 EXPORT_SYMBOL_GPL(qeth_send_stoplan);
2521 int qeth_default_setadapterparms_cb(struct qeth_card *card,
2522 struct qeth_reply *reply, unsigned long data)
2524 struct qeth_ipa_cmd *cmd;
2526 QETH_DBF_TEXT(TRACE, 4, "defadpcb");
2528 cmd = (struct qeth_ipa_cmd *) data;
2529 if (cmd->hdr.return_code == 0)
2530 cmd->hdr.return_code =
2531 cmd->data.setadapterparms.hdr.return_code;
2534 EXPORT_SYMBOL_GPL(qeth_default_setadapterparms_cb);
2536 static int qeth_query_setadapterparms_cb(struct qeth_card *card,
2537 struct qeth_reply *reply, unsigned long data)
2539 struct qeth_ipa_cmd *cmd;
2541 QETH_DBF_TEXT(TRACE, 3, "quyadpcb");
2543 cmd = (struct qeth_ipa_cmd *) data;
2544 if (cmd->data.setadapterparms.data.query_cmds_supp.lan_type & 0x7f)
2545 card->info.link_type =
2546 cmd->data.setadapterparms.data.query_cmds_supp.lan_type;
2547 card->options.adp.supported_funcs =
2548 cmd->data.setadapterparms.data.query_cmds_supp.supported_cmds;
2549 return qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
2552 struct qeth_cmd_buffer *qeth_get_adapter_cmd(struct qeth_card *card,
2553 __u32 command, __u32 cmdlen)
2555 struct qeth_cmd_buffer *iob;
2556 struct qeth_ipa_cmd *cmd;
2558 iob = qeth_get_ipacmd_buffer(card, IPA_CMD_SETADAPTERPARMS,
2560 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
2561 cmd->data.setadapterparms.hdr.cmdlength = cmdlen;
2562 cmd->data.setadapterparms.hdr.command_code = command;
2563 cmd->data.setadapterparms.hdr.used_total = 1;
2564 cmd->data.setadapterparms.hdr.seq_no = 1;
2568 EXPORT_SYMBOL_GPL(qeth_get_adapter_cmd);
2570 int qeth_query_setadapterparms(struct qeth_card *card)
2573 struct qeth_cmd_buffer *iob;
2575 QETH_DBF_TEXT(TRACE, 3, "queryadp");
2576 iob = qeth_get_adapter_cmd(card, IPA_SETADP_QUERY_COMMANDS_SUPPORTED,
2577 sizeof(struct qeth_ipacmd_setadpparms));
2578 rc = qeth_send_ipa_cmd(card, iob, qeth_query_setadapterparms_cb, NULL);
2581 EXPORT_SYMBOL_GPL(qeth_query_setadapterparms);
2583 int qeth_check_qdio_errors(struct qdio_buffer *buf, unsigned int qdio_error,
2584 const char *dbftext)
2587 QETH_DBF_TEXT(TRACE, 2, dbftext);
2588 QETH_DBF_TEXT(QERR, 2, dbftext);
2589 QETH_DBF_TEXT_(QERR, 2, " F15=%02X",
2590 buf->element[15].flags & 0xff);
2591 QETH_DBF_TEXT_(QERR, 2, " F14=%02X",
2592 buf->element[14].flags & 0xff);
2593 QETH_DBF_TEXT_(QERR, 2, " qerr=%X", qdio_error);
2598 EXPORT_SYMBOL_GPL(qeth_check_qdio_errors);
2600 void qeth_queue_input_buffer(struct qeth_card *card, int index)
2602 struct qeth_qdio_q *queue = card->qdio.in_q;
2608 count = (index < queue->next_buf_to_init)?
2609 card->qdio.in_buf_pool.buf_count -
2610 (queue->next_buf_to_init - index) :
2611 card->qdio.in_buf_pool.buf_count -
2612 (queue->next_buf_to_init + QDIO_MAX_BUFFERS_PER_Q - index);
2613 /* only requeue at a certain threshold to avoid SIGAs */
2614 if (count >= QETH_IN_BUF_REQUEUE_THRESHOLD(card)) {
2615 for (i = queue->next_buf_to_init;
2616 i < queue->next_buf_to_init + count; ++i) {
2617 if (qeth_init_input_buffer(card,
2618 &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q])) {
2625 if (newcount < count) {
2626 /* we are in memory shortage so we switch back to
2627 traditional skb allocation and drop packages */
2628 atomic_set(&card->force_alloc_skb, 3);
2631 atomic_add_unless(&card->force_alloc_skb, -1, 0);
2635 * according to old code it should be avoided to requeue all
2636 * 128 buffers in order to benefit from PCI avoidance.
2637 * this function keeps at least one buffer (the buffer at
2638 * 'index') un-requeued -> this buffer is the first buffer that
2639 * will be requeued the next time
2641 if (card->options.performance_stats) {
2642 card->perf_stats.inbound_do_qdio_cnt++;
2643 card->perf_stats.inbound_do_qdio_start_time =
2646 rc = do_QDIO(CARD_DDEV(card), QDIO_FLAG_SYNC_INPUT, 0,
2647 queue->next_buf_to_init, count);
2648 if (card->options.performance_stats)
2649 card->perf_stats.inbound_do_qdio_time +=
2651 card->perf_stats.inbound_do_qdio_start_time;
2653 dev_warn(&card->gdev->dev,
2654 "QDIO reported an error, rc=%i\n", rc);
2655 QETH_DBF_TEXT(TRACE, 2, "qinberr");
2656 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2658 queue->next_buf_to_init = (queue->next_buf_to_init + count) %
2659 QDIO_MAX_BUFFERS_PER_Q;
2662 EXPORT_SYMBOL_GPL(qeth_queue_input_buffer);
2664 static int qeth_handle_send_error(struct qeth_card *card,
2665 struct qeth_qdio_out_buffer *buffer, unsigned int qdio_err)
2667 int sbalf15 = buffer->buffer->element[15].flags & 0xff;
2668 int cc = qdio_err & 3;
2670 QETH_DBF_TEXT(TRACE, 6, "hdsnderr");
2671 qeth_check_qdio_errors(buffer->buffer, qdio_err, "qouterr");
2675 QETH_DBF_TEXT(TRACE, 1, "lnkfail");
2676 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2677 QETH_DBF_TEXT_(TRACE, 1, "%04x %02x",
2678 (u16)qdio_err, (u8)sbalf15);
2679 return QETH_SEND_ERROR_LINK_FAILURE;
2681 return QETH_SEND_ERROR_NONE;
2683 if (qdio_err & QDIO_ERROR_SIGA_BUSY) {
2684 QETH_DBF_TEXT(TRACE, 1, "SIGAcc2B");
2685 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2686 return QETH_SEND_ERROR_KICK_IT;
2688 if ((sbalf15 >= 15) && (sbalf15 <= 31))
2689 return QETH_SEND_ERROR_RETRY;
2690 return QETH_SEND_ERROR_LINK_FAILURE;
2691 /* look at qdio_error and sbalf 15 */
2693 QETH_DBF_TEXT(TRACE, 1, "SIGAcc1");
2694 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2695 return QETH_SEND_ERROR_LINK_FAILURE;
2698 QETH_DBF_TEXT(TRACE, 1, "SIGAcc3");
2699 QETH_DBF_TEXT_(TRACE, 1, "%s", CARD_BUS_ID(card));
2700 return QETH_SEND_ERROR_KICK_IT;
2705 * Switched to packing state if the number of used buffers on a queue
2706 * reaches a certain limit.
2708 static void qeth_switch_to_packing_if_needed(struct qeth_qdio_out_q *queue)
2710 if (!queue->do_pack) {
2711 if (atomic_read(&queue->used_buffers)
2712 >= QETH_HIGH_WATERMARK_PACK){
2713 /* switch non-PACKING -> PACKING */
2714 QETH_DBF_TEXT(TRACE, 6, "np->pack");
2715 if (queue->card->options.performance_stats)
2716 queue->card->perf_stats.sc_dp_p++;
2723 * Switches from packing to non-packing mode. If there is a packing
2724 * buffer on the queue this buffer will be prepared to be flushed.
2725 * In that case 1 is returned to inform the caller. If no buffer
2726 * has to be flushed, zero is returned.
2728 static int qeth_switch_to_nonpacking_if_needed(struct qeth_qdio_out_q *queue)
2730 struct qeth_qdio_out_buffer *buffer;
2731 int flush_count = 0;
2733 if (queue->do_pack) {
2734 if (atomic_read(&queue->used_buffers)
2735 <= QETH_LOW_WATERMARK_PACK) {
2736 /* switch PACKING -> non-PACKING */
2737 QETH_DBF_TEXT(TRACE, 6, "pack->np");
2738 if (queue->card->options.performance_stats)
2739 queue->card->perf_stats.sc_p_dp++;
2741 /* flush packing buffers */
2742 buffer = &queue->bufs[queue->next_buf_to_fill];
2743 if ((atomic_read(&buffer->state) ==
2744 QETH_QDIO_BUF_EMPTY) &&
2745 (buffer->next_element_to_fill > 0)) {
2746 atomic_set(&buffer->state,
2747 QETH_QDIO_BUF_PRIMED);
2749 queue->next_buf_to_fill =
2750 (queue->next_buf_to_fill + 1) %
2751 QDIO_MAX_BUFFERS_PER_Q;
2759 * Called to flush a packing buffer if no more pci flags are on the queue.
2760 * Checks if there is a packing buffer and prepares it to be flushed.
2761 * In that case returns 1, otherwise zero.
2763 static int qeth_flush_buffers_on_no_pci(struct qeth_qdio_out_q *queue)
2765 struct qeth_qdio_out_buffer *buffer;
2767 buffer = &queue->bufs[queue->next_buf_to_fill];
2768 if ((atomic_read(&buffer->state) == QETH_QDIO_BUF_EMPTY) &&
2769 (buffer->next_element_to_fill > 0)) {
2770 /* it's a packing buffer */
2771 atomic_set(&buffer->state, QETH_QDIO_BUF_PRIMED);
2772 queue->next_buf_to_fill =
2773 (queue->next_buf_to_fill + 1) % QDIO_MAX_BUFFERS_PER_Q;
2779 static void qeth_flush_buffers(struct qeth_qdio_out_q *queue, int index,
2782 struct qeth_qdio_out_buffer *buf;
2785 unsigned int qdio_flags;
2787 for (i = index; i < index + count; ++i) {
2788 buf = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2789 buf->buffer->element[buf->next_element_to_fill - 1].flags |=
2790 SBAL_FLAGS_LAST_ENTRY;
2792 if (queue->card->info.type == QETH_CARD_TYPE_IQD)
2795 if (!queue->do_pack) {
2796 if ((atomic_read(&queue->used_buffers) >=
2797 (QETH_HIGH_WATERMARK_PACK -
2798 QETH_WATERMARK_PACK_FUZZ)) &&
2799 !atomic_read(&queue->set_pci_flags_count)) {
2800 /* it's likely that we'll go to packing
2802 atomic_inc(&queue->set_pci_flags_count);
2803 buf->buffer->element[0].flags |= 0x40;
2806 if (!atomic_read(&queue->set_pci_flags_count)) {
2808 * there's no outstanding PCI any more, so we
2809 * have to request a PCI to be sure the the PCI
2810 * will wake at some time in the future then we
2811 * can flush packed buffers that might still be
2812 * hanging around, which can happen if no
2813 * further send was requested by the stack
2815 atomic_inc(&queue->set_pci_flags_count);
2816 buf->buffer->element[0].flags |= 0x40;
2821 queue->card->dev->trans_start = jiffies;
2822 if (queue->card->options.performance_stats) {
2823 queue->card->perf_stats.outbound_do_qdio_cnt++;
2824 queue->card->perf_stats.outbound_do_qdio_start_time =
2827 qdio_flags = QDIO_FLAG_SYNC_OUTPUT;
2828 if (atomic_read(&queue->set_pci_flags_count))
2829 qdio_flags |= QDIO_FLAG_PCI_OUT;
2830 rc = do_QDIO(CARD_DDEV(queue->card), qdio_flags,
2831 queue->queue_no, index, count);
2832 if (queue->card->options.performance_stats)
2833 queue->card->perf_stats.outbound_do_qdio_time +=
2835 queue->card->perf_stats.outbound_do_qdio_start_time;
2837 QETH_DBF_TEXT(TRACE, 2, "flushbuf");
2838 QETH_DBF_TEXT_(TRACE, 2, " err%d", rc);
2839 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_DDEV_ID(queue->card));
2840 queue->card->stats.tx_errors += count;
2841 /* this must not happen under normal circumstances. if it
2842 * happens something is really wrong -> recover */
2843 qeth_schedule_recovery(queue->card);
2846 atomic_add(count, &queue->used_buffers);
2847 if (queue->card->options.performance_stats)
2848 queue->card->perf_stats.bufs_sent += count;
2851 static void qeth_check_outbound_queue(struct qeth_qdio_out_q *queue)
2855 int q_was_packing = 0;
2858 * check if weed have to switch to non-packing mode or if
2859 * we have to get a pci flag out on the queue
2861 if ((atomic_read(&queue->used_buffers) <= QETH_LOW_WATERMARK_PACK) ||
2862 !atomic_read(&queue->set_pci_flags_count)) {
2863 if (atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH) ==
2864 QETH_OUT_Q_UNLOCKED) {
2866 * If we get in here, there was no action in
2867 * do_send_packet. So, we check if there is a
2868 * packing buffer to be flushed here.
2870 netif_stop_queue(queue->card->dev);
2871 index = queue->next_buf_to_fill;
2872 q_was_packing = queue->do_pack;
2873 /* queue->do_pack may change */
2875 flush_cnt += qeth_switch_to_nonpacking_if_needed(queue);
2877 !atomic_read(&queue->set_pci_flags_count))
2879 qeth_flush_buffers_on_no_pci(queue);
2880 if (queue->card->options.performance_stats &&
2882 queue->card->perf_stats.bufs_sent_pack +=
2885 qeth_flush_buffers(queue, index, flush_cnt);
2886 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
2891 void qeth_qdio_output_handler(struct ccw_device *ccwdev,
2892 unsigned int qdio_error, int __queue, int first_element,
2893 int count, unsigned long card_ptr)
2895 struct qeth_card *card = (struct qeth_card *) card_ptr;
2896 struct qeth_qdio_out_q *queue = card->qdio.out_qs[__queue];
2897 struct qeth_qdio_out_buffer *buffer;
2900 QETH_DBF_TEXT(TRACE, 6, "qdouhdl");
2901 if (qdio_error & QDIO_ERROR_ACTIVATE_CHECK_CONDITION) {
2902 QETH_DBF_TEXT(TRACE, 2, "achkcond");
2903 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
2904 netif_stop_queue(card->dev);
2905 qeth_schedule_recovery(card);
2908 if (card->options.performance_stats) {
2909 card->perf_stats.outbound_handler_cnt++;
2910 card->perf_stats.outbound_handler_start_time =
2913 for (i = first_element; i < (first_element + count); ++i) {
2914 buffer = &queue->bufs[i % QDIO_MAX_BUFFERS_PER_Q];
2915 /*we only handle the KICK_IT error by doing a recovery */
2916 if (qeth_handle_send_error(card, buffer, qdio_error)
2917 == QETH_SEND_ERROR_KICK_IT){
2918 netif_stop_queue(card->dev);
2919 qeth_schedule_recovery(card);
2922 qeth_clear_output_buffer(queue, buffer);
2924 atomic_sub(count, &queue->used_buffers);
2925 /* check if we need to do something on this outbound queue */
2926 if (card->info.type != QETH_CARD_TYPE_IQD)
2927 qeth_check_outbound_queue(queue);
2929 netif_wake_queue(queue->card->dev);
2930 if (card->options.performance_stats)
2931 card->perf_stats.outbound_handler_time += qeth_get_micros() -
2932 card->perf_stats.outbound_handler_start_time;
2934 EXPORT_SYMBOL_GPL(qeth_qdio_output_handler);
2936 int qeth_get_cast_type(struct qeth_card *card, struct sk_buff *skb)
2938 int cast_type = RTN_UNSPEC;
2940 if (card->info.type == QETH_CARD_TYPE_OSN)
2943 if (skb->dst && skb->dst->neighbour) {
2944 cast_type = skb->dst->neighbour->type;
2945 if ((cast_type == RTN_BROADCAST) ||
2946 (cast_type == RTN_MULTICAST) ||
2947 (cast_type == RTN_ANYCAST))
2952 /* try something else */
2953 if (skb->protocol == ETH_P_IPV6)
2954 return (skb_network_header(skb)[24] == 0xff) ?
2956 else if (skb->protocol == ETH_P_IP)
2957 return ((skb_network_header(skb)[16] & 0xf0) == 0xe0) ?
2960 if (!memcmp(skb->data, skb->dev->broadcast, 6))
2961 return RTN_BROADCAST;
2965 hdr_mac = *((u16 *)skb->data);
2967 switch (card->info.link_type) {
2968 case QETH_LINK_TYPE_HSTR:
2969 case QETH_LINK_TYPE_LANE_TR:
2970 if ((hdr_mac == QETH_TR_MAC_NC) ||
2971 (hdr_mac == QETH_TR_MAC_C))
2972 return RTN_MULTICAST;
2974 /* eth or so multicast? */
2976 if ((hdr_mac == QETH_ETH_MAC_V4) ||
2977 (hdr_mac == QETH_ETH_MAC_V6))
2978 return RTN_MULTICAST;
2983 EXPORT_SYMBOL_GPL(qeth_get_cast_type);
2985 int qeth_get_priority_queue(struct qeth_card *card, struct sk_buff *skb,
2986 int ipv, int cast_type)
2988 if (!ipv && (card->info.type == QETH_CARD_TYPE_OSAE))
2989 return card->qdio.default_out_queue;
2990 switch (card->qdio.no_out_queues) {
2992 if (cast_type && card->info.is_multicast_different)
2993 return card->info.is_multicast_different &
2994 (card->qdio.no_out_queues - 1);
2995 if (card->qdio.do_prio_queueing && (ipv == 4)) {
2996 const u8 tos = ip_hdr(skb)->tos;
2998 if (card->qdio.do_prio_queueing ==
2999 QETH_PRIO_Q_ING_TOS) {
3000 if (tos & IP_TOS_NOTIMPORTANT)
3002 if (tos & IP_TOS_HIGHRELIABILITY)
3004 if (tos & IP_TOS_HIGHTHROUGHPUT)
3006 if (tos & IP_TOS_LOWDELAY)
3009 if (card->qdio.do_prio_queueing ==
3010 QETH_PRIO_Q_ING_PREC)
3011 return 3 - (tos >> 6);
3012 } else if (card->qdio.do_prio_queueing && (ipv == 6)) {
3015 return card->qdio.default_out_queue;
3016 case 1: /* fallthrough for single-out-queue 1920-device */
3018 return card->qdio.default_out_queue;
3021 EXPORT_SYMBOL_GPL(qeth_get_priority_queue);
3023 int qeth_get_elements_no(struct qeth_card *card, void *hdr,
3024 struct sk_buff *skb, int elems)
3026 int elements_needed = 0;
3028 if (skb_shinfo(skb)->nr_frags > 0)
3029 elements_needed = (skb_shinfo(skb)->nr_frags + 1);
3030 if (elements_needed == 0)
3031 elements_needed = 1 + (((((unsigned long) skb->data) %
3032 PAGE_SIZE) + skb->len) >> PAGE_SHIFT);
3033 if ((elements_needed + elems) > QETH_MAX_BUFFER_ELEMENTS(card)) {
3034 QETH_DBF_MESSAGE(2, "Invalid size of IP packet "
3035 "(Number=%d / Length=%d). Discarded.\n",
3036 (elements_needed+elems), skb->len);
3039 return elements_needed;
3041 EXPORT_SYMBOL_GPL(qeth_get_elements_no);
3043 static inline void __qeth_fill_buffer(struct sk_buff *skb,
3044 struct qdio_buffer *buffer, int is_tso, int *next_element_to_fill,
3047 int length = skb->len;
3053 element = *next_element_to_fill;
3055 first_lap = (is_tso == 0 ? 1 : 0);
3058 data = skb->data + offset;
3063 while (length > 0) {
3064 /* length_here is the remaining amount of data in this page */
3065 length_here = PAGE_SIZE - ((unsigned long) data % PAGE_SIZE);
3066 if (length < length_here)
3067 length_here = length;
3069 buffer->element[element].addr = data;
3070 buffer->element[element].length = length_here;
3071 length -= length_here;
3074 buffer->element[element].flags = 0;
3076 buffer->element[element].flags =
3077 SBAL_FLAGS_LAST_FRAG;
3080 buffer->element[element].flags =
3081 SBAL_FLAGS_FIRST_FRAG;
3083 buffer->element[element].flags =
3084 SBAL_FLAGS_MIDDLE_FRAG;
3086 data += length_here;
3090 *next_element_to_fill = element;
3093 static inline int qeth_fill_buffer(struct qeth_qdio_out_q *queue,
3094 struct qeth_qdio_out_buffer *buf, struct sk_buff *skb,
3095 struct qeth_hdr *hdr, int offset, int hd_len)
3097 struct qdio_buffer *buffer;
3098 int flush_cnt = 0, hdr_len, large_send = 0;
3100 buffer = buf->buffer;
3101 atomic_inc(&skb->users);
3102 skb_queue_tail(&buf->skb_list, skb);
3104 /*check first on TSO ....*/
3105 if (hdr->hdr.l3.id == QETH_HEADER_TYPE_TSO) {
3106 int element = buf->next_element_to_fill;
3108 hdr_len = sizeof(struct qeth_hdr_tso) +
3109 ((struct qeth_hdr_tso *)hdr)->ext.dg_hdr_len;
3110 /*fill first buffer entry only with header information */
3111 buffer->element[element].addr = skb->data;
3112 buffer->element[element].length = hdr_len;
3113 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3114 buf->next_element_to_fill++;
3115 skb->data += hdr_len;
3116 skb->len -= hdr_len;
3121 int element = buf->next_element_to_fill;
3122 buffer->element[element].addr = hdr;
3123 buffer->element[element].length = sizeof(struct qeth_hdr) +
3125 buffer->element[element].flags = SBAL_FLAGS_FIRST_FRAG;
3126 buf->is_header[element] = 1;
3127 buf->next_element_to_fill++;
3130 if (skb_shinfo(skb)->nr_frags == 0)
3131 __qeth_fill_buffer(skb, buffer, large_send,
3132 (int *)&buf->next_element_to_fill, offset);
3134 __qeth_fill_buffer_frag(skb, buffer, large_send,
3135 (int *)&buf->next_element_to_fill);
3137 if (!queue->do_pack) {
3138 QETH_DBF_TEXT(TRACE, 6, "fillbfnp");
3139 /* set state to PRIMED -> will be flushed */
3140 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3143 QETH_DBF_TEXT(TRACE, 6, "fillbfpa");
3144 if (queue->card->options.performance_stats)
3145 queue->card->perf_stats.skbs_sent_pack++;
3146 if (buf->next_element_to_fill >=
3147 QETH_MAX_BUFFER_ELEMENTS(queue->card)) {
3149 * packed buffer if full -> set state PRIMED
3150 * -> will be flushed
3152 atomic_set(&buf->state, QETH_QDIO_BUF_PRIMED);
3159 int qeth_do_send_packet_fast(struct qeth_card *card,
3160 struct qeth_qdio_out_q *queue, struct sk_buff *skb,
3161 struct qeth_hdr *hdr, int elements_needed,
3162 struct qeth_eddp_context *ctx, int offset, int hd_len)
3164 struct qeth_qdio_out_buffer *buffer;
3165 int buffers_needed = 0;
3169 /* spin until we get the queue ... */
3170 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3171 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3172 /* ... now we've got the queue */
3173 index = queue->next_buf_to_fill;
3174 buffer = &queue->bufs[queue->next_buf_to_fill];
3176 * check if buffer is empty to make sure that we do not 'overtake'
3177 * ourselves and try to fill a buffer that is already primed
3179 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY)
3182 queue->next_buf_to_fill = (queue->next_buf_to_fill + 1) %
3183 QDIO_MAX_BUFFERS_PER_Q;
3185 buffers_needed = qeth_eddp_check_buffers_for_context(queue,
3187 if (buffers_needed < 0)
3189 queue->next_buf_to_fill =
3190 (queue->next_buf_to_fill + buffers_needed) %
3191 QDIO_MAX_BUFFERS_PER_Q;
3193 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3195 qeth_fill_buffer(queue, buffer, skb, hdr, offset, hd_len);
3196 qeth_flush_buffers(queue, index, 1);
3198 flush_cnt = qeth_eddp_fill_buffer(queue, ctx, index);
3199 WARN_ON(buffers_needed != flush_cnt);
3200 qeth_flush_buffers(queue, index, flush_cnt);
3204 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3207 EXPORT_SYMBOL_GPL(qeth_do_send_packet_fast);
3209 int qeth_do_send_packet(struct qeth_card *card, struct qeth_qdio_out_q *queue,
3210 struct sk_buff *skb, struct qeth_hdr *hdr,
3211 int elements_needed, struct qeth_eddp_context *ctx)
3213 struct qeth_qdio_out_buffer *buffer;
3215 int flush_count = 0;
3220 /* spin until we get the queue ... */
3221 while (atomic_cmpxchg(&queue->state, QETH_OUT_Q_UNLOCKED,
3222 QETH_OUT_Q_LOCKED) != QETH_OUT_Q_UNLOCKED);
3223 start_index = queue->next_buf_to_fill;
3224 buffer = &queue->bufs[queue->next_buf_to_fill];
3226 * check if buffer is empty to make sure that we do not 'overtake'
3227 * ourselves and try to fill a buffer that is already primed
3229 if (atomic_read(&buffer->state) != QETH_QDIO_BUF_EMPTY) {
3230 atomic_set(&queue->state, QETH_OUT_Q_UNLOCKED);
3233 /* check if we need to switch packing state of this queue */
3234 qeth_switch_to_packing_if_needed(queue);
3235 if (queue->do_pack) {
3238 /* does packet fit in current buffer? */
3239 if ((QETH_MAX_BUFFER_ELEMENTS(card) -
3240 buffer->next_element_to_fill) < elements_needed) {
3241 /* ... no -> set state PRIMED */
3242 atomic_set(&buffer->state,
3243 QETH_QDIO_BUF_PRIMED);
3245 queue->next_buf_to_fill =
3246 (queue->next_buf_to_fill + 1) %
3247 QDIO_MAX_BUFFERS_PER_Q;
3248 buffer = &queue->bufs[queue->next_buf_to_fill];
3249 /* we did a step forward, so check buffer state
3251 if (atomic_read(&buffer->state) !=
3252 QETH_QDIO_BUF_EMPTY){
3253 qeth_flush_buffers(queue, start_index,
3255 atomic_set(&queue->state,
3256 QETH_OUT_Q_UNLOCKED);
3261 /* check if we have enough elements (including following
3262 * free buffers) to handle eddp context */
3263 if (qeth_eddp_check_buffers_for_context(queue, ctx)
3271 tmp = qeth_fill_buffer(queue, buffer, skb, hdr, -1, 0);
3273 tmp = qeth_eddp_fill_buffer(queue, ctx,
3274 queue->next_buf_to_fill);
3280 queue->next_buf_to_fill = (queue->next_buf_to_fill + tmp) %
3281 QDIO_MAX_BUFFERS_PER_Q;
3285 qeth_flush_buffers(queue, start_index, flush_count);
3286 else if (!atomic_read(&queue->set_pci_flags_count))
3287 atomic_xchg(&queue->state, QETH_OUT_Q_LOCKED_FLUSH);
3289 * queue->state will go from LOCKED -> UNLOCKED or from
3290 * LOCKED_FLUSH -> LOCKED if output_handler wanted to 'notify' us
3291 * (switch packing state or flush buffer to get another pci flag out).
3292 * In that case we will enter this loop
3294 while (atomic_dec_return(&queue->state)) {
3296 start_index = queue->next_buf_to_fill;
3297 /* check if we can go back to non-packing state */
3298 flush_count += qeth_switch_to_nonpacking_if_needed(queue);
3300 * check if we need to flush a packing buffer to get a pci
3301 * flag out on the queue
3303 if (!flush_count && !atomic_read(&queue->set_pci_flags_count))
3304 flush_count += qeth_flush_buffers_on_no_pci(queue);
3306 qeth_flush_buffers(queue, start_index, flush_count);
3308 /* at this point the queue is UNLOCKED again */
3309 if (queue->card->options.performance_stats && do_pack)
3310 queue->card->perf_stats.bufs_sent_pack += flush_count;
3314 EXPORT_SYMBOL_GPL(qeth_do_send_packet);
3316 static int qeth_setadp_promisc_mode_cb(struct qeth_card *card,
3317 struct qeth_reply *reply, unsigned long data)
3319 struct qeth_ipa_cmd *cmd;
3320 struct qeth_ipacmd_setadpparms *setparms;
3322 QETH_DBF_TEXT(TRACE, 4, "prmadpcb");
3324 cmd = (struct qeth_ipa_cmd *) data;
3325 setparms = &(cmd->data.setadapterparms);
3327 qeth_default_setadapterparms_cb(card, reply, (unsigned long)cmd);
3328 if (cmd->hdr.return_code) {
3329 QETH_DBF_TEXT_(TRACE, 4, "prmrc%2.2x", cmd->hdr.return_code);
3330 setparms->data.mode = SET_PROMISC_MODE_OFF;
3332 card->info.promisc_mode = setparms->data.mode;
3336 void qeth_setadp_promisc_mode(struct qeth_card *card)
3338 enum qeth_ipa_promisc_modes mode;
3339 struct net_device *dev = card->dev;
3340 struct qeth_cmd_buffer *iob;
3341 struct qeth_ipa_cmd *cmd;
3343 QETH_DBF_TEXT(TRACE, 4, "setprom");
3345 if (((dev->flags & IFF_PROMISC) &&
3346 (card->info.promisc_mode == SET_PROMISC_MODE_ON)) ||
3347 (!(dev->flags & IFF_PROMISC) &&
3348 (card->info.promisc_mode == SET_PROMISC_MODE_OFF)))
3350 mode = SET_PROMISC_MODE_OFF;
3351 if (dev->flags & IFF_PROMISC)
3352 mode = SET_PROMISC_MODE_ON;
3353 QETH_DBF_TEXT_(TRACE, 4, "mode:%x", mode);
3355 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_PROMISC_MODE,
3356 sizeof(struct qeth_ipacmd_setadpparms));
3357 cmd = (struct qeth_ipa_cmd *)(iob->data + IPA_PDU_HEADER_SIZE);
3358 cmd->data.setadapterparms.data.mode = mode;
3359 qeth_send_ipa_cmd(card, iob, qeth_setadp_promisc_mode_cb, NULL);
3361 EXPORT_SYMBOL_GPL(qeth_setadp_promisc_mode);
3363 int qeth_change_mtu(struct net_device *dev, int new_mtu)
3365 struct qeth_card *card;
3368 card = dev->ml_priv;
3370 QETH_DBF_TEXT(TRACE, 4, "chgmtu");
3371 sprintf(dbf_text, "%8x", new_mtu);
3372 QETH_DBF_TEXT(TRACE, 4, dbf_text);
3376 if (new_mtu > 65535)
3378 if ((!qeth_is_supported(card, IPA_IP_FRAGMENTATION)) &&
3379 (!qeth_mtu_is_valid(card, new_mtu)))
3384 EXPORT_SYMBOL_GPL(qeth_change_mtu);
3386 struct net_device_stats *qeth_get_stats(struct net_device *dev)
3388 struct qeth_card *card;
3390 card = dev->ml_priv;
3392 QETH_DBF_TEXT(TRACE, 5, "getstat");
3394 return &card->stats;
3396 EXPORT_SYMBOL_GPL(qeth_get_stats);
3398 static int qeth_setadpparms_change_macaddr_cb(struct qeth_card *card,
3399 struct qeth_reply *reply, unsigned long data)
3401 struct qeth_ipa_cmd *cmd;
3403 QETH_DBF_TEXT(TRACE, 4, "chgmaccb");
3405 cmd = (struct qeth_ipa_cmd *) data;
3406 if (!card->options.layer2 ||
3407 !(card->info.mac_bits & QETH_LAYER2_MAC_READ)) {
3408 memcpy(card->dev->dev_addr,
3409 &cmd->data.setadapterparms.data.change_addr.addr,
3411 card->info.mac_bits |= QETH_LAYER2_MAC_READ;
3413 qeth_default_setadapterparms_cb(card, reply, (unsigned long) cmd);
3417 int qeth_setadpparms_change_macaddr(struct qeth_card *card)
3420 struct qeth_cmd_buffer *iob;
3421 struct qeth_ipa_cmd *cmd;
3423 QETH_DBF_TEXT(TRACE, 4, "chgmac");
3425 iob = qeth_get_adapter_cmd(card, IPA_SETADP_ALTER_MAC_ADDRESS,
3426 sizeof(struct qeth_ipacmd_setadpparms));
3427 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3428 cmd->data.setadapterparms.data.change_addr.cmd = CHANGE_ADDR_READ_MAC;
3429 cmd->data.setadapterparms.data.change_addr.addr_size = OSA_ADDR_LEN;
3430 memcpy(&cmd->data.setadapterparms.data.change_addr.addr,
3431 card->dev->dev_addr, OSA_ADDR_LEN);
3432 rc = qeth_send_ipa_cmd(card, iob, qeth_setadpparms_change_macaddr_cb,
3436 EXPORT_SYMBOL_GPL(qeth_setadpparms_change_macaddr);
3438 void qeth_tx_timeout(struct net_device *dev)
3440 struct qeth_card *card;
3442 card = dev->ml_priv;
3443 card->stats.tx_errors++;
3444 qeth_schedule_recovery(card);
3446 EXPORT_SYMBOL_GPL(qeth_tx_timeout);
3448 int qeth_mdio_read(struct net_device *dev, int phy_id, int regnum)
3450 struct qeth_card *card = dev->ml_priv;
3454 case MII_BMCR: /* Basic mode control register */
3456 if ((card->info.link_type != QETH_LINK_TYPE_GBIT_ETH) &&
3457 (card->info.link_type != QETH_LINK_TYPE_OSN) &&
3458 (card->info.link_type != QETH_LINK_TYPE_10GBIT_ETH))
3459 rc |= BMCR_SPEED100;
3461 case MII_BMSR: /* Basic mode status register */
3462 rc = BMSR_ERCAP | BMSR_ANEGCOMPLETE | BMSR_LSTATUS |
3463 BMSR_10HALF | BMSR_10FULL | BMSR_100HALF | BMSR_100FULL |
3466 case MII_PHYSID1: /* PHYS ID 1 */
3467 rc = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 8) |
3469 rc = (rc >> 5) & 0xFFFF;
3471 case MII_PHYSID2: /* PHYS ID 2 */
3472 rc = (dev->dev_addr[2] << 10) & 0xFFFF;
3474 case MII_ADVERTISE: /* Advertisement control reg */
3477 case MII_LPA: /* Link partner ability reg */
3478 rc = LPA_10HALF | LPA_10FULL | LPA_100HALF | LPA_100FULL |
3479 LPA_100BASE4 | LPA_LPACK;
3481 case MII_EXPANSION: /* Expansion register */
3483 case MII_DCOUNTER: /* disconnect counter */
3485 case MII_FCSCOUNTER: /* false carrier counter */
3487 case MII_NWAYTEST: /* N-way auto-neg test register */
3489 case MII_RERRCOUNTER: /* rx error counter */
3490 rc = card->stats.rx_errors;
3492 case MII_SREVISION: /* silicon revision */
3494 case MII_RESV1: /* reserved 1 */
3496 case MII_LBRERROR: /* loopback, rx, bypass error */
3498 case MII_PHYADDR: /* physical address */
3500 case MII_RESV2: /* reserved 2 */
3502 case MII_TPISTATUS: /* TPI status for 10mbps */
3504 case MII_NCONFIG: /* network interface config */
3511 EXPORT_SYMBOL_GPL(qeth_mdio_read);
3513 static int qeth_send_ipa_snmp_cmd(struct qeth_card *card,
3514 struct qeth_cmd_buffer *iob, int len,
3515 int (*reply_cb)(struct qeth_card *, struct qeth_reply *,
3521 QETH_DBF_TEXT(TRACE, 4, "sendsnmp");
3523 memcpy(iob->data, IPA_PDU_HEADER, IPA_PDU_HEADER_SIZE);
3524 memcpy(QETH_IPA_CMD_DEST_ADDR(iob->data),
3525 &card->token.ulp_connection_r, QETH_MPC_TOKEN_LENGTH);
3526 /* adjust PDU length fields in IPA_PDU_HEADER */
3527 s1 = (u32) IPA_PDU_HEADER_SIZE + len;
3529 memcpy(QETH_IPA_PDU_LEN_TOTAL(iob->data), &s1, 2);
3530 memcpy(QETH_IPA_PDU_LEN_PDU1(iob->data), &s2, 2);
3531 memcpy(QETH_IPA_PDU_LEN_PDU2(iob->data), &s2, 2);
3532 memcpy(QETH_IPA_PDU_LEN_PDU3(iob->data), &s2, 2);
3533 return qeth_send_control_data(card, IPA_PDU_HEADER_SIZE + len, iob,
3534 reply_cb, reply_param);
3537 static int qeth_snmp_command_cb(struct qeth_card *card,
3538 struct qeth_reply *reply, unsigned long sdata)
3540 struct qeth_ipa_cmd *cmd;
3541 struct qeth_arp_query_info *qinfo;
3542 struct qeth_snmp_cmd *snmp;
3543 unsigned char *data;
3546 QETH_DBF_TEXT(TRACE, 3, "snpcmdcb");
3548 cmd = (struct qeth_ipa_cmd *) sdata;
3549 data = (unsigned char *)((char *)cmd - reply->offset);
3550 qinfo = (struct qeth_arp_query_info *) reply->param;
3551 snmp = &cmd->data.setadapterparms.data.snmp;
3553 if (cmd->hdr.return_code) {
3554 QETH_DBF_TEXT_(TRACE, 4, "scer1%i", cmd->hdr.return_code);
3557 if (cmd->data.setadapterparms.hdr.return_code) {
3558 cmd->hdr.return_code =
3559 cmd->data.setadapterparms.hdr.return_code;
3560 QETH_DBF_TEXT_(TRACE, 4, "scer2%i", cmd->hdr.return_code);
3563 data_len = *((__u16 *)QETH_IPA_PDU_LEN_PDU1(data));
3564 if (cmd->data.setadapterparms.hdr.seq_no == 1)
3565 data_len -= (__u16)((char *)&snmp->data - (char *)cmd);
3567 data_len -= (__u16)((char *)&snmp->request - (char *)cmd);
3569 /* check if there is enough room in userspace */
3570 if ((qinfo->udata_len - qinfo->udata_offset) < data_len) {
3571 QETH_DBF_TEXT_(TRACE, 4, "scer3%i", -ENOMEM);
3572 cmd->hdr.return_code = -ENOMEM;
3575 QETH_DBF_TEXT_(TRACE, 4, "snore%i",
3576 cmd->data.setadapterparms.hdr.used_total);
3577 QETH_DBF_TEXT_(TRACE, 4, "sseqn%i",
3578 cmd->data.setadapterparms.hdr.seq_no);
3579 /*copy entries to user buffer*/
3580 if (cmd->data.setadapterparms.hdr.seq_no == 1) {
3581 memcpy(qinfo->udata + qinfo->udata_offset,
3583 data_len + offsetof(struct qeth_snmp_cmd, data));
3584 qinfo->udata_offset += offsetof(struct qeth_snmp_cmd, data);
3586 memcpy(qinfo->udata + qinfo->udata_offset,
3587 (char *)&snmp->request, data_len);
3589 qinfo->udata_offset += data_len;
3590 /* check if all replies received ... */
3591 QETH_DBF_TEXT_(TRACE, 4, "srtot%i",
3592 cmd->data.setadapterparms.hdr.used_total);
3593 QETH_DBF_TEXT_(TRACE, 4, "srseq%i",
3594 cmd->data.setadapterparms.hdr.seq_no);
3595 if (cmd->data.setadapterparms.hdr.seq_no <
3596 cmd->data.setadapterparms.hdr.used_total)
3601 int qeth_snmp_command(struct qeth_card *card, char __user *udata)
3603 struct qeth_cmd_buffer *iob;
3604 struct qeth_ipa_cmd *cmd;
3605 struct qeth_snmp_ureq *ureq;
3607 struct qeth_arp_query_info qinfo = {0, };
3610 QETH_DBF_TEXT(TRACE, 3, "snmpcmd");
3612 if (card->info.guestlan)
3615 if ((!qeth_adp_supported(card, IPA_SETADP_SET_SNMP_CONTROL)) &&
3616 (!card->options.layer2)) {
3619 /* skip 4 bytes (data_len struct member) to get req_len */
3620 if (copy_from_user(&req_len, udata + sizeof(int), sizeof(int)))
3622 ureq = kmalloc(req_len+sizeof(struct qeth_snmp_ureq_hdr), GFP_KERNEL);
3624 QETH_DBF_TEXT(TRACE, 2, "snmpnome");
3627 if (copy_from_user(ureq, udata,
3628 req_len + sizeof(struct qeth_snmp_ureq_hdr))) {
3632 qinfo.udata_len = ureq->hdr.data_len;
3633 qinfo.udata = kzalloc(qinfo.udata_len, GFP_KERNEL);
3638 qinfo.udata_offset = sizeof(struct qeth_snmp_ureq_hdr);
3640 iob = qeth_get_adapter_cmd(card, IPA_SETADP_SET_SNMP_CONTROL,
3641 QETH_SNMP_SETADP_CMDLENGTH + req_len);
3642 cmd = (struct qeth_ipa_cmd *)(iob->data+IPA_PDU_HEADER_SIZE);
3643 memcpy(&cmd->data.setadapterparms.data.snmp, &ureq->cmd, req_len);
3644 rc = qeth_send_ipa_snmp_cmd(card, iob, QETH_SETADP_BASE_LEN + req_len,
3645 qeth_snmp_command_cb, (void *)&qinfo);
3647 QETH_DBF_MESSAGE(2, "SNMP command failed on %s: (0x%x)\n",
3648 QETH_CARD_IFNAME(card), rc);
3650 if (copy_to_user(udata, qinfo.udata, qinfo.udata_len))
3658 EXPORT_SYMBOL_GPL(qeth_snmp_command);
3660 static inline int qeth_get_qdio_q_format(struct qeth_card *card)
3662 switch (card->info.type) {
3663 case QETH_CARD_TYPE_IQD:
3670 static int qeth_qdio_establish(struct qeth_card *card)
3672 struct qdio_initialize init_data;
3673 char *qib_param_field;
3674 struct qdio_buffer **in_sbal_ptrs;
3675 struct qdio_buffer **out_sbal_ptrs;
3679 QETH_DBF_TEXT(SETUP, 2, "qdioest");
3681 qib_param_field = kzalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(char),
3683 if (!qib_param_field)
3686 qeth_create_qib_param_field(card, qib_param_field);
3687 qeth_create_qib_param_field_blkt(card, qib_param_field);
3689 in_sbal_ptrs = kmalloc(QDIO_MAX_BUFFERS_PER_Q * sizeof(void *),
3691 if (!in_sbal_ptrs) {
3692 kfree(qib_param_field);
3695 for (i = 0; i < QDIO_MAX_BUFFERS_PER_Q; ++i)
3696 in_sbal_ptrs[i] = (struct qdio_buffer *)
3697 virt_to_phys(card->qdio.in_q->bufs[i].buffer);
3700 kmalloc(card->qdio.no_out_queues * QDIO_MAX_BUFFERS_PER_Q *
3701 sizeof(void *), GFP_KERNEL);
3702 if (!out_sbal_ptrs) {
3703 kfree(in_sbal_ptrs);
3704 kfree(qib_param_field);
3707 for (i = 0, k = 0; i < card->qdio.no_out_queues; ++i)
3708 for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; ++j, ++k) {
3709 out_sbal_ptrs[k] = (struct qdio_buffer *)virt_to_phys(
3710 card->qdio.out_qs[i]->bufs[j].buffer);
3713 memset(&init_data, 0, sizeof(struct qdio_initialize));
3714 init_data.cdev = CARD_DDEV(card);
3715 init_data.q_format = qeth_get_qdio_q_format(card);
3716 init_data.qib_param_field_format = 0;
3717 init_data.qib_param_field = qib_param_field;
3718 init_data.no_input_qs = 1;
3719 init_data.no_output_qs = card->qdio.no_out_queues;
3720 init_data.input_handler = card->discipline.input_handler;
3721 init_data.output_handler = card->discipline.output_handler;
3722 init_data.int_parm = (unsigned long) card;
3723 init_data.flags = QDIO_INBOUND_0COPY_SBALS |
3724 QDIO_OUTBOUND_0COPY_SBALS |
3725 QDIO_USE_OUTBOUND_PCIS;
3726 init_data.input_sbal_addr_array = (void **) in_sbal_ptrs;
3727 init_data.output_sbal_addr_array = (void **) out_sbal_ptrs;
3729 if (atomic_cmpxchg(&card->qdio.state, QETH_QDIO_ALLOCATED,
3730 QETH_QDIO_ESTABLISHED) == QETH_QDIO_ALLOCATED) {
3731 rc = qdio_initialize(&init_data);
3733 atomic_set(&card->qdio.state, QETH_QDIO_ALLOCATED);
3735 kfree(out_sbal_ptrs);
3736 kfree(in_sbal_ptrs);
3737 kfree(qib_param_field);
3741 static void qeth_core_free_card(struct qeth_card *card)
3744 QETH_DBF_TEXT(SETUP, 2, "freecrd");
3745 QETH_DBF_HEX(SETUP, 2, &card, sizeof(void *));
3746 qeth_clean_channel(&card->read);
3747 qeth_clean_channel(&card->write);
3749 free_netdev(card->dev);
3750 kfree(card->ip_tbd_list);
3751 qeth_free_qdio_buffers(card);
3752 unregister_service_level(&card->qeth_service_level);
3756 static struct ccw_device_id qeth_ids[] = {
3757 {CCW_DEVICE(0x1731, 0x01), .driver_info = QETH_CARD_TYPE_OSAE},
3758 {CCW_DEVICE(0x1731, 0x05), .driver_info = QETH_CARD_TYPE_IQD},
3759 {CCW_DEVICE(0x1731, 0x06), .driver_info = QETH_CARD_TYPE_OSN},
3762 MODULE_DEVICE_TABLE(ccw, qeth_ids);
3764 static struct ccw_driver qeth_ccw_driver = {
3767 .probe = ccwgroup_probe_ccwdev,
3768 .remove = ccwgroup_remove_ccwdev,
3771 static int qeth_core_driver_group(const char *buf, struct device *root_dev,
3772 unsigned long driver_id)
3774 return ccwgroup_create_from_string(root_dev, driver_id,
3775 &qeth_ccw_driver, 3, buf);
3778 int qeth_core_hardsetup_card(struct qeth_card *card)
3780 struct qdio_ssqd_desc *ssqd;
3785 QETH_DBF_TEXT(SETUP, 2, "hrdsetup");
3786 atomic_set(&card->force_alloc_skb, 0);
3789 QETH_DBF_MESSAGE(2, "%s Retrying to do IDX activates.\n",
3790 dev_name(&card->gdev->dev));
3791 ccw_device_set_offline(CARD_DDEV(card));
3792 ccw_device_set_offline(CARD_WDEV(card));
3793 ccw_device_set_offline(CARD_RDEV(card));
3794 ccw_device_set_online(CARD_RDEV(card));
3795 ccw_device_set_online(CARD_WDEV(card));
3796 ccw_device_set_online(CARD_DDEV(card));
3798 rc = qeth_qdio_clear_card(card, card->info.type != QETH_CARD_TYPE_IQD);
3799 if (rc == -ERESTARTSYS) {
3800 QETH_DBF_TEXT(SETUP, 2, "break1");
3803 QETH_DBF_TEXT_(SETUP, 2, "1err%d", rc);
3810 rc = qeth_get_unitaddr(card);
3812 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
3816 ssqd = kmalloc(sizeof(struct qdio_ssqd_desc), GFP_KERNEL);
3821 rc = qdio_get_ssqd_desc(CARD_DDEV(card), ssqd);
3827 mpno = min(mpno - 1, QETH_MAX_PORTNO);
3828 if (card->info.portno > mpno) {
3829 QETH_DBF_MESSAGE(2, "Device %s does not offer port number %d"
3830 "\n.", CARD_BUS_ID(card), card->info.portno);
3834 qeth_init_tokens(card);
3835 qeth_init_func_level(card);
3836 rc = qeth_idx_activate_channel(&card->read, qeth_idx_read_cb);
3837 if (rc == -ERESTARTSYS) {
3838 QETH_DBF_TEXT(SETUP, 2, "break2");
3841 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
3847 rc = qeth_idx_activate_channel(&card->write, qeth_idx_write_cb);
3848 if (rc == -ERESTARTSYS) {
3849 QETH_DBF_TEXT(SETUP, 2, "break3");
3852 QETH_DBF_TEXT_(SETUP, 2, "4err%d", rc);
3858 rc = qeth_mpc_initialize(card);
3860 QETH_DBF_TEXT_(SETUP, 2, "5err%d", rc);
3865 dev_warn(&card->gdev->dev, "The qeth device driver failed to recover "
3866 "an error on the device\n");
3867 QETH_DBF_MESSAGE(2, "%s Initialization in hardsetup failed! rc=%d\n",
3868 dev_name(&card->gdev->dev), rc);
3871 EXPORT_SYMBOL_GPL(qeth_core_hardsetup_card);
3873 static inline int qeth_create_skb_frag(struct qdio_buffer_element *element,
3874 struct sk_buff **pskb, int offset, int *pfrag, int data_len)
3876 struct page *page = virt_to_page(element->addr);
3877 if (*pskb == NULL) {
3878 /* the upper protocol layers assume that there is data in the
3879 * skb itself. Copy a small amount (64 bytes) to make them
3881 *pskb = dev_alloc_skb(64 + ETH_HLEN);
3884 skb_reserve(*pskb, ETH_HLEN);
3885 if (data_len <= 64) {
3886 memcpy(skb_put(*pskb, data_len), element->addr + offset,
3890 memcpy(skb_put(*pskb, 64), element->addr + offset, 64);
3891 skb_fill_page_desc(*pskb, *pfrag, page, offset + 64,
3893 (*pskb)->data_len += data_len - 64;
3894 (*pskb)->len += data_len - 64;
3895 (*pskb)->truesize += data_len - 64;
3900 skb_fill_page_desc(*pskb, *pfrag, page, offset, data_len);
3901 (*pskb)->data_len += data_len;
3902 (*pskb)->len += data_len;
3903 (*pskb)->truesize += data_len;
3909 struct sk_buff *qeth_core_get_next_skb(struct qeth_card *card,
3910 struct qdio_buffer *buffer,
3911 struct qdio_buffer_element **__element, int *__offset,
3912 struct qeth_hdr **hdr)
3914 struct qdio_buffer_element *element = *__element;
3915 int offset = *__offset;
3916 struct sk_buff *skb = NULL;
3924 /* qeth_hdr must not cross element boundaries */
3925 if (element->length < offset + sizeof(struct qeth_hdr)) {
3926 if (qeth_is_last_sbale(element))
3930 if (element->length < sizeof(struct qeth_hdr))
3933 *hdr = element->addr + offset;
3935 offset += sizeof(struct qeth_hdr);
3936 if (card->options.layer2) {
3937 if (card->info.type == QETH_CARD_TYPE_OSN) {
3938 skb_len = (*hdr)->hdr.osn.pdu_length;
3939 headroom = sizeof(struct qeth_hdr);
3941 skb_len = (*hdr)->hdr.l2.pkt_length;
3944 skb_len = (*hdr)->hdr.l3.length;
3945 if ((card->info.link_type == QETH_LINK_TYPE_LANE_TR) ||
3946 (card->info.link_type == QETH_LINK_TYPE_HSTR))
3949 headroom = ETH_HLEN;
3955 if ((skb_len >= card->options.rx_sg_cb) &&
3956 (!(card->info.type == QETH_CARD_TYPE_OSN)) &&
3957 (!atomic_read(&card->force_alloc_skb))) {
3960 skb = dev_alloc_skb(skb_len + headroom);
3964 skb_reserve(skb, headroom);
3967 data_ptr = element->addr + offset;
3969 data_len = min(skb_len, (int)(element->length - offset));
3972 if (qeth_create_skb_frag(element, &skb, offset,
3976 memcpy(skb_put(skb, data_len), data_ptr,
3980 skb_len -= data_len;
3982 if (qeth_is_last_sbale(element)) {
3983 QETH_DBF_TEXT(TRACE, 4, "unexeob");
3984 QETH_DBF_TEXT_(TRACE, 4, "%s",
3986 QETH_DBF_TEXT(QERR, 2, "unexeob");
3987 QETH_DBF_TEXT_(QERR, 2, "%s",
3989 QETH_DBF_HEX(MISC, 4, buffer, sizeof(*buffer));
3990 dev_kfree_skb_any(skb);
3991 card->stats.rx_errors++;
3996 data_ptr = element->addr;
4001 *__element = element;
4003 if (use_rx_sg && card->options.performance_stats) {
4004 card->perf_stats.sg_skbs_rx++;
4005 card->perf_stats.sg_frags_rx += skb_shinfo(skb)->nr_frags;
4009 if (net_ratelimit()) {
4010 QETH_DBF_TEXT(TRACE, 2, "noskbmem");
4011 QETH_DBF_TEXT_(TRACE, 2, "%s", CARD_BUS_ID(card));
4013 card->stats.rx_dropped++;
4016 EXPORT_SYMBOL_GPL(qeth_core_get_next_skb);
4018 static void qeth_unregister_dbf_views(void)
4021 for (x = 0; x < QETH_DBF_INFOS; x++) {
4022 debug_unregister(qeth_dbf[x].id);
4023 qeth_dbf[x].id = NULL;
4027 void qeth_dbf_longtext(enum qeth_dbf_names dbf_nix, int level, char *fmt, ...)
4029 char dbf_txt_buf[32];
4032 if (level > (qeth_dbf[dbf_nix].id)->level)
4034 va_start(args, fmt);
4035 vsnprintf(dbf_txt_buf, sizeof(dbf_txt_buf), fmt, args);
4037 debug_text_event(qeth_dbf[dbf_nix].id, level, dbf_txt_buf);
4039 EXPORT_SYMBOL_GPL(qeth_dbf_longtext);
4041 static int qeth_register_dbf_views(void)
4046 for (x = 0; x < QETH_DBF_INFOS; x++) {
4047 /* register the areas */
4048 qeth_dbf[x].id = debug_register(qeth_dbf[x].name,
4052 if (qeth_dbf[x].id == NULL) {
4053 qeth_unregister_dbf_views();
4057 /* register a view */
4058 ret = debug_register_view(qeth_dbf[x].id, qeth_dbf[x].view);
4060 qeth_unregister_dbf_views();
4064 /* set a passing level */
4065 debug_set_level(qeth_dbf[x].id, qeth_dbf[x].level);
4071 int qeth_core_load_discipline(struct qeth_card *card,
4072 enum qeth_discipline_id discipline)
4075 switch (discipline) {
4076 case QETH_DISCIPLINE_LAYER3:
4077 card->discipline.ccwgdriver = try_then_request_module(
4078 symbol_get(qeth_l3_ccwgroup_driver),
4081 case QETH_DISCIPLINE_LAYER2:
4082 card->discipline.ccwgdriver = try_then_request_module(
4083 symbol_get(qeth_l2_ccwgroup_driver),
4087 if (!card->discipline.ccwgdriver) {
4088 dev_err(&card->gdev->dev, "There is no kernel module to "
4089 "support discipline %d\n", discipline);
4095 void qeth_core_free_discipline(struct qeth_card *card)
4097 if (card->options.layer2)
4098 symbol_put(qeth_l2_ccwgroup_driver);
4100 symbol_put(qeth_l3_ccwgroup_driver);
4101 card->discipline.ccwgdriver = NULL;
4104 static int qeth_core_probe_device(struct ccwgroup_device *gdev)
4106 struct qeth_card *card;
4109 unsigned long flags;
4111 QETH_DBF_TEXT(SETUP, 2, "probedev");
4114 if (!get_device(dev))
4117 QETH_DBF_TEXT_(SETUP, 2, "%s", dev_name(&gdev->dev));
4119 card = qeth_alloc_card();
4121 QETH_DBF_TEXT_(SETUP, 2, "1err%d", -ENOMEM);
4125 card->read.ccwdev = gdev->cdev[0];
4126 card->write.ccwdev = gdev->cdev[1];
4127 card->data.ccwdev = gdev->cdev[2];
4128 dev_set_drvdata(&gdev->dev, card);
4130 gdev->cdev[0]->handler = qeth_irq;
4131 gdev->cdev[1]->handler = qeth_irq;
4132 gdev->cdev[2]->handler = qeth_irq;
4134 rc = qeth_determine_card_type(card);
4136 QETH_DBF_TEXT_(SETUP, 2, "3err%d", rc);
4139 rc = qeth_setup_card(card);
4141 QETH_DBF_TEXT_(SETUP, 2, "2err%d", rc);
4145 if (card->info.type == QETH_CARD_TYPE_OSN) {
4146 rc = qeth_core_create_osn_attributes(dev);
4149 rc = qeth_core_load_discipline(card, QETH_DISCIPLINE_LAYER2);
4151 qeth_core_remove_osn_attributes(dev);
4154 rc = card->discipline.ccwgdriver->probe(card->gdev);
4156 qeth_core_free_discipline(card);
4157 qeth_core_remove_osn_attributes(dev);
4161 rc = qeth_core_create_device_attributes(dev);
4166 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4167 list_add_tail(&card->list, &qeth_core_card_list.list);
4168 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4172 qeth_core_free_card(card);
4178 static void qeth_core_remove_device(struct ccwgroup_device *gdev)
4180 unsigned long flags;
4181 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4183 QETH_DBF_TEXT(SETUP, 2, "removedv");
4184 if (card->discipline.ccwgdriver) {
4185 card->discipline.ccwgdriver->remove(gdev);
4186 qeth_core_free_discipline(card);
4189 if (card->info.type == QETH_CARD_TYPE_OSN) {
4190 qeth_core_remove_osn_attributes(&gdev->dev);
4192 qeth_core_remove_device_attributes(&gdev->dev);
4194 write_lock_irqsave(&qeth_core_card_list.rwlock, flags);
4195 list_del(&card->list);
4196 write_unlock_irqrestore(&qeth_core_card_list.rwlock, flags);
4197 qeth_core_free_card(card);
4198 dev_set_drvdata(&gdev->dev, NULL);
4199 put_device(&gdev->dev);
4203 static int qeth_core_set_online(struct ccwgroup_device *gdev)
4205 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4209 if (!card->discipline.ccwgdriver) {
4210 if (card->info.type == QETH_CARD_TYPE_IQD)
4211 def_discipline = QETH_DISCIPLINE_LAYER3;
4213 def_discipline = QETH_DISCIPLINE_LAYER2;
4214 rc = qeth_core_load_discipline(card, def_discipline);
4217 rc = card->discipline.ccwgdriver->probe(card->gdev);
4221 rc = card->discipline.ccwgdriver->set_online(gdev);
4226 static int qeth_core_set_offline(struct ccwgroup_device *gdev)
4228 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4229 return card->discipline.ccwgdriver->set_offline(gdev);
4232 static void qeth_core_shutdown(struct ccwgroup_device *gdev)
4234 struct qeth_card *card = dev_get_drvdata(&gdev->dev);
4235 if (card->discipline.ccwgdriver &&
4236 card->discipline.ccwgdriver->shutdown)
4237 card->discipline.ccwgdriver->shutdown(gdev);
4240 static struct ccwgroup_driver qeth_core_ccwgroup_driver = {
4241 .owner = THIS_MODULE,
4243 .driver_id = 0xD8C5E3C8,
4244 .probe = qeth_core_probe_device,
4245 .remove = qeth_core_remove_device,
4246 .set_online = qeth_core_set_online,
4247 .set_offline = qeth_core_set_offline,
4248 .shutdown = qeth_core_shutdown,
4252 qeth_core_driver_group_store(struct device_driver *ddrv, const char *buf,
4256 err = qeth_core_driver_group(buf, qeth_core_root_dev,
4257 qeth_core_ccwgroup_driver.driver_id);
4264 static DRIVER_ATTR(group, 0200, NULL, qeth_core_driver_group_store);
4267 const char str[ETH_GSTRING_LEN];
4268 } qeth_ethtool_stats_keys[] = {
4273 {"tx skbs no packing"},
4274 {"tx buffers no packing"},
4275 {"tx skbs packing"},
4276 {"tx buffers packing"},
4279 /* 10 */{"rx sg skbs"},
4281 {"rx sg page allocs"},
4282 {"tx large kbytes"},
4284 {"tx pk state ch n->p"},
4285 {"tx pk state ch p->n"},
4286 {"tx pk watermark low"},
4287 {"tx pk watermark high"},
4288 {"queue 0 buffer usage"},
4289 /* 20 */{"queue 1 buffer usage"},
4290 {"queue 2 buffer usage"},
4291 {"queue 3 buffer usage"},
4292 {"rx handler time"},
4293 {"rx handler count"},
4294 {"rx do_QDIO time"},
4295 {"rx do_QDIO count"},
4296 {"tx handler time"},
4297 {"tx handler count"},
4299 /* 30 */{"tx count"},
4300 {"tx do_QDIO time"},
4301 {"tx do_QDIO count"},
4304 int qeth_core_get_stats_count(struct net_device *dev)
4306 return (sizeof(qeth_ethtool_stats_keys) / ETH_GSTRING_LEN);
4308 EXPORT_SYMBOL_GPL(qeth_core_get_stats_count);
4310 void qeth_core_get_ethtool_stats(struct net_device *dev,
4311 struct ethtool_stats *stats, u64 *data)
4313 struct qeth_card *card = dev->ml_priv;
4314 data[0] = card->stats.rx_packets -
4315 card->perf_stats.initial_rx_packets;
4316 data[1] = card->perf_stats.bufs_rec;
4317 data[2] = card->stats.tx_packets -
4318 card->perf_stats.initial_tx_packets;
4319 data[3] = card->perf_stats.bufs_sent;
4320 data[4] = card->stats.tx_packets - card->perf_stats.initial_tx_packets
4321 - card->perf_stats.skbs_sent_pack;
4322 data[5] = card->perf_stats.bufs_sent - card->perf_stats.bufs_sent_pack;
4323 data[6] = card->perf_stats.skbs_sent_pack;
4324 data[7] = card->perf_stats.bufs_sent_pack;
4325 data[8] = card->perf_stats.sg_skbs_sent;
4326 data[9] = card->perf_stats.sg_frags_sent;
4327 data[10] = card->perf_stats.sg_skbs_rx;
4328 data[11] = card->perf_stats.sg_frags_rx;
4329 data[12] = card->perf_stats.sg_alloc_page_rx;
4330 data[13] = (card->perf_stats.large_send_bytes >> 10);
4331 data[14] = card->perf_stats.large_send_cnt;
4332 data[15] = card->perf_stats.sc_dp_p;
4333 data[16] = card->perf_stats.sc_p_dp;
4334 data[17] = QETH_LOW_WATERMARK_PACK;
4335 data[18] = QETH_HIGH_WATERMARK_PACK;
4336 data[19] = atomic_read(&card->qdio.out_qs[0]->used_buffers);
4337 data[20] = (card->qdio.no_out_queues > 1) ?
4338 atomic_read(&card->qdio.out_qs[1]->used_buffers) : 0;
4339 data[21] = (card->qdio.no_out_queues > 2) ?
4340 atomic_read(&card->qdio.out_qs[2]->used_buffers) : 0;
4341 data[22] = (card->qdio.no_out_queues > 3) ?
4342 atomic_read(&card->qdio.out_qs[3]->used_buffers) : 0;
4343 data[23] = card->perf_stats.inbound_time;
4344 data[24] = card->perf_stats.inbound_cnt;
4345 data[25] = card->perf_stats.inbound_do_qdio_time;
4346 data[26] = card->perf_stats.inbound_do_qdio_cnt;
4347 data[27] = card->perf_stats.outbound_handler_time;
4348 data[28] = card->perf_stats.outbound_handler_cnt;
4349 data[29] = card->perf_stats.outbound_time;
4350 data[30] = card->perf_stats.outbound_cnt;
4351 data[31] = card->perf_stats.outbound_do_qdio_time;
4352 data[32] = card->perf_stats.outbound_do_qdio_cnt;
4354 EXPORT_SYMBOL_GPL(qeth_core_get_ethtool_stats);
4356 void qeth_core_get_strings(struct net_device *dev, u32 stringset, u8 *data)
4358 switch (stringset) {
4360 memcpy(data, &qeth_ethtool_stats_keys,
4361 sizeof(qeth_ethtool_stats_keys));
4368 EXPORT_SYMBOL_GPL(qeth_core_get_strings);
4370 void qeth_core_get_drvinfo(struct net_device *dev,
4371 struct ethtool_drvinfo *info)
4373 struct qeth_card *card = dev->ml_priv;
4374 if (card->options.layer2)
4375 strcpy(info->driver, "qeth_l2");
4377 strcpy(info->driver, "qeth_l3");
4379 strcpy(info->version, "1.0");
4380 strcpy(info->fw_version, card->info.mcl_level);
4381 sprintf(info->bus_info, "%s/%s/%s",
4384 CARD_DDEV_ID(card));
4386 EXPORT_SYMBOL_GPL(qeth_core_get_drvinfo);
4388 int qeth_core_ethtool_get_settings(struct net_device *netdev,
4389 struct ethtool_cmd *ecmd)
4391 struct qeth_card *card = netdev->ml_priv;
4392 enum qeth_link_types link_type;
4394 if ((card->info.type == QETH_CARD_TYPE_IQD) || (card->info.guestlan))
4395 link_type = QETH_LINK_TYPE_10GBIT_ETH;
4397 link_type = card->info.link_type;
4399 ecmd->transceiver = XCVR_INTERNAL;
4400 ecmd->supported = SUPPORTED_Autoneg;
4401 ecmd->advertising = ADVERTISED_Autoneg;
4402 ecmd->duplex = DUPLEX_FULL;
4403 ecmd->autoneg = AUTONEG_ENABLE;
4405 switch (link_type) {
4406 case QETH_LINK_TYPE_FAST_ETH:
4407 case QETH_LINK_TYPE_LANE_ETH100:
4408 ecmd->supported |= SUPPORTED_10baseT_Half |
4409 SUPPORTED_10baseT_Full |
4410 SUPPORTED_100baseT_Half |
4411 SUPPORTED_100baseT_Full |
4413 ecmd->advertising |= ADVERTISED_10baseT_Half |
4414 ADVERTISED_10baseT_Full |
4415 ADVERTISED_100baseT_Half |
4416 ADVERTISED_100baseT_Full |
4418 ecmd->speed = SPEED_100;
4419 ecmd->port = PORT_TP;
4422 case QETH_LINK_TYPE_GBIT_ETH:
4423 case QETH_LINK_TYPE_LANE_ETH1000:
4424 ecmd->supported |= SUPPORTED_10baseT_Half |
4425 SUPPORTED_10baseT_Full |
4426 SUPPORTED_100baseT_Half |
4427 SUPPORTED_100baseT_Full |
4428 SUPPORTED_1000baseT_Half |
4429 SUPPORTED_1000baseT_Full |
4431 ecmd->advertising |= ADVERTISED_10baseT_Half |
4432 ADVERTISED_10baseT_Full |
4433 ADVERTISED_100baseT_Half |
4434 ADVERTISED_100baseT_Full |
4435 ADVERTISED_1000baseT_Half |
4436 ADVERTISED_1000baseT_Full |
4438 ecmd->speed = SPEED_1000;
4439 ecmd->port = PORT_FIBRE;
4442 case QETH_LINK_TYPE_10GBIT_ETH:
4443 ecmd->supported |= SUPPORTED_10baseT_Half |
4444 SUPPORTED_10baseT_Full |
4445 SUPPORTED_100baseT_Half |
4446 SUPPORTED_100baseT_Full |
4447 SUPPORTED_1000baseT_Half |
4448 SUPPORTED_1000baseT_Full |
4449 SUPPORTED_10000baseT_Full |
4451 ecmd->advertising |= ADVERTISED_10baseT_Half |
4452 ADVERTISED_10baseT_Full |
4453 ADVERTISED_100baseT_Half |
4454 ADVERTISED_100baseT_Full |
4455 ADVERTISED_1000baseT_Half |
4456 ADVERTISED_1000baseT_Full |
4457 ADVERTISED_10000baseT_Full |
4459 ecmd->speed = SPEED_10000;
4460 ecmd->port = PORT_FIBRE;
4464 ecmd->supported |= SUPPORTED_10baseT_Half |
4465 SUPPORTED_10baseT_Full |
4467 ecmd->advertising |= ADVERTISED_10baseT_Half |
4468 ADVERTISED_10baseT_Full |
4470 ecmd->speed = SPEED_10;
4471 ecmd->port = PORT_TP;
4476 EXPORT_SYMBOL_GPL(qeth_core_ethtool_get_settings);
4478 static int __init qeth_core_init(void)
4482 pr_info("loading core functions\n");
4483 INIT_LIST_HEAD(&qeth_core_card_list.list);
4484 rwlock_init(&qeth_core_card_list.rwlock);
4486 rc = qeth_register_dbf_views();
4489 rc = ccw_driver_register(&qeth_ccw_driver);
4492 rc = ccwgroup_driver_register(&qeth_core_ccwgroup_driver);
4495 rc = driver_create_file(&qeth_core_ccwgroup_driver.driver,
4496 &driver_attr_group);
4499 qeth_core_root_dev = s390_root_dev_register("qeth");
4500 rc = IS_ERR(qeth_core_root_dev) ? PTR_ERR(qeth_core_root_dev) : 0;
4504 qeth_core_header_cache = kmem_cache_create("qeth_hdr",
4505 sizeof(struct qeth_hdr) + ETH_HLEN, 64, 0, NULL);
4506 if (!qeth_core_header_cache) {
4513 s390_root_dev_unregister(qeth_core_root_dev);
4515 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4516 &driver_attr_group);
4518 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4520 ccw_driver_unregister(&qeth_ccw_driver);
4522 QETH_DBF_MESSAGE(2, "Initialization failed with code %d\n", rc);
4523 qeth_unregister_dbf_views();
4525 pr_err("Initializing the qeth device driver failed\n");
4529 static void __exit qeth_core_exit(void)
4531 s390_root_dev_unregister(qeth_core_root_dev);
4532 driver_remove_file(&qeth_core_ccwgroup_driver.driver,
4533 &driver_attr_group);
4534 ccwgroup_driver_unregister(&qeth_core_ccwgroup_driver);
4535 ccw_driver_unregister(&qeth_ccw_driver);
4536 kmem_cache_destroy(qeth_core_header_cache);
4537 qeth_unregister_dbf_views();
4538 pr_info("core functions removed\n");
4541 module_init(qeth_core_init);
4542 module_exit(qeth_core_exit);
4543 MODULE_AUTHOR("Frank Blaschka <frank.blaschka@de.ibm.com>");
4544 MODULE_DESCRIPTION("qeth core functions");
4545 MODULE_LICENSE("GPL");