Merge branch 'upstream'
[linux-2.6] / arch / powerpc / platforms / cell / spider-pic.c
1 /*
2  * External Interrupt Controller on Spider South Bridge
3  *
4  * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
5  *
6  * Author: Arnd Bergmann <arndb@de.ibm.com>
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2, or (at your option)
11  * any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21  */
22
23 #include <linux/interrupt.h>
24 #include <linux/irq.h>
25
26 #include <asm/pgtable.h>
27 #include <asm/prom.h>
28 #include <asm/io.h>
29
30 #include "interrupt.h"
31
32 /* register layout taken from Spider spec, table 7.4-4 */
33 enum {
34         TIR_DEN         = 0x004, /* Detection Enable Register */
35         TIR_MSK         = 0x084, /* Mask Level Register */
36         TIR_EDC         = 0x0c0, /* Edge Detection Clear Register */
37         TIR_PNDA        = 0x100, /* Pending Register A */
38         TIR_PNDB        = 0x104, /* Pending Register B */
39         TIR_CS          = 0x144, /* Current Status Register */
40         TIR_LCSA        = 0x150, /* Level Current Status Register A */
41         TIR_LCSB        = 0x154, /* Level Current Status Register B */
42         TIR_LCSC        = 0x158, /* Level Current Status Register C */
43         TIR_LCSD        = 0x15c, /* Level Current Status Register D */
44         TIR_CFGA        = 0x200, /* Setting Register A0 */
45         TIR_CFGB        = 0x204, /* Setting Register B0 */
46                         /* 0x208 ... 0x3ff Setting Register An/Bn */
47         TIR_PPNDA       = 0x400, /* Packet Pending Register A */
48         TIR_PPNDB       = 0x404, /* Packet Pending Register B */
49         TIR_PIERA       = 0x408, /* Packet Output Error Register A */
50         TIR_PIERB       = 0x40c, /* Packet Output Error Register B */
51         TIR_PIEN        = 0x444, /* Packet Output Enable Register */
52         TIR_PIPND       = 0x454, /* Packet Output Pending Register */
53         TIRDID          = 0x484, /* Spider Device ID Register */
54         REISTIM         = 0x500, /* Reissue Command Timeout Time Setting */
55         REISTIMEN       = 0x504, /* Reissue Command Timeout Setting */
56         REISWAITEN      = 0x508, /* Reissue Wait Control*/
57 };
58
59 static void __iomem *spider_pics[4];
60
61 static void __iomem *spider_get_pic(int irq)
62 {
63         int node = irq / IIC_NODE_STRIDE;
64         irq %= IIC_NODE_STRIDE;
65
66         if (irq >= IIC_EXT_OFFSET &&
67             irq < IIC_EXT_OFFSET + IIC_NUM_EXT &&
68             spider_pics)
69                 return spider_pics[node];
70         return NULL;
71 }
72
73 static int spider_get_nr(unsigned int irq)
74 {
75         return (irq % IIC_NODE_STRIDE) - IIC_EXT_OFFSET;
76 }
77
78 static void __iomem *spider_get_irq_config(int irq)
79 {
80         void __iomem *pic;
81         pic = spider_get_pic(irq);
82         return pic + TIR_CFGA + 8 * spider_get_nr(irq);
83 }
84
85 static void spider_enable_irq(unsigned int irq)
86 {
87         int nodeid = (irq / IIC_NODE_STRIDE) * 0x10;
88         void __iomem *cfg = spider_get_irq_config(irq);
89         irq = spider_get_nr(irq);
90
91         out_be32(cfg, (in_be32(cfg) & ~0xf0)| 0x3107000eu | nodeid);
92         out_be32(cfg + 4, in_be32(cfg + 4) | 0x00020000u | irq);
93 }
94
95 static void spider_disable_irq(unsigned int irq)
96 {
97         void __iomem *cfg = spider_get_irq_config(irq);
98         irq = spider_get_nr(irq);
99
100         out_be32(cfg, in_be32(cfg) & ~0x30000000u);
101 }
102
103 static unsigned int spider_startup_irq(unsigned int irq)
104 {
105         spider_enable_irq(irq);
106         return 0;
107 }
108
109 static void spider_shutdown_irq(unsigned int irq)
110 {
111         spider_disable_irq(irq);
112 }
113
114 static void spider_end_irq(unsigned int irq)
115 {
116         spider_enable_irq(irq);
117 }
118
119 static void spider_ack_irq(unsigned int irq)
120 {
121         spider_disable_irq(irq);
122         iic_local_enable();
123 }
124
125 static struct hw_interrupt_type spider_pic = {
126         .typename = " SPIDER   ",
127         .startup = spider_startup_irq,
128         .shutdown = spider_shutdown_irq,
129         .enable = spider_enable_irq,
130         .disable = spider_disable_irq,
131         .ack = spider_ack_irq,
132         .end = spider_end_irq,
133 };
134
135 int spider_get_irq(int node)
136 {
137         unsigned long cs;
138         void __iomem *regs = spider_pics[node];
139
140         cs = in_be32(regs + TIR_CS) >> 24;
141
142         if (cs == 63)
143                 return -1;
144         else
145                 return cs;
146 }
147
148 /* hardcoded part to be compatible with older firmware */
149
150 void spider_init_IRQ_hardcoded(void)
151 {
152         int node;
153         long spiderpic;
154         long pics[] = { 0x24000008000, 0x34000008000 };
155         int n;
156
157         pr_debug("%s(%d): Using hardcoded defaults\n", __FUNCTION__, __LINE__);
158
159         for (node = 0; node < num_present_cpus()/2; node++) {
160                 spiderpic = pics[node];
161                 printk(KERN_DEBUG "SPIDER addr: %lx\n", spiderpic);
162                 spider_pics[node] = ioremap(spiderpic, 0x800);
163                 for (n = 0; n < IIC_NUM_EXT; n++) {
164                         int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
165                         get_irq_desc(irq)->handler = &spider_pic;
166                 }
167
168                 /* do not mask any interrupts because of level */
169                 out_be32(spider_pics[node] + TIR_MSK, 0x0);
170
171                 /* disable edge detection clear */
172                 /* out_be32(spider_pics[node] + TIR_EDC, 0x0); */
173
174                 /* enable interrupt packets to be output */
175                 out_be32(spider_pics[node] + TIR_PIEN,
176                         in_be32(spider_pics[node] + TIR_PIEN) | 0x1);
177
178                 /* Enable the interrupt detection enable bit. Do this last! */
179                 out_be32(spider_pics[node] + TIR_DEN,
180                         in_be32(spider_pics[node] + TIR_DEN) | 0x1);
181         }
182 }
183
184 void spider_init_IRQ(void)
185 {
186         long spider_reg;
187         struct device_node *dn;
188         char *compatible;
189         int n, node = 0;
190
191         for (dn = NULL; (dn = of_find_node_by_name(dn, "interrupt-controller"));) {
192                 compatible = (char *)get_property(dn, "compatible", NULL);
193
194                 if (!compatible)
195                         continue;
196
197                 if (strstr(compatible, "CBEA,platform-spider-pic"))
198                         spider_reg = *(long *)get_property(dn,"reg", NULL);
199                 else if (strstr(compatible, "sti,platform-spider-pic")) {
200                         spider_init_IRQ_hardcoded();
201                         return;
202                 } else
203                         continue;
204
205                 if (!spider_reg)
206                         printk("interrupt controller does not have reg property !\n");
207
208                 n = prom_n_addr_cells(dn);
209
210                 if ( n != 2)
211                         printk("reg property with invalid number of elements \n");
212
213                 spider_pics[node] = ioremap(spider_reg, 0x800);
214
215                 printk("SPIDER addr: %lx with %i addr_cells mapped to %p\n",
216                        spider_reg, n, spider_pics[node]);
217
218                 for (n = 0; n < IIC_NUM_EXT; n++) {
219                         int irq = n + IIC_EXT_OFFSET + node * IIC_NODE_STRIDE;
220                         get_irq_desc(irq)->handler = &spider_pic;
221                 }
222
223                 /* do not mask any interrupts because of level */
224                 out_be32(spider_pics[node] + TIR_MSK, 0x0);
225
226                 /* disable edge detection clear */
227                 /* out_be32(spider_pics[node] + TIR_EDC, 0x0); */
228
229                 /* enable interrupt packets to be output */
230                 out_be32(spider_pics[node] + TIR_PIEN,
231                         in_be32(spider_pics[node] + TIR_PIEN) | 0x1);
232
233                 /* Enable the interrupt detection enable bit. Do this last! */
234                 out_be32(spider_pics[node] + TIR_DEN,
235                         in_be32(spider_pics[node] + TIR_DEN) | 0x1);
236
237                 node++;
238         }
239 }