git.oblomov.eu Git - linux-2.6/blob - sound/oss/esssolo1.c

   1 /****************************************************************************/
   2
   3 /*
   4  *      esssolo1.c  --  ESS Technology Solo1 (ES1946) audio driver.
   5  *
   6  *      Copyright (C) 1998-2001, 2003  Thomas Sailer (t.sailer@alumni.ethz.ch)
   7  *
   8  *      This program is free software; you can redistribute it and/or modify
   9  *      it under the terms of the GNU General Public License as published by
  10  *      the Free Software Foundation; either version 2 of the License, or
  11  *      (at your option) any later version.
  12  *
  13  *      This program is distributed in the hope that it will be useful,
  14  *      but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  *      MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  *      GNU General Public License for more details.
  17  *
  18  *      You should have received a copy of the GNU General Public License
  19  *      along with this program; if not, write to the Free Software
  20  *      Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  21  *
  22  * Module command line parameters:
  23  *   none so far
  24  *
  25  *  Supported devices:
  26  *  /dev/dsp    standard /dev/dsp device, (mostly) OSS compatible
  27  *  /dev/mixer  standard /dev/mixer device, (mostly) OSS compatible
  28  *  /dev/midi   simple MIDI UART interface, no ioctl
  29  *
  30  *  Revision history
  31  *    10.11.1998   0.1   Initial release (without any hardware)
  32  *    22.03.1999   0.2   cinfo.blocks should be reset after GETxPTR ioctl.
  33  *                       reported by Johan Maes <joma@telindus.be>
  34  *                       return EAGAIN instead of EBUSY when O_NONBLOCK
  35  *                       read/write cannot be executed
  36  *    07.04.1999   0.3   implemented the following ioctl's: SOUND_PCM_READ_RATE,
  37  *                       SOUND_PCM_READ_CHANNELS, SOUND_PCM_READ_BITS;
  38  *                       Alpha fixes reported by Peter Jones <pjones@redhat.com>
  39  *    15.06.1999   0.4   Fix bad allocation bug.
  40  *                       Thanks to Deti Fliegl <fliegl@in.tum.de>
  41  *    28.06.1999   0.5   Add pci_set_master
  42  *    12.08.1999   0.6   Fix MIDI UART crashing the driver
  43  *                       Changed mixer semantics from OSS documented
  44  *                       behaviour to OSS "code behaviour".
  45  *                       Recording might actually work now.
  46  *                       The real DDMA controller address register is at PCI config
  47  *                       0x60, while the register at 0x18 is used as a placeholder
  48  *                       register for BIOS address allocation. This register
  49  *                       is supposed to be copied into 0x60, according
  50  *                       to the Solo1 datasheet. When I do that, I can access
  51  *                       the DDMA registers except the mask bit, which
  52  *                       is stuck at 1. When I copy the contents of 0x18 +0x10
  53  *                       to the DDMA base register, everything seems to work.
  54  *                       The fun part is that the Windows Solo1 driver doesn't
  55  *                       seem to do these tricks.
  56  *                       Bugs remaining: plops and clicks when starting/stopping playback
  57  *    31.08.1999   0.7   add spin_lock_init
  58  *                       replaced current->state = x with set_current_state(x)
  59  *    03.09.1999   0.8   change read semantics for MIDI to match
  60  *                       OSS more closely; remove possible wakeup race
  61  *    07.10.1999   0.9   Fix initialization; complain if sequencer writes time out
  62  *                       Revised resource grabbing for the FM synthesizer
  63  *    28.10.1999   0.10  More waitqueue races fixed
  64  *    09.12.1999   0.11  Work around stupid Alpha port issue (virt_to_bus(kmalloc(GFP_DMA)) > 16M)
  65  *                       Disabling recording on Alpha
  66  *    12.01.2000   0.12  Prevent some ioctl's from returning bad count values on underrun/overrun;
  67  *                       Tim Janik's BSE (Bedevilled Sound Engine) found this
  68  *                       Integrated (aka redid 8-)) APM support patch by Zach Brown
  69  *    07.02.2000   0.13  Use pci_alloc_consistent and pci_register_driver
  70  *    19.02.2000   0.14  Use pci_dma_supported to determine if recording should be disabled
  71  *    13.03.2000   0.15  Reintroduce initialization of a couple of PCI config space registers
  72  *    21.11.2000   0.16  Initialize dma buffers in poll, otherwise poll may return a bogus mask
  73  *    12.12.2000   0.17  More dma buffer initializations, patch from
  74  *                       Tjeerd Mulder <tjeerd.mulder@fujitsu-siemens.com>
  75  *    31.01.2001   0.18  Register/Unregister gameport, original patch from
  76  *                       Nathaniel Daw <daw@cs.cmu.edu>
  77  *                       Fix SETTRIGGER non OSS API conformity
  78  *    10.03.2001         provide abs function, prevent picking up a bogus kernel macro
  79  *                       for abs. Bug report by Andrew Morton <andrewm@uow.edu.au>
  80  *    15.05.2001         pci_enable_device moved, return values in probe cleaned
  81  *                       up. Marcus Meissner <mm@caldera.de>
  82  *    22.05.2001   0.19  more cleanups, changed PM to PCI 2.4 style, got rid
  83  *                       of global list of devices, using pci device data.
  84  *                       Marcus Meissner <mm@caldera.de>
  85  *    03.01.2003   0.20  open_mode fixes from Georg Acher <acher@in.tum.de>
  86  */
  87
  88 /*****************************************************************************/
  89
  90 #include <linux/interrupt.h>
  91 #include <linux/module.h>
  92 #include <linux/string.h>
  93 #include <linux/ioport.h>
  94 #include <linux/sched.h>
  95 #include <linux/delay.h>
  96 #include <linux/sound.h>
  97 #include <linux/slab.h>
  98 #include <linux/soundcard.h>
  99 #include <linux/pci.h>
 100 #include <linux/bitops.h>
 101 #include <linux/init.h>
 102 #include <linux/poll.h>
 103 #include <linux/spinlock.h>
 104 #include <linux/smp_lock.h>
 105 #include <linux/gameport.h>
 106 #include <linux/wait.h>
 107 #include <linux/dma-mapping.h>
 108
 109 #include <asm/io.h>
 110 #include <asm/page.h>
 111 #include <asm/uaccess.h>
 112
 113 #include "dm.h"
 114
 115 /* --------------------------------------------------------------------- */
 116
 117 #undef OSS_DOCUMENTED_MIXER_SEMANTICS
 118
 119 /* --------------------------------------------------------------------- */
 120
 121 #ifndef PCI_VENDOR_ID_ESS
 122 #define PCI_VENDOR_ID_ESS         0x125d
 123 #endif
 124 #ifndef PCI_DEVICE_ID_ESS_SOLO1
 125 #define PCI_DEVICE_ID_ESS_SOLO1   0x1969
 126 #endif
 127
 128 #define SOLO1_MAGIC  ((PCI_VENDOR_ID_ESS<<16)|PCI_DEVICE_ID_ESS_SOLO1)
 129
 130 #define DDMABASE_OFFSET           0    /* chip bug workaround kludge */
 131 #define DDMABASE_EXTENT           16
 132
 133 #define IOBASE_EXTENT             16
 134 #define SBBASE_EXTENT             16
 135 #define VCBASE_EXTENT             (DDMABASE_EXTENT+DDMABASE_OFFSET)
 136 #define MPUBASE_EXTENT            4
 137 #define GPBASE_EXTENT             4
 138 #define GAMEPORT_EXTENT           4
 139
 140 #define FMSYNTH_EXTENT            4
 141
 142 /* MIDI buffer sizes */
 143
 144 #define MIDIINBUF  256
 145 #define MIDIOUTBUF 256
 146
 147 #define FMODE_MIDI_SHIFT 3
 148 #define FMODE_MIDI_READ  (FMODE_READ << FMODE_MIDI_SHIFT)
 149 #define FMODE_MIDI_WRITE (FMODE_WRITE << FMODE_MIDI_SHIFT)
 150
 151 #define FMODE_DMFM 0x10
 152
 153 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
 154 #define SUPPORT_JOYSTICK 1
 155 #endif
 156
 157 static struct pci_driver solo1_driver;
 158
 159 /* --------------------------------------------------------------------- */
 160
 161 struct solo1_state {
 162         /* magic */
 163         unsigned int magic;
 164
 165         /* the corresponding pci_dev structure */
 166         struct pci_dev *dev;
 167
 168         /* soundcore stuff */
 169         int dev_audio;
 170         int dev_mixer;
 171         int dev_midi;
 172         int dev_dmfm;
 173
 174         /* hardware resources */
 175         unsigned long iobase, sbbase, vcbase, ddmabase, mpubase; /* long for SPARC */
 176         unsigned int irq;
 177
 178         /* mixer registers */
 179         struct {
 180                 unsigned short vol[10];
 181                 unsigned int recsrc;
 182                 unsigned int modcnt;
 183                 unsigned short micpreamp;
 184         } mix;
 185
 186         /* wave stuff */
 187         unsigned fmt;
 188         unsigned channels;
 189         unsigned rate;
 190         unsigned char clkdiv;
 191         unsigned ena;
 192
 193         spinlock_t lock;
 194         struct semaphore open_sem;
 195         mode_t open_mode;
 196         wait_queue_head_t open_wait;
 197
 198         struct dmabuf {
 199                 void *rawbuf;
 200                 dma_addr_t dmaaddr;
 201                 unsigned buforder;
 202                 unsigned numfrag;
 203                 unsigned fragshift;
 204                 unsigned hwptr, swptr;
 205                 unsigned total_bytes;
 206                 int count;
 207                 unsigned error; /* over/underrun */
 208                 wait_queue_head_t wait;
 209                 /* redundant, but makes calculations easier */
 210                 unsigned fragsize;
 211                 unsigned dmasize;
 212                 unsigned fragsamples;
 213                 /* OSS stuff */
 214                 unsigned mapped:1;
 215                 unsigned ready:1;
 216                 unsigned endcleared:1;
 217                 unsigned enabled:1;
 218                 unsigned ossfragshift;
 219                 int ossmaxfrags;
 220                 unsigned subdivision;
 221         } dma_dac, dma_adc;
 222
 223         /* midi stuff */
 224         struct {
 225                 unsigned ird, iwr, icnt;
 226                 unsigned ord, owr, ocnt;
 227                 wait_queue_head_t iwait;
 228                 wait_queue_head_t owait;
 229                 struct timer_list timer;
 230                 unsigned char ibuf[MIDIINBUF];
 231                 unsigned char obuf[MIDIOUTBUF];
 232         } midi;
 233
 234 #if SUPPORT_JOYSTICK
 235         struct gameport *gameport;
 236 #endif
 237 };
 238
 239 /* --------------------------------------------------------------------- */
 240
 241 static inline void write_seq(struct solo1_state *s, unsigned char data)
 242 {
 243         int i;
 244         unsigned long flags;
 245
 246         /* the local_irq_save stunt is to send the data within the command window */
 247         for (i = 0; i < 0xffff; i++) {
 248                 local_irq_save(flags);
 249                 if (!(inb(s->sbbase+0xc) & 0x80)) {
 250                         outb(data, s->sbbase+0xc);
 251                         local_irq_restore(flags);
 252                         return;
 253                 }
 254                 local_irq_restore(flags);
 255         }
 256         printk(KERN_ERR "esssolo1: write_seq timeout\n");
 257         outb(data, s->sbbase+0xc);
 258 }
 259
 260 static inline int read_seq(struct solo1_state *s, unsigned char *data)
 261 {
 262         int i;
 263
 264         if (!data)
 265                 return 0;
 266         for (i = 0; i < 0xffff; i++)
 267                 if (inb(s->sbbase+0xe) & 0x80) {
 268                         *data = inb(s->sbbase+0xa);
 269                         return 1;
 270                 }
 271         printk(KERN_ERR "esssolo1: read_seq timeout\n");
 272         return 0;
 273 }
 274
 275 static inline int reset_ctrl(struct solo1_state *s)
 276 {
 277         int i;
 278
 279         outb(3, s->sbbase+6); /* clear sequencer and FIFO */
 280         udelay(10);
 281         outb(0, s->sbbase+6);
 282         for (i = 0; i < 0xffff; i++)
 283                 if (inb(s->sbbase+0xe) & 0x80)
 284                         if (inb(s->sbbase+0xa) == 0xaa) {
 285                                 write_seq(s, 0xc6); /* enter enhanced mode */
 286                                 return 1;
 287                         }
 288         return 0;
 289 }
 290
 291 static void write_ctrl(struct solo1_state *s, unsigned char reg, unsigned char data)
 292 {
 293         write_seq(s, reg);
 294         write_seq(s, data);
 295 }
 296
 297 #if 0 /* unused */
 298 static unsigned char read_ctrl(struct solo1_state *s, unsigned char reg)
 299 {
 300         unsigned char r;
 301
 302         write_seq(s, 0xc0);
 303         write_seq(s, reg);
 304         read_seq(s, &r);
 305         return r;
 306 }
 307 #endif /* unused */
 308
 309 static void write_mixer(struct solo1_state *s, unsigned char reg, unsigned char data)
 310 {
 311         outb(reg, s->sbbase+4);
 312         outb(data, s->sbbase+5);
 313 }
 314
 315 static unsigned char read_mixer(struct solo1_state *s, unsigned char reg)
 316 {
 317         outb(reg, s->sbbase+4);
 318         return inb(s->sbbase+5);
 319 }
 320
 321 /* --------------------------------------------------------------------- */
 322
 323 static inline unsigned ld2(unsigned int x)
 324 {
 325         unsigned r = 0;
 326
 327         if (x >= 0x10000) {
 328                 x >>= 16;
 329                 r += 16;
 330         }
 331         if (x >= 0x100) {
 332                 x >>= 8;
 333                 r += 8;
 334         }
 335         if (x >= 0x10) {
 336                 x >>= 4;
 337                 r += 4;
 338         }
 339         if (x >= 4) {
 340                 x >>= 2;
 341                 r += 2;
 342         }
 343         if (x >= 2)
 344                 r++;
 345         return r;
 346 }
 347
 348 /* --------------------------------------------------------------------- */
 349
 350 static inline void stop_dac(struct solo1_state *s)
 351 {
 352         unsigned long flags;
 353
 354         spin_lock_irqsave(&s->lock, flags);
 355         s->ena &= ~FMODE_WRITE;
 356         write_mixer(s, 0x78, 0x10);
 357         spin_unlock_irqrestore(&s->lock, flags);
 358 }
 359
 360 static void start_dac(struct solo1_state *s)
 361 {
 362         unsigned long flags;
 363
 364         spin_lock_irqsave(&s->lock, flags);
 365         if (!(s->ena & FMODE_WRITE) && (s->dma_dac.mapped || s->dma_dac.count > 0) && s->dma_dac.ready) {
 366                 s->ena |= FMODE_WRITE;
 367                 write_mixer(s, 0x78, 0x12);
 368                 udelay(10);
 369                 write_mixer(s, 0x78, 0x13);
 370         }
 371         spin_unlock_irqrestore(&s->lock, flags);
 372 }
 373
 374 static inline void stop_adc(struct solo1_state *s)
 375 {
 376         unsigned long flags;
 377
 378         spin_lock_irqsave(&s->lock, flags);
 379         s->ena &= ~FMODE_READ;
 380         write_ctrl(s, 0xb8, 0xe);
 381         spin_unlock_irqrestore(&s->lock, flags);
 382 }
 383
 384 static void start_adc(struct solo1_state *s)
 385 {
 386         unsigned long flags;
 387
 388         spin_lock_irqsave(&s->lock, flags);
 389         if (!(s->ena & FMODE_READ) && (s->dma_adc.mapped || s->dma_adc.count < (signed)(s->dma_adc.dmasize - 2*s->dma_adc.fragsize))
 390             && s->dma_adc.ready) {
 391                 s->ena |= FMODE_READ;
 392                 write_ctrl(s, 0xb8, 0xf);
 393 #if 0
 394                 printk(KERN_DEBUG "solo1: DMAbuffer: 0x%08lx\n", (long)s->dma_adc.rawbuf);
 395                 printk(KERN_DEBUG "solo1: DMA: mask: 0x%02x cnt: 0x%04x addr: 0x%08x  stat: 0x%02x\n",
 396                        inb(s->ddmabase+0xf), inw(s->ddmabase+4), inl(s->ddmabase), inb(s->ddmabase+8));
 397 #endif
 398                 outb(0, s->ddmabase+0xd); /* master reset */
 399                 outb(1, s->ddmabase+0xf);  /* mask */
 400                 outb(0x54/*0x14*/, s->ddmabase+0xb);  /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
 401                 outl(virt_to_bus(s->dma_adc.rawbuf), s->ddmabase);
 402                 outw(s->dma_adc.dmasize-1, s->ddmabase+4);
 403                 outb(0, s->ddmabase+0xf);
 404         }
 405         spin_unlock_irqrestore(&s->lock, flags);
 406 #if 0
 407         printk(KERN_DEBUG "solo1: start DMA: reg B8: 0x%02x  SBstat: 0x%02x\n"
 408                KERN_DEBUG "solo1: DMA: stat: 0x%02x  cnt: 0x%04x  mask: 0x%02x\n",
 409                read_ctrl(s, 0xb8), inb(s->sbbase+0xc),
 410                inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->ddmabase+0xf));
 411         printk(KERN_DEBUG "solo1: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
 412                KERN_DEBUG "solo1: B1: 0x%02x  B2: 0x%02x  B4: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n",
 413                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
 414                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb4), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8),
 415                read_ctrl(s, 0xb9));
 416 #endif
 417 }
 418
 419 /* --------------------------------------------------------------------- */
 420
 421 #define DMABUF_DEFAULTORDER (15-PAGE_SHIFT)
 422 #define DMABUF_MINORDER 1
 423
 424 static inline void dealloc_dmabuf(struct solo1_state *s, struct dmabuf *db)
 425 {
 426         struct page *page, *pend;
 427
 428         if (db->rawbuf) {
 429                 /* undo marking the pages as reserved */
 430                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 431                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 432                         ClearPageReserved(page);
 433                 pci_free_consistent(s->dev, PAGE_SIZE << db->buforder, db->rawbuf, db->dmaaddr);
 434         }
 435         db->rawbuf = NULL;
 436         db->mapped = db->ready = 0;
 437 }
 438
 439 static int prog_dmabuf(struct solo1_state *s, struct dmabuf *db)
 440 {
 441         int order;
 442         unsigned bytespersec;
 443         unsigned bufs, sample_shift = 0;
 444         struct page *page, *pend;
 445
 446         db->hwptr = db->swptr = db->total_bytes = db->count = db->error = db->endcleared = 0;
 447         if (!db->rawbuf) {
 448                 db->ready = db->mapped = 0;
 449                 for (order = DMABUF_DEFAULTORDER; order >= DMABUF_MINORDER; order--)
 450                         if ((db->rawbuf = pci_alloc_consistent(s->dev, PAGE_SIZE << order, &db->dmaaddr)))
 451                                 break;
 452                 if (!db->rawbuf)
 453                         return -ENOMEM;
 454                 db->buforder = order;
 455                 /* now mark the pages as reserved; otherwise remap_pfn_range doesn't do what we want */
 456                 pend = virt_to_page(db->rawbuf + (PAGE_SIZE << db->buforder) - 1);
 457                 for (page = virt_to_page(db->rawbuf); page <= pend; page++)
 458                         SetPageReserved(page);
 459         }
 460         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 461                 sample_shift++;
 462         if (s->channels > 1)
 463                 sample_shift++;
 464         bytespersec = s->rate << sample_shift;
 465         bufs = PAGE_SIZE << db->buforder;
 466         if (db->ossfragshift) {
 467                 if ((1000 << db->ossfragshift) < bytespersec)
 468                         db->fragshift = ld2(bytespersec/1000);
 469                 else
 470                         db->fragshift = db->ossfragshift;
 471         } else {
 472                 db->fragshift = ld2(bytespersec/100/(db->subdivision ? db->subdivision : 1));
 473                 if (db->fragshift < 3)
 474                         db->fragshift = 3;
 475         }
 476         db->numfrag = bufs >> db->fragshift;
 477         while (db->numfrag < 4 && db->fragshift > 3) {
 478                 db->fragshift--;
 479                 db->numfrag = bufs >> db->fragshift;
 480         }
 481         db->fragsize = 1 << db->fragshift;
 482         if (db->ossmaxfrags >= 4 && db->ossmaxfrags < db->numfrag)
 483                 db->numfrag = db->ossmaxfrags;
 484         db->fragsamples = db->fragsize >> sample_shift;
 485         db->dmasize = db->numfrag << db->fragshift;
 486         db->enabled = 1;
 487         return 0;
 488 }
 489
 490 static inline int prog_dmabuf_adc(struct solo1_state *s)
 491 {
 492         unsigned long va;
 493         int c;
 494
 495         stop_adc(s);
 496         /* check if PCI implementation supports 24bit busmaster DMA */
 497         if (s->dev->dma_mask > 0xffffff)
 498                 return -EIO;
 499         if ((c = prog_dmabuf(s, &s->dma_adc)))
 500                 return c;
 501         va = s->dma_adc.dmaaddr;
 502         if ((va & ~((1<<24)-1)))
 503                 panic("solo1: buffer above 16M boundary");
 504         outb(0, s->ddmabase+0xd);  /* clear */
 505         outb(1, s->ddmabase+0xf); /* mask */
 506         /*outb(0, s->ddmabase+8);*/  /* enable (enable is active low!) */
 507         outb(0x54, s->ddmabase+0xb);  /* DMA_MODE_READ | DMA_MODE_AUTOINIT */
 508         outl(va, s->ddmabase);
 509         outw(s->dma_adc.dmasize-1, s->ddmabase+4);
 510         c = - s->dma_adc.fragsamples;
 511         write_ctrl(s, 0xa4, c);
 512         write_ctrl(s, 0xa5, c >> 8);
 513         outb(0, s->ddmabase+0xf);
 514         s->dma_adc.ready = 1;
 515         return 0;
 516 }
 517
 518 static inline int prog_dmabuf_dac(struct solo1_state *s)
 519 {
 520         unsigned long va;
 521         int c;
 522
 523         stop_dac(s);
 524         if ((c = prog_dmabuf(s, &s->dma_dac)))
 525                 return c;
 526         memset(s->dma_dac.rawbuf, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80, s->dma_dac.dmasize); /* almost correct for U16 */
 527         va = s->dma_dac.dmaaddr;
 528         if ((va ^ (va + s->dma_dac.dmasize - 1)) & ~((1<<20)-1))
 529                 panic("solo1: buffer crosses 1M boundary");
 530         outl(va, s->iobase);
 531         /* warning: s->dma_dac.dmasize & 0xffff must not be zero! i.e. this limits us to a 32k buffer */
 532         outw(s->dma_dac.dmasize, s->iobase+4);
 533         c = - s->dma_dac.fragsamples;
 534         write_mixer(s, 0x74, c);
 535         write_mixer(s, 0x76, c >> 8);
 536         outb(0xa, s->iobase+6);
 537         s->dma_dac.ready = 1;
 538         return 0;
 539 }
 540
 541 static inline void clear_advance(void *buf, unsigned bsize, unsigned bptr, unsigned len, unsigned char c)
 542 {
 543         if (bptr + len > bsize) {
 544                 unsigned x = bsize - bptr;
 545                 memset(((char *)buf) + bptr, c, x);
 546                 bptr = 0;
 547                 len -= x;
 548         }
 549         memset(((char *)buf) + bptr, c, len);
 550 }
 551
 552 /* call with spinlock held! */
 553
 554 static void solo1_update_ptr(struct solo1_state *s)
 555 {
 556         int diff;
 557         unsigned hwptr;
 558
 559         /* update ADC pointer */
 560         if (s->ena & FMODE_READ) {
 561                 hwptr = (s->dma_adc.dmasize - 1 - inw(s->ddmabase+4)) % s->dma_adc.dmasize;
 562                 diff = (s->dma_adc.dmasize + hwptr - s->dma_adc.hwptr) % s->dma_adc.dmasize;
 563                 s->dma_adc.hwptr = hwptr;
 564                 s->dma_adc.total_bytes += diff;
 565                 s->dma_adc.count += diff;
 566 #if 0
 567                 printk(KERN_DEBUG "solo1: rd: hwptr %u swptr %u dmasize %u count %u\n",
 568                        s->dma_adc.hwptr, s->dma_adc.swptr, s->dma_adc.dmasize, s->dma_adc.count);
 569 #endif
 570                 if (s->dma_adc.mapped) {
 571                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
 572                                 wake_up(&s->dma_adc.wait);
 573                 } else {
 574                         if (s->dma_adc.count > (signed)(s->dma_adc.dmasize - ((3 * s->dma_adc.fragsize) >> 1))) {
 575                                 s->ena &= ~FMODE_READ;
 576                                 write_ctrl(s, 0xb8, 0xe);
 577                                 s->dma_adc.error++;
 578                         }
 579                         if (s->dma_adc.count > 0)
 580                                 wake_up(&s->dma_adc.wait);
 581                 }
 582         }
 583         /* update DAC pointer */
 584         if (s->ena & FMODE_WRITE) {
 585                 hwptr = (s->dma_dac.dmasize - inw(s->iobase+4)) % s->dma_dac.dmasize;
 586                 diff = (s->dma_dac.dmasize + hwptr - s->dma_dac.hwptr) % s->dma_dac.dmasize;
 587                 s->dma_dac.hwptr = hwptr;
 588                 s->dma_dac.total_bytes += diff;
 589 #if 0
 590                 printk(KERN_DEBUG "solo1: wr: hwptr %u swptr %u dmasize %u count %u\n",
 591                        s->dma_dac.hwptr, s->dma_dac.swptr, s->dma_dac.dmasize, s->dma_dac.count);
 592 #endif
 593                 if (s->dma_dac.mapped) {
 594                         s->dma_dac.count += diff;
 595                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
 596                                 wake_up(&s->dma_dac.wait);
 597                 } else {
 598                         s->dma_dac.count -= diff;
 599                         if (s->dma_dac.count <= 0) {
 600                                 s->ena &= ~FMODE_WRITE;
 601                                 write_mixer(s, 0x78, 0x12);
 602                                 s->dma_dac.error++;
 603                         } else if (s->dma_dac.count <= (signed)s->dma_dac.fragsize && !s->dma_dac.endcleared) {
 604                                 clear_advance(s->dma_dac.rawbuf, s->dma_dac.dmasize, s->dma_dac.swptr,
 605                                               s->dma_dac.fragsize, (s->fmt & (AFMT_U8 | AFMT_U16_LE)) ? 0 : 0x80);
 606                                 s->dma_dac.endcleared = 1;
 607                         }
 608                         if (s->dma_dac.count < (signed)s->dma_dac.dmasize)
 609                                 wake_up(&s->dma_dac.wait);
 610                 }
 611         }
 612 }
 613
 614 /* --------------------------------------------------------------------- */
 615
 616 static void prog_codec(struct solo1_state *s)
 617 {
 618         unsigned long flags;
 619         int fdiv, filter;
 620         unsigned char c;
 621
 622         reset_ctrl(s);
 623         write_seq(s, 0xd3);
 624         /* program sampling rates */
 625         filter = s->rate * 9 / 20; /* Set filter roll-off to 90% of rate/2 */
 626         fdiv = 256 - 7160000 / (filter * 82);
 627         spin_lock_irqsave(&s->lock, flags);
 628         write_ctrl(s, 0xa1, s->clkdiv);
 629         write_ctrl(s, 0xa2, fdiv);
 630         write_mixer(s, 0x70, s->clkdiv);
 631         write_mixer(s, 0x72, fdiv);
 632         /* program ADC parameters */
 633         write_ctrl(s, 0xb8, 0xe);
 634         write_ctrl(s, 0xb9, /*0x1*/0);
 635         write_ctrl(s, 0xa8, (s->channels > 1) ? 0x11 : 0x12);
 636         c = 0xd0;
 637         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 638                 c |= 0x04;
 639         if (s->fmt & (AFMT_S16_LE | AFMT_S8))
 640                 c |= 0x20;
 641         if (s->channels > 1)
 642                 c ^= 0x48;
 643         write_ctrl(s, 0xb7, (c & 0x70) | 1);
 644         write_ctrl(s, 0xb7, c);
 645         write_ctrl(s, 0xb1, 0x50);
 646         write_ctrl(s, 0xb2, 0x50);
 647         /* program DAC parameters */
 648         c = 0x40;
 649         if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 650                 c |= 1;
 651         if (s->fmt & (AFMT_S16_LE | AFMT_S8))
 652                 c |= 4;
 653         if (s->channels > 1)
 654                 c |= 2;
 655         write_mixer(s, 0x7a, c);
 656         write_mixer(s, 0x78, 0x10);
 657         s->ena = 0;
 658         spin_unlock_irqrestore(&s->lock, flags);
 659 }
 660
 661 /* --------------------------------------------------------------------- */
 662
 663 static const char invalid_magic[] = KERN_CRIT "solo1: invalid magic value\n";
 664
 665 #define VALIDATE_STATE(s)                         \
 666 ({                                                \
 667         if (!(s) || (s)->magic != SOLO1_MAGIC) { \
 668                 printk(invalid_magic);            \
 669                 return -ENXIO;                    \
 670         }                                         \
 671 })
 672
 673 /* --------------------------------------------------------------------- */
 674
 675 static int mixer_ioctl(struct solo1_state *s, unsigned int cmd, unsigned long arg)
 676 {
 677         static const unsigned int mixer_src[8] = {
 678                 SOUND_MASK_MIC, SOUND_MASK_MIC, SOUND_MASK_CD, SOUND_MASK_VOLUME,
 679                 SOUND_MASK_MIC, 0, SOUND_MASK_LINE, 0
 680         };
 681         static const unsigned char mixtable1[SOUND_MIXER_NRDEVICES] = {
 682                 [SOUND_MIXER_PCM]     = 1,   /* voice */
 683                 [SOUND_MIXER_SYNTH]   = 2,   /* FM */
 684                 [SOUND_MIXER_CD]      = 3,   /* CD */
 685                 [SOUND_MIXER_LINE]    = 4,   /* Line */
 686                 [SOUND_MIXER_LINE1]   = 5,   /* AUX */
 687                 [SOUND_MIXER_MIC]     = 6,   /* Mic */
 688                 [SOUND_MIXER_LINE2]   = 7,   /* Mono in */
 689                 [SOUND_MIXER_SPEAKER] = 8,   /* Speaker */
 690                 [SOUND_MIXER_RECLEV]  = 9,   /* Recording level */
 691                 [SOUND_MIXER_VOLUME]  = 10   /* Master Volume */
 692         };
 693         static const unsigned char mixreg[] = {
 694                 0x7c,   /* voice */
 695                 0x36,   /* FM */
 696                 0x38,   /* CD */
 697                 0x3e,   /* Line */
 698                 0x3a,   /* AUX */
 699                 0x1a,   /* Mic */
 700                 0x6d    /* Mono in */
 701         };
 702         unsigned char l, r, rl, rr, vidx;
 703         int i, val;
 704         int __user *p = (int __user *)arg;
 705
 706         VALIDATE_STATE(s);
 707
 708         if (cmd == SOUND_MIXER_PRIVATE1) {
 709                 /* enable/disable/query mixer preamp */
 710                 if (get_user(val, p))
 711                         return -EFAULT;
 712                 if (val != -1) {
 713                         val = val ? 0xff : 0xf7;
 714                         write_mixer(s, 0x7d, (read_mixer(s, 0x7d) | 0x08) & val);
 715                 }
 716                 val = (read_mixer(s, 0x7d) & 0x08) ? 1 : 0;
 717                 return put_user(val, p);
 718         }
 719         if (cmd == SOUND_MIXER_PRIVATE2) {
 720                 /* enable/disable/query spatializer */
 721                 if (get_user(val, p))
 722                         return -EFAULT;
 723                 if (val != -1) {
 724                         val &= 0x3f;
 725                         write_mixer(s, 0x52, val);
 726                         write_mixer(s, 0x50, val ? 0x08 : 0);
 727                 }
 728                 return put_user(read_mixer(s, 0x52), p);
 729         }
 730         if (cmd == SOUND_MIXER_INFO) {
 731                 mixer_info info;
 732                 strncpy(info.id, "Solo1", sizeof(info.id));
 733                 strncpy(info.name, "ESS Solo1", sizeof(info.name));
 734                 info.modify_counter = s->mix.modcnt;
 735                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
 736                         return -EFAULT;
 737                 return 0;
 738         }
 739         if (cmd == SOUND_OLD_MIXER_INFO) {
 740                 _old_mixer_info info;
 741                 strncpy(info.id, "Solo1", sizeof(info.id));
 742                 strncpy(info.name, "ESS Solo1", sizeof(info.name));
 743                 if (copy_to_user((void __user *)arg, &info, sizeof(info)))
 744                         return -EFAULT;
 745                 return 0;
 746         }
 747         if (cmd == OSS_GETVERSION)
 748                 return put_user(SOUND_VERSION, p);
 749         if (_IOC_TYPE(cmd) != 'M' || _SIOC_SIZE(cmd) != sizeof(int))
 750                 return -EINVAL;
 751         if (_SIOC_DIR(cmd) == _SIOC_READ) {
 752                 switch (_IOC_NR(cmd)) {
 753                 case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
 754                         return put_user(mixer_src[read_mixer(s, 0x1c) & 7], p);
 755
 756                 case SOUND_MIXER_DEVMASK: /* Arg contains a bit for each supported device */
 757                         return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
 758                                         SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
 759                                         SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV |
 760                                         SOUND_MASK_SPEAKER, p);
 761
 762                 case SOUND_MIXER_RECMASK: /* Arg contains a bit for each supported recording source */
 763                         return put_user(SOUND_MASK_LINE | SOUND_MASK_MIC | SOUND_MASK_CD | SOUND_MASK_VOLUME, p);
 764
 765                 case SOUND_MIXER_STEREODEVS: /* Mixer channels supporting stereo */
 766                         return put_user(SOUND_MASK_PCM | SOUND_MASK_SYNTH | SOUND_MASK_CD |
 767                                         SOUND_MASK_LINE | SOUND_MASK_LINE1 | SOUND_MASK_MIC |
 768                                         SOUND_MASK_VOLUME | SOUND_MASK_LINE2 | SOUND_MASK_RECLEV, p);
 769
 770                 case SOUND_MIXER_CAPS:
 771                         return put_user(SOUND_CAP_EXCL_INPUT, p);
 772
 773                 default:
 774                         i = _IOC_NR(cmd);
 775                         if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
 776                                 return -EINVAL;
 777                         return put_user(s->mix.vol[vidx-1], p);
 778                 }
 779         }
 780         if (_SIOC_DIR(cmd) != (_SIOC_READ|_SIOC_WRITE))
 781                 return -EINVAL;
 782         s->mix.modcnt++;
 783         switch (_IOC_NR(cmd)) {
 784         case SOUND_MIXER_RECSRC: /* Arg contains a bit for each recording source */
 785 #if 0
 786                 {
 787                         static const unsigned char regs[] = {
 788                                 0x1c, 0x1a, 0x36, 0x38, 0x3a, 0x3c, 0x3e, 0x60, 0x62, 0x6d, 0x7c
 789                         };
 790                         int i;
 791
 792                         for (i = 0; i < sizeof(regs); i++)
 793                                 printk(KERN_DEBUG "solo1: mixer reg 0x%02x: 0x%02x\n",
 794                                        regs[i], read_mixer(s, regs[i]));
 795                         printk(KERN_DEBUG "solo1: ctrl reg 0x%02x: 0x%02x\n",
 796                                0xb4, read_ctrl(s, 0xb4));
 797                 }
 798 #endif
 799                 if (get_user(val, p))
 800                         return -EFAULT;
 801                 i = hweight32(val);
 802                 if (i == 0)
 803                         return 0;
 804                 else if (i > 1)
 805                         val &= ~mixer_src[read_mixer(s, 0x1c) & 7];
 806                 for (i = 0; i < 8; i++) {
 807                         if (mixer_src[i] & val)
 808                                 break;
 809                 }
 810                 if (i > 7)
 811                         return 0;
 812                 write_mixer(s, 0x1c, i);
 813                 return 0;
 814
 815         case SOUND_MIXER_VOLUME:
 816                 if (get_user(val, p))
 817                         return -EFAULT;
 818                 l = val & 0xff;
 819                 if (l > 100)
 820                         l = 100;
 821                 r = (val >> 8) & 0xff;
 822                 if (r > 100)
 823                         r = 100;
 824                 if (l < 6) {
 825                         rl = 0x40;
 826                         l = 0;
 827                 } else {
 828                         rl = (l * 2 - 11) / 3;
 829                         l = (rl * 3 + 11) / 2;
 830                 }
 831                 if (r < 6) {
 832                         rr = 0x40;
 833                         r = 0;
 834                 } else {
 835                         rr = (r * 2 - 11) / 3;
 836                         r = (rr * 3 + 11) / 2;
 837                 }
 838                 write_mixer(s, 0x60, rl);
 839                 write_mixer(s, 0x62, rr);
 840 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 841                 s->mix.vol[9] = ((unsigned int)r << 8) | l;
 842 #else
 843                 s->mix.vol[9] = val;
 844 #endif
 845                 return put_user(s->mix.vol[9], p);
 846
 847         case SOUND_MIXER_SPEAKER:
 848                 if (get_user(val, p))
 849                         return -EFAULT;
 850                 l = val & 0xff;
 851                 if (l > 100)
 852                         l = 100;
 853                 else if (l < 2)
 854                         l = 2;
 855                 rl = (l - 2) / 14;
 856                 l = rl * 14 + 2;
 857                 write_mixer(s, 0x3c, rl);
 858 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 859                 s->mix.vol[7] = l * 0x101;
 860 #else
 861                 s->mix.vol[7] = val;
 862 #endif
 863                 return put_user(s->mix.vol[7], p);
 864
 865         case SOUND_MIXER_RECLEV:
 866                 if (get_user(val, p))
 867                         return -EFAULT;
 868                 l = (val << 1) & 0x1fe;
 869                 if (l > 200)
 870                         l = 200;
 871                 else if (l < 5)
 872                         l = 5;
 873                 r = (val >> 7) & 0x1fe;
 874                 if (r > 200)
 875                         r = 200;
 876                 else if (r < 5)
 877                         r = 5;
 878                 rl = (l - 5) / 13;
 879                 rr = (r - 5) / 13;
 880                 r = (rl * 13 + 5) / 2;
 881                 l = (rr * 13 + 5) / 2;
 882                 write_ctrl(s, 0xb4, (rl << 4) | rr);
 883 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 884                 s->mix.vol[8] = ((unsigned int)r << 8) | l;
 885 #else
 886                 s->mix.vol[8] = val;
 887 #endif
 888                 return put_user(s->mix.vol[8], p);
 889
 890         default:
 891                 i = _IOC_NR(cmd);
 892                 if (i >= SOUND_MIXER_NRDEVICES || !(vidx = mixtable1[i]))
 893                         return -EINVAL;
 894                 if (get_user(val, p))
 895                         return -EFAULT;
 896                 l = (val << 1) & 0x1fe;
 897                 if (l > 200)
 898                         l = 200;
 899                 else if (l < 5)
 900                         l = 5;
 901                 r = (val >> 7) & 0x1fe;
 902                 if (r > 200)
 903                         r = 200;
 904                 else if (r < 5)
 905                         r = 5;
 906                 rl = (l - 5) / 13;
 907                 rr = (r - 5) / 13;
 908                 r = (rl * 13 + 5) / 2;
 909                 l = (rr * 13 + 5) / 2;
 910                 write_mixer(s, mixreg[vidx-1], (rl << 4) | rr);
 911 #ifdef OSS_DOCUMENTED_MIXER_SEMANTICS
 912                 s->mix.vol[vidx-1] = ((unsigned int)r << 8) | l;
 913 #else
 914                 s->mix.vol[vidx-1] = val;
 915 #endif
 916                 return put_user(s->mix.vol[vidx-1], p);
 917         }
 918 }
 919
 920 /* --------------------------------------------------------------------- */
 921
 922 static int solo1_open_mixdev(struct inode *inode, struct file *file)
 923 {
 924         unsigned int minor = iminor(inode);
 925         struct solo1_state *s = NULL;
 926         struct pci_dev *pci_dev = NULL;
 927
 928         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
 929                 struct pci_driver *drvr;
 930                 drvr = pci_dev_driver (pci_dev);
 931                 if (drvr != &solo1_driver)
 932                         continue;
 933                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
 934                 if (!s)
 935                         continue;
 936                 if (s->dev_mixer == minor)
 937                         break;
 938         }
 939         if (!s)
 940                 return -ENODEV;
 941         VALIDATE_STATE(s);
 942         file->private_data = s;
 943         return nonseekable_open(inode, file);
 944 }
 945
 946 static int solo1_release_mixdev(struct inode *inode, struct file *file)
 947 {
 948         struct solo1_state *s = (struct solo1_state *)file->private_data;
 949
 950         VALIDATE_STATE(s);
 951         return 0;
 952 }
 953
 954 static int solo1_ioctl_mixdev(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
 955 {
 956         return mixer_ioctl((struct solo1_state *)file->private_data, cmd, arg);
 957 }
 958
 959 static /*const*/ struct file_operations solo1_mixer_fops = {
 960         .owner          = THIS_MODULE,
 961         .llseek         = no_llseek,
 962         .ioctl          = solo1_ioctl_mixdev,
 963         .open           = solo1_open_mixdev,
 964         .release        = solo1_release_mixdev,
 965 };
 966
 967 /* --------------------------------------------------------------------- */
 968
 969 static int drain_dac(struct solo1_state *s, int nonblock)
 970 {
 971         DECLARE_WAITQUEUE(wait, current);
 972         unsigned long flags;
 973         int count;
 974         unsigned tmo;
 975
 976         if (s->dma_dac.mapped)
 977                 return 0;
 978         add_wait_queue(&s->dma_dac.wait, &wait);
 979         for (;;) {
 980                 set_current_state(TASK_INTERRUPTIBLE);
 981                 spin_lock_irqsave(&s->lock, flags);
 982                 count = s->dma_dac.count;
 983                 spin_unlock_irqrestore(&s->lock, flags);
 984                 if (count <= 0)
 985                         break;
 986                 if (signal_pending(current))
 987                         break;
 988                 if (nonblock) {
 989                         remove_wait_queue(&s->dma_dac.wait, &wait);
 990                         set_current_state(TASK_RUNNING);
 991                         return -EBUSY;
 992                 }
 993                 tmo = 3 * HZ * (count + s->dma_dac.fragsize) / 2 / s->rate;
 994                 if (s->fmt & (AFMT_S16_LE | AFMT_U16_LE))
 995                         tmo >>= 1;
 996                 if (s->channels > 1)
 997                         tmo >>= 1;
 998                 if (!schedule_timeout(tmo + 1))
 999                         printk(KERN_DEBUG "solo1: dma timed out??\n");
1000         }
1001         remove_wait_queue(&s->dma_dac.wait, &wait);
1002         set_current_state(TASK_RUNNING);
1003         if (signal_pending(current))
1004                 return -ERESTARTSYS;
1005         return 0;
1006 }
1007
1008 /* --------------------------------------------------------------------- */
1009
1010 static ssize_t solo1_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1011 {
1012         struct solo1_state *s = (struct solo1_state *)file->private_data;
1013         DECLARE_WAITQUEUE(wait, current);
1014         ssize_t ret;
1015         unsigned long flags;
1016         unsigned swptr;
1017         int cnt;
1018
1019         VALIDATE_STATE(s);
1020         if (s->dma_adc.mapped)
1021                 return -ENXIO;
1022         if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1023                 return ret;
1024         if (!access_ok(VERIFY_WRITE, buffer, count))
1025                 return -EFAULT;
1026         ret = 0;
1027         add_wait_queue(&s->dma_adc.wait, &wait);
1028         while (count > 0) {
1029                 spin_lock_irqsave(&s->lock, flags);
1030                 swptr = s->dma_adc.swptr;
1031                 cnt = s->dma_adc.dmasize-swptr;
1032                 if (s->dma_adc.count < cnt)
1033                         cnt = s->dma_adc.count;
1034                 if (cnt <= 0)
1035                         __set_current_state(TASK_INTERRUPTIBLE);
1036                 spin_unlock_irqrestore(&s->lock, flags);
1037                 if (cnt > count)
1038                         cnt = count;
1039 #ifdef DEBUGREC
1040                 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x  DMAstat: 0x%02x  DMAcnt: 0x%04x  SBstat: 0x%02x  cnt: %u\n",
1041                        read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc), cnt);
1042 #endif
1043                 if (cnt <= 0) {
1044                         if (s->dma_adc.enabled)
1045                                 start_adc(s);
1046 #ifdef DEBUGREC
1047                         printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
1048                                KERN_DEBUG "solo1_read: regs: B1: 0x%02x  B2: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n"
1049                                KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1050                                KERN_DEBUG "solo1_read: SBstat: 0x%02x  cnt: %u\n",
1051                                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1052                                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1053                                inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1054 #endif
1055                         if (inb(s->ddmabase+15) & 1)
1056                                 printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1057                         if (file->f_flags & O_NONBLOCK) {
1058                                 if (!ret)
1059                                         ret = -EAGAIN;
1060                                 break;
1061                         }
1062                         schedule();
1063 #ifdef DEBUGREC
1064                         printk(KERN_DEBUG "solo1_read: regs: A1: 0x%02x  A2: 0x%02x  A4: 0x%02x  A5: 0x%02x  A8: 0x%02x\n"
1065                                KERN_DEBUG "solo1_read: regs: B1: 0x%02x  B2: 0x%02x  B7: 0x%02x  B8: 0x%02x  B9: 0x%02x\n"
1066                                KERN_DEBUG "solo1_read: DMA: addr: 0x%08x cnt: 0x%04x stat: 0x%02x mask: 0x%02x\n"
1067                                KERN_DEBUG "solo1_read: SBstat: 0x%02x  cnt: %u\n",
1068                                read_ctrl(s, 0xa1), read_ctrl(s, 0xa2), read_ctrl(s, 0xa4), read_ctrl(s, 0xa5), read_ctrl(s, 0xa8),
1069                                read_ctrl(s, 0xb1), read_ctrl(s, 0xb2), read_ctrl(s, 0xb7), read_ctrl(s, 0xb8), read_ctrl(s, 0xb9),
1070                                inl(s->ddmabase), inw(s->ddmabase+4), inb(s->ddmabase+8), inb(s->ddmabase+15), inb(s->sbbase+0xc), cnt);
1071 #endif
1072                         if (signal_pending(current)) {
1073                                 if (!ret)
1074                                         ret = -ERESTARTSYS;
1075                                 break;
1076                         }
1077                         continue;
1078                 }
1079                 if (copy_to_user(buffer, s->dma_adc.rawbuf + swptr, cnt)) {
1080                         if (!ret)
1081                                 ret = -EFAULT;
1082                         break;
1083                 }
1084                 swptr = (swptr + cnt) % s->dma_adc.dmasize;
1085                 spin_lock_irqsave(&s->lock, flags);
1086                 s->dma_adc.swptr = swptr;
1087                 s->dma_adc.count -= cnt;
1088                 spin_unlock_irqrestore(&s->lock, flags);
1089                 count -= cnt;
1090                 buffer += cnt;
1091                 ret += cnt;
1092                 if (s->dma_adc.enabled)
1093                         start_adc(s);
1094 #ifdef DEBUGREC
1095                 printk(KERN_DEBUG "solo1_read: reg B8: 0x%02x  DMAstat: 0x%02x  DMAcnt: 0x%04x  SBstat: 0x%02x\n",
1096                        read_ctrl(s, 0xb8), inb(s->ddmabase+8), inw(s->ddmabase+4), inb(s->sbbase+0xc));
1097 #endif
1098         }
1099         remove_wait_queue(&s->dma_adc.wait, &wait);
1100         set_current_state(TASK_RUNNING);
1101         return ret;
1102 }
1103
1104 static ssize_t solo1_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1105 {
1106         struct solo1_state *s = (struct solo1_state *)file->private_data;
1107         DECLARE_WAITQUEUE(wait, current);
1108         ssize_t ret;
1109         unsigned long flags;
1110         unsigned swptr;
1111         int cnt;
1112
1113         VALIDATE_STATE(s);
1114         if (s->dma_dac.mapped)
1115                 return -ENXIO;
1116         if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1117                 return ret;
1118         if (!access_ok(VERIFY_READ, buffer, count))
1119                 return -EFAULT;
1120 #if 0
1121         printk(KERN_DEBUG "solo1_write: reg 70: 0x%02x  71: 0x%02x  72: 0x%02x  74: 0x%02x  76: 0x%02x  78: 0x%02x  7A: 0x%02x\n"
1122                KERN_DEBUG "solo1_write: DMA: addr: 0x%08x  cnt: 0x%04x  stat: 0x%02x  SBstat: 0x%02x\n",
1123                read_mixer(s, 0x70), read_mixer(s, 0x71), read_mixer(s, 0x72), read_mixer(s, 0x74), read_mixer(s, 0x76),
1124                read_mixer(s, 0x78), read_mixer(s, 0x7a), inl(s->iobase), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1125         printk(KERN_DEBUG "solo1_write: reg 78: 0x%02x  reg 7A: 0x%02x  DMAcnt: 0x%04x  DMAstat: 0x%02x  SBstat: 0x%02x\n",
1126                read_mixer(s, 0x78), read_mixer(s, 0x7a), inw(s->iobase+4), inb(s->iobase+6), inb(s->sbbase+0xc));
1127 #endif
1128         ret = 0;
1129         add_wait_queue(&s->dma_dac.wait, &wait);
1130         while (count > 0) {
1131                 spin_lock_irqsave(&s->lock, flags);
1132                 if (s->dma_dac.count < 0) {
1133                         s->dma_dac.count = 0;
1134                         s->dma_dac.swptr = s->dma_dac.hwptr;
1135                 }
1136                 swptr = s->dma_dac.swptr;
1137                 cnt = s->dma_dac.dmasize-swptr;
1138                 if (s->dma_dac.count + cnt > s->dma_dac.dmasize)
1139                         cnt = s->dma_dac.dmasize - s->dma_dac.count;
1140                 if (cnt <= 0)
1141                         __set_current_state(TASK_INTERRUPTIBLE);
1142                 spin_unlock_irqrestore(&s->lock, flags);
1143                 if (cnt > count)
1144                         cnt = count;
1145                 if (cnt <= 0) {
1146                         if (s->dma_dac.enabled)
1147                                 start_dac(s);
1148                         if (file->f_flags & O_NONBLOCK) {
1149                                 if (!ret)
1150                                         ret = -EAGAIN;
1151                                 break;
1152                         }
1153                         schedule();
1154                         if (signal_pending(current)) {
1155                                 if (!ret)
1156                                         ret = -ERESTARTSYS;
1157                                 break;
1158                         }
1159                         continue;
1160                 }
1161                 if (copy_from_user(s->dma_dac.rawbuf + swptr, buffer, cnt)) {
1162                         if (!ret)
1163                                 ret = -EFAULT;
1164                         break;
1165                 }
1166                 swptr = (swptr + cnt) % s->dma_dac.dmasize;
1167                 spin_lock_irqsave(&s->lock, flags);
1168                 s->dma_dac.swptr = swptr;
1169                 s->dma_dac.count += cnt;
1170                 s->dma_dac.endcleared = 0;
1171                 spin_unlock_irqrestore(&s->lock, flags);
1172                 count -= cnt;
1173                 buffer += cnt;
1174                 ret += cnt;
1175                 if (s->dma_dac.enabled)
1176                         start_dac(s);
1177         }
1178         remove_wait_queue(&s->dma_dac.wait, &wait);
1179         set_current_state(TASK_RUNNING);
1180         return ret;
1181 }
1182
1183 /* No kernel lock - we have our own spinlock */
1184 static unsigned int solo1_poll(struct file *file, struct poll_table_struct *wait)
1185 {
1186         struct solo1_state *s = (struct solo1_state *)file->private_data;
1187         unsigned long flags;
1188         unsigned int mask = 0;
1189
1190         VALIDATE_STATE(s);
1191         if (file->f_mode & FMODE_WRITE) {
1192                 if (!s->dma_dac.ready && prog_dmabuf_dac(s))
1193                         return 0;
1194                 poll_wait(file, &s->dma_dac.wait, wait);
1195         }
1196         if (file->f_mode & FMODE_READ) {
1197                 if (!s->dma_adc.ready && prog_dmabuf_adc(s))
1198                         return 0;
1199                 poll_wait(file, &s->dma_adc.wait, wait);
1200         }
1201         spin_lock_irqsave(&s->lock, flags);
1202         solo1_update_ptr(s);
1203         if (file->f_mode & FMODE_READ) {
1204                 if (s->dma_adc.mapped) {
1205                         if (s->dma_adc.count >= (signed)s->dma_adc.fragsize)
1206                                 mask |= POLLIN | POLLRDNORM;
1207                 } else {
1208                         if (s->dma_adc.count > 0)
1209                                 mask |= POLLIN | POLLRDNORM;
1210                 }
1211         }
1212         if (file->f_mode & FMODE_WRITE) {
1213                 if (s->dma_dac.mapped) {
1214                         if (s->dma_dac.count >= (signed)s->dma_dac.fragsize)
1215                                 mask |= POLLOUT | POLLWRNORM;
1216                 } else {
1217                         if ((signed)s->dma_dac.dmasize > s->dma_dac.count)
1218                                 mask |= POLLOUT | POLLWRNORM;
1219                 }
1220         }
1221         spin_unlock_irqrestore(&s->lock, flags);
1222         return mask;
1223 }
1224
1225
1226 static int solo1_mmap(struct file *file, struct vm_area_struct *vma)
1227 {
1228         struct solo1_state *s = (struct solo1_state *)file->private_data;
1229         struct dmabuf *db;
1230         int ret = -EINVAL;
1231         unsigned long size;
1232
1233         VALIDATE_STATE(s);
1234         lock_kernel();
1235         if (vma->vm_flags & VM_WRITE) {
1236                 if ((ret = prog_dmabuf_dac(s)) != 0)
1237                         goto out;
1238                 db = &s->dma_dac;
1239         } else if (vma->vm_flags & VM_READ) {
1240                 if ((ret = prog_dmabuf_adc(s)) != 0)
1241                         goto out;
1242                 db = &s->dma_adc;
1243         } else
1244                 goto out;
1245         ret = -EINVAL;
1246         if (vma->vm_pgoff != 0)
1247                 goto out;
1248         size = vma->vm_end - vma->vm_start;
1249         if (size > (PAGE_SIZE << db->buforder))
1250                 goto out;
1251         ret = -EAGAIN;
1252         if (remap_pfn_range(vma, vma->vm_start,
1253                                 virt_to_phys(db->rawbuf) >> PAGE_SHIFT,
1254                                 size, vma->vm_page_prot))
1255                 goto out;
1256         db->mapped = 1;
1257         ret = 0;
1258 out:
1259         unlock_kernel();
1260         return ret;
1261 }
1262
1263 static int solo1_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
1264 {
1265         struct solo1_state *s = (struct solo1_state *)file->private_data;
1266         unsigned long flags;
1267         audio_buf_info abinfo;
1268         count_info cinfo;
1269         int val, mapped, ret, count;
1270         int div1, div2;
1271         unsigned rate1, rate2;
1272         void __user *argp = (void __user *)arg;
1273         int __user *p = argp;
1274
1275         VALIDATE_STATE(s);
1276         mapped = ((file->f_mode & FMODE_WRITE) && s->dma_dac.mapped) ||
1277                 ((file->f_mode & FMODE_READ) && s->dma_adc.mapped);
1278         switch (cmd) {
1279         case OSS_GETVERSION:
1280                 return put_user(SOUND_VERSION, p);
1281
1282         case SNDCTL_DSP_SYNC:
1283                 if (file->f_mode & FMODE_WRITE)
1284                         return drain_dac(s, 0/*file->f_flags & O_NONBLOCK*/);
1285                 return 0;
1286
1287         case SNDCTL_DSP_SETDUPLEX:
1288                 return 0;
1289
1290         case SNDCTL_DSP_GETCAPS:
1291                 return put_user(DSP_CAP_DUPLEX | DSP_CAP_REALTIME | DSP_CAP_TRIGGER | DSP_CAP_MMAP, p);
1292
1293         case SNDCTL_DSP_RESET:
1294                 if (file->f_mode & FMODE_WRITE) {
1295                         stop_dac(s);
1296                         synchronize_irq(s->irq);
1297                         s->dma_dac.swptr = s->dma_dac.hwptr = s->dma_dac.count = s->dma_dac.total_bytes = 0;
1298                 }
1299                 if (file->f_mode & FMODE_READ) {
1300                         stop_adc(s);
1301                         synchronize_irq(s->irq);
1302                         s->dma_adc.swptr = s->dma_adc.hwptr = s->dma_adc.count = s->dma_adc.total_bytes = 0;
1303                 }
1304                 prog_codec(s);
1305                 return 0;
1306
1307         case SNDCTL_DSP_SPEED:
1308                 if (get_user(val, p))
1309                         return -EFAULT;
1310                 if (val >= 0) {
1311                         stop_adc(s);
1312                         stop_dac(s);
1313                         s->dma_adc.ready = s->dma_dac.ready = 0;
1314                         /* program sampling rates */
1315                         if (val > 48000)
1316                                 val = 48000;
1317                         if (val < 6300)
1318                                 val = 6300;
1319                         div1 = (768000 + val / 2) / val;
1320                         rate1 = (768000 + div1 / 2) / div1;
1321                         div1 = -div1;
1322                         div2 = (793800 + val / 2) / val;
1323                         rate2 = (793800 + div2 / 2) / div2;
1324                         div2 = (-div2) & 0x7f;
1325                         if (abs(val - rate2) < abs(val - rate1)) {
1326                                 rate1 = rate2;
1327                                 div1 = div2;
1328                         }
1329                         s->rate = rate1;
1330                         s->clkdiv = div1;
1331                         prog_codec(s);
1332                 }
1333                 return put_user(s->rate, p);
1334
1335         case SNDCTL_DSP_STEREO:
1336                 if (get_user(val, p))
1337                         return -EFAULT;
1338                 stop_adc(s);
1339                 stop_dac(s);
1340                 s->dma_adc.ready = s->dma_dac.ready = 0;
1341                 /* program channels */
1342                 s->channels = val ? 2 : 1;
1343                 prog_codec(s);
1344                 return 0;
1345
1346         case SNDCTL_DSP_CHANNELS:
1347                 if (get_user(val, p))
1348                         return -EFAULT;
1349                 if (val != 0) {
1350                         stop_adc(s);
1351                         stop_dac(s);
1352                         s->dma_adc.ready = s->dma_dac.ready = 0;
1353                         /* program channels */
1354                         s->channels = (val >= 2) ? 2 : 1;
1355                         prog_codec(s);
1356                 }
1357                 return put_user(s->channels, p);
1358
1359         case SNDCTL_DSP_GETFMTS: /* Returns a mask */
1360                 return put_user(AFMT_S16_LE|AFMT_U16_LE|AFMT_S8|AFMT_U8, p);
1361
1362         case SNDCTL_DSP_SETFMT: /* Selects ONE fmt*/
1363                 if (get_user(val, p))
1364                         return -EFAULT;
1365                 if (val != AFMT_QUERY) {
1366                         stop_adc(s);
1367                         stop_dac(s);
1368                         s->dma_adc.ready = s->dma_dac.ready = 0;
1369                         /* program format */
1370                         if (val != AFMT_S16_LE && val != AFMT_U16_LE &&
1371                             val != AFMT_S8 && val != AFMT_U8)
1372                                 val = AFMT_U8;
1373                         s->fmt = val;
1374                         prog_codec(s);
1375                 }
1376                 return put_user(s->fmt, p);
1377
1378         case SNDCTL_DSP_POST:
1379                 return 0;
1380
1381         case SNDCTL_DSP_GETTRIGGER:
1382                 val = 0;
1383                 if (file->f_mode & s->ena & FMODE_READ)
1384                         val |= PCM_ENABLE_INPUT;
1385                 if (file->f_mode & s->ena & FMODE_WRITE)
1386                         val |= PCM_ENABLE_OUTPUT;
1387                 return put_user(val, p);
1388
1389         case SNDCTL_DSP_SETTRIGGER:
1390                 if (get_user(val, p))
1391                         return -EFAULT;
1392                 if (file->f_mode & FMODE_READ) {
1393                         if (val & PCM_ENABLE_INPUT) {
1394                                 if (!s->dma_adc.ready && (ret = prog_dmabuf_adc(s)))
1395                                         return ret;
1396                                 s->dma_dac.enabled = 1;
1397                                 start_adc(s);
1398                                 if (inb(s->ddmabase+15) & 1)
1399                                         printk(KERN_ERR "solo1: cannot start recording, DDMA mask bit stuck at 1\n");
1400                         } else {
1401                                 s->dma_dac.enabled = 0;
1402                                 stop_adc(s);
1403                         }
1404                 }
1405                 if (file->f_mode & FMODE_WRITE) {
1406                         if (val & PCM_ENABLE_OUTPUT) {
1407                                 if (!s->dma_dac.ready && (ret = prog_dmabuf_dac(s)))
1408                                         return ret;
1409                                 s->dma_dac.enabled = 1;
1410                                 start_dac(s);
1411                         } else {
1412                                 s->dma_dac.enabled = 0;
1413                                 stop_dac(s);
1414                         }
1415                 }
1416                 return 0;
1417
1418         case SNDCTL_DSP_GETOSPACE:
1419                 if (!(file->f_mode & FMODE_WRITE))
1420                         return -EINVAL;
1421                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1422                         return val;
1423                 spin_lock_irqsave(&s->lock, flags);
1424                 solo1_update_ptr(s);
1425                 abinfo.fragsize = s->dma_dac.fragsize;
1426                 count = s->dma_dac.count;
1427                 if (count < 0)
1428                         count = 0;
1429                 abinfo.bytes = s->dma_dac.dmasize - count;
1430                 abinfo.fragstotal = s->dma_dac.numfrag;
1431                 abinfo.fragments = abinfo.bytes >> s->dma_dac.fragshift;
1432                 spin_unlock_irqrestore(&s->lock, flags);
1433                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1434
1435         case SNDCTL_DSP_GETISPACE:
1436                 if (!(file->f_mode & FMODE_READ))
1437                         return -EINVAL;
1438                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1439                         return val;
1440                 spin_lock_irqsave(&s->lock, flags);
1441                 solo1_update_ptr(s);
1442                 abinfo.fragsize = s->dma_adc.fragsize;
1443                 abinfo.bytes = s->dma_adc.count;
1444                 abinfo.fragstotal = s->dma_adc.numfrag;
1445                 abinfo.fragments = abinfo.bytes >> s->dma_adc.fragshift;
1446                 spin_unlock_irqrestore(&s->lock, flags);
1447                 return copy_to_user(argp, &abinfo, sizeof(abinfo)) ? -EFAULT : 0;
1448
1449         case SNDCTL_DSP_NONBLOCK:
1450                 file->f_flags |= O_NONBLOCK;
1451                 return 0;
1452
1453         case SNDCTL_DSP_GETODELAY:
1454                 if (!(file->f_mode & FMODE_WRITE))
1455                         return -EINVAL;
1456                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1457                         return val;
1458                 spin_lock_irqsave(&s->lock, flags);
1459                 solo1_update_ptr(s);
1460                 count = s->dma_dac.count;
1461                 spin_unlock_irqrestore(&s->lock, flags);
1462                 if (count < 0)
1463                         count = 0;
1464                 return put_user(count, p);
1465
1466         case SNDCTL_DSP_GETIPTR:
1467                 if (!(file->f_mode & FMODE_READ))
1468                         return -EINVAL;
1469                 if (!s->dma_adc.ready && (val = prog_dmabuf_adc(s)) != 0)
1470                         return val;
1471                 spin_lock_irqsave(&s->lock, flags);
1472                 solo1_update_ptr(s);
1473                 cinfo.bytes = s->dma_adc.total_bytes;
1474                 cinfo.blocks = s->dma_adc.count >> s->dma_adc.fragshift;
1475                 cinfo.ptr = s->dma_adc.hwptr;
1476                 if (s->dma_adc.mapped)
1477                         s->dma_adc.count &= s->dma_adc.fragsize-1;
1478                 spin_unlock_irqrestore(&s->lock, flags);
1479                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1480                         return -EFAULT;
1481                 return 0;
1482
1483         case SNDCTL_DSP_GETOPTR:
1484                 if (!(file->f_mode & FMODE_WRITE))
1485                         return -EINVAL;
1486                 if (!s->dma_dac.ready && (val = prog_dmabuf_dac(s)) != 0)
1487                         return val;
1488                 spin_lock_irqsave(&s->lock, flags);
1489                 solo1_update_ptr(s);
1490                 cinfo.bytes = s->dma_dac.total_bytes;
1491                 count = s->dma_dac.count;
1492                 if (count < 0)
1493                         count = 0;
1494                 cinfo.blocks = count >> s->dma_dac.fragshift;
1495                 cinfo.ptr = s->dma_dac.hwptr;
1496                 if (s->dma_dac.mapped)
1497                         s->dma_dac.count &= s->dma_dac.fragsize-1;
1498                 spin_unlock_irqrestore(&s->lock, flags);
1499 #if 0
1500                 printk(KERN_DEBUG "esssolo1: GETOPTR: bytes %u blocks %u ptr %u, buforder %u numfrag %u fragshift %u\n"
1501                        KERN_DEBUG "esssolo1: swptr %u count %u fragsize %u dmasize %u fragsamples %u\n",
1502                        cinfo.bytes, cinfo.blocks, cinfo.ptr, s->dma_dac.buforder, s->dma_dac.numfrag, s->dma_dac.fragshift,
1503                        s->dma_dac.swptr, s->dma_dac.count, s->dma_dac.fragsize, s->dma_dac.dmasize, s->dma_dac.fragsamples);
1504 #endif
1505                 if (copy_to_user(argp, &cinfo, sizeof(cinfo)))
1506                         return -EFAULT;
1507                 return 0;
1508
1509         case SNDCTL_DSP_GETBLKSIZE:
1510                 if (file->f_mode & FMODE_WRITE) {
1511                         if ((val = prog_dmabuf_dac(s)))
1512                                 return val;
1513                         return put_user(s->dma_dac.fragsize, p);
1514                 }
1515                 if ((val = prog_dmabuf_adc(s)))
1516                         return val;
1517                 return put_user(s->dma_adc.fragsize, p);
1518
1519         case SNDCTL_DSP_SETFRAGMENT:
1520                 if (get_user(val, p))
1521                         return -EFAULT;
1522                 if (file->f_mode & FMODE_READ) {
1523                         s->dma_adc.ossfragshift = val & 0xffff;
1524                         s->dma_adc.ossmaxfrags = (val >> 16) & 0xffff;
1525                         if (s->dma_adc.ossfragshift < 4)
1526                                 s->dma_adc.ossfragshift = 4;
1527                         if (s->dma_adc.ossfragshift > 15)
1528                                 s->dma_adc.ossfragshift = 15;
1529                         if (s->dma_adc.ossmaxfrags < 4)
1530                                 s->dma_adc.ossmaxfrags = 4;
1531                 }
1532                 if (file->f_mode & FMODE_WRITE) {
1533                         s->dma_dac.ossfragshift = val & 0xffff;
1534                         s->dma_dac.ossmaxfrags = (val >> 16) & 0xffff;
1535                         if (s->dma_dac.ossfragshift < 4)
1536                                 s->dma_dac.ossfragshift = 4;
1537                         if (s->dma_dac.ossfragshift > 15)
1538                                 s->dma_dac.ossfragshift = 15;
1539                         if (s->dma_dac.ossmaxfrags < 4)
1540                                 s->dma_dac.ossmaxfrags = 4;
1541                 }
1542                 return 0;
1543
1544         case SNDCTL_DSP_SUBDIVIDE:
1545                 if ((file->f_mode & FMODE_READ && s->dma_adc.subdivision) ||
1546                     (file->f_mode & FMODE_WRITE && s->dma_dac.subdivision))
1547                         return -EINVAL;
1548                 if (get_user(val, p))
1549                         return -EFAULT;
1550                 if (val != 1 && val != 2 && val != 4)
1551                         return -EINVAL;
1552                 if (file->f_mode & FMODE_READ)
1553                         s->dma_adc.subdivision = val;
1554                 if (file->f_mode & FMODE_WRITE)
1555                         s->dma_dac.subdivision = val;
1556                 return 0;
1557
1558         case SOUND_PCM_READ_RATE:
1559                 return put_user(s->rate, p);
1560
1561         case SOUND_PCM_READ_CHANNELS:
1562                 return put_user(s->channels, p);
1563
1564         case SOUND_PCM_READ_BITS:
1565                 return put_user((s->fmt & (AFMT_S8|AFMT_U8)) ? 8 : 16, p);
1566
1567         case SOUND_PCM_WRITE_FILTER:
1568         case SNDCTL_DSP_SETSYNCRO:
1569         case SOUND_PCM_READ_FILTER:
1570                 return -EINVAL;
1571
1572         }
1573         return mixer_ioctl(s, cmd, arg);
1574 }
1575
1576 static int solo1_release(struct inode *inode, struct file *file)
1577 {
1578         struct solo1_state *s = (struct solo1_state *)file->private_data;
1579
1580         VALIDATE_STATE(s);
1581         lock_kernel();
1582         if (file->f_mode & FMODE_WRITE)
1583                 drain_dac(s, file->f_flags & O_NONBLOCK);
1584         down(&s->open_sem);
1585         if (file->f_mode & FMODE_WRITE) {
1586                 stop_dac(s);
1587                 outb(0, s->iobase+6);  /* disable DMA */
1588                 dealloc_dmabuf(s, &s->dma_dac);
1589         }
1590         if (file->f_mode & FMODE_READ) {
1591                 stop_adc(s);
1592                 outb(1, s->ddmabase+0xf); /* mask DMA channel */
1593                 outb(0, s->ddmabase+0xd); /* DMA master clear */
1594                 dealloc_dmabuf(s, &s->dma_adc);
1595         }
1596         s->open_mode &= ~(FMODE_READ | FMODE_WRITE);
1597         wake_up(&s->open_wait);
1598         up(&s->open_sem);
1599         unlock_kernel();
1600         return 0;
1601 }
1602
1603 static int solo1_open(struct inode *inode, struct file *file)
1604 {
1605         unsigned int minor = iminor(inode);
1606         DECLARE_WAITQUEUE(wait, current);
1607         struct solo1_state *s = NULL;
1608         struct pci_dev *pci_dev = NULL;
1609
1610         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
1611                 struct pci_driver *drvr;
1612
1613                 drvr = pci_dev_driver(pci_dev);
1614                 if (drvr != &solo1_driver)
1615                         continue;
1616                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
1617                 if (!s)
1618                         continue;
1619                 if (!((s->dev_audio ^ minor) & ~0xf))
1620                         break;
1621         }
1622         if (!s)
1623                 return -ENODEV;
1624         VALIDATE_STATE(s);
1625         file->private_data = s;
1626         /* wait for device to become free */
1627         down(&s->open_sem);
1628         while (s->open_mode & (FMODE_READ | FMODE_WRITE)) {
1629                 if (file->f_flags & O_NONBLOCK) {
1630                         up(&s->open_sem);
1631                         return -EBUSY;
1632                 }
1633                 add_wait_queue(&s->open_wait, &wait);
1634                 __set_current_state(TASK_INTERRUPTIBLE);
1635                 up(&s->open_sem);
1636                 schedule();
1637                 remove_wait_queue(&s->open_wait, &wait);
1638                 set_current_state(TASK_RUNNING);
1639                 if (signal_pending(current))
1640                         return -ERESTARTSYS;
1641                 down(&s->open_sem);
1642         }
1643         s->fmt = AFMT_U8;
1644         s->channels = 1;
1645         s->rate = 8000;
1646         s->clkdiv = 96 | 0x80;
1647         s->ena = 0;
1648         s->dma_adc.ossfragshift = s->dma_adc.ossmaxfrags = s->dma_adc.subdivision = 0;
1649         s->dma_adc.enabled = 1;
1650         s->dma_dac.ossfragshift = s->dma_dac.ossmaxfrags = s->dma_dac.subdivision = 0;
1651         s->dma_dac.enabled = 1;
1652         s->open_mode |= file->f_mode & (FMODE_READ | FMODE_WRITE);
1653         up(&s->open_sem);
1654         prog_codec(s);
1655         return nonseekable_open(inode, file);
1656 }
1657
1658 static /*const*/ struct file_operations solo1_audio_fops = {
1659         .owner          = THIS_MODULE,
1660         .llseek         = no_llseek,
1661         .read           = solo1_read,
1662         .write          = solo1_write,
1663         .poll           = solo1_poll,
1664         .ioctl          = solo1_ioctl,
1665         .mmap           = solo1_mmap,
1666         .open           = solo1_open,
1667         .release        = solo1_release,
1668 };
1669
1670 /* --------------------------------------------------------------------- */
1671
1672 /* hold spinlock for the following! */
1673 static void solo1_handle_midi(struct solo1_state *s)
1674 {
1675         unsigned char ch;
1676         int wake;
1677
1678         if (!(s->mpubase))
1679                 return;
1680         wake = 0;
1681         while (!(inb(s->mpubase+1) & 0x80)) {
1682                 ch = inb(s->mpubase);
1683                 if (s->midi.icnt < MIDIINBUF) {
1684                         s->midi.ibuf[s->midi.iwr] = ch;
1685                         s->midi.iwr = (s->midi.iwr + 1) % MIDIINBUF;
1686                         s->midi.icnt++;
1687                 }
1688                 wake = 1;
1689         }
1690         if (wake)
1691                 wake_up(&s->midi.iwait);
1692         wake = 0;
1693         while (!(inb(s->mpubase+1) & 0x40) && s->midi.ocnt > 0) {
1694                 outb(s->midi.obuf[s->midi.ord], s->mpubase);
1695                 s->midi.ord = (s->midi.ord + 1) % MIDIOUTBUF;
1696                 s->midi.ocnt--;
1697                 if (s->midi.ocnt < MIDIOUTBUF-16)
1698                         wake = 1;
1699         }
1700         if (wake)
1701                 wake_up(&s->midi.owait);
1702 }
1703
1704 static irqreturn_t solo1_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1705 {
1706         struct solo1_state *s = (struct solo1_state *)dev_id;
1707         unsigned int intsrc;
1708
1709         /* fastpath out, to ease interrupt sharing */
1710         intsrc = inb(s->iobase+7); /* get interrupt source(s) */
1711         if (!intsrc)
1712                 return IRQ_NONE;
1713         (void)inb(s->sbbase+0xe);  /* clear interrupt */
1714         spin_lock(&s->lock);
1715         /* clear audio interrupts first */
1716         if (intsrc & 0x20)
1717                 write_mixer(s, 0x7a, read_mixer(s, 0x7a) & 0x7f);
1718         solo1_update_ptr(s);
1719         solo1_handle_midi(s);
1720         spin_unlock(&s->lock);
1721         return IRQ_HANDLED;
1722 }
1723
1724 static void solo1_midi_timer(unsigned long data)
1725 {
1726         struct solo1_state *s = (struct solo1_state *)data;
1727         unsigned long flags;
1728
1729         spin_lock_irqsave(&s->lock, flags);
1730         solo1_handle_midi(s);
1731         spin_unlock_irqrestore(&s->lock, flags);
1732         s->midi.timer.expires = jiffies+1;
1733         add_timer(&s->midi.timer);
1734 }
1735
1736 /* --------------------------------------------------------------------- */
1737
1738 static ssize_t solo1_midi_read(struct file *file, char __user *buffer, size_t count, loff_t *ppos)
1739 {
1740         struct solo1_state *s = (struct solo1_state *)file->private_data;
1741         DECLARE_WAITQUEUE(wait, current);
1742         ssize_t ret;
1743         unsigned long flags;
1744         unsigned ptr;
1745         int cnt;
1746
1747         VALIDATE_STATE(s);
1748         if (!access_ok(VERIFY_WRITE, buffer, count))
1749                 return -EFAULT;
1750         if (count == 0)
1751                 return 0;
1752         ret = 0;
1753         add_wait_queue(&s->midi.iwait, &wait);
1754         while (count > 0) {
1755                 spin_lock_irqsave(&s->lock, flags);
1756                 ptr = s->midi.ird;
1757                 cnt = MIDIINBUF - ptr;
1758                 if (s->midi.icnt < cnt)
1759                         cnt = s->midi.icnt;
1760                 if (cnt <= 0)
1761                         __set_current_state(TASK_INTERRUPTIBLE);
1762                 spin_unlock_irqrestore(&s->lock, flags);
1763                 if (cnt > count)
1764                         cnt = count;
1765                 if (cnt <= 0) {
1766                         if (file->f_flags & O_NONBLOCK) {
1767                                 if (!ret)
1768                                         ret = -EAGAIN;
1769                                 break;
1770                         }
1771                         schedule();
1772                         if (signal_pending(current)) {
1773                                 if (!ret)
1774                                         ret = -ERESTARTSYS;
1775                                 break;
1776                         }
1777                         continue;
1778                 }
1779                 if (copy_to_user(buffer, s->midi.ibuf + ptr, cnt)) {
1780                         if (!ret)
1781                                 ret = -EFAULT;
1782                         break;
1783                 }
1784                 ptr = (ptr + cnt) % MIDIINBUF;
1785                 spin_lock_irqsave(&s->lock, flags);
1786                 s->midi.ird = ptr;
1787                 s->midi.icnt -= cnt;
1788                 spin_unlock_irqrestore(&s->lock, flags);
1789                 count -= cnt;
1790                 buffer += cnt;
1791                 ret += cnt;
1792                 break;
1793         }
1794         __set_current_state(TASK_RUNNING);
1795         remove_wait_queue(&s->midi.iwait, &wait);
1796         return ret;
1797 }
1798
1799 static ssize_t solo1_midi_write(struct file *file, const char __user *buffer, size_t count, loff_t *ppos)
1800 {
1801         struct solo1_state *s = (struct solo1_state *)file->private_data;
1802         DECLARE_WAITQUEUE(wait, current);
1803         ssize_t ret;
1804         unsigned long flags;
1805         unsigned ptr;
1806         int cnt;
1807
1808         VALIDATE_STATE(s);
1809         if (!access_ok(VERIFY_READ, buffer, count))
1810                 return -EFAULT;
1811         if (count == 0)
1812                 return 0;
1813         ret = 0;
1814         add_wait_queue(&s->midi.owait, &wait);
1815         while (count > 0) {
1816                 spin_lock_irqsave(&s->lock, flags);
1817                 ptr = s->midi.owr;
1818                 cnt = MIDIOUTBUF - ptr;
1819                 if (s->midi.ocnt + cnt > MIDIOUTBUF)
1820                         cnt = MIDIOUTBUF - s->midi.ocnt;
1821                 if (cnt <= 0) {
1822                         __set_current_state(TASK_INTERRUPTIBLE);
1823                         solo1_handle_midi(s);
1824                 }
1825                 spin_unlock_irqrestore(&s->lock, flags);
1826                 if (cnt > count)
1827                         cnt = count;
1828                 if (cnt <= 0) {
1829                         if (file->f_flags & O_NONBLOCK) {
1830                                 if (!ret)
1831                                         ret = -EAGAIN;
1832                                 break;
1833                         }
1834                         schedule();
1835                         if (signal_pending(current)) {
1836                                 if (!ret)
1837                                         ret = -ERESTARTSYS;
1838                                 break;
1839                         }
1840                         continue;
1841                 }
1842                 if (copy_from_user(s->midi.obuf + ptr, buffer, cnt)) {
1843                         if (!ret)
1844                                 ret = -EFAULT;
1845                         break;
1846                 }
1847                 ptr = (ptr + cnt) % MIDIOUTBUF;
1848                 spin_lock_irqsave(&s->lock, flags);
1849                 s->midi.owr = ptr;
1850                 s->midi.ocnt += cnt;
1851                 spin_unlock_irqrestore(&s->lock, flags);
1852                 count -= cnt;
1853                 buffer += cnt;
1854                 ret += cnt;
1855                 spin_lock_irqsave(&s->lock, flags);
1856                 solo1_handle_midi(s);
1857                 spin_unlock_irqrestore(&s->lock, flags);
1858         }
1859         __set_current_state(TASK_RUNNING);
1860         remove_wait_queue(&s->midi.owait, &wait);
1861         return ret;
1862 }
1863
1864 /* No kernel lock - we have our own spinlock */
1865 static unsigned int solo1_midi_poll(struct file *file, struct poll_table_struct *wait)
1866 {
1867         struct solo1_state *s = (struct solo1_state *)file->private_data;
1868         unsigned long flags;
1869         unsigned int mask = 0;
1870
1871         VALIDATE_STATE(s);
1872         if (file->f_flags & FMODE_WRITE)
1873                 poll_wait(file, &s->midi.owait, wait);
1874         if (file->f_flags & FMODE_READ)
1875                 poll_wait(file, &s->midi.iwait, wait);
1876         spin_lock_irqsave(&s->lock, flags);
1877         if (file->f_flags & FMODE_READ) {
1878                 if (s->midi.icnt > 0)
1879                         mask |= POLLIN | POLLRDNORM;
1880         }
1881         if (file->f_flags & FMODE_WRITE) {
1882                 if (s->midi.ocnt < MIDIOUTBUF)
1883                         mask |= POLLOUT | POLLWRNORM;
1884         }
1885         spin_unlock_irqrestore(&s->lock, flags);
1886         return mask;
1887 }
1888
1889 static int solo1_midi_open(struct inode *inode, struct file *file)
1890 {
1891         unsigned int minor = iminor(inode);
1892         DECLARE_WAITQUEUE(wait, current);
1893         unsigned long flags;
1894         struct solo1_state *s = NULL;
1895         struct pci_dev *pci_dev = NULL;
1896
1897         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
1898                 struct pci_driver *drvr;
1899
1900                 drvr = pci_dev_driver(pci_dev);
1901                 if (drvr != &solo1_driver)
1902                         continue;
1903                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
1904                 if (!s)
1905                         continue;
1906                 if (s->dev_midi == minor)
1907                         break;
1908         }
1909         if (!s)
1910                 return -ENODEV;
1911         VALIDATE_STATE(s);
1912         file->private_data = s;
1913         /* wait for device to become free */
1914         down(&s->open_sem);
1915         while (s->open_mode & (file->f_mode << FMODE_MIDI_SHIFT)) {
1916                 if (file->f_flags & O_NONBLOCK) {
1917                         up(&s->open_sem);
1918                         return -EBUSY;
1919                 }
1920                 add_wait_queue(&s->open_wait, &wait);
1921                 __set_current_state(TASK_INTERRUPTIBLE);
1922                 up(&s->open_sem);
1923                 schedule();
1924                 remove_wait_queue(&s->open_wait, &wait);
1925                 set_current_state(TASK_RUNNING);
1926                 if (signal_pending(current))
1927                         return -ERESTARTSYS;
1928                 down(&s->open_sem);
1929         }
1930         spin_lock_irqsave(&s->lock, flags);
1931         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1932                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1933                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1934                 outb(0xff, s->mpubase+1); /* reset command */
1935                 outb(0x3f, s->mpubase+1); /* uart command */
1936                 if (!(inb(s->mpubase+1) & 0x80))
1937                         inb(s->mpubase);
1938                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1939                 outb(0xb0, s->iobase + 7); /* enable A1, A2, MPU irq's */
1940                 init_timer(&s->midi.timer);
1941                 s->midi.timer.expires = jiffies+1;
1942                 s->midi.timer.data = (unsigned long)s;
1943                 s->midi.timer.function = solo1_midi_timer;
1944                 add_timer(&s->midi.timer);
1945         }
1946         if (file->f_mode & FMODE_READ) {
1947                 s->midi.ird = s->midi.iwr = s->midi.icnt = 0;
1948         }
1949         if (file->f_mode & FMODE_WRITE) {
1950                 s->midi.ord = s->midi.owr = s->midi.ocnt = 0;
1951         }
1952         spin_unlock_irqrestore(&s->lock, flags);
1953         s->open_mode |= (file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ | FMODE_MIDI_WRITE);
1954         up(&s->open_sem);
1955         return nonseekable_open(inode, file);
1956 }
1957
1958 static int solo1_midi_release(struct inode *inode, struct file *file)
1959 {
1960         struct solo1_state *s = (struct solo1_state *)file->private_data;
1961         DECLARE_WAITQUEUE(wait, current);
1962         unsigned long flags;
1963         unsigned count, tmo;
1964
1965         VALIDATE_STATE(s);
1966
1967         lock_kernel();
1968         if (file->f_mode & FMODE_WRITE) {
1969                 add_wait_queue(&s->midi.owait, &wait);
1970                 for (;;) {
1971                         __set_current_state(TASK_INTERRUPTIBLE);
1972                         spin_lock_irqsave(&s->lock, flags);
1973                         count = s->midi.ocnt;
1974                         spin_unlock_irqrestore(&s->lock, flags);
1975                         if (count <= 0)
1976                                 break;
1977                         if (signal_pending(current))
1978                                 break;
1979                         if (file->f_flags & O_NONBLOCK)
1980                                 break;
1981                         tmo = (count * HZ) / 3100;
1982                         if (!schedule_timeout(tmo ? : 1) && tmo)
1983                                 printk(KERN_DEBUG "solo1: midi timed out??\n");
1984                 }
1985                 remove_wait_queue(&s->midi.owait, &wait);
1986                 set_current_state(TASK_RUNNING);
1987         }
1988         down(&s->open_sem);
1989         s->open_mode &= ~((file->f_mode << FMODE_MIDI_SHIFT) & (FMODE_MIDI_READ|FMODE_MIDI_WRITE));
1990         spin_lock_irqsave(&s->lock, flags);
1991         if (!(s->open_mode & (FMODE_MIDI_READ | FMODE_MIDI_WRITE))) {
1992                 outb(0x30, s->iobase + 7); /* enable A1, A2 irq's */
1993                 del_timer(&s->midi.timer);
1994         }
1995         spin_unlock_irqrestore(&s->lock, flags);
1996         wake_up(&s->open_wait);
1997         up(&s->open_sem);
1998         unlock_kernel();
1999         return 0;
2000 }
2001
2002 static /*const*/ struct file_operations solo1_midi_fops = {
2003         .owner          = THIS_MODULE,
2004         .llseek         = no_llseek,
2005         .read           = solo1_midi_read,
2006         .write          = solo1_midi_write,
2007         .poll           = solo1_midi_poll,
2008         .open           = solo1_midi_open,
2009         .release        = solo1_midi_release,
2010 };
2011
2012 /* --------------------------------------------------------------------- */
2013
2014 static int solo1_dmfm_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
2015 {
2016         static const unsigned char op_offset[18] = {
2017                 0x00, 0x01, 0x02, 0x03, 0x04, 0x05,
2018                 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
2019                 0x10, 0x11, 0x12, 0x13, 0x14, 0x15
2020         };
2021         struct solo1_state *s = (struct solo1_state *)file->private_data;
2022         struct dm_fm_voice v;
2023         struct dm_fm_note n;
2024         struct dm_fm_params p;
2025         unsigned int io;
2026         unsigned int regb;
2027
2028         switch (cmd) {
2029         case FM_IOCTL_RESET:
2030                 for (regb = 0xb0; regb < 0xb9; regb++) {
2031                         outb(regb, s->sbbase);
2032                         outb(0, s->sbbase+1);
2033                         outb(regb, s->sbbase+2);
2034                         outb(0, s->sbbase+3);
2035                 }
2036                 return 0;
2037
2038         case FM_IOCTL_PLAY_NOTE:
2039                 if (copy_from_user(&n, (void __user *)arg, sizeof(n)))
2040                         return -EFAULT;
2041                 if (n.voice >= 18)
2042                         return -EINVAL;
2043                 if (n.voice >= 9) {
2044                         regb = n.voice - 9;
2045                         io = s->sbbase+2;
2046                 } else {
2047                         regb = n.voice;
2048                         io = s->sbbase;
2049                 }
2050                 outb(0xa0 + regb, io);
2051                 outb(n.fnum & 0xff, io+1);
2052                 outb(0xb0 + regb, io);
2053                 outb(((n.fnum >> 8) & 3) | ((n.octave & 7) << 2) | ((n.key_on & 1) << 5), io+1);
2054                 return 0;
2055
2056         case FM_IOCTL_SET_VOICE:
2057                 if (copy_from_user(&v, (void __user *)arg, sizeof(v)))
2058                         return -EFAULT;
2059                 if (v.voice >= 18)
2060                         return -EINVAL;
2061                 regb = op_offset[v.voice];
2062                 io = s->sbbase + ((v.op & 1) << 1);
2063                 outb(0x20 + regb, io);
2064                 outb(((v.am & 1) << 7) | ((v.vibrato & 1) << 6) | ((v.do_sustain & 1) << 5) |
2065                      ((v.kbd_scale & 1) << 4) | (v.harmonic & 0xf), io+1);
2066                 outb(0x40 + regb, io);
2067                 outb(((v.scale_level & 0x3) << 6) | (v.volume & 0x3f), io+1);
2068                 outb(0x60 + regb, io);
2069                 outb(((v.attack & 0xf) << 4) | (v.decay & 0xf), io+1);
2070                 outb(0x80 + regb, io);
2071                 outb(((v.sustain & 0xf) << 4) | (v.release & 0xf), io+1);
2072                 outb(0xe0 + regb, io);
2073                 outb(v.waveform & 0x7, io+1);
2074                 if (n.voice >= 9) {
2075                         regb = n.voice - 9;
2076                         io = s->sbbase+2;
2077                 } else {
2078                         regb = n.voice;
2079                         io = s->sbbase;
2080                 }
2081                 outb(0xc0 + regb, io);
2082                 outb(((v.right & 1) << 5) | ((v.left & 1) << 4) | ((v.feedback & 7) << 1) |
2083                      (v.connection & 1), io+1);
2084                 return 0;
2085
2086         case FM_IOCTL_SET_PARAMS:
2087                 if (copy_from_user(&p, (void __user *)arg, sizeof(p)))
2088                         return -EFAULT;
2089                 outb(0x08, s->sbbase);
2090                 outb((p.kbd_split & 1) << 6, s->sbbase+1);
2091                 outb(0xbd, s->sbbase);
2092                 outb(((p.am_depth & 1) << 7) | ((p.vib_depth & 1) << 6) | ((p.rhythm & 1) << 5) | ((p.bass & 1) << 4) |
2093                      ((p.snare & 1) << 3) | ((p.tomtom & 1) << 2) | ((p.cymbal & 1) << 1) | (p.hihat & 1), s->sbbase+1);
2094                 return 0;
2095
2096         case FM_IOCTL_SET_OPL:
2097                 outb(4, s->sbbase+2);
2098                 outb(arg, s->sbbase+3);
2099                 return 0;
2100
2101         case FM_IOCTL_SET_MODE:
2102                 outb(5, s->sbbase+2);
2103                 outb(arg & 1, s->sbbase+3);
2104                 return 0;
2105
2106         default:
2107                 return -EINVAL;
2108         }
2109 }
2110
2111 static int solo1_dmfm_open(struct inode *inode, struct file *file)
2112 {
2113         unsigned int minor = iminor(inode);
2114         DECLARE_WAITQUEUE(wait, current);
2115         struct solo1_state *s = NULL;
2116         struct pci_dev *pci_dev = NULL;
2117
2118         while ((pci_dev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL) {
2119                 struct pci_driver *drvr;
2120
2121                 drvr = pci_dev_driver(pci_dev);
2122                 if (drvr != &solo1_driver)
2123                         continue;
2124                 s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2125                 if (!s)
2126                         continue;
2127                 if (s->dev_dmfm == minor)
2128                         break;
2129         }
2130         if (!s)
2131                 return -ENODEV;
2132         VALIDATE_STATE(s);
2133         file->private_data = s;
2134         /* wait for device to become free */
2135         down(&s->open_sem);
2136         while (s->open_mode & FMODE_DMFM) {
2137                 if (file->f_flags & O_NONBLOCK) {
2138                         up(&s->open_sem);
2139                         return -EBUSY;
2140                 }
2141                 add_wait_queue(&s->open_wait, &wait);
2142                 __set_current_state(TASK_INTERRUPTIBLE);
2143                 up(&s->open_sem);
2144                 schedule();
2145                 remove_wait_queue(&s->open_wait, &wait);
2146                 set_current_state(TASK_RUNNING);
2147                 if (signal_pending(current))
2148                         return -ERESTARTSYS;
2149                 down(&s->open_sem);
2150         }
2151         if (!request_region(s->sbbase, FMSYNTH_EXTENT, "ESS Solo1")) {
2152                 up(&s->open_sem);
2153                 printk(KERN_ERR "solo1: FM synth io ports in use, opl3 loaded?\n");
2154                 return -EBUSY;
2155         }
2156         /* init the stuff */
2157         outb(1, s->sbbase);
2158         outb(0x20, s->sbbase+1); /* enable waveforms */
2159         outb(4, s->sbbase+2);
2160         outb(0, s->sbbase+3);  /* no 4op enabled */
2161         outb(5, s->sbbase+2);
2162         outb(1, s->sbbase+3);  /* enable OPL3 */
2163         s->open_mode |= FMODE_DMFM;
2164         up(&s->open_sem);
2165         return nonseekable_open(inode, file);
2166 }
2167
2168 static int solo1_dmfm_release(struct inode *inode, struct file *file)
2169 {
2170         struct solo1_state *s = (struct solo1_state *)file->private_data;
2171         unsigned int regb;
2172
2173         VALIDATE_STATE(s);
2174         lock_kernel();
2175         down(&s->open_sem);
2176         s->open_mode &= ~FMODE_DMFM;
2177         for (regb = 0xb0; regb < 0xb9; regb++) {
2178                 outb(regb, s->sbbase);
2179                 outb(0, s->sbbase+1);
2180                 outb(regb, s->sbbase+2);
2181                 outb(0, s->sbbase+3);
2182         }
2183         release_region(s->sbbase, FMSYNTH_EXTENT);
2184         wake_up(&s->open_wait);
2185         up(&s->open_sem);
2186         unlock_kernel();
2187         return 0;
2188 }
2189
2190 static /*const*/ struct file_operations solo1_dmfm_fops = {
2191         .owner          = THIS_MODULE,
2192         .llseek         = no_llseek,
2193         .ioctl          = solo1_dmfm_ioctl,
2194         .open           = solo1_dmfm_open,
2195         .release        = solo1_dmfm_release,
2196 };
2197
2198 /* --------------------------------------------------------------------- */
2199
2200 static struct initvol {
2201         int mixch;
2202         int vol;
2203 } initvol[] __devinitdata = {
2204         { SOUND_MIXER_WRITE_VOLUME, 0x4040 },
2205         { SOUND_MIXER_WRITE_PCM, 0x4040 },
2206         { SOUND_MIXER_WRITE_SYNTH, 0x4040 },
2207         { SOUND_MIXER_WRITE_CD, 0x4040 },
2208         { SOUND_MIXER_WRITE_LINE, 0x4040 },
2209         { SOUND_MIXER_WRITE_LINE1, 0x4040 },
2210         { SOUND_MIXER_WRITE_LINE2, 0x4040 },
2211         { SOUND_MIXER_WRITE_RECLEV, 0x4040 },
2212         { SOUND_MIXER_WRITE_SPEAKER, 0x4040 },
2213         { SOUND_MIXER_WRITE_MIC, 0x4040 }
2214 };
2215
2216 static int setup_solo1(struct solo1_state *s)
2217 {
2218         struct pci_dev *pcidev = s->dev;
2219         mm_segment_t fs;
2220         int i, val;
2221
2222         /* initialize DDMA base address */
2223         printk(KERN_DEBUG "solo1: ddma base address: 0x%lx\n", s->ddmabase);
2224         pci_write_config_word(pcidev, 0x60, (s->ddmabase & (~0xf)) | 1);
2225         /* set DMA policy to DDMA, IRQ emulation off (CLKRUN disabled for now) */
2226         pci_write_config_dword(pcidev, 0x50, 0);
2227         /* disable legacy audio address decode */
2228         pci_write_config_word(pcidev, 0x40, 0x907f);
2229
2230         /* initialize the chips */
2231         if (!reset_ctrl(s)) {
2232                 printk(KERN_ERR "esssolo1: cannot reset controller\n");
2233                 return -1;
2234         }
2235         outb(0xb0, s->iobase+7); /* enable A1, A2, MPU irq's */
2236
2237         /* initialize mixer regs */
2238         write_mixer(s, 0x7f, 0); /* disable music digital recording */
2239         write_mixer(s, 0x7d, 0x0c); /* enable mic preamp, MONO_OUT is 2nd DAC right channel */
2240         write_mixer(s, 0x64, 0x45); /* volume control */
2241         write_mixer(s, 0x48, 0x10); /* enable music DAC/ES6xx interface */
2242         write_mixer(s, 0x50, 0);  /* disable spatializer */
2243         write_mixer(s, 0x52, 0);
2244         write_mixer(s, 0x14, 0);  /* DAC1 minimum volume */
2245         write_mixer(s, 0x71, 0x20); /* enable new 0xA1 reg format */
2246         outb(0, s->ddmabase+0xd); /* DMA master clear */
2247         outb(1, s->ddmabase+0xf); /* mask channel */
2248         /*outb(0, s->ddmabase+0x8);*/ /* enable controller (enable is low active!!) */
2249
2250         pci_set_master(pcidev);  /* enable bus mastering */
2251
2252         fs = get_fs();
2253         set_fs(KERNEL_DS);
2254         val = SOUND_MASK_LINE;
2255         mixer_ioctl(s, SOUND_MIXER_WRITE_RECSRC, (unsigned long)&val);
2256         for (i = 0; i < sizeof(initvol)/sizeof(initvol[0]); i++) {
2257                 val = initvol[i].vol;
2258                 mixer_ioctl(s, initvol[i].mixch, (unsigned long)&val);
2259         }
2260         val = 1; /* enable mic preamp */
2261         mixer_ioctl(s, SOUND_MIXER_PRIVATE1, (unsigned long)&val);
2262         set_fs(fs);
2263         return 0;
2264 }
2265
2266 static int
2267 solo1_suspend(struct pci_dev *pci_dev, pm_message_t state) {
2268         struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2269         if (!s)
2270                 return 1;
2271         outb(0, s->iobase+6);
2272         /* DMA master clear */
2273         outb(0, s->ddmabase+0xd);
2274         /* reset sequencer and FIFO */
2275         outb(3, s->sbbase+6);
2276         /* turn off DDMA controller address space */
2277         pci_write_config_word(s->dev, 0x60, 0);
2278         return 0;
2279 }
2280
2281 static int
2282 solo1_resume(struct pci_dev *pci_dev) {
2283         struct solo1_state *s = (struct solo1_state*)pci_get_drvdata(pci_dev);
2284         if (!s)
2285                 return 1;
2286         setup_solo1(s);
2287         return 0;
2288 }
2289
2290 #ifdef SUPPORT_JOYSTICK
2291 static int __devinit solo1_register_gameport(struct solo1_state *s, int io_port)
2292 {
2293         struct gameport *gp;
2294
2295         if (!request_region(io_port, GAMEPORT_EXTENT, "ESS Solo1")) {
2296                 printk(KERN_ERR "solo1: gameport io ports are in use\n");
2297                 return -EBUSY;
2298         }
2299
2300         s->gameport = gp = gameport_allocate_port();
2301         if (!gp) {
2302                 printk(KERN_ERR "solo1: can not allocate memory for gameport\n");
2303                 release_region(io_port, GAMEPORT_EXTENT);
2304                 return -ENOMEM;
2305         }
2306
2307         gameport_set_name(gp, "ESS Solo1 Gameport");
2308         gameport_set_phys(gp, "isa%04x/gameport0", io_port);
2309         gp->dev.parent = &s->dev->dev;
2310         gp->io = io_port;
2311
2312         gameport_register_port(gp);
2313
2314         return 0;
2315 }
2316
2317 static inline void solo1_unregister_gameport(struct solo1_state *s)
2318 {
2319         if (s->gameport) {
2320                 int gpio = s->gameport->io;
2321                 gameport_unregister_port(s->gameport);
2322                 release_region(gpio, GAMEPORT_EXTENT);
2323         }
2324 }
2325 #else
2326 static inline int solo1_register_gameport(struct solo1_state *s, int io_port) { return -ENOSYS; }
2327 static inline void solo1_unregister_gameport(struct solo1_state *s) { }
2328 #endif /* SUPPORT_JOYSTICK */
2329
2330 static int __devinit solo1_probe(struct pci_dev *pcidev, const struct pci_device_id *pciid)
2331 {
2332         struct solo1_state *s;
2333         int gpio;
2334         int ret;
2335
2336         if ((ret=pci_enable_device(pcidev)))
2337                 return ret;
2338         if (!(pci_resource_flags(pcidev, 0) & IORESOURCE_IO) ||
2339             !(pci_resource_flags(pcidev, 1) & IORESOURCE_IO) ||
2340             !(pci_resource_flags(pcidev, 2) & IORESOURCE_IO) ||
2341             !(pci_resource_flags(pcidev, 3) & IORESOURCE_IO))
2342                 return -ENODEV;
2343         if (pcidev->irq == 0)
2344                 return -ENODEV;
2345
2346         /* Recording requires 24-bit DMA, so attempt to set dma mask
2347          * to 24 bits first, then 32 bits (playback only) if that fails.
2348          */
2349         if (pci_set_dma_mask(pcidev, 0x00ffffff) &&
2350             pci_set_dma_mask(pcidev, DMA_32BIT_MASK)) {
2351                 printk(KERN_WARNING "solo1: architecture does not support 24bit or 32bit PCI busmaster DMA\n");
2352                 return -ENODEV;
2353         }
2354
2355         if (!(s = kmalloc(sizeof(struct solo1_state), GFP_KERNEL))) {
2356                 printk(KERN_WARNING "solo1: out of memory\n");
2357                 return -ENOMEM;
2358         }
2359         memset(s, 0, sizeof(struct solo1_state));
2360         init_waitqueue_head(&s->dma_adc.wait);
2361         init_waitqueue_head(&s->dma_dac.wait);
2362         init_waitqueue_head(&s->open_wait);
2363         init_waitqueue_head(&s->midi.iwait);
2364         init_waitqueue_head(&s->midi.owait);
2365         init_MUTEX(&s->open_sem);
2366         spin_lock_init(&s->lock);
2367         s->magic = SOLO1_MAGIC;
2368         s->dev = pcidev;
2369         s->iobase = pci_resource_start(pcidev, 0);
2370         s->sbbase = pci_resource_start(pcidev, 1);
2371         s->vcbase = pci_resource_start(pcidev, 2);
2372         s->ddmabase = s->vcbase + DDMABASE_OFFSET;
2373         s->mpubase = pci_resource_start(pcidev, 3);
2374         gpio = pci_resource_start(pcidev, 4);
2375         s->irq = pcidev->irq;
2376         ret = -EBUSY;
2377         if (!request_region(s->iobase, IOBASE_EXTENT, "ESS Solo1")) {
2378                 printk(KERN_ERR "solo1: io ports in use\n");
2379                 goto err_region1;
2380         }
2381         if (!request_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT, "ESS Solo1")) {
2382                 printk(KERN_ERR "solo1: io ports in use\n");
2383                 goto err_region2;
2384         }
2385         if (!request_region(s->ddmabase, DDMABASE_EXTENT, "ESS Solo1")) {
2386                 printk(KERN_ERR "solo1: io ports in use\n");
2387                 goto err_region3;
2388         }
2389         if (!request_region(s->mpubase, MPUBASE_EXTENT, "ESS Solo1")) {
2390                 printk(KERN_ERR "solo1: io ports in use\n");
2391                 goto err_region4;
2392         }
2393         if ((ret=request_irq(s->irq,solo1_interrupt,SA_SHIRQ,"ESS Solo1",s))) {
2394                 printk(KERN_ERR "solo1: irq %u in use\n", s->irq);
2395                 goto err_irq;
2396         }
2397         /* register devices */
2398         if ((s->dev_audio = register_sound_dsp(&solo1_audio_fops, -1)) < 0) {
2399                 ret = s->dev_audio;
2400                 goto err_dev1;
2401         }
2402         if ((s->dev_mixer = register_sound_mixer(&solo1_mixer_fops, -1)) < 0) {
2403                 ret = s->dev_mixer;
2404                 goto err_dev2;
2405         }
2406         if ((s->dev_midi = register_sound_midi(&solo1_midi_fops, -1)) < 0) {
2407                 ret = s->dev_midi;
2408                 goto err_dev3;
2409         }
2410         if ((s->dev_dmfm = register_sound_special(&solo1_dmfm_fops, 15 /* ?? */)) < 0) {
2411                 ret = s->dev_dmfm;
2412                 goto err_dev4;
2413         }
2414         if (setup_solo1(s)) {
2415                 ret = -EIO;
2416                 goto err;
2417         }
2418         /* register gameport */
2419         solo1_register_gameport(s, gpio);
2420         /* store it in the driver field */
2421         pci_set_drvdata(pcidev, s);
2422         return 0;
2423
2424  err:
2425         unregister_sound_special(s->dev_dmfm);
2426  err_dev4:
2427         unregister_sound_midi(s->dev_midi);
2428  err_dev3:
2429         unregister_sound_mixer(s->dev_mixer);
2430  err_dev2:
2431         unregister_sound_dsp(s->dev_audio);
2432  err_dev1:
2433         printk(KERN_ERR "solo1: initialisation error\n");
2434         free_irq(s->irq, s);
2435  err_irq:
2436         release_region(s->mpubase, MPUBASE_EXTENT);
2437  err_region4:
2438         release_region(s->ddmabase, DDMABASE_EXTENT);
2439  err_region3:
2440         release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2441  err_region2:
2442         release_region(s->iobase, IOBASE_EXTENT);
2443  err_region1:
2444         kfree(s);
2445         return ret;
2446 }
2447
2448 static void __devexit solo1_remove(struct pci_dev *dev)
2449 {
2450         struct solo1_state *s = pci_get_drvdata(dev);
2451
2452         if (!s)
2453                 return;
2454         /* stop DMA controller */
2455         outb(0, s->iobase+6);
2456         outb(0, s->ddmabase+0xd); /* DMA master clear */
2457         outb(3, s->sbbase+6); /* reset sequencer and FIFO */
2458         synchronize_irq(s->irq);
2459         pci_write_config_word(s->dev, 0x60, 0); /* turn off DDMA controller address space */
2460         free_irq(s->irq, s);
2461         solo1_unregister_gameport(s);
2462         release_region(s->iobase, IOBASE_EXTENT);
2463         release_region(s->sbbase+FMSYNTH_EXTENT, SBBASE_EXTENT-FMSYNTH_EXTENT);
2464         release_region(s->ddmabase, DDMABASE_EXTENT);
2465         release_region(s->mpubase, MPUBASE_EXTENT);
2466         unregister_sound_dsp(s->dev_audio);
2467         unregister_sound_mixer(s->dev_mixer);
2468         unregister_sound_midi(s->dev_midi);
2469         unregister_sound_special(s->dev_dmfm);
2470         kfree(s);
2471         pci_set_drvdata(dev, NULL);
2472 }
2473
2474 static struct pci_device_id id_table[] = {
2475         { PCI_VENDOR_ID_ESS, PCI_DEVICE_ID_ESS_SOLO1, PCI_ANY_ID, PCI_ANY_ID, 0, 0 },
2476         { 0, }
2477 };
2478
2479 MODULE_DEVICE_TABLE(pci, id_table);
2480
2481 static struct pci_driver solo1_driver = {
2482         .name           = "ESS Solo1",
2483         .id_table       = id_table,
2484         .probe          = solo1_probe,
2485         .remove         = __devexit_p(solo1_remove),
2486         .suspend        = solo1_suspend,
2487         .resume         = solo1_resume,
2488 };
2489
2490
2491 static int __init init_solo1(void)
2492 {
2493         printk(KERN_INFO "solo1: version v0.20 time " __TIME__ " " __DATE__ "\n");
2494         return pci_register_driver(&solo1_driver);
2495 }
2496
2497 /* --------------------------------------------------------------------- */
2498
2499 MODULE_AUTHOR("Thomas M. Sailer, sailer@ife.ee.ethz.ch, hb9jnx@hb9w.che.eu");
2500 MODULE_DESCRIPTION("ESS Solo1 Driver");
2501 MODULE_LICENSE("GPL");
2502
2503
2504 static void __exit cleanup_solo1(void)
2505 {
2506         printk(KERN_INFO "solo1: unloading\n");
2507         pci_unregister_driver(&solo1_driver);
2508 }
2509
2510 /* --------------------------------------------------------------------- */
2511
2512 module_init(init_solo1);
2513 module_exit(cleanup_solo1);
2514