git.oblomov.eu Git - linux-2.6/blob - drivers/pci/hotplug/cpqphp_core.c

   1 /*
   2  * Compaq Hot Plug Controller Driver
   3  *
   4  * Copyright (C) 1995,2001 Compaq Computer Corporation
   5  * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
   6  * Copyright (C) 2001 IBM Corp.
   7  *
   8  * All rights reserved.
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License as published by
  12  * the Free Software Foundation; either version 2 of the License, or (at
  13  * your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful, but
  16  * WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18  * NON INFRINGEMENT.  See the GNU General Public License for more
  19  * details.
  20  *
  21  * You should have received a copy of the GNU General Public License
  22  * along with this program; if not, write to the Free Software
  23  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24  *
  25  * Send feedback to <greg@kroah.com>
  26  *
  27  * Jan 12, 2003 -       Added 66/100/133MHz PCI-X support,
  28  *                      Torben Mathiasen <torben.mathiasen@hp.com>
  29  *
  30  */
  31
  32 #include <linux/config.h>
  33 #include <linux/module.h>
  34 #include <linux/moduleparam.h>
  35 #include <linux/kernel.h>
  36 #include <linux/types.h>
  37 #include <linux/proc_fs.h>
  38 #include <linux/slab.h>
  39 #include <linux/workqueue.h>
  40 #include <linux/pci.h>
  41 #include <linux/init.h>
  42 #include <linux/interrupt.h>
  43
  44 #include <asm/uaccess.h>
  45
  46 #include "cpqphp.h"
  47 #include "cpqphp_nvram.h"
  48 #include "../../../arch/i386/pci/pci.h" /* horrible hack showing how processor dependent we are... */
  49
  50
  51 /* Global variables */
  52 int cpqhp_debug;
  53 int cpqhp_legacy_mode;
  54 struct controller *cpqhp_ctrl_list;     /* = NULL */
  55 struct pci_func *cpqhp_slot_list[256];
  56
  57 /* local variables */
  58 static void __iomem *smbios_table;
  59 static void __iomem *smbios_start;
  60 static void __iomem *cpqhp_rom_start;
  61 static int power_mode;
  62 static int debug;
  63 static int initialized;
  64
  65 #define DRIVER_VERSION  "0.9.8"
  66 #define DRIVER_AUTHOR   "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  67 #define DRIVER_DESC     "Compaq Hot Plug PCI Controller Driver"
  68
  69 MODULE_AUTHOR(DRIVER_AUTHOR);
  70 MODULE_DESCRIPTION(DRIVER_DESC);
  71 MODULE_LICENSE("GPL");
  72
  73 module_param(power_mode, bool, 0644);
  74 MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  75
  76 module_param(debug, bool, 0644);
  77 MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  78
  79 #define CPQHPC_MODULE_MINOR 208
  80
  81 static int one_time_init        (void);
  82 static int set_attention_status (struct hotplug_slot *slot, u8 value);
  83 static int process_SI           (struct hotplug_slot *slot);
  84 static int process_SS           (struct hotplug_slot *slot);
  85 static int hardware_test        (struct hotplug_slot *slot, u32 value);
  86 static int get_power_status     (struct hotplug_slot *slot, u8 *value);
  87 static int get_attention_status (struct hotplug_slot *slot, u8 *value);
  88 static int get_latch_status     (struct hotplug_slot *slot, u8 *value);
  89 static int get_adapter_status   (struct hotplug_slot *slot, u8 *value);
  90 static int get_max_bus_speed    (struct hotplug_slot *slot, enum pci_bus_speed *value);
  91 static int get_cur_bus_speed    (struct hotplug_slot *slot, enum pci_bus_speed *value);
  92
  93 static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  94         .owner =                THIS_MODULE,
  95         .set_attention_status = set_attention_status,
  96         .enable_slot =          process_SI,
  97         .disable_slot =         process_SS,
  98         .hardware_test =        hardware_test,
  99         .get_power_status =     get_power_status,
 100         .get_attention_status = get_attention_status,
 101         .get_latch_status =     get_latch_status,
 102         .get_adapter_status =   get_adapter_status,
 103         .get_max_bus_speed =    get_max_bus_speed,
 104         .get_cur_bus_speed =    get_cur_bus_speed,
 105 };
 106
 107
 108 static inline int is_slot64bit(struct slot *slot)
 109 {
 110         return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
 111 }
 112
 113 static inline int is_slot66mhz(struct slot *slot)
 114 {
 115         return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
 116 }
 117
 118 /**
 119  * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
 120  *
 121  * @begin: begin pointer for region to be scanned.
 122  * @end: end pointer for region to be scanned.
 123  *
 124  * Returns pointer to the head of the SMBIOS tables (or NULL)
 125  *
 126  */
 127 static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
 128 {
 129         void __iomem *fp;
 130         void __iomem *endp;
 131         u8 temp1, temp2, temp3, temp4;
 132         int status = 0;
 133
 134         endp = (end - sizeof(u32) + 1);
 135
 136         for (fp = begin; fp <= endp; fp += 16) {
 137                 temp1 = readb(fp);
 138                 temp2 = readb(fp+1);
 139                 temp3 = readb(fp+2);
 140                 temp4 = readb(fp+3);
 141                 if (temp1 == '_' &&
 142                     temp2 == 'S' &&
 143                     temp3 == 'M' &&
 144                     temp4 == '_') {
 145                         status = 1;
 146                         break;
 147                 }
 148         }
 149
 150         if (!status)
 151                 fp = NULL;
 152
 153         dbg("Discovered SMBIOS Entry point at %p\n", fp);
 154
 155         return fp;
 156 }
 157
 158 /**
 159  * init_SERR - Initializes the per slot SERR generation.
 160  *
 161  * For unexpected switch opens
 162  *
 163  */
 164 static int init_SERR(struct controller * ctrl)
 165 {
 166         u32 tempdword;
 167         u32 number_of_slots;
 168         u8 physical_slot;
 169
 170         if (!ctrl)
 171                 return 1;
 172
 173         tempdword = ctrl->first_slot;
 174
 175         number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
 176         // Loop through slots
 177         while (number_of_slots) {
 178                 physical_slot = tempdword;
 179                 writeb(0, ctrl->hpc_reg + SLOT_SERR);
 180                 tempdword++;
 181                 number_of_slots--;
 182         }
 183
 184         return 0;
 185 }
 186
 187
 188 /* nice debugging output */
 189 static int pci_print_IRQ_route (void)
 190 {
 191         struct irq_routing_table *routing_table;
 192         int len;
 193         int loop;
 194
 195         u8 tbus, tdevice, tslot;
 196
 197         routing_table = pcibios_get_irq_routing_table();
 198         if (routing_table == NULL) {
 199                 err("No BIOS Routing Table??? Not good\n");
 200                 return -ENOMEM;
 201         }
 202
 203         len = (routing_table->size - sizeof(struct irq_routing_table)) /
 204                         sizeof(struct irq_info);
 205         // Make sure I got at least one entry
 206         if (len == 0) {
 207                 kfree(routing_table);
 208                 return -1;
 209         }
 210
 211         dbg("bus dev func slot\n");
 212
 213         for (loop = 0; loop < len; ++loop) {
 214                 tbus = routing_table->slots[loop].bus;
 215                 tdevice = routing_table->slots[loop].devfn;
 216                 tslot = routing_table->slots[loop].slot;
 217                 dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
 218
 219         }
 220         kfree(routing_table);
 221         return 0;
 222 }
 223
 224
 225 /**
 226  * get_subsequent_smbios_entry: get the next entry from bios table.
 227  *
 228  * Gets the first entry if previous == NULL
 229  * Otherwise, returns the next entry
 230  * Uses global SMBIOS Table pointer
 231  *
 232  * @curr: %NULL or pointer to previously returned structure
 233  *
 234  * returns a pointer to an SMBIOS structure or NULL if none found
 235  */
 236 static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
 237                                                 void __iomem *smbios_table,
 238                                                 void __iomem *curr)
 239 {
 240         u8 bail = 0;
 241         u8 previous_byte = 1;
 242         void __iomem *p_temp;
 243         void __iomem *p_max;
 244
 245         if (!smbios_table || !curr)
 246                 return(NULL);
 247
 248         // set p_max to the end of the table
 249         p_max = smbios_start + readw(smbios_table + ST_LENGTH);
 250
 251         p_temp = curr;
 252         p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
 253
 254         while ((p_temp < p_max) && !bail) {
 255                 /* Look for the double NULL terminator
 256                  * The first condition is the previous byte
 257                  * and the second is the curr */
 258                 if (!previous_byte && !(readb(p_temp))) {
 259                         bail = 1;
 260                 }
 261
 262                 previous_byte = readb(p_temp);
 263                 p_temp++;
 264         }
 265
 266         if (p_temp < p_max) {
 267                 return p_temp;
 268         } else {
 269                 return NULL;
 270         }
 271 }
 272
 273
 274 /**
 275  * get_SMBIOS_entry
 276  *
 277  * @type:SMBIOS structure type to be returned
 278  * @previous: %NULL or pointer to previously returned structure
 279  *
 280  * Gets the first entry of the specified type if previous == NULL
 281  * Otherwise, returns the next entry of the given type.
 282  * Uses global SMBIOS Table pointer
 283  * Uses get_subsequent_smbios_entry
 284  *
 285  * returns a pointer to an SMBIOS structure or %NULL if none found
 286  */
 287 static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
 288                                         void __iomem *smbios_table,
 289                                         u8 type,
 290                                         void __iomem *previous)
 291 {
 292         if (!smbios_table)
 293                 return NULL;
 294
 295         if (!previous) {
 296                 previous = smbios_start;
 297         } else {
 298                 previous = get_subsequent_smbios_entry(smbios_start,
 299                                         smbios_table, previous);
 300         }
 301
 302         while (previous) {
 303                 if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
 304                         previous = get_subsequent_smbios_entry(smbios_start,
 305                                                 smbios_table, previous);
 306                 } else {
 307                         break;
 308                 }
 309         }
 310
 311         return previous;
 312 }
 313
 314 static void release_slot(struct hotplug_slot *hotplug_slot)
 315 {
 316         struct slot *slot = hotplug_slot->private;
 317
 318         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 319
 320         kfree(slot->hotplug_slot->info);
 321         kfree(slot->hotplug_slot->name);
 322         kfree(slot->hotplug_slot);
 323         kfree(slot);
 324 }
 325
 326 static int ctrl_slot_setup(struct controller *ctrl,
 327                         void __iomem *smbios_start,
 328                         void __iomem *smbios_table)
 329 {
 330         struct slot *new_slot;
 331         u8 number_of_slots;
 332         u8 slot_device;
 333         u8 slot_number;
 334         u8 ctrl_slot;
 335         u32 tempdword;
 336         void __iomem *slot_entry= NULL;
 337         int result = -ENOMEM;
 338
 339         dbg("%s\n", __FUNCTION__);
 340
 341         tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
 342
 343         number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
 344         slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
 345         slot_number = ctrl->first_slot;
 346
 347         while (number_of_slots) {
 348                 new_slot = kmalloc(sizeof(*new_slot), GFP_KERNEL);
 349                 if (!new_slot)
 350                         goto error;
 351
 352                 memset(new_slot, 0, sizeof(struct slot));
 353                 new_slot->hotplug_slot = kmalloc(sizeof(*(new_slot->hotplug_slot)),
 354                                                 GFP_KERNEL);
 355                 if (!new_slot->hotplug_slot)
 356                         goto error_slot;
 357                 memset(new_slot->hotplug_slot, 0, sizeof(struct hotplug_slot));
 358
 359                 new_slot->hotplug_slot->info =
 360                                 kmalloc(sizeof(*(new_slot->hotplug_slot->info)),
 361                                                         GFP_KERNEL);
 362                 if (!new_slot->hotplug_slot->info)
 363                         goto error_hpslot;
 364                 memset(new_slot->hotplug_slot->info, 0,
 365                                 sizeof(struct hotplug_slot_info));
 366                 new_slot->hotplug_slot->name = kmalloc(SLOT_NAME_SIZE, GFP_KERNEL);
 367                 if (!new_slot->hotplug_slot->name)
 368                         goto error_info;
 369
 370                 new_slot->ctrl = ctrl;
 371                 new_slot->bus = ctrl->bus;
 372                 new_slot->device = slot_device;
 373                 new_slot->number = slot_number;
 374                 dbg("slot->number = %d\n",new_slot->number);
 375
 376                 slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
 377                                         slot_entry);
 378
 379                 while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) != new_slot->number)) {
 380                         slot_entry = get_SMBIOS_entry(smbios_start,
 381                                                 smbios_table, 9, slot_entry);
 382                 }
 383
 384                 new_slot->p_sm_slot = slot_entry;
 385
 386                 init_timer(&new_slot->task_event);
 387                 new_slot->task_event.expires = jiffies + 5 * HZ;
 388                 new_slot->task_event.function = cpqhp_pushbutton_thread;
 389
 390                 //FIXME: these capabilities aren't used but if they are
 391                 //       they need to be correctly implemented
 392                 new_slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
 393                 new_slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
 394
 395                 if (is_slot64bit(new_slot))
 396                         new_slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
 397                 if (is_slot66mhz(new_slot))
 398                         new_slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
 399                 if (ctrl->speed == PCI_SPEED_66MHz)
 400                         new_slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
 401
 402                 ctrl_slot = slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
 403
 404                 // Check presence
 405                 new_slot->capabilities |= ((((~tempdword) >> 23) | ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
 406                 // Check the switch state
 407                 new_slot->capabilities |= ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
 408                 // Check the slot enable
 409                 new_slot->capabilities |= ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
 410
 411                 /* register this slot with the hotplug pci core */
 412                 new_slot->hotplug_slot->release = &release_slot;
 413                 new_slot->hotplug_slot->private = new_slot;
 414                 make_slot_name(new_slot->hotplug_slot->name, SLOT_NAME_SIZE, new_slot);
 415                 new_slot->hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
 416
 417                 new_slot->hotplug_slot->info->power_status = get_slot_enabled(ctrl, new_slot);
 418                 new_slot->hotplug_slot->info->attention_status = cpq_get_attention_status(ctrl, new_slot);
 419                 new_slot->hotplug_slot->info->latch_status = cpq_get_latch_status(ctrl, new_slot);
 420                 new_slot->hotplug_slot->info->adapter_status = get_presence_status(ctrl, new_slot);
 421
 422                 dbg ("registering bus %d, dev %d, number %d, "
 423                                 "ctrl->slot_device_offset %d, slot %d\n",
 424                                 new_slot->bus, new_slot->device,
 425                                 new_slot->number, ctrl->slot_device_offset,
 426                                 slot_number);
 427                 result = pci_hp_register (new_slot->hotplug_slot);
 428                 if (result) {
 429                         err ("pci_hp_register failed with error %d\n", result);
 430                         goto error_name;
 431                 }
 432
 433                 new_slot->next = ctrl->slot;
 434                 ctrl->slot = new_slot;
 435
 436                 number_of_slots--;
 437                 slot_device++;
 438                 slot_number++;
 439         }
 440
 441         return 0;
 442
 443 error_name:
 444         kfree(new_slot->hotplug_slot->name);
 445 error_info:
 446         kfree(new_slot->hotplug_slot->info);
 447 error_hpslot:
 448         kfree(new_slot->hotplug_slot);
 449 error_slot:
 450         kfree(new_slot);
 451 error:
 452         return result;
 453 }
 454
 455 static int ctrl_slot_cleanup (struct controller * ctrl)
 456 {
 457         struct slot *old_slot, *next_slot;
 458
 459         old_slot = ctrl->slot;
 460         ctrl->slot = NULL;
 461
 462         while (old_slot) {
 463                 /* memory will be freed by the release_slot callback */
 464                 next_slot = old_slot->next;
 465                 pci_hp_deregister (old_slot->hotplug_slot);
 466                 old_slot = next_slot;
 467         }
 468
 469         //Free IRQ associated with hot plug device
 470         free_irq(ctrl->interrupt, ctrl);
 471         //Unmap the memory
 472         iounmap(ctrl->hpc_reg);
 473         //Finally reclaim PCI mem
 474         release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
 475                            pci_resource_len(ctrl->pci_dev, 0));
 476
 477         return(0);
 478 }
 479
 480
 481 //============================================================================
 482 // function:    get_slot_mapping
 483 //
 484 // Description: Attempts to determine a logical slot mapping for a PCI
 485 //              device.  Won't work for more than one PCI-PCI bridge
 486 //              in a slot.
 487 //
 488 // Input:       u8 bus_num - bus number of PCI device
 489 //              u8 dev_num - device number of PCI device
 490 //              u8 *slot - Pointer to u8 where slot number will
 491 //                      be returned
 492 //
 493 // Output:      SUCCESS or FAILURE
 494 //=============================================================================
 495 static int
 496 get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
 497 {
 498         struct irq_routing_table *PCIIRQRoutingInfoLength;
 499         u32 work;
 500         long len;
 501         long loop;
 502
 503         u8 tbus, tdevice, tslot, bridgeSlot;
 504
 505         dbg("%s: %p, %d, %d, %p\n", __FUNCTION__, bus, bus_num, dev_num, slot);
 506
 507         bridgeSlot = 0xFF;
 508
 509         PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
 510         if (!PCIIRQRoutingInfoLength)
 511                 return -1;
 512
 513         len = (PCIIRQRoutingInfoLength->size -
 514                sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
 515         // Make sure I got at least one entry
 516         if (len == 0) {
 517                 kfree(PCIIRQRoutingInfoLength);
 518                 return -1;
 519         }
 520
 521         for (loop = 0; loop < len; ++loop) {
 522                 tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
 523                 tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
 524                 tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
 525
 526                 if ((tbus == bus_num) && (tdevice == dev_num)) {
 527                         *slot = tslot;
 528                         kfree(PCIIRQRoutingInfoLength);
 529                         return 0;
 530                 } else {
 531                         /* Did not get a match on the target PCI device. Check
 532                          * if the current IRQ table entry is a PCI-to-PCI bridge
 533                          * device.  If so, and it's secondary bus matches the
 534                          * bus number for the target device, I need to save the
 535                          * bridge's slot number.  If I can not find an entry for
 536                          * the target device, I will have to assume it's on the
 537                          * other side of the bridge, and assign it the bridge's
 538                          * slot. */
 539                         bus->number = tbus;
 540                         pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
 541                                                 PCI_REVISION_ID, &work);
 542
 543                         if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
 544                                 pci_bus_read_config_dword(bus,
 545                                                         PCI_DEVFN(tdevice, 0),
 546                                                         PCI_PRIMARY_BUS, &work);
 547                                 // See if bridge's secondary bus matches target bus.
 548                                 if (((work >> 8) & 0x000000FF) == (long) bus_num) {
 549                                         bridgeSlot = tslot;
 550                                 }
 551                         }
 552                 }
 553
 554         }
 555
 556         // If we got here, we didn't find an entry in the IRQ mapping table
 557         // for the target PCI device.  If we did determine that the target
 558         // device is on the other side of a PCI-to-PCI bridge, return the
 559         // slot number for the bridge.
 560         if (bridgeSlot != 0xFF) {
 561                 *slot = bridgeSlot;
 562                 kfree(PCIIRQRoutingInfoLength);
 563                 return 0;
 564         }
 565         kfree(PCIIRQRoutingInfoLength);
 566         // Couldn't find an entry in the routing table for this PCI device
 567         return -1;
 568 }
 569
 570
 571 /**
 572  * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
 573  *
 574  */
 575 static int
 576 cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
 577                                 u32 status)
 578 {
 579         u8 hp_slot;
 580
 581         if (func == NULL)
 582                 return(1);
 583
 584         hp_slot = func->device - ctrl->slot_device_offset;
 585
 586         // Wait for exclusive access to hardware
 587         down(&ctrl->crit_sect);
 588
 589         if (status == 1) {
 590                 amber_LED_on (ctrl, hp_slot);
 591         } else if (status == 0) {
 592                 amber_LED_off (ctrl, hp_slot);
 593         } else {
 594                 // Done with exclusive hardware access
 595                 up(&ctrl->crit_sect);
 596                 return(1);
 597         }
 598
 599         set_SOGO(ctrl);
 600
 601         // Wait for SOBS to be unset
 602         wait_for_ctrl_irq (ctrl);
 603
 604         // Done with exclusive hardware access
 605         up(&ctrl->crit_sect);
 606
 607         return(0);
 608 }
 609
 610
 611 /**
 612  * set_attention_status - Turns the Amber LED for a slot on or off
 613  *
 614  */
 615 static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
 616 {
 617         struct pci_func *slot_func;
 618         struct slot *slot = hotplug_slot->private;
 619         struct controller *ctrl = slot->ctrl;
 620         u8 bus;
 621         u8 devfn;
 622         u8 device;
 623         u8 function;
 624
 625         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 626
 627         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
 628                 return -ENODEV;
 629
 630         device = devfn >> 3;
 631         function = devfn & 0x7;
 632         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
 633
 634         slot_func = cpqhp_slot_find(bus, device, function);
 635         if (!slot_func)
 636                 return -ENODEV;
 637
 638         return cpqhp_set_attention_status(ctrl, slot_func, status);
 639 }
 640
 641
 642 static int process_SI(struct hotplug_slot *hotplug_slot)
 643 {
 644         struct pci_func *slot_func;
 645         struct slot *slot = hotplug_slot->private;
 646         struct controller *ctrl = slot->ctrl;
 647         u8 bus;
 648         u8 devfn;
 649         u8 device;
 650         u8 function;
 651
 652         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 653
 654         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
 655                 return -ENODEV;
 656
 657         device = devfn >> 3;
 658         function = devfn & 0x7;
 659         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
 660
 661         slot_func = cpqhp_slot_find(bus, device, function);
 662         if (!slot_func)
 663                 return -ENODEV;
 664
 665         slot_func->bus = bus;
 666         slot_func->device = device;
 667         slot_func->function = function;
 668         slot_func->configured = 0;
 669         dbg("board_added(%p, %p)\n", slot_func, ctrl);
 670         return cpqhp_process_SI(ctrl, slot_func);
 671 }
 672
 673
 674 static int process_SS(struct hotplug_slot *hotplug_slot)
 675 {
 676         struct pci_func *slot_func;
 677         struct slot *slot = hotplug_slot->private;
 678         struct controller *ctrl = slot->ctrl;
 679         u8 bus;
 680         u8 devfn;
 681         u8 device;
 682         u8 function;
 683
 684         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 685
 686         if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
 687                 return -ENODEV;
 688
 689         device = devfn >> 3;
 690         function = devfn & 0x7;
 691         dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
 692
 693         slot_func = cpqhp_slot_find(bus, device, function);
 694         if (!slot_func)
 695                 return -ENODEV;
 696
 697         dbg("In %s, slot_func = %p, ctrl = %p\n", __FUNCTION__, slot_func, ctrl);
 698         return cpqhp_process_SS(ctrl, slot_func);
 699 }
 700
 701
 702 static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
 703 {
 704         struct slot *slot = hotplug_slot->private;
 705         struct controller *ctrl = slot->ctrl;
 706
 707         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 708
 709         return cpqhp_hardware_test(ctrl, value);
 710 }
 711
 712
 713 static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
 714 {
 715         struct slot *slot = hotplug_slot->private;
 716         struct controller *ctrl = slot->ctrl;
 717
 718         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 719
 720         *value = get_slot_enabled(ctrl, slot);
 721         return 0;
 722 }
 723
 724 static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
 725 {
 726         struct slot *slot = hotplug_slot->private;
 727         struct controller *ctrl = slot->ctrl;
 728
 729         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 730
 731         *value = cpq_get_attention_status(ctrl, slot);
 732         return 0;
 733 }
 734
 735 static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
 736 {
 737         struct slot *slot = hotplug_slot->private;
 738         struct controller *ctrl = slot->ctrl;
 739
 740         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 741
 742         *value = cpq_get_latch_status(ctrl, slot);
 743
 744         return 0;
 745 }
 746
 747 static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
 748 {
 749         struct slot *slot = hotplug_slot->private;
 750         struct controller *ctrl = slot->ctrl;
 751
 752         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 753
 754         *value = get_presence_status(ctrl, slot);
 755
 756         return 0;
 757 }
 758
 759 static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
 760 {
 761         struct slot *slot = hotplug_slot->private;
 762         struct controller *ctrl = slot->ctrl;
 763
 764         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 765
 766         *value = ctrl->speed_capability;
 767
 768         return 0;
 769 }
 770
 771 static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
 772 {
 773         struct slot *slot = hotplug_slot->private;
 774         struct controller *ctrl = slot->ctrl;
 775
 776         dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
 777
 778         *value = ctrl->speed;
 779
 780         return 0;
 781 }
 782
 783 static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
 784 {
 785         u8 num_of_slots = 0;
 786         u8 hp_slot = 0;
 787         u8 device;
 788         u8 rev;
 789         u8 bus_cap;
 790         u16 temp_word;
 791         u16 vendor_id;
 792         u16 subsystem_vid;
 793         u16 subsystem_deviceid;
 794         u32 rc;
 795         struct controller *ctrl;
 796         struct pci_func *func;
 797
 798         // Need to read VID early b/c it's used to differentiate CPQ and INTC discovery
 799         rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
 800         if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
 801                 err(msg_HPC_non_compaq_or_intel);
 802                 return -ENODEV;
 803         }
 804         dbg("Vendor ID: %x\n", vendor_id);
 805
 806         rc = pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
 807         dbg("revision: %d\n", rev);
 808         if (rc || ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!rev))) {
 809                 err(msg_HPC_rev_error);
 810                 return -ENODEV;
 811         }
 812
 813         /* Check for the proper subsytem ID's
 814          * Intel uses a different SSID programming model than Compaq.
 815          * For Intel, each SSID bit identifies a PHP capability.
 816          * Also Intel HPC's may have RID=0.
 817          */
 818         if ((rev > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
 819                 // TODO: This code can be made to support non-Compaq or Intel subsystem IDs
 820                 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
 821                 if (rc) {
 822                         err("%s : pci_read_config_word failed\n", __FUNCTION__);
 823                         return rc;
 824                 }
 825                 dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
 826                 if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
 827                         err(msg_HPC_non_compaq_or_intel);
 828                         return -ENODEV;
 829                 }
 830
 831                 ctrl = (struct controller *) kmalloc(sizeof(struct controller), GFP_KERNEL);
 832                 if (!ctrl) {
 833                         err("%s : out of memory\n", __FUNCTION__);
 834                         return -ENOMEM;
 835                 }
 836                 memset(ctrl, 0, sizeof(struct controller));
 837
 838                 rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
 839                 if (rc) {
 840                         err("%s : pci_read_config_word failed\n", __FUNCTION__);
 841                         goto err_free_ctrl;
 842                 }
 843
 844                 info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
 845
 846                 /* Set Vendor ID, so it can be accessed later from other functions */
 847                 ctrl->vendor_id = vendor_id;
 848
 849                 switch (subsystem_vid) {
 850                         case PCI_VENDOR_ID_COMPAQ:
 851                                 if (rev >= 0x13) { /* CIOBX */
 852                                         ctrl->push_flag = 1;
 853                                         ctrl->slot_switch_type = 1;
 854                                         ctrl->push_button = 1;
 855                                         ctrl->pci_config_space = 1;
 856                                         ctrl->defeature_PHP = 1;
 857                                         ctrl->pcix_support = 1;
 858                                         ctrl->pcix_speed_capability = 1;
 859                                         pci_read_config_byte(pdev, 0x41, &bus_cap);
 860                                         if (bus_cap & 0x80) {
 861                                                 dbg("bus max supports 133MHz PCI-X\n");
 862                                                 ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
 863                                                 break;
 864                                         }
 865                                         if (bus_cap & 0x40) {
 866                                                 dbg("bus max supports 100MHz PCI-X\n");
 867                                                 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
 868                                                 break;
 869                                         }
 870                                         if (bus_cap & 20) {
 871                                                 dbg("bus max supports 66MHz PCI-X\n");
 872                                                 ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
 873                                                 break;
 874                                         }
 875                                         if (bus_cap & 10) {
 876                                                 dbg("bus max supports 66MHz PCI\n");
 877                                                 ctrl->speed_capability = PCI_SPEED_66MHz;
 878                                                 break;
 879                                         }
 880
 881                                         break;
 882                                 }
 883
 884                                 switch (subsystem_deviceid) {
 885                                         case PCI_SUB_HPC_ID:
 886                                                 /* Original 6500/7000 implementation */
 887                                                 ctrl->slot_switch_type = 1;
 888                                                 ctrl->speed_capability = PCI_SPEED_33MHz;
 889                                                 ctrl->push_button = 0;
 890                                                 ctrl->pci_config_space = 1;
 891                                                 ctrl->defeature_PHP = 1;
 892                                                 ctrl->pcix_support = 0;
 893                                                 ctrl->pcix_speed_capability = 0;
 894                                                 break;
 895                                         case PCI_SUB_HPC_ID2:
 896                                                 /* First Pushbutton implementation */
 897                                                 ctrl->push_flag = 1;
 898                                                 ctrl->slot_switch_type = 1;
 899                                                 ctrl->speed_capability = PCI_SPEED_33MHz;
 900                                                 ctrl->push_button = 1;
 901                                                 ctrl->pci_config_space = 1;
 902                                                 ctrl->defeature_PHP = 1;
 903                                                 ctrl->pcix_support = 0;
 904                                                 ctrl->pcix_speed_capability = 0;
 905                                                 break;
 906                                         case PCI_SUB_HPC_ID_INTC:
 907                                                 /* Third party (6500/7000) */
 908                                                 ctrl->slot_switch_type = 1;
 909                                                 ctrl->speed_capability = PCI_SPEED_33MHz;
 910                                                 ctrl->push_button = 0;
 911                                                 ctrl->pci_config_space = 1;
 912                                                 ctrl->defeature_PHP = 1;
 913                                                 ctrl->pcix_support = 0;
 914                                                 ctrl->pcix_speed_capability = 0;
 915                                                 break;
 916                                         case PCI_SUB_HPC_ID3:
 917                                                 /* First 66 Mhz implementation */
 918                                                 ctrl->push_flag = 1;
 919                                                 ctrl->slot_switch_type = 1;
 920                                                 ctrl->speed_capability = PCI_SPEED_66MHz;
 921                                                 ctrl->push_button = 1;
 922                                                 ctrl->pci_config_space = 1;
 923                                                 ctrl->defeature_PHP = 1;
 924                                                 ctrl->pcix_support = 0;
 925                                                 ctrl->pcix_speed_capability = 0;
 926                                                 break;
 927                                         case PCI_SUB_HPC_ID4:
 928                                                 /* First PCI-X implementation, 100MHz */
 929                                                 ctrl->push_flag = 1;
 930                                                 ctrl->slot_switch_type = 1;
 931                                                 ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
 932                                                 ctrl->push_button = 1;
 933                                                 ctrl->pci_config_space = 1;
 934                                                 ctrl->defeature_PHP = 1;
 935                                                 ctrl->pcix_support = 1;
 936                                                 ctrl->pcix_speed_capability = 0;
 937                                                 break;
 938                                         default:
 939                                                 err(msg_HPC_not_supported);
 940                                                 rc = -ENODEV;
 941                                                 goto err_free_ctrl;
 942                                 }
 943                                 break;
 944
 945                         case PCI_VENDOR_ID_INTEL:
 946                                 /* Check for speed capability (0=33, 1=66) */
 947                                 if (subsystem_deviceid & 0x0001) {
 948                                         ctrl->speed_capability = PCI_SPEED_66MHz;
 949                                 } else {
 950                                         ctrl->speed_capability = PCI_SPEED_33MHz;
 951                                 }
 952
 953                                 /* Check for push button */
 954                                 if (subsystem_deviceid & 0x0002) {
 955                                         /* no push button */
 956                                         ctrl->push_button = 0;
 957                                 } else {
 958                                         /* push button supported */
 959                                         ctrl->push_button = 1;
 960                                 }
 961
 962                                 /* Check for slot switch type (0=mechanical, 1=not mechanical) */
 963                                 if (subsystem_deviceid & 0x0004) {
 964                                         /* no switch */
 965                                         ctrl->slot_switch_type = 0;
 966                                 } else {
 967                                         /* switch */
 968                                         ctrl->slot_switch_type = 1;
 969                                 }
 970
 971                                 /* PHP Status (0=De-feature PHP, 1=Normal operation) */
 972                                 if (subsystem_deviceid & 0x0008) {
 973                                         ctrl->defeature_PHP = 1;        // PHP supported
 974                                 } else {
 975                                         ctrl->defeature_PHP = 0;        // PHP not supported
 976                                 }
 977
 978                                 /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
 979                                 if (subsystem_deviceid & 0x0010) {
 980                                         ctrl->alternate_base_address = 1;       // supported
 981                                 } else {
 982                                         ctrl->alternate_base_address = 0;       // not supported
 983                                 }
 984
 985                                 /* PCI Config Space Index (0=not supported, 1=supported) */
 986                                 if (subsystem_deviceid & 0x0020) {
 987                                         ctrl->pci_config_space = 1;             // supported
 988                                 } else {
 989                                         ctrl->pci_config_space = 0;             // not supported
 990                                 }
 991
 992                                 /* PCI-X support */
 993                                 if (subsystem_deviceid & 0x0080) {
 994                                         /* PCI-X capable */
 995                                         ctrl->pcix_support = 1;
 996                                         /* Frequency of operation in PCI-X mode */
 997                                         if (subsystem_deviceid & 0x0040) {
 998                                                 /* 133MHz PCI-X if bit 7 is 1 */
 999                                                 ctrl->pcix_speed_capability = 1;
1000                                         } else {
1001                                                 /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
1002                                                 /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
1003                                                 ctrl->pcix_speed_capability = 0;
1004                                         }
1005                                 } else {
1006                                         /* Conventional PCI */
1007                                         ctrl->pcix_support = 0;
1008                                         ctrl->pcix_speed_capability = 0;
1009                                 }
1010                                 break;
1011
1012                         default:
1013                                 err(msg_HPC_not_supported);
1014                                 rc = -ENODEV;
1015                                 goto err_free_ctrl;
1016                 }
1017
1018         } else {
1019                 err(msg_HPC_not_supported);
1020                 return -ENODEV;
1021         }
1022
1023         // Tell the user that we found one.
1024         info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
1025                                         pdev->bus->number);
1026
1027         dbg("Hotplug controller capabilities:\n");
1028         dbg("    speed_capability       %d\n", ctrl->speed_capability);
1029         dbg("    slot_switch_type       %s\n", ctrl->slot_switch_type ?
1030                                         "switch present" : "no switch");
1031         dbg("    defeature_PHP          %s\n", ctrl->defeature_PHP ?
1032                                         "PHP supported" : "PHP not supported");
1033         dbg("    alternate_base_address %s\n", ctrl->alternate_base_address ?
1034                                         "supported" : "not supported");
1035         dbg("    pci_config_space       %s\n", ctrl->pci_config_space ?
1036                                         "supported" : "not supported");
1037         dbg("    pcix_speed_capability  %s\n", ctrl->pcix_speed_capability ?
1038                                         "supported" : "not supported");
1039         dbg("    pcix_support           %s\n", ctrl->pcix_support ?
1040                                         "supported" : "not supported");
1041
1042         ctrl->pci_dev = pdev;
1043         pci_set_drvdata(pdev, ctrl);
1044
1045         /* make our own copy of the pci bus structure,
1046          * as we like tweaking it a lot */
1047         ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
1048         if (!ctrl->pci_bus) {
1049                 err("out of memory\n");
1050                 rc = -ENOMEM;
1051                 goto err_free_ctrl;
1052         }
1053         memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
1054
1055         ctrl->bus = pdev->bus->number;
1056         ctrl->rev = rev;
1057         dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
1058                 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
1059
1060         init_MUTEX(&ctrl->crit_sect);
1061         init_waitqueue_head(&ctrl->queue);
1062
1063         /* initialize our threads if they haven't already been started up */
1064         rc = one_time_init();
1065         if (rc) {
1066                 goto err_free_bus;
1067         }
1068
1069         dbg("pdev = %p\n", pdev);
1070         dbg("pci resource start %lx\n", pci_resource_start(pdev, 0));
1071         dbg("pci resource len %lx\n", pci_resource_len(pdev, 0));
1072
1073         if (!request_mem_region(pci_resource_start(pdev, 0),
1074                                 pci_resource_len(pdev, 0), MY_NAME)) {
1075                 err("cannot reserve MMIO region\n");
1076                 rc = -ENOMEM;
1077                 goto err_free_bus;
1078         }
1079
1080         ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
1081                                         pci_resource_len(pdev, 0));
1082         if (!ctrl->hpc_reg) {
1083                 err("cannot remap MMIO region %lx @ %lx\n",
1084                                 pci_resource_len(pdev, 0),
1085                                 pci_resource_start(pdev, 0));
1086                 rc = -ENODEV;
1087                 goto err_free_mem_region;
1088         }
1089
1090         // Check for 66Mhz operation
1091         ctrl->speed = get_controller_speed(ctrl);
1092
1093
1094         /********************************************************
1095          *
1096          *              Save configuration headers for this and
1097          *              subordinate PCI buses
1098          *
1099          ********************************************************/
1100
1101         // find the physical slot number of the first hot plug slot
1102
1103         /* Get slot won't work for devices behind bridges, but
1104          * in this case it will always be called for the "base"
1105          * bus/dev/func of a slot.
1106          * CS: this is leveraging the PCIIRQ routing code from the kernel
1107          * (pci-pc.c: get_irq_routing_table) */
1108         rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
1109                                 (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
1110                                 &(ctrl->first_slot));
1111         dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
1112                                 ctrl->first_slot, rc);
1113         if (rc) {
1114                 err(msg_initialization_err, rc);
1115                 goto err_iounmap;
1116         }
1117
1118         // Store PCI Config Space for all devices on this bus
1119         rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
1120         if (rc) {
1121                 err("%s: unable to save PCI configuration data, error %d\n",
1122                                 __FUNCTION__, rc);
1123                 goto err_iounmap;
1124         }
1125
1126         /*
1127          * Get IO, memory, and IRQ resources for new devices
1128          */
1129         // The next line is required for cpqhp_find_available_resources
1130         ctrl->interrupt = pdev->irq;
1131         if (ctrl->interrupt < 0x10) {
1132                 cpqhp_legacy_mode = 1;
1133                 dbg("System seems to be configured for Full Table Mapped MPS mode\n");
1134         }
1135
1136         ctrl->cfgspc_irq = 0;
1137         pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
1138
1139         rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
1140         ctrl->add_support = !rc;
1141         if (rc) {
1142                 dbg("cpqhp_find_available_resources = 0x%x\n", rc);
1143                 err("unable to locate PCI configuration resources for hot plug add.\n");
1144                 goto err_iounmap;
1145         }
1146
1147         /*
1148          * Finish setting up the hot plug ctrl device
1149          */
1150         ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1151         dbg("NumSlots %d \n", ctrl->slot_device_offset);
1152
1153         ctrl->next_event = 0;
1154
1155         /* Setup the slot information structures */
1156         rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
1157         if (rc) {
1158                 err(msg_initialization_err, 6);
1159                 err("%s: unable to save PCI configuration data, error %d\n",
1160                         __FUNCTION__, rc);
1161                 goto err_iounmap;
1162         }
1163
1164         /* Mask all general input interrupts */
1165         writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
1166
1167         /* set up the interrupt */
1168         dbg("HPC interrupt = %d \n", ctrl->interrupt);
1169         if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
1170                         SA_SHIRQ, MY_NAME, ctrl)) {
1171                 err("Can't get irq %d for the hotplug pci controller\n",
1172                         ctrl->interrupt);
1173                 rc = -ENODEV;
1174                 goto err_iounmap;
1175         }
1176
1177         /* Enable Shift Out interrupt and clear it, also enable SERR on power fault */
1178         temp_word = readw(ctrl->hpc_reg + MISC);
1179         temp_word |= 0x4006;
1180         writew(temp_word, ctrl->hpc_reg + MISC);
1181
1182         // Changed 05/05/97 to clear all interrupts at start
1183         writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
1184
1185         ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
1186
1187         writel(0x0L, ctrl->hpc_reg + INT_MASK);
1188
1189         if (!cpqhp_ctrl_list) {
1190                 cpqhp_ctrl_list = ctrl;
1191                 ctrl->next = NULL;
1192         } else {
1193                 ctrl->next = cpqhp_ctrl_list;
1194                 cpqhp_ctrl_list = ctrl;
1195         }
1196
1197         // turn off empty slots here unless command line option "ON" set
1198         // Wait for exclusive access to hardware
1199         down(&ctrl->crit_sect);
1200
1201         num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
1202
1203         // find first device number for the ctrl
1204         device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
1205
1206         while (num_of_slots) {
1207                 dbg("num_of_slots: %d\n", num_of_slots);
1208                 func = cpqhp_slot_find(ctrl->bus, device, 0);
1209                 if (!func)
1210                         break;
1211
1212                 hp_slot = func->device - ctrl->slot_device_offset;
1213                 dbg("hp_slot: %d\n", hp_slot);
1214
1215                 // We have to save the presence info for these slots
1216                 temp_word = ctrl->ctrl_int_comp >> 16;
1217                 func->presence_save = (temp_word >> hp_slot) & 0x01;
1218                 func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
1219
1220                 if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
1221                         func->switch_save = 0;
1222                 } else {
1223                         func->switch_save = 0x10;
1224                 }
1225
1226                 if (!power_mode) {
1227                         if (!func->is_a_board) {
1228                                 green_LED_off(ctrl, hp_slot);
1229                                 slot_disable(ctrl, hp_slot);
1230                         }
1231                 }
1232
1233                 device++;
1234                 num_of_slots--;
1235         }
1236
1237         if (!power_mode) {
1238                 set_SOGO(ctrl);
1239                 // Wait for SOBS to be unset
1240                 wait_for_ctrl_irq(ctrl);
1241         }
1242
1243         rc = init_SERR(ctrl);
1244         if (rc) {
1245                 err("init_SERR failed\n");
1246                 up(&ctrl->crit_sect);
1247                 goto err_free_irq;
1248         }
1249
1250         // Done with exclusive hardware access
1251         up(&ctrl->crit_sect);
1252
1253         cpqhp_create_ctrl_files(ctrl);
1254
1255         return 0;
1256
1257 err_free_irq:
1258         free_irq(ctrl->interrupt, ctrl);
1259 err_iounmap:
1260         iounmap(ctrl->hpc_reg);
1261 err_free_mem_region:
1262         release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
1263 err_free_bus:
1264         kfree(ctrl->pci_bus);
1265 err_free_ctrl:
1266         kfree(ctrl);
1267         return rc;
1268 }
1269
1270
1271 static int one_time_init(void)
1272 {
1273         int loop;
1274         int retval = 0;
1275
1276         if (initialized)
1277                 return 0;
1278
1279         power_mode = 0;
1280
1281         retval = pci_print_IRQ_route();
1282         if (retval)
1283                 goto error;
1284
1285         dbg("Initialize + Start the notification mechanism \n");
1286
1287         retval = cpqhp_event_start_thread();
1288         if (retval)
1289                 goto error;
1290
1291         dbg("Initialize slot lists\n");
1292         for (loop = 0; loop < 256; loop++) {
1293                 cpqhp_slot_list[loop] = NULL;
1294         }
1295
1296         // FIXME: We also need to hook the NMI handler eventually.
1297         // this also needs to be worked with Christoph
1298         // register_NMI_handler();
1299
1300         // Map rom address
1301         cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
1302         if (!cpqhp_rom_start) {
1303                 err ("Could not ioremap memory region for ROM\n");
1304                 retval = -EIO;
1305                 goto error;
1306         }
1307
1308         /* Now, map the int15 entry point if we are on compaq specific hardware */
1309         compaq_nvram_init(cpqhp_rom_start);
1310
1311         /* Map smbios table entry point structure */
1312         smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
1313                                         cpqhp_rom_start + ROM_PHY_LEN);
1314         if (!smbios_table) {
1315                 err ("Could not find the SMBIOS pointer in memory\n");
1316                 retval = -EIO;
1317                 goto error_rom_start;
1318         }
1319
1320         smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
1321                                         readw(smbios_table + ST_LENGTH));
1322         if (!smbios_start) {
1323                 err ("Could not ioremap memory region taken from SMBIOS values\n");
1324                 retval = -EIO;
1325                 goto error_smbios_start;
1326         }
1327
1328         initialized = 1;
1329
1330         return retval;
1331
1332 error_smbios_start:
1333         iounmap(smbios_start);
1334 error_rom_start:
1335         iounmap(cpqhp_rom_start);
1336 error:
1337         return retval;
1338 }
1339
1340
1341 static void __exit unload_cpqphpd(void)
1342 {
1343         struct pci_func *next;
1344         struct pci_func *TempSlot;
1345         int loop;
1346         u32 rc;
1347         struct controller *ctrl;
1348         struct controller *tctrl;
1349         struct pci_resource *res;
1350         struct pci_resource *tres;
1351
1352         rc = compaq_nvram_store(cpqhp_rom_start);
1353
1354         ctrl = cpqhp_ctrl_list;
1355
1356         while (ctrl) {
1357                 if (ctrl->hpc_reg) {
1358                         u16 misc;
1359                         rc = read_slot_enable (ctrl);
1360
1361                         writeb(0, ctrl->hpc_reg + SLOT_SERR);
1362                         writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
1363
1364                         misc = readw(ctrl->hpc_reg + MISC);
1365                         misc &= 0xFFFD;
1366                         writew(misc, ctrl->hpc_reg + MISC);
1367                 }
1368
1369                 ctrl_slot_cleanup(ctrl);
1370
1371                 res = ctrl->io_head;
1372                 while (res) {
1373                         tres = res;
1374                         res = res->next;
1375                         kfree(tres);
1376                 }
1377
1378                 res = ctrl->mem_head;
1379                 while (res) {
1380                         tres = res;
1381                         res = res->next;
1382                         kfree(tres);
1383                 }
1384
1385                 res = ctrl->p_mem_head;
1386                 while (res) {
1387                         tres = res;
1388                         res = res->next;
1389                         kfree(tres);
1390                 }
1391
1392                 res = ctrl->bus_head;
1393                 while (res) {
1394                         tres = res;
1395                         res = res->next;
1396                         kfree(tres);
1397                 }
1398
1399                 kfree (ctrl->pci_bus);
1400
1401                 tctrl = ctrl;
1402                 ctrl = ctrl->next;
1403                 kfree(tctrl);
1404         }
1405
1406         for (loop = 0; loop < 256; loop++) {
1407                 next = cpqhp_slot_list[loop];
1408                 while (next != NULL) {
1409                         res = next->io_head;
1410                         while (res) {
1411                                 tres = res;
1412                                 res = res->next;
1413                                 kfree(tres);
1414                         }
1415
1416                         res = next->mem_head;
1417                         while (res) {
1418                                 tres = res;
1419                                 res = res->next;
1420                                 kfree(tres);
1421                         }
1422
1423                         res = next->p_mem_head;
1424                         while (res) {
1425                                 tres = res;
1426                                 res = res->next;
1427                                 kfree(tres);
1428                         }
1429
1430                         res = next->bus_head;
1431                         while (res) {
1432                                 tres = res;
1433                                 res = res->next;
1434                                 kfree(tres);
1435                         }
1436
1437                         TempSlot = next;
1438                         next = next->next;
1439                         kfree(TempSlot);
1440                 }
1441         }
1442
1443         // Stop the notification mechanism
1444         if (initialized)
1445                 cpqhp_event_stop_thread();
1446
1447         //unmap the rom address
1448         if (cpqhp_rom_start)
1449                 iounmap(cpqhp_rom_start);
1450         if (smbios_start)
1451                 iounmap(smbios_start);
1452 }
1453
1454
1455
1456 static struct pci_device_id hpcd_pci_tbl[] = {
1457         {
1458         /* handle any PCI Hotplug controller */
1459         .class =        ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
1460         .class_mask =   ~0,
1461
1462         /* no matter who makes it */
1463         .vendor =       PCI_ANY_ID,
1464         .device =       PCI_ANY_ID,
1465         .subvendor =    PCI_ANY_ID,
1466         .subdevice =    PCI_ANY_ID,
1467
1468         }, { /* end: all zeroes */ }
1469 };
1470
1471 MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
1472
1473
1474
1475 static struct pci_driver cpqhpc_driver = {
1476         .name =         "compaq_pci_hotplug",
1477         .id_table =     hpcd_pci_tbl,
1478         .probe =        cpqhpc_probe,
1479         /* remove:      cpqhpc_remove_one, */
1480 };
1481
1482
1483
1484 static int __init cpqhpc_init(void)
1485 {
1486         int result;
1487
1488         cpqhp_debug = debug;
1489
1490         info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
1491         result = pci_register_driver(&cpqhpc_driver);
1492         dbg("pci_register_driver = %d\n", result);
1493         return result;
1494 }
1495
1496
1497 static void __exit cpqhpc_cleanup(void)
1498 {
1499         dbg("unload_cpqphpd()\n");
1500         unload_cpqphpd();
1501
1502         dbg("pci_unregister_driver\n");
1503         pci_unregister_driver(&cpqhpc_driver);
1504 }
1505
1506
1507 module_init(cpqhpc_init);
1508 module_exit(cpqhpc_cleanup);
1509
1510