1 #ifndef _M68KNOMMU_BITOPS_H
2 #define _M68KNOMMU_BITOPS_H
5 * Copyright 1992, Linus Torvalds.
8 #include <linux/compiler.h>
9 #include <asm/byteorder.h> /* swab32 */
13 #ifndef _LINUX_BITOPS_H
14 #error only <linux/bitops.h> can be included directly
17 #if defined (__mcfisaaplus__) || defined (__mcfisac__)
18 static inline int ffs(unsigned int val)
33 static inline int __ffs(unsigned int val)
45 #include <asm-generic/bitops/ffs.h>
46 #include <asm-generic/bitops/__ffs.h>
49 #include <asm-generic/bitops/sched.h>
50 #include <asm-generic/bitops/ffz.h>
52 static __inline__ void set_bit(int nr, volatile unsigned long * addr)
54 #ifdef CONFIG_COLDFIRE
55 __asm__ __volatile__ ("lea %0,%%a0; bset %1,(%%a0)"
56 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
60 __asm__ __volatile__ ("bset %1,%0"
61 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
67 #define __set_bit(nr, addr) set_bit(nr, addr)
70 * clear_bit() doesn't provide any barrier for the compiler.
72 #define smp_mb__before_clear_bit() barrier()
73 #define smp_mb__after_clear_bit() barrier()
75 static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
77 #ifdef CONFIG_COLDFIRE
78 __asm__ __volatile__ ("lea %0,%%a0; bclr %1,(%%a0)"
79 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
83 __asm__ __volatile__ ("bclr %1,%0"
84 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
90 #define __clear_bit(nr, addr) clear_bit(nr, addr)
92 static __inline__ void change_bit(int nr, volatile unsigned long * addr)
94 #ifdef CONFIG_COLDFIRE
95 __asm__ __volatile__ ("lea %0,%%a0; bchg %1,(%%a0)"
96 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
100 __asm__ __volatile__ ("bchg %1,%0"
101 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
107 #define __change_bit(nr, addr) change_bit(nr, addr)
109 static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
113 #ifdef CONFIG_COLDFIRE
114 __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
115 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
119 __asm__ __volatile__ ("bset %2,%1; sne %0"
120 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
128 #define __test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
130 static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
134 #ifdef CONFIG_COLDFIRE
135 __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
136 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
140 __asm__ __volatile__ ("bclr %2,%1; sne %0"
141 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
149 #define __test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
151 static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
155 #ifdef CONFIG_COLDFIRE
156 __asm__ __volatile__ ("lea %1,%%a0\n\tbchg %2,(%%a0)\n\tsne %0"
157 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
161 __asm__ __volatile__ ("bchg %2,%1; sne %0"
162 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
170 #define __test_and_change_bit(nr, addr) test_and_change_bit(nr, addr)
173 * This routine doesn't need to be atomic.
175 static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr)
177 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
180 static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
182 int * a = (int *) addr;
186 mask = 1 << (nr & 0x1f);
187 return ((mask & *a) != 0);
190 #define test_bit(nr,addr) \
191 (__builtin_constant_p(nr) ? \
192 __constant_test_bit((nr),(addr)) : \
193 __test_bit((nr),(addr)))
195 #include <asm-generic/bitops/find.h>
196 #include <asm-generic/bitops/hweight.h>
197 #include <asm-generic/bitops/lock.h>
199 static __inline__ int ext2_set_bit(int nr, volatile void * addr)
203 #ifdef CONFIG_COLDFIRE
204 __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
205 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
209 __asm__ __volatile__ ("bset %2,%1; sne %0"
210 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
218 static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
222 #ifdef CONFIG_COLDFIRE
223 __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
224 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
228 __asm__ __volatile__ ("bclr %2,%1; sne %0"
229 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
237 #define ext2_set_bit_atomic(lock, nr, addr) \
241 ret = ext2_set_bit((nr), (addr)); \
246 #define ext2_clear_bit_atomic(lock, nr, addr) \
250 ret = ext2_clear_bit((nr), (addr)); \
255 static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
259 #ifdef CONFIG_COLDFIRE
260 __asm__ __volatile__ ("lea %1,%%a0; btst %2,(%%a0); sne %0"
262 : "m" (((const volatile char *)addr)[nr >> 3]), "d" (nr)
265 __asm__ __volatile__ ("btst %2,%1; sne %0"
267 : "m" (((const volatile char *)addr)[nr >> 3]), "di" (nr)
274 #define ext2_find_first_zero_bit(addr, size) \
275 ext2_find_next_zero_bit((addr), (size), 0)
277 static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
279 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
280 unsigned long result = offset & ~31UL;
288 /* We hold the little endian value in tmp, but then the
289 * shift is illegal. So we could keep a big endian value
292 * tmp = __swab32(*(p++));
293 * tmp |= ~0UL >> (32-offset);
295 * but this would decrease performance, so we change the
299 tmp |= __swab32(~0UL >> (32-offset));
307 while(size & ~31UL) {
318 /* tmp is little endian, so we would have to swab the shift,
319 * see above. But then we have to swab tmp below for ffz, so
320 * we might as well do this here.
322 return result + ffz(__swab32(tmp) | (~0UL << size));
324 return result + ffz(__swab32(tmp));
327 #define ext2_find_next_bit(addr, size, off) \
328 generic_find_next_le_bit((unsigned long *)(addr), (size), (off))
329 #include <asm-generic/bitops/minix.h>
331 #endif /* __KERNEL__ */
333 #include <asm-generic/bitops/fls.h>
334 #include <asm-generic/bitops/__fls.h>
335 #include <asm-generic/bitops/fls64.h>
337 #endif /* _M68KNOMMU_BITOPS_H */