1 #ifndef _ASM_POWERPC_IO_H
2 #define _ASM_POWERPC_IO_H
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
13 #include <asm-ppc/io.h>
16 #include <linux/compiler.h>
18 #include <asm/byteorder.h>
19 #ifdef CONFIG_PPC_ISERIES
20 #include <asm/iseries/iseries_io.h>
22 #include <asm/synch.h>
23 #include <asm/delay.h>
25 #include <asm-generic/iomap.h>
27 #define __ide_mm_insw(p, a, c) _insw_ns((volatile u16 __iomem *)(p), (a), (c))
28 #define __ide_mm_insl(p, a, c) _insl_ns((volatile u32 __iomem *)(p), (a), (c))
29 #define __ide_mm_outsw(p, a, c) _outsw_ns((volatile u16 __iomem *)(p), (a), (c))
30 #define __ide_mm_outsl(p, a, c) _outsl_ns((volatile u32 __iomem *)(p), (a), (c))
33 #define SIO_CONFIG_RA 0x398
34 #define SIO_CONFIG_RD 0x399
38 extern unsigned long isa_io_base;
39 extern unsigned long pci_io_base;
40 extern unsigned long io_page_mask;
42 #define MAX_ISA_PORT 0x10000
44 #define _IO_IS_VALID(port) ((port) >= MAX_ISA_PORT || (1 << (port>>PAGE_SHIFT)) \
47 #ifdef CONFIG_PPC_ISERIES
48 /* __raw_* accessors aren't supported on iSeries */
49 #define __raw_readb(addr) { BUG(); 0; }
50 #define __raw_readw(addr) { BUG(); 0; }
51 #define __raw_readl(addr) { BUG(); 0; }
52 #define __raw_readq(addr) { BUG(); 0; }
53 #define __raw_writeb(v, addr) { BUG(); 0; }
54 #define __raw_writew(v, addr) { BUG(); 0; }
55 #define __raw_writel(v, addr) { BUG(); 0; }
56 #define __raw_writeq(v, addr) { BUG(); 0; }
57 #define readb(addr) iSeries_Read_Byte(addr)
58 #define readw(addr) iSeries_Read_Word(addr)
59 #define readl(addr) iSeries_Read_Long(addr)
60 #define writeb(data, addr) iSeries_Write_Byte((data),(addr))
61 #define writew(data, addr) iSeries_Write_Word((data),(addr))
62 #define writel(data, addr) iSeries_Write_Long((data),(addr))
63 #define memset_io(a,b,c) iSeries_memset_io((a),(b),(c))
64 #define memcpy_fromio(a,b,c) iSeries_memcpy_fromio((a), (b), (c))
65 #define memcpy_toio(a,b,c) iSeries_memcpy_toio((a), (b), (c))
67 #define inb(addr) readb(((void __iomem *)(long)(addr)))
68 #define inw(addr) readw(((void __iomem *)(long)(addr)))
69 #define inl(addr) readl(((void __iomem *)(long)(addr)))
70 #define outb(data,addr) writeb(data,((void __iomem *)(long)(addr)))
71 #define outw(data,addr) writew(data,((void __iomem *)(long)(addr)))
72 #define outl(data,addr) writel(data,((void __iomem *)(long)(addr)))
74 * The *_ns versions below don't do byte-swapping.
75 * Neither do the standard versions now, these are just here
78 #define insw_ns(port, buf, ns) _insw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
79 #define insl_ns(port, buf, nl) _insl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
82 static inline unsigned char __raw_readb(const volatile void __iomem *addr)
84 return *(volatile unsigned char __force *)addr;
86 static inline unsigned short __raw_readw(const volatile void __iomem *addr)
88 return *(volatile unsigned short __force *)addr;
90 static inline unsigned int __raw_readl(const volatile void __iomem *addr)
92 return *(volatile unsigned int __force *)addr;
94 static inline unsigned long __raw_readq(const volatile void __iomem *addr)
96 return *(volatile unsigned long __force *)addr;
98 static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
100 *(volatile unsigned char __force *)addr = v;
102 static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
104 *(volatile unsigned short __force *)addr = v;
106 static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
108 *(volatile unsigned int __force *)addr = v;
110 static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
112 *(volatile unsigned long __force *)addr = v;
114 #define readb(addr) eeh_readb(addr)
115 #define readw(addr) eeh_readw(addr)
116 #define readl(addr) eeh_readl(addr)
117 #define readq(addr) eeh_readq(addr)
118 #define writeb(data, addr) eeh_writeb((data), (addr))
119 #define writew(data, addr) eeh_writew((data), (addr))
120 #define writel(data, addr) eeh_writel((data), (addr))
121 #define writeq(data, addr) eeh_writeq((data), (addr))
122 #define memset_io(a,b,c) eeh_memset_io((a),(b),(c))
123 #define memcpy_fromio(a,b,c) eeh_memcpy_fromio((a),(b),(c))
124 #define memcpy_toio(a,b,c) eeh_memcpy_toio((a),(b),(c))
125 #define inb(port) eeh_inb((unsigned long)port)
126 #define outb(val, port) eeh_outb(val, (unsigned long)port)
127 #define inw(port) eeh_inw((unsigned long)port)
128 #define outw(val, port) eeh_outw(val, (unsigned long)port)
129 #define inl(port) eeh_inl((unsigned long)port)
130 #define outl(val, port) eeh_outl(val, (unsigned long)port)
133 * The insw/outsw/insl/outsl macros don't do byte-swapping.
134 * They are only used in practice for transferring buffers which
135 * are arrays of bytes, and byte-swapping is not appropriate in
136 * that case. - paulus */
137 #define insb(port, buf, ns) eeh_insb((port), (buf), (ns))
138 #define insw(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
139 #define insl(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
140 #define insw_ns(port, buf, ns) eeh_insw_ns((port), (buf), (ns))
141 #define insl_ns(port, buf, nl) eeh_insl_ns((port), (buf), (nl))
143 #define outsb(port, buf, ns) _outsb((u8 __iomem *)((port)+pci_io_base), (buf), (ns))
144 #define outsw(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
145 #define outsl(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
149 #define readb_relaxed(addr) readb(addr)
150 #define readw_relaxed(addr) readw(addr)
151 #define readl_relaxed(addr) readl(addr)
152 #define readq_relaxed(addr) readq(addr)
154 extern void _insb(volatile u8 __iomem *port, void *buf, int ns);
155 extern void _outsb(volatile u8 __iomem *port, const void *buf, int ns);
156 extern void _insw(volatile u16 __iomem *port, void *buf, int ns);
157 extern void _outsw(volatile u16 __iomem *port, const void *buf, int ns);
158 extern void _insl(volatile u32 __iomem *port, void *buf, int nl);
159 extern void _outsl(volatile u32 __iomem *port, const void *buf, int nl);
160 extern void _insw_ns(volatile u16 __iomem *port, void *buf, int ns);
161 extern void _outsw_ns(volatile u16 __iomem *port, const void *buf, int ns);
162 extern void _insl_ns(volatile u32 __iomem *port, void *buf, int nl);
163 extern void _outsl_ns(volatile u32 __iomem *port, const void *buf, int nl);
168 * output pause versions need a delay at least for the
169 * w83c105 ide controller in a p610.
171 #define inb_p(port) inb(port)
172 #define outb_p(val, port) (udelay(1), outb((val), (port)))
173 #define inw_p(port) inw(port)
174 #define outw_p(val, port) (udelay(1), outw((val), (port)))
175 #define inl_p(port) inl(port)
176 #define outl_p(val, port) (udelay(1), outl((val), (port)))
179 * The *_ns versions below don't do byte-swapping.
180 * Neither do the standard versions now, these are just here
183 #define outsw_ns(port, buf, ns) _outsw_ns((u16 __iomem *)((port)+pci_io_base), (buf), (ns))
184 #define outsl_ns(port, buf, nl) _outsl_ns((u32 __iomem *)((port)+pci_io_base), (buf), (nl))
187 #define IO_SPACE_LIMIT ~(0UL)
190 extern int __ioremap_explicit(unsigned long p_addr, unsigned long v_addr,
191 unsigned long size, unsigned long flags);
192 extern void __iomem *__ioremap(unsigned long address, unsigned long size,
193 unsigned long flags);
196 * ioremap - map bus memory into CPU space
197 * @address: bus address of the memory
198 * @size: size of the resource to map
200 * ioremap performs a platform specific sequence of operations to
201 * make bus memory CPU accessible via the readb/readw/readl/writeb/
202 * writew/writel functions and the other mmio helpers. The returned
203 * address is not guaranteed to be usable directly as a virtual
206 extern void __iomem *ioremap(unsigned long address, unsigned long size);
208 #define ioremap_nocache(addr, size) ioremap((addr), (size))
209 extern int iounmap_explicit(volatile void __iomem *addr, unsigned long size);
210 extern void iounmap(volatile void __iomem *addr);
211 extern void __iomem * reserve_phb_iospace(unsigned long size);
214 * virt_to_phys - map virtual addresses to physical
215 * @address: address to remap
217 * The returned physical address is the physical (CPU) mapping for
218 * the memory address given. It is only valid to use this function on
219 * addresses directly mapped or allocated via kmalloc.
221 * This function does not give bus mappings for DMA transfers. In
222 * almost all conceivable cases a device driver should not be using
225 static inline unsigned long virt_to_phys(volatile void * address)
227 return __pa((unsigned long)address);
231 * phys_to_virt - map physical address to virtual
232 * @address: address to remap
234 * The returned virtual address is a current CPU mapping for
235 * the memory address given. It is only valid to use this function on
236 * addresses that have a kernel mapping
238 * This function does not handle bus mappings for DMA transfers. In
239 * almost all conceivable cases a device driver should not be using
242 static inline void * phys_to_virt(unsigned long address)
244 return (void *)__va(address);
248 * Change "struct page" to physical address.
250 #define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
252 /* We do NOT want virtual merging, it would put too much pressure on
253 * our iommu allocator. Instead, we want drivers to be smart enough
254 * to coalesce sglists that happen to have been mapped in a contiguous
257 #define BIO_VMERGE_BOUNDARY 0
259 static inline void iosync(void)
261 __asm__ __volatile__ ("sync" : : : "memory");
264 /* Enforce in-order execution of data I/O.
265 * No distinction between read/write on PPC; use eieio for all three.
267 #define iobarrier_rw() eieio()
268 #define iobarrier_r() eieio()
269 #define iobarrier_w() eieio()
272 * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
273 * These routines do not perform EEH-related I/O address translation,
274 * and should not be used directly by device drivers. Use inb/readb
277 static inline int in_8(const volatile unsigned char __iomem *addr)
281 __asm__ __volatile__("lbz%U1%X1 %0,%1; twi 0,%0,0; isync"
282 : "=r" (ret) : "m" (*addr));
286 static inline void out_8(volatile unsigned char __iomem *addr, int val)
288 __asm__ __volatile__("stb%U0%X0 %1,%0; sync"
289 : "=m" (*addr) : "r" (val));
292 static inline int in_le16(const volatile unsigned short __iomem *addr)
296 __asm__ __volatile__("lhbrx %0,0,%1; twi 0,%0,0; isync"
297 : "=r" (ret) : "r" (addr), "m" (*addr));
301 static inline int in_be16(const volatile unsigned short __iomem *addr)
305 __asm__ __volatile__("lhz%U1%X1 %0,%1; twi 0,%0,0; isync"
306 : "=r" (ret) : "m" (*addr));
310 static inline void out_le16(volatile unsigned short __iomem *addr, int val)
312 __asm__ __volatile__("sthbrx %1,0,%2; sync"
313 : "=m" (*addr) : "r" (val), "r" (addr));
316 static inline void out_be16(volatile unsigned short __iomem *addr, int val)
318 __asm__ __volatile__("sth%U0%X0 %1,%0; sync"
319 : "=m" (*addr) : "r" (val));
322 static inline unsigned in_le32(const volatile unsigned __iomem *addr)
326 __asm__ __volatile__("lwbrx %0,0,%1; twi 0,%0,0; isync"
327 : "=r" (ret) : "r" (addr), "m" (*addr));
331 static inline unsigned in_be32(const volatile unsigned __iomem *addr)
335 __asm__ __volatile__("lwz%U1%X1 %0,%1; twi 0,%0,0; isync"
336 : "=r" (ret) : "m" (*addr));
340 static inline void out_le32(volatile unsigned __iomem *addr, int val)
342 __asm__ __volatile__("stwbrx %1,0,%2; sync" : "=m" (*addr)
343 : "r" (val), "r" (addr));
346 static inline void out_be32(volatile unsigned __iomem *addr, int val)
348 __asm__ __volatile__("stw%U0%X0 %1,%0; sync"
349 : "=m" (*addr) : "r" (val));
352 static inline unsigned long in_le64(const volatile unsigned long __iomem *addr)
354 unsigned long tmp, ret;
356 __asm__ __volatile__(
360 "rldimi %0,%1,5*8,1*8\n"
361 "rldimi %0,%1,3*8,2*8\n"
362 "rldimi %0,%1,1*8,3*8\n"
363 "rldimi %0,%1,7*8,4*8\n"
364 "rldicl %1,%1,32,0\n"
365 "rlwimi %0,%1,8,8,31\n"
366 "rlwimi %0,%1,24,16,23\n"
367 : "=r" (ret) , "=r" (tmp) : "b" (addr) , "m" (*addr));
371 static inline unsigned long in_be64(const volatile unsigned long __iomem *addr)
375 __asm__ __volatile__("ld%U1%X1 %0,%1; twi 0,%0,0; isync"
376 : "=r" (ret) : "m" (*addr));
380 static inline void out_le64(volatile unsigned long __iomem *addr, unsigned long val)
384 __asm__ __volatile__(
385 "rldimi %0,%1,5*8,1*8\n"
386 "rldimi %0,%1,3*8,2*8\n"
387 "rldimi %0,%1,1*8,3*8\n"
388 "rldimi %0,%1,7*8,4*8\n"
389 "rldicl %1,%1,32,0\n"
390 "rlwimi %0,%1,8,8,31\n"
391 "rlwimi %0,%1,24,16,23\n"
394 : "=&r" (tmp) , "=&r" (val) : "1" (val) , "b" (addr) , "m" (*addr));
397 static inline void out_be64(volatile unsigned long __iomem *addr, unsigned long val)
399 __asm__ __volatile__("std%U0%X0 %1,%0; sync" : "=m" (*addr) : "r" (val));
402 #ifndef CONFIG_PPC_ISERIES
407 * check_signature - find BIOS signatures
408 * @io_addr: mmio address to check
409 * @signature: signature block
410 * @length: length of signature
412 * Perform a signature comparison with the mmio address io_addr. This
413 * address should have been obtained by ioremap.
414 * Returns 1 on a match.
416 static inline int check_signature(const volatile void __iomem * io_addr,
417 const unsigned char *signature, int length)
420 #ifndef CONFIG_PPC_ISERIES
422 if (readb(io_addr) != *signature)
436 #define dma_cache_inv(_start,_size) do { } while (0)
437 #define dma_cache_wback(_start,_size) do { } while (0)
438 #define dma_cache_wback_inv(_start,_size) do { } while (0)
440 /* Check of existence of legacy devices */
441 extern int check_legacy_ioport(unsigned long base_port);
445 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
448 #define xlate_dev_mem_ptr(p) __va(p)
451 * Convert a virtual cached pointer to an uncached pointer
453 #define xlate_dev_kmem_ptr(p) p
455 #endif /* __KERNEL__ */
457 #endif /* CONFIG_PPC64 */
458 #endif /* _ASM_POWERPC_IO_H */