[PATCH] fbdev: Add fbset -a support
[linux-2.6] / drivers / video / cg14.c
1 /* cg14.c: CGFOURTEEN frame buffer driver
2  *
3  * Copyright (C) 2003 David S. Miller (davem@redhat.com)
4  * Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
5  * Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
6  *
7  * Driver layout based loosely on tgafb.c, see that file for credits.
8  */
9
10 #include <linux/module.h>
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/string.h>
14 #include <linux/slab.h>
15 #include <linux/delay.h>
16 #include <linux/init.h>
17 #include <linux/fb.h>
18 #include <linux/mm.h>
19
20 #include <asm/io.h>
21 #include <asm/sbus.h>
22 #include <asm/oplib.h>
23 #include <asm/fbio.h>
24
25 #include "sbuslib.h"
26
27 /*
28  * Local functions.
29  */
30
31 static int cg14_setcolreg(unsigned, unsigned, unsigned, unsigned,
32                          unsigned, struct fb_info *);
33
34 static int cg14_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
35 static int cg14_ioctl(struct inode *, struct file *, unsigned int,
36                       unsigned long, struct fb_info *);
37 static int cg14_pan_display(struct fb_var_screeninfo *, struct fb_info *);
38
39 /*
40  *  Frame buffer operations
41  */
42
43 static struct fb_ops cg14_ops = {
44         .owner                  = THIS_MODULE,
45         .fb_setcolreg           = cg14_setcolreg,
46         .fb_pan_display         = cg14_pan_display,
47         .fb_fillrect            = cfb_fillrect,
48         .fb_copyarea            = cfb_copyarea,
49         .fb_imageblit           = cfb_imageblit,
50         .fb_mmap                = cg14_mmap,
51         .fb_ioctl               = cg14_ioctl,
52         .fb_cursor              = soft_cursor,
53 };
54
55 #define CG14_MCR_INTENABLE_SHIFT        7
56 #define CG14_MCR_INTENABLE_MASK         0x80
57 #define CG14_MCR_VIDENABLE_SHIFT        6
58 #define CG14_MCR_VIDENABLE_MASK         0x40
59 #define CG14_MCR_PIXMODE_SHIFT          4
60 #define CG14_MCR_PIXMODE_MASK           0x30
61 #define CG14_MCR_TMR_SHIFT              2
62 #define CG14_MCR_TMR_MASK               0x0c
63 #define CG14_MCR_TMENABLE_SHIFT         1
64 #define CG14_MCR_TMENABLE_MASK          0x02
65 #define CG14_MCR_RESET_SHIFT            0
66 #define CG14_MCR_RESET_MASK             0x01
67 #define CG14_REV_REVISION_SHIFT         4
68 #define CG14_REV_REVISION_MASK          0xf0
69 #define CG14_REV_IMPL_SHIFT             0
70 #define CG14_REV_IMPL_MASK              0x0f
71 #define CG14_VBR_FRAMEBASE_SHIFT        12
72 #define CG14_VBR_FRAMEBASE_MASK         0x00fff000
73 #define CG14_VMCR1_SETUP_SHIFT          0
74 #define CG14_VMCR1_SETUP_MASK           0x000001ff
75 #define CG14_VMCR1_VCONFIG_SHIFT        9
76 #define CG14_VMCR1_VCONFIG_MASK         0x00000e00
77 #define CG14_VMCR2_REFRESH_SHIFT        0
78 #define CG14_VMCR2_REFRESH_MASK         0x00000001
79 #define CG14_VMCR2_TESTROWCNT_SHIFT     1
80 #define CG14_VMCR2_TESTROWCNT_MASK      0x00000002
81 #define CG14_VMCR2_FBCONFIG_SHIFT       2
82 #define CG14_VMCR2_FBCONFIG_MASK        0x0000000c
83 #define CG14_VCR_REFRESHREQ_SHIFT       0
84 #define CG14_VCR_REFRESHREQ_MASK        0x000003ff
85 #define CG14_VCR1_REFRESHENA_SHIFT      10
86 #define CG14_VCR1_REFRESHENA_MASK       0x00000400
87 #define CG14_VCA_CAD_SHIFT              0
88 #define CG14_VCA_CAD_MASK               0x000003ff
89 #define CG14_VCA_VERS_SHIFT             10
90 #define CG14_VCA_VERS_MASK              0x00000c00
91 #define CG14_VCA_RAMSPEED_SHIFT         12
92 #define CG14_VCA_RAMSPEED_MASK          0x00001000
93 #define CG14_VCA_8MB_SHIFT              13
94 #define CG14_VCA_8MB_MASK               0x00002000
95
96 #define CG14_MCR_PIXMODE_8              0
97 #define CG14_MCR_PIXMODE_16             2
98 #define CG14_MCR_PIXMODE_32             3
99
100 struct cg14_regs{
101         volatile u8 mcr;        /* Master Control Reg */
102         volatile u8 ppr;        /* Packed Pixel Reg */
103         volatile u8 tms[2];     /* Test Mode Status Regs */
104         volatile u8 msr;        /* Master Status Reg */
105         volatile u8 fsr;        /* Fault Status Reg */
106         volatile u8 rev;        /* Revision & Impl */
107         volatile u8 ccr;        /* Clock Control Reg */
108         volatile u32 tmr;       /* Test Mode Read Back */
109         volatile u8 mod;        /* Monitor Operation Data Reg */
110         volatile u8 acr;        /* Aux Control */
111         u8 xxx0[6];
112         volatile u16 hct;       /* Hor Counter */
113         volatile u16 vct;       /* Vert Counter */
114         volatile u16 hbs;       /* Hor Blank Start */
115         volatile u16 hbc;       /* Hor Blank Clear */
116         volatile u16 hss;       /* Hor Sync Start */
117         volatile u16 hsc;       /* Hor Sync Clear */
118         volatile u16 csc;       /* Composite Sync Clear */
119         volatile u16 vbs;       /* Vert Blank Start */
120         volatile u16 vbc;       /* Vert Blank Clear */
121         volatile u16 vss;       /* Vert Sync Start */
122         volatile u16 vsc;       /* Vert Sync Clear */
123         volatile u16 xcs;
124         volatile u16 xcc;
125         volatile u16 fsa;       /* Fault Status Address */
126         volatile u16 adr;       /* Address Registers */
127         u8 xxx1[0xce];
128         volatile u8 pcg[0x100]; /* Pixel Clock Generator */
129         volatile u32 vbr;       /* Frame Base Row */
130         volatile u32 vmcr;      /* VBC Master Control */
131         volatile u32 vcr;       /* VBC refresh */
132         volatile u32 vca;       /* VBC Config */
133 };
134
135 #define CG14_CCR_ENABLE 0x04
136 #define CG14_CCR_SELECT 0x02    /* HW/Full screen */
137
138 struct cg14_cursor {
139         volatile u32 cpl0[32];  /* Enable plane 0 */
140         volatile u32 cpl1[32];  /* Color selection plane */
141         volatile u8 ccr;        /* Cursor Control Reg */
142         u8 xxx0[3];
143         volatile u16 cursx;     /* Cursor x,y position */
144         volatile u16 cursy;     /* Cursor x,y position */
145         volatile u32 color0;
146         volatile u32 color1;
147         u32 xxx1[0x1bc];
148         volatile u32 cpl0i[32]; /* Enable plane 0 autoinc */
149         volatile u32 cpl1i[32]; /* Color selection autoinc */
150 };
151
152 struct cg14_dac {
153         volatile u8 addr;       /* Address Register */
154         u8 xxx0[255];
155         volatile u8 glut;       /* Gamma table */
156         u8 xxx1[255];
157         volatile u8 select;     /* Register Select */
158         u8 xxx2[255];
159         volatile u8 mode;       /* Mode Register */
160 };
161
162 struct cg14_xlut{
163         volatile u8 x_xlut [256];
164         volatile u8 x_xlutd [256];
165         u8 xxx0[0x600];
166         volatile u8 x_xlut_inc [256];
167         volatile u8 x_xlutd_inc [256];
168 };
169
170 /* Color look up table (clut) */
171 /* Each one of these arrays hold the color lookup table (for 256
172  * colors) for each MDI page (I assume then there should be 4 MDI
173  * pages, I still wonder what they are.  I have seen NeXTStep split
174  * the screen in four parts, while operating in 24 bits mode.  Each
175  * integer holds 4 values: alpha value (transparency channel, thanks
176  * go to John Stone (johns@umr.edu) from OpenBSD), red, green and blue
177  *
178  * I currently use the clut instead of the Xlut
179  */
180 struct cg14_clut {
181         u32 c_clut [256];
182         u32 c_clutd [256];    /* i wonder what the 'd' is for */
183         u32 c_clut_inc [256];
184         u32 c_clutd_inc [256];
185 };
186
187 #define CG14_MMAP_ENTRIES       16
188
189 struct cg14_par {
190         spinlock_t              lock;
191         struct cg14_regs        __iomem *regs;
192         struct cg14_clut        __iomem *clut;
193         struct cg14_cursor      __iomem *cursor;
194
195         u32                     flags;
196 #define CG14_FLAG_BLANKED       0x00000001
197
198         unsigned long           physbase;
199         unsigned long           iospace;
200         unsigned long           fbsize;
201
202         struct sbus_mmap_map    mmap_map[CG14_MMAP_ENTRIES];
203
204         int                     mode;
205         int                     ramsize;
206         struct sbus_dev         *sdev;
207         struct list_head        list;
208 };
209
210 static void __cg14_reset(struct cg14_par *par)
211 {
212         struct cg14_regs __iomem *regs = par->regs;
213         u8 val;
214
215         val = sbus_readb(&regs->mcr);
216         val &= ~(CG14_MCR_PIXMODE_MASK);
217         sbus_writeb(val, &regs->mcr);
218 }
219
220 static int cg14_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
221 {
222         struct cg14_par *par = (struct cg14_par *) info->par;
223         unsigned long flags;
224
225         /* We just use this to catch switches out of
226          * graphics mode.
227          */
228         spin_lock_irqsave(&par->lock, flags);
229         __cg14_reset(par);
230         spin_unlock_irqrestore(&par->lock, flags);
231
232         if (var->xoffset || var->yoffset || var->vmode)
233                 return -EINVAL;
234         return 0;
235 }
236
237 /**
238  *      cg14_setcolreg - Optional function. Sets a color register.
239  *      @regno: boolean, 0 copy local, 1 get_user() function
240  *      @red: frame buffer colormap structure
241  *      @green: The green value which can be up to 16 bits wide
242  *      @blue:  The blue value which can be up to 16 bits wide.
243  *      @transp: If supported the alpha value which can be up to 16 bits wide.
244  *      @info: frame buffer info structure
245  */
246 static int cg14_setcolreg(unsigned regno,
247                           unsigned red, unsigned green, unsigned blue,
248                           unsigned transp, struct fb_info *info)
249 {
250         struct cg14_par *par = (struct cg14_par *) info->par;
251         struct cg14_clut __iomem *clut = par->clut;
252         unsigned long flags;
253         u32 val;
254
255         if (regno >= 256)
256                 return 1;
257
258         red >>= 8;
259         green >>= 8;
260         blue >>= 8;
261         val = (red | (green << 8) | (blue << 16));
262
263         spin_lock_irqsave(&par->lock, flags);
264         sbus_writel(val, &clut->c_clut[regno]);
265         spin_unlock_irqrestore(&par->lock, flags);
266
267         return 0;
268 }
269
270 static int cg14_mmap(struct fb_info *info, struct file *file, struct vm_area_struct *vma)
271 {
272         struct cg14_par *par = (struct cg14_par *) info->par;
273
274         return sbusfb_mmap_helper(par->mmap_map,
275                                   par->physbase, par->fbsize,
276                                   par->iospace, vma);
277 }
278
279 static int cg14_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
280                       unsigned long arg, struct fb_info *info)
281 {
282         struct cg14_par *par = (struct cg14_par *) info->par;
283         struct cg14_regs __iomem *regs = par->regs;
284         struct mdi_cfginfo kmdi, __user *mdii;
285         unsigned long flags;
286         int cur_mode, mode, ret = 0;
287
288         switch (cmd) {
289         case MDI_RESET:
290                 spin_lock_irqsave(&par->lock, flags);
291                 __cg14_reset(par);
292                 spin_unlock_irqrestore(&par->lock, flags);
293                 break;
294
295         case MDI_GET_CFGINFO:
296                 memset(&kmdi, 0, sizeof(kmdi));
297
298                 spin_lock_irqsave(&par->lock, flags);
299                 kmdi.mdi_type = FBTYPE_MDICOLOR;
300                 kmdi.mdi_height = info->var.yres;
301                 kmdi.mdi_width = info->var.xres;
302                 kmdi.mdi_mode = par->mode;
303                 kmdi.mdi_pixfreq = 72; /* FIXME */
304                 kmdi.mdi_size = par->ramsize;
305                 spin_unlock_irqrestore(&par->lock, flags);
306
307                 mdii = (struct mdi_cfginfo __user *) arg;
308                 if (copy_to_user(mdii, &kmdi, sizeof(kmdi)))
309                         ret = -EFAULT;
310                 break;
311
312         case MDI_SET_PIXELMODE:
313                 if (get_user(mode, (int __user *) arg)) {
314                         ret = -EFAULT;
315                         break;
316                 }
317
318                 spin_lock_irqsave(&par->lock, flags);
319                 cur_mode = sbus_readb(&regs->mcr);
320                 cur_mode &= ~CG14_MCR_PIXMODE_MASK;
321                 switch(mode) {
322                 case MDI_32_PIX:
323                         cur_mode |= (CG14_MCR_PIXMODE_32 <<
324                                      CG14_MCR_PIXMODE_SHIFT);
325                         break;
326
327                 case MDI_16_PIX:
328                         cur_mode |= (CG14_MCR_PIXMODE_16 <<
329                                      CG14_MCR_PIXMODE_SHIFT);
330                         break;
331
332                 case MDI_8_PIX:
333                         break;
334
335                 default:
336                         ret = -ENOSYS;
337                         break;
338                 };
339                 if (!ret) {
340                         sbus_writeb(cur_mode, &regs->mcr);
341                         par->mode = mode;
342                 }
343                 spin_unlock_irqrestore(&par->lock, flags);
344                 break;
345
346         default:
347                 ret = sbusfb_ioctl_helper(cmd, arg, info,
348                                           FBTYPE_MDICOLOR, 8, par->fbsize);
349                 break;
350         };
351
352         return ret;
353 }
354
355 /*
356  *  Initialisation
357  */
358
359 static void cg14_init_fix(struct fb_info *info, int linebytes)
360 {
361         struct cg14_par *par = (struct cg14_par *)info->par;
362         const char *name;
363
364         name = "cgfourteen";
365         if (par->sdev)
366                 name = par->sdev->prom_name;
367
368         strlcpy(info->fix.id, name, sizeof(info->fix.id));
369
370         info->fix.type = FB_TYPE_PACKED_PIXELS;
371         info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
372
373         info->fix.line_length = linebytes;
374
375         info->fix.accel = FB_ACCEL_SUN_CG14;
376 }
377
378 static struct sbus_mmap_map __cg14_mmap_map[CG14_MMAP_ENTRIES] __initdata = {
379         {
380                 .voff   = CG14_REGS,
381                 .poff   = 0x80000000,
382                 .size   = 0x1000
383         },
384         {
385                 .voff   = CG14_XLUT,
386                 .poff   = 0x80003000,
387                 .size   = 0x1000
388         },
389         {
390                 .voff   = CG14_CLUT1,
391                 .poff   = 0x80004000,
392                 .size   = 0x1000
393         },
394         {
395                 .voff   = CG14_CLUT2,
396                 .poff   = 0x80005000,
397                 .size   = 0x1000
398         },
399         {
400                 .voff   = CG14_CLUT3,
401                 .poff   = 0x80006000,
402                 .size   = 0x1000
403         },
404         {
405                 .voff   = CG3_MMAP_OFFSET - 0x7000,
406                 .poff   = 0x80000000,
407                 .size   = 0x7000
408         },
409         {
410                 .voff   = CG3_MMAP_OFFSET,
411                 .poff   = 0x00000000,
412                 .size   = SBUS_MMAP_FBSIZE(1)
413         },
414         {
415                 .voff   = MDI_CURSOR_MAP,
416                 .poff   = 0x80001000,
417                 .size   = 0x1000
418         },
419         {
420                 .voff   = MDI_CHUNKY_BGR_MAP,
421                 .poff   = 0x01000000,
422                 .size   = 0x400000
423         },
424         {
425                 .voff   = MDI_PLANAR_X16_MAP,
426                 .poff   = 0x02000000,
427                 .size   = 0x200000
428         },
429         {
430                 .voff   = MDI_PLANAR_C16_MAP,
431                 .poff   = 0x02800000,
432                 .size   = 0x200000
433         },
434         {
435                 .voff   = MDI_PLANAR_X32_MAP,
436                 .poff   = 0x03000000,
437                 .size   = 0x100000
438         },
439         {
440                 .voff   = MDI_PLANAR_B32_MAP,
441                 .poff   = 0x03400000,
442                 .size   = 0x100000
443         },
444         {
445                 .voff   = MDI_PLANAR_G32_MAP,
446                 .poff   = 0x03800000,
447                 .size   = 0x100000
448         },
449         {
450                 .voff   = MDI_PLANAR_R32_MAP,
451                 .poff   = 0x03c00000,
452                 .size   = 0x100000
453         },
454         { .size = 0 }
455 };
456
457 struct all_info {
458         struct fb_info info;
459         struct cg14_par par;
460         struct list_head list;
461 };
462 static LIST_HEAD(cg14_list);
463
464 static void cg14_init_one(struct sbus_dev *sdev, int node, int parent_node)
465 {
466         struct all_info *all;
467         unsigned long phys, rphys;
468         u32 bases[6];
469         int is_8mb, linebytes, i;
470
471         if (!sdev) {
472                 if (prom_getproperty(node, "address",
473                                      (char *) &bases[0], sizeof(bases)) <= 0
474                     || !bases[0]) {
475                         printk(KERN_ERR "cg14: Device is not mapped.\n");
476                         return;
477                 }
478                 if (__get_iospace(bases[0]) != __get_iospace(bases[1])) {
479                         printk(KERN_ERR "cg14: I/O spaces don't match.\n");
480                         return;
481                 }
482         }
483
484         all = kmalloc(sizeof(*all), GFP_KERNEL);
485         if (!all) {
486                 printk(KERN_ERR "cg14: Cannot allocate memory.\n");
487                 return;
488         }
489         memset(all, 0, sizeof(*all));
490
491         INIT_LIST_HEAD(&all->list);
492
493         spin_lock_init(&all->par.lock);
494
495         sbusfb_fill_var(&all->info.var, node, 8);
496         all->info.var.red.length = 8;
497         all->info.var.green.length = 8;
498         all->info.var.blue.length = 8;
499
500         linebytes = prom_getintdefault(node, "linebytes",
501                                        all->info.var.xres);
502         all->par.fbsize = PAGE_ALIGN(linebytes * all->info.var.yres);
503
504         all->par.sdev = sdev;
505         if (sdev) {
506                 rphys = sdev->reg_addrs[0].phys_addr;
507                 all->par.physbase = phys = sdev->reg_addrs[1].phys_addr;
508                 all->par.iospace = sdev->reg_addrs[0].which_io;
509
510                 all->par.regs = sbus_ioremap(&sdev->resource[0], 0,
511                                      sizeof(struct cg14_regs),
512                                      "cg14 regs");
513                 all->par.clut = sbus_ioremap(&sdev->resource[0], CG14_CLUT1,
514                                      sizeof(struct cg14_clut),
515                                      "cg14 clut");
516                 all->par.cursor = sbus_ioremap(&sdev->resource[0], CG14_CURSORREGS,
517                                      sizeof(struct cg14_cursor),
518                                      "cg14 cursor");
519                 all->info.screen_base = sbus_ioremap(&sdev->resource[1], 0,
520                                      all->par.fbsize, "cg14 ram");
521         } else {
522                 rphys = __get_phys(bases[0]);
523                 all->par.physbase = phys = __get_phys(bases[1]);
524                 all->par.iospace = __get_iospace(bases[0]);
525                 all->par.regs = (struct cg14_regs __iomem *)(unsigned long)bases[0];
526                 all->par.clut = (struct cg14_clut __iomem *)((unsigned long)bases[0] +
527                                                      CG14_CLUT1);
528                 all->par.cursor =
529                         (struct cg14_cursor __iomem *)((unsigned long)bases[0] +
530                                                CG14_CURSORREGS);
531
532                 all->info.screen_base = (char __iomem *)(unsigned long)bases[1];
533         }
534
535         prom_getproperty(node, "reg", (char *) &bases[0], sizeof(bases));
536         is_8mb = (bases[5] == 0x800000);
537
538         if (sizeof(all->par.mmap_map) != sizeof(__cg14_mmap_map)) {
539                 extern void __cg14_mmap_sized_wrongly(void);
540
541                 __cg14_mmap_sized_wrongly();
542         }
543                 
544         memcpy(&all->par.mmap_map, &__cg14_mmap_map, sizeof(all->par.mmap_map));
545         for (i = 0; i < CG14_MMAP_ENTRIES; i++) {
546                 struct sbus_mmap_map *map = &all->par.mmap_map[i];
547
548                 if (!map->size)
549                         break;
550                 if (map->poff & 0x80000000)
551                         map->poff = (map->poff & 0x7fffffff) + rphys - phys;
552                 if (is_8mb &&
553                     map->size >= 0x100000 &&
554                     map->size <= 0x400000)
555                         map->size *= 2;
556         }
557
558         all->par.mode = MDI_8_PIX;
559         all->par.ramsize = (is_8mb ? 0x800000 : 0x400000);
560
561         all->info.flags = FBINFO_DEFAULT | FBINFO_HWACCEL_YPAN;
562         all->info.fbops = &cg14_ops;
563         all->info.par = &all->par;
564
565         __cg14_reset(&all->par);
566
567         if (fb_alloc_cmap(&all->info.cmap, 256, 0)) {
568                 printk(KERN_ERR "cg14: Could not allocate color map.\n");
569                 kfree(all);
570                 return;
571         }
572         fb_set_cmap(&all->info.cmap, &all->info);
573
574         cg14_init_fix(&all->info, linebytes);
575
576         if (register_framebuffer(&all->info) < 0) {
577                 printk(KERN_ERR "cg14: Could not register framebuffer.\n");
578                 fb_dealloc_cmap(&all->info.cmap);
579                 kfree(all);
580                 return;
581         }
582
583         list_add(&all->list, &cg14_list);
584
585         printk("cg14: cgfourteen at %lx:%lx, %dMB\n",
586                all->par.iospace, all->par.physbase, all->par.ramsize >> 20);
587
588 }
589
590 int __init cg14_init(void)
591 {
592         struct sbus_bus *sbus;
593         struct sbus_dev *sdev;
594
595         if (fb_get_options("cg14fb", NULL))
596                 return -ENODEV;
597
598 #ifdef CONFIG_SPARC32
599         {
600                 int root, node;
601
602                 root = prom_getchild(prom_root_node);
603                 root = prom_searchsiblings(root, "obio");
604                 if (root) {
605                         node = prom_searchsiblings(prom_getchild(root),
606                                                    "cgfourteen");
607                         if (node)
608                                 cg14_init_one(NULL, node, root);
609                 }
610         }
611 #endif
612         for_all_sbusdev(sdev, sbus) {
613                 if (!strcmp(sdev->prom_name, "cgfourteen"))
614                         cg14_init_one(sdev, sdev->prom_node, sbus->prom_node);
615         }
616
617         return 0;
618 }
619
620 void __exit cg14_exit(void)
621 {
622         struct list_head *pos, *tmp;
623
624         list_for_each_safe(pos, tmp, &cg14_list) {
625                 struct all_info *all = list_entry(pos, typeof(*all), list);
626
627                 unregister_framebuffer(&all->info);
628                 fb_dealloc_cmap(&all->info.cmap);
629                 kfree(all);
630         }
631 }
632
633 int __init
634 cg14_setup(char *arg)
635 {
636         /* No cmdline options yet... */
637         return 0;
638 }
639
640 module_init(cg14_init);
641
642 #ifdef MODULE
643 module_exit(cg14_exit);
644 #endif
645
646 MODULE_DESCRIPTION("framebuffer driver for CGfourteen chipsets");
647 MODULE_AUTHOR("David S. Miller <davem@redhat.com>");
648 MODULE_LICENSE("GPL");