3 * Low-level SCSI driver for NCR53c406a chip.
4 * Copyright (C) 1994, 1995, 1996 Normunds Saumanis (normunds@fi.ibm.com)
6 * LILO command line usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]
7 * Specify IRQ = 0 for non-interrupt driven mode.
8 * FASTPIO = 1 for fast pio mode, 0 for slow mode.
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2, or (at your option) any
15 * This program is distributed in the hope that it will be useful, but
16 * WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
18 * General Public License for more details.
22 #define NCR53C406A_DEBUG 0
23 #define VERBOSE_NCR53C406A_DEBUG 0
25 /* Set this to 1 for PIO mode (recommended) or to 0 for DMA mode */
29 /* #define BIOS_ADDR 0xD8000 *//* define this if autoprobe fails */
30 /* #define PORT_BASE 0x330 *//* define this if autoprobe fails */
31 /* #define IRQ_LEV 0 *//* define this if autoprobe fails */
32 #define DMA_CHAN 5 /* this is ignored if DMA is disabled */
34 /* Set this to 0 if you encounter kernel lockups while transferring
36 #define USE_FAST_PIO 1
38 /* ============= End of user configurable parameters ============= */
40 #include <linux/module.h>
42 #include <linux/errno.h>
43 #include <linux/ioport.h>
44 #include <linux/sched.h>
45 #include <linux/interrupt.h>
46 #include <linux/proc_fs.h>
47 #include <linux/stat.h>
48 #include <linux/init.h>
49 #include <linux/bitops.h>
54 #include <linux/blkdev.h>
55 #include <linux/spinlock.h>
57 #include <scsi/scsi_host.h>
59 /* ============================================================= */
61 #define WATCHDOG 5000000
63 #define SYNC_MODE 0 /* Synchronous transfer mode */
66 #undef NCR53C406A_DEBUG
67 #define NCR53C406A_DEBUG 1
76 /* Default configuration */
77 #define C1_IMG 0x07 /* ID=7 */
78 #define C2_IMG 0x48 /* FE SCSI2 */
80 #define C3_IMG 0x21 /* CDB TE */
82 #define C3_IMG 0x20 /* CDB */
84 #define C4_IMG 0x04 /* ANE */
85 #define C5_IMG 0xb6 /* AA PI SIE POL */
87 #define REG0 (outb(C4_IMG, CONFIG4))
88 #define REG1 (outb(C5_IMG, CONFIG5))
96 #if VERBOSE_NCR53C406A_DEBUG
102 #define LOAD_DMA_COUNT(count) \
103 outb(count & 0xff, TC_LSB); \
104 outb((count >> 8) & 0xff, TC_MSB); \
105 outb((count >> 16) & 0xff, TC_HIGH);
110 #define SCSI_NOP 0x00
111 #define FLUSH_FIFO 0x01
112 #define CHIP_RESET 0x02
113 #define SCSI_RESET 0x03
114 #define RESELECT 0x40
115 #define SELECT_NO_ATN 0x41
116 #define SELECT_ATN 0x42
117 #define SELECT_ATN_STOP 0x43
118 #define ENABLE_SEL 0x44
119 #define DISABLE_SEL 0x45
120 #define SELECT_ATN3 0x46
121 #define RESELECT3 0x47
122 #define TRANSFER_INFO 0x10
123 #define INIT_CMD_COMPLETE 0x11
124 #define MSG_ACCEPT 0x12
125 #define TRANSFER_PAD 0x18
127 #define RESET_ATN 0x1b
128 #define SEND_MSG 0x20
129 #define SEND_STATUS 0x21
130 #define SEND_DATA 0x22
131 #define DISCONN_SEQ 0x23
132 #define TERMINATE_SEQ 0x24
133 #define TARG_CMD_COMPLETE 0x25
135 #define RECV_MSG 0x28
136 #define RECV_CMD 0x29
137 #define RECV_DATA 0x2a
138 #define RECV_CMD_SEQ 0x2b
139 #define TARGET_ABORT_DMA 0x04
141 /*----------------------------------------------------------------*/
142 /* the following will set the monitor border color (useful to find
143 where something crashed or gets stuck at */
154 #define rtrc(i) {inb(0x3da);outb(0x31,0x3c0);outb((i),0x3c0);}
158 /*----------------------------------------------------------------*/
170 /* Static function prototypes */
171 static void NCR53c406a_intr(int, void *, struct pt_regs *);
172 static irqreturn_t do_NCR53c406a_intr(int, void *, struct pt_regs *);
173 static void chip_init(void);
174 static void calc_port_addr(void);
176 static int irq_probe(void);
179 /* ================================================================= */
182 static void *bios_base;
186 static int port_base = PORT_BASE;
188 static int port_base;
192 static int irq_level = IRQ_LEV;
194 static int irq_level = -1; /* 0 is 'no irq', so use -1 for 'uninitialized' */
202 static int fast_pio = USE_FAST_PIO;
205 static Scsi_Cmnd *current_SC;
206 static char info_msg[256];
208 /* ================================================================= */
210 /* possible BIOS locations */
212 static void *addresses[] = {
216 #define ADDRESS_COUNT ARRAY_SIZE(addresses)
217 #endif /* USE_BIOS */
219 /* possible i/o port addresses */
220 static unsigned short ports[] = { 0x230, 0x330, 0x280, 0x290, 0x330, 0x340, 0x300, 0x310, 0x348, 0x350 };
221 #define PORT_COUNT ARRAY_SIZE(ports)
223 /* possible interrupt channels */
224 static unsigned short intrs[] = { 10, 11, 12, 15 };
225 #define INTR_COUNT ARRAY_SIZE(intrs)
227 /* signatures for NCR 53c406a based controllers */
233 } signatures[] __initdata = {
235 /* 123456789012345678901234567890123456789012345678901234567890 */
237 "Copyright (C) Acculogic, Inc.\r\n2.8M Diskette Extension Bios ver 4.04.03 03/01/1993", 61, 82},};
239 #define SIGNATURE_COUNT ARRAY_SIZE(signatures)
240 #endif /* USE_BIOS */
242 /* ============================================================ */
244 /* Control Register Set 0 */
245 static int TC_LSB; /* transfer counter lsb */
246 static int TC_MSB; /* transfer counter msb */
247 static int SCSI_FIFO; /* scsi fifo register */
248 static int CMD_REG; /* command register */
249 static int STAT_REG; /* status register */
250 static int DEST_ID; /* selection/reselection bus id */
251 static int INT_REG; /* interrupt status register */
252 static int SRTIMOUT; /* select/reselect timeout reg */
253 static int SEQ_REG; /* sequence step register */
254 static int SYNCPRD; /* synchronous transfer period */
255 static int FIFO_FLAGS; /* indicates # of bytes in fifo */
256 static int SYNCOFF; /* synchronous offset register */
257 static int CONFIG1; /* configuration register */
258 static int CLKCONV; /* clock conversion reg */
259 /*static int TESTREG;*//* test mode register */
260 static int CONFIG2; /* Configuration 2 Register */
261 static int CONFIG3; /* Configuration 3 Register */
262 static int CONFIG4; /* Configuration 4 Register */
263 static int TC_HIGH; /* Transfer Counter High */
264 /*static int FIFO_BOTTOM;*//* Reserve FIFO byte register */
266 /* Control Register Set 1 */
267 /*static int JUMPER_SENSE;*//* Jumper sense port reg (r/w) */
268 /*static int SRAM_PTR;*//* SRAM address pointer reg (r/w) */
269 /*static int SRAM_DATA;*//* SRAM data register (r/w) */
270 static int PIO_FIFO; /* PIO FIFO registers (r/w) */
271 /*static int PIO_FIFO1;*//* */
272 /*static int PIO_FIFO2;*//* */
273 /*static int PIO_FIFO3;*//* */
274 static int PIO_STATUS; /* PIO status (r/w) */
275 /*static int ATA_CMD;*//* ATA command/status reg (r/w) */
276 /*static int ATA_ERR;*//* ATA features/error register (r/w) */
277 static int PIO_FLAG; /* PIO flag interrupt enable (r/w) */
278 static int CONFIG5; /* Configuration 5 register (r/w) */
279 /*static int SIGNATURE;*//* Signature Register (r) */
280 /*static int CONFIG6;*//* Configuration 6 register (r) */
282 /* ============================================================== */
285 static __inline__ int NCR53c406a_dma_setup(unsigned char *ptr, unsigned int count, unsigned char mode)
288 unsigned long flags = 0;
290 VDEB(printk("dma: before count=%d ", count));
294 limit = 65536 - (((unsigned) ptr) & 0xFFFF);
296 if (count > (65536 << 1))
297 count = (65536 << 1);
298 limit = (65536 << 1) - (((unsigned) ptr) & 0x1FFFF);
304 VDEB(printk("after count=%d\n", count));
305 if ((count & 1) || (((unsigned) ptr) & 1))
306 panic("NCR53c406a: attempted unaligned DMA transfer\n");
308 flags = claim_dma_lock();
309 disable_dma(dma_chan);
310 clear_dma_ff(dma_chan);
311 set_dma_addr(dma_chan, (long) ptr);
312 set_dma_count(dma_chan, count);
313 set_dma_mode(dma_chan, mode);
314 enable_dma(dma_chan);
315 release_dma_lock(flags);
320 static __inline__ int NCR53c406a_dma_write(unsigned char *src, unsigned int count)
322 return NCR53c406a_dma_setup(src, count, DMA_MODE_WRITE);
325 static __inline__ int NCR53c406a_dma_read(unsigned char *src, unsigned int count)
327 return NCR53c406a_dma_setup(src, count, DMA_MODE_READ);
330 static __inline__ int NCR53c406a_dma_residual(void)
335 flags = claim_dma_lock();
336 clear_dma_ff(dma_chan);
337 tmp = get_dma_residue(dma_chan);
338 release_dma_lock(flags);
345 static __inline__ int NCR53c406a_pio_read(unsigned char *request, unsigned int reqlen)
348 int len; /* current scsi fifo size */
353 /* VDEB(printk("pio_status=%x\n", i)); */
376 if ((i & 0x40) && len == 0) { /* fifo empty and interrupt occurred */
384 if (fast_pio && len > 3) {
385 insl(PIO_FIFO, request, len >> 2);
386 request += len & 0xfc;
387 reqlen -= len & 0xfc;
390 *request++ = inb(PIO_FIFO);
399 static __inline__ int NCR53c406a_pio_write(unsigned char *request, unsigned int reqlen)
402 int len; /* current scsi fifo size */
405 while (reqlen && !(i & 0x40)) {
407 /* VDEB(printk("pio_status=%x\n", i)); */
408 if (i & 0x80) /* error */
434 if (fast_pio && len > 3) {
435 outsl(PIO_FIFO, request, len >> 2);
436 request += len & 0xfc;
437 reqlen -= len & 0xfc;
440 outb(*request++, PIO_FIFO);
450 static int __init NCR53c406a_detect(struct scsi_host_template * tpnt)
453 struct Scsi_Host *shpnt = NULL;
461 /* look for a valid signature */
462 for (ii = 0; ii < ADDRESS_COUNT && !bios_base; ii++)
463 for (jj = 0; (jj < SIGNATURE_COUNT) && !bios_base; jj++)
464 if (!memcmp((void *) addresses[ii] + signatures[jj].sig_offset, (void *) signatures[jj].signature, (int) signatures[jj].sig_length))
465 bios_base = addresses[ii];
468 printk("NCR53c406a: BIOS signature not found\n");
472 DEB(printk("NCR53c406a BIOS found at 0x%x\n", (unsigned int) bios_base);
474 #endif /* USE_BIOS */
477 if (!request_region(port_base, 0x10, "NCR53c406a")) /* ports already snatched */
480 #else /* autodetect */
481 if (port_base) { /* LILO override */
482 if (!request_region(port_base, 0x10, "NCR53c406a"))
485 for (i = 0; i < PORT_COUNT && !port_base; i++) {
486 if (!request_region(ports[i], 0x10, "NCR53c406a")) {
487 DEB(printk("NCR53c406a: port 0x%x in use\n", ports[i]));
489 VDEB(printk("NCR53c406a: port 0x%x available\n", ports[i]));
490 outb(C5_IMG, ports[i] + 0x0d); /* reg set 1 */
491 if ((inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) ^ inb(ports[i] + 0x0e)) == 7 && (inb(ports[i] + 0x0e) & 0xf8) == 0x58) {
492 port_base = ports[i];
493 VDEB(printk("NCR53c406a: Sig register valid\n"));
494 VDEB(printk("port_base=0x%x\n", port_base));
497 release_region(ports[i], 0x10);
501 #endif /* PORT_BASE */
503 if (!port_base) { /* no ports found */
504 printk("NCR53c406a: no available ports found\n");
508 DEB(printk("NCR53c406a detected\n"));
514 if (irq_level < 0) { /* LILO override if >= 0 */
515 irq_level = irq_probe();
516 if (irq_level < 0) { /* Trouble */
517 printk("NCR53c406a: IRQ problem, irq_level=%d, giving up\n", irq_level);
523 DEB(printk("NCR53c406a: using port_base 0x%x\n", port_base));
526 tpnt->proc_name = "NCR53c406a";
528 shpnt = scsi_register(tpnt, 0);
530 printk("NCR53c406a: Unable to register host, giving up.\n");
535 if (request_irq(irq_level, do_NCR53c406a_intr, 0, "NCR53c406a", shpnt)) {
536 printk("NCR53c406a: unable to allocate IRQ %d\n", irq_level);
540 DEB(printk("NCR53c406a: allocated IRQ %d\n", irq_level));
541 } else if (irq_level == 0) {
543 DEB(printk("NCR53c406a: No interrupts detected\n"));
544 printk("NCR53c406a driver no longer supports polling interface\n");
545 printk("Please email linux-scsi@vger.kernel.org\n");
548 printk("NCR53c406a: No interrupts found and DMA mode defined. Giving up.\n");
552 DEB(printk("NCR53c406a: Shouldn't get here!\n"));
558 if (request_dma(dma_chan, "NCR53c406a") != 0) {
559 printk("NCR53c406a: unable to allocate DMA channel %d\n", dma_chan);
563 DEB(printk("Allocated DMA channel %d\n", dma_chan));
566 shpnt->irq = irq_level;
567 shpnt->io_port = port_base;
568 shpnt->n_io_port = 0x10;
570 shpnt->dma = dma_chan;
574 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, DMA channel %d.", port_base, irq_level, dma_chan);
576 sprintf(info_msg, "NCR53c406a at 0x%x, IRQ %d, %s PIO mode.", port_base, irq_level, fast_pio ? "fast" : "slow");
584 free_irq(irq_level, shpnt);
587 scsi_unregister(shpnt);
589 release_region(port_base, 0x10);
593 static int NCR53c406a_release(struct Scsi_Host *shost)
596 free_irq(shost->irq, NULL);
598 if (shost->dma_channel != 0xff)
599 free_dma(shost->dma_channel);
601 if (shost->io_port && shost->n_io_port)
602 release_region(shost->io_port, shost->n_io_port);
604 scsi_unregister(shost);
608 /* called from init/main.c */
609 static int __init NCR53c406a_setup(char *str)
611 static size_t setup_idx = 0;
615 DEB(printk("NCR53c406a: Setup called\n");
618 if (setup_idx >= PORT_COUNT - 1) {
619 printk("NCR53c406a: Setup called too many times. Bad LILO params?\n");
622 get_options(str, 4, ints);
623 if (ints[0] < 1 || ints[0] > 3) {
624 printk("NCR53c406a: Malformed command line\n");
625 printk("NCR53c406a: Usage: ncr53c406a=<PORTBASE>[,<IRQ>[,<FASTPIO>]]\n");
628 for (i = 0; i < PORT_COUNT && !port_base; i++)
629 if (ports[i] == ints[1]) {
631 DEB(printk("NCR53c406a: Specified port_base 0x%x\n", port_base);
635 printk("NCR53c406a: Invalid PORTBASE 0x%x specified\n", ints[1]);
642 DEB(printk("NCR53c406a: Specified irq %d\n", irq_level);
645 for (i = 0; i < INTR_COUNT && irq_level < 0; i++)
646 if (intrs[i] == ints[2]) {
648 DEB(printk("NCR53c406a: Specified irq %d\n", port_base);
652 printk("NCR53c406a: Invalid IRQ %d specified\n", ints[2]);
658 DEB(printk("NCR53c406a: port_base=0x%x, irq=%d, fast_pio=%d\n", port_base, irq_level, fast_pio);)
662 __setup("ncr53c406a=", NCR53c406a_setup);
664 static const char *NCR53c406a_info(struct Scsi_Host *SChost)
666 DEB(printk("NCR53c406a_info called\n"));
671 static void wait_intr(void)
673 unsigned long i = jiffies + WATCHDOG;
675 while (time_after(i, jiffies) && !(inb(STAT_REG) & 0xe0)) { /* wait for a pseudo-interrupt */
680 if (time_before_eq(i, jiffies)) { /* Timed out */
682 current_SC->result = DID_TIME_OUT << 16;
683 current_SC->SCp.phase = idle;
684 current_SC->scsi_done(current_SC);
688 NCR53c406a_intr(0, NULL, NULL);
692 static int NCR53c406a_queue(Scsi_Cmnd * SCpnt, void (*done) (Scsi_Cmnd *))
696 VDEB(printk("NCR53c406a_queue called\n"));
697 DEB(printk("cmd=%02x, cmd_len=%02x, target=%02x, lun=%02x, bufflen=%d\n", SCpnt->cmnd[0], SCpnt->cmd_len, SCpnt->target, SCpnt->lun, SCpnt->request_bufflen));
700 VDEB(for (i = 0; i < SCpnt->cmd_len; i++)
701 printk("cmd[%d]=%02x ", i, SCpnt->cmnd[i]));
706 current_SC->scsi_done = done;
707 current_SC->SCp.phase = command_ph;
708 current_SC->SCp.Status = 0;
709 current_SC->SCp.Message = 0;
711 /* We are locked here already by the mid layer */
713 outb(scmd_id(SCpnt), DEST_ID); /* set destination */
714 outb(FLUSH_FIFO, CMD_REG); /* reset the fifos */
716 for (i = 0; i < SCpnt->cmd_len; i++) {
717 outb(SCpnt->cmnd[i], SCSI_FIFO);
719 outb(SELECT_NO_ATN, CMD_REG);
725 static int NCR53c406a_host_reset(Scsi_Cmnd * SCpnt)
727 DEB(printk("NCR53c406a_reset called\n"));
729 spin_lock_irq(SCpnt->device->host->host_lock);
731 outb(C4_IMG, CONFIG4); /* Select reg set 0 */
732 outb(CHIP_RESET, CMD_REG);
733 outb(SCSI_NOP, CMD_REG); /* required after reset */
734 outb(SCSI_RESET, CMD_REG);
739 spin_unlock_irq(SCpnt->device->host->host_lock);
744 static int NCR53c406a_biosparm(struct scsi_device *disk,
745 struct block_device *dev,
746 sector_t capacity, int *info_array)
750 DEB(printk("NCR53c406a_biosparm called\n"));
753 info_array[0] = 64; /* heads */
754 info_array[1] = 32; /* sectors */
755 info_array[2] = size >> 11; /* cylinders */
756 if (info_array[2] > 1024) { /* big disk */
759 info_array[2] = size / (255 * 63);
764 static irqreturn_t do_NCR53c406a_intr(int unused, void *dev_id,
765 struct pt_regs *regs)
768 struct Scsi_Host *dev = dev_id;
770 spin_lock_irqsave(dev->host_lock, flags);
771 NCR53c406a_intr(0, dev_id, regs);
772 spin_unlock_irqrestore(dev->host_lock, flags);
776 static void NCR53c406a_intr(int unused, void *dev_id, struct pt_regs *regs)
778 DEB(unsigned char fifo_size;
780 DEB(unsigned char seq_reg;
782 unsigned char status, int_reg;
784 unsigned char pio_status;
785 struct scatterlist *sglist;
786 unsigned int sgcount;
789 VDEB(printk("NCR53c406a_intr called\n"));
793 pio_status = inb(PIO_STATUS);
796 status = inb(STAT_REG);
797 DEB(seq_reg = inb(SEQ_REG));
798 int_reg = inb(INT_REG);
799 DEB(fifo_size = inb(FIFO_FLAGS) & 0x1f);
802 printk("status=%02x, seq_reg=%02x, int_reg=%02x, fifo_size=%02x", status, seq_reg, int_reg, fifo_size);
806 printk(", pio=%02x\n", pio_status);
808 #endif /* NCR53C406A_DEBUG */
810 if (int_reg & 0x80) { /* SCSI reset intr */
812 DEB(printk("NCR53c406a: reset intr received\n"));
813 current_SC->SCp.phase = idle;
814 current_SC->result = DID_RESET << 16;
815 current_SC->scsi_done(current_SC);
819 if (pio_status & 0x80) {
820 printk("NCR53C406A: Warning: PIO error!\n");
821 current_SC->SCp.phase = idle;
822 current_SC->result = DID_ERROR << 16;
823 current_SC->scsi_done(current_SC);
828 if (status & 0x20) { /* Parity error */
829 printk("NCR53c406a: Warning: parity error!\n");
830 current_SC->SCp.phase = idle;
831 current_SC->result = DID_PARITY << 16;
832 current_SC->scsi_done(current_SC);
836 if (status & 0x40) { /* Gross error */
837 printk("NCR53c406a: Warning: gross error!\n");
838 current_SC->SCp.phase = idle;
839 current_SC->result = DID_ERROR << 16;
840 current_SC->scsi_done(current_SC);
844 if (int_reg & 0x20) { /* Disconnect */
845 DEB(printk("NCR53c406a: disconnect intr received\n"));
846 if (current_SC->SCp.phase != message_in) { /* Unexpected disconnect */
847 current_SC->result = DID_NO_CONNECT << 16;
848 } else { /* Command complete, return status and message */
849 current_SC->result = (current_SC->SCp.Status & 0xff)
850 | ((current_SC->SCp.Message & 0xff) << 8) | (DID_OK << 16);
854 current_SC->SCp.phase = idle;
855 current_SC->scsi_done(current_SC);
859 switch (status & 0x07) { /* scsi phase */
860 case 0x00: /* DATA-OUT */
861 if (int_reg & 0x10) { /* Target requesting info transfer */
863 current_SC->SCp.phase = data_out;
864 VDEB(printk("NCR53c406a: Data-Out phase\n"));
865 outb(FLUSH_FIFO, CMD_REG);
866 LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
867 #if USE_DMA /* No s/g support for DMA */
868 NCR53c406a_dma_write(current_SC->request_buffer, current_SC->request_bufflen);
870 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
872 if (!current_SC->use_sg) /* Don't use scatter-gather */
873 NCR53c406a_pio_write(current_SC->request_buffer, current_SC->request_bufflen);
874 else { /* use scatter-gather */
875 sgcount = current_SC->use_sg;
876 sglist = current_SC->request_buffer;
878 NCR53c406a_pio_write(page_address(sglist->page) + sglist->offset, sglist->length);
887 case 0x01: /* DATA-IN */
888 if (int_reg & 0x10) { /* Target requesting info transfer */
890 current_SC->SCp.phase = data_in;
891 VDEB(printk("NCR53c406a: Data-In phase\n"));
892 outb(FLUSH_FIFO, CMD_REG);
893 LOAD_DMA_COUNT(current_SC->request_bufflen); /* Max transfer size */
894 #if USE_DMA /* No s/g support for DMA */
895 NCR53c406a_dma_read(current_SC->request_buffer, current_SC->request_bufflen);
897 outb(TRANSFER_INFO | DMA_OP, CMD_REG);
899 if (!current_SC->use_sg) /* Don't use scatter-gather */
900 NCR53c406a_pio_read(current_SC->request_buffer, current_SC->request_bufflen);
901 else { /* Use scatter-gather */
902 sgcount = current_SC->use_sg;
903 sglist = current_SC->request_buffer;
905 NCR53c406a_pio_read(page_address(sglist->page) + sglist->offset, sglist->length);
914 case 0x02: /* COMMAND */
915 current_SC->SCp.phase = command_ph;
916 printk("NCR53c406a: Warning: Unknown interrupt occurred in command phase!\n");
919 case 0x03: /* STATUS */
921 current_SC->SCp.phase = status_ph;
922 VDEB(printk("NCR53c406a: Status phase\n"));
923 outb(FLUSH_FIFO, CMD_REG);
924 outb(INIT_CMD_COMPLETE, CMD_REG);
927 case 0x04: /* Reserved */
928 case 0x05: /* Reserved */
929 printk("NCR53c406a: WARNING: Reserved phase!!!\n");
932 case 0x06: /* MESSAGE-OUT */
933 DEB(printk("NCR53c406a: Message-Out phase\n"));
934 current_SC->SCp.phase = message_out;
935 outb(SET_ATN, CMD_REG); /* Reject the message */
936 outb(MSG_ACCEPT, CMD_REG);
939 case 0x07: /* MESSAGE-IN */
941 VDEB(printk("NCR53c406a: Message-In phase\n"));
942 current_SC->SCp.phase = message_in;
944 current_SC->SCp.Status = inb(SCSI_FIFO);
945 current_SC->SCp.Message = inb(SCSI_FIFO);
947 VDEB(printk("SCSI FIFO size=%d\n", inb(FIFO_FLAGS) & 0x1f));
948 DEB(printk("Status = %02x Message = %02x\n", current_SC->SCp.Status, current_SC->SCp.Message));
950 if (current_SC->SCp.Message == SAVE_POINTERS || current_SC->SCp.Message == DISCONNECT) {
951 outb(SET_ATN, CMD_REG); /* Reject message */
952 DEB(printk("Discarding SAVE_POINTERS message\n"));
954 outb(MSG_ACCEPT, CMD_REG);
960 static int irq_probe(void)
965 inb(INT_REG); /* clear the interrupt register */
966 irqs = probe_irq_on();
968 /* Invalid command will cause an interrupt */
972 /* Wait for the interrupt to occur */
973 i = jiffies + WATCHDOG;
974 while (time_after(i, jiffies) && !(inb(STAT_REG) & 0x80))
976 if (time_before_eq(i, jiffies)) { /* Timed out, must be hardware trouble */
981 irq = probe_irq_off(irqs);
984 outb(CHIP_RESET, CMD_REG);
985 outb(SCSI_NOP, CMD_REG);
992 static void chip_init(void)
996 outb(0x00, PIO_STATUS);
998 outb(0x01, PIO_STATUS);
1000 outb(0x00, PIO_FLAG);
1002 outb(C4_IMG, CONFIG4); /* REG0; */
1003 outb(C3_IMG, CONFIG3);
1004 outb(C2_IMG, CONFIG2);
1005 outb(C1_IMG, CONFIG1);
1007 outb(0x05, CLKCONV); /* clock conversion factor */
1008 outb(0x9C, SRTIMOUT); /* Selection timeout */
1009 outb(0x05, SYNCPRD); /* Synchronous transfer period */
1010 outb(SYNC_MODE, SYNCOFF); /* synchronous mode */
1013 static void __init calc_port_addr(void)
1015 /* Control Register Set 0 */
1016 TC_LSB = (port_base + 0x00);
1017 TC_MSB = (port_base + 0x01);
1018 SCSI_FIFO = (port_base + 0x02);
1019 CMD_REG = (port_base + 0x03);
1020 STAT_REG = (port_base + 0x04);
1021 DEST_ID = (port_base + 0x04);
1022 INT_REG = (port_base + 0x05);
1023 SRTIMOUT = (port_base + 0x05);
1024 SEQ_REG = (port_base + 0x06);
1025 SYNCPRD = (port_base + 0x06);
1026 FIFO_FLAGS = (port_base + 0x07);
1027 SYNCOFF = (port_base + 0x07);
1028 CONFIG1 = (port_base + 0x08);
1029 CLKCONV = (port_base + 0x09);
1030 /* TESTREG = (port_base+0x0A); */
1031 CONFIG2 = (port_base + 0x0B);
1032 CONFIG3 = (port_base + 0x0C);
1033 CONFIG4 = (port_base + 0x0D);
1034 TC_HIGH = (port_base + 0x0E);
1035 /* FIFO_BOTTOM = (port_base+0x0F); */
1037 /* Control Register Set 1 */
1038 /* JUMPER_SENSE = (port_base+0x00); */
1039 /* SRAM_PTR = (port_base+0x01); */
1040 /* SRAM_DATA = (port_base+0x02); */
1041 PIO_FIFO = (port_base + 0x04);
1042 /* PIO_FIFO1 = (port_base+0x05); */
1043 /* PIO_FIFO2 = (port_base+0x06); */
1044 /* PIO_FIFO3 = (port_base+0x07); */
1045 PIO_STATUS = (port_base + 0x08);
1046 /* ATA_CMD = (port_base+0x09); */
1047 /* ATA_ERR = (port_base+0x0A); */
1048 PIO_FLAG = (port_base + 0x0B);
1049 CONFIG5 = (port_base + 0x0D);
1050 /* SIGNATURE = (port_base+0x0E); */
1051 /* CONFIG6 = (port_base+0x0F); */
1054 MODULE_LICENSE("GPL");
1056 /* NOTE: scatter-gather support only works in PIO mode.
1057 * Use SG_NONE if DMA mode is enabled!
1060 static struct scsi_host_template driver_template =
1062 .proc_name = "NCR53c406a" /* proc_name */,
1063 .name = "NCR53c406a" /* name */,
1064 .detect = NCR53c406a_detect /* detect */,
1065 .release = NCR53c406a_release,
1066 .info = NCR53c406a_info /* info */,
1067 .queuecommand = NCR53c406a_queue /* queuecommand */,
1068 .eh_host_reset_handler = NCR53c406a_host_reset /* reset */,
1069 .bios_param = NCR53c406a_biosparm /* biosparm */,
1070 .can_queue = 1 /* can_queue */,
1071 .this_id = 7 /* SCSI ID of the chip */,
1072 .sg_tablesize = 32 /*SG_ALL*/ /*SG_NONE*/,
1073 .cmd_per_lun = 1 /* commands per lun */,
1074 .unchecked_isa_dma = 1 /* unchecked_isa_dma */,
1075 .use_clustering = ENABLE_CLUSTERING
1078 #include "scsi_module.c"
1081 * Overrides for Emacs so that we get a uniform tabbing style.
1082 * Emacs will notice this stuff at the end of the file and automatically
1083 * adjust the settings for this buffer only. This must remain at the end
1085 * ---------------------------------------------------------------------------
1088 * c-brace-imaginary-offset: 0
1089 * c-brace-offset: -4
1090 * c-argdecl-indent: 4
1091 * c-label-offset: -4
1092 * c-continued-statement-offset: 4
1093 * c-continued-brace-offset: 0
1094 * indent-tabs-mode: nil