2 * Copyright (c) 2004 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
34 #include <linux/slab.h>
35 #include <linux/errno.h>
37 #include "mthca_dev.h"
38 #include "mthca_cmd.h"
39 #include "mthca_memfree.h"
42 struct mthca_buddy *buddy;
48 * Must be packed because mtt_seg is 64 bits but only aligned to 32 bits.
50 struct mthca_mpt_entry {
59 __be32 window_count_limit;
61 __be32 mtt_sz; /* Arbel only */
63 } __attribute__((packed));
65 #define MTHCA_MPT_FLAG_SW_OWNS (0xfUL << 28)
66 #define MTHCA_MPT_FLAG_MIO (1 << 17)
67 #define MTHCA_MPT_FLAG_BIND_ENABLE (1 << 15)
68 #define MTHCA_MPT_FLAG_PHYSICAL (1 << 9)
69 #define MTHCA_MPT_FLAG_REGION (1 << 8)
71 #define MTHCA_MTT_FLAG_PRESENT 1
73 #define MTHCA_MPT_STATUS_SW 0xF0
74 #define MTHCA_MPT_STATUS_HW 0x00
76 #define SINAI_FMR_KEY_INC 0x1000000
79 * Buddy allocator for MTT segments (currently not very efficient
80 * since it doesn't keep a free list and just searches linearly
81 * through the bitmaps)
84 static u32 mthca_buddy_alloc(struct mthca_buddy *buddy, int order)
90 spin_lock(&buddy->lock);
92 for (o = order; o <= buddy->max_order; ++o) {
93 m = 1 << (buddy->max_order - o);
94 seg = find_first_bit(buddy->bits[o], m);
99 spin_unlock(&buddy->lock);
103 clear_bit(seg, buddy->bits[o]);
108 set_bit(seg ^ 1, buddy->bits[o]);
111 spin_unlock(&buddy->lock);
118 static void mthca_buddy_free(struct mthca_buddy *buddy, u32 seg, int order)
122 spin_lock(&buddy->lock);
124 while (test_bit(seg ^ 1, buddy->bits[order])) {
125 clear_bit(seg ^ 1, buddy->bits[order]);
130 set_bit(seg, buddy->bits[order]);
132 spin_unlock(&buddy->lock);
135 static int mthca_buddy_init(struct mthca_buddy *buddy, int max_order)
139 buddy->max_order = max_order;
140 spin_lock_init(&buddy->lock);
142 buddy->bits = kzalloc((buddy->max_order + 1) * sizeof (long *),
147 for (i = 0; i <= buddy->max_order; ++i) {
148 s = BITS_TO_LONGS(1 << (buddy->max_order - i));
149 buddy->bits[i] = kmalloc(s * sizeof (long), GFP_KERNEL);
152 bitmap_zero(buddy->bits[i],
153 1 << (buddy->max_order - i));
156 set_bit(0, buddy->bits[buddy->max_order]);
161 for (i = 0; i <= buddy->max_order; ++i)
162 kfree(buddy->bits[i]);
170 static void mthca_buddy_cleanup(struct mthca_buddy *buddy)
174 for (i = 0; i <= buddy->max_order; ++i)
175 kfree(buddy->bits[i]);
180 static u32 mthca_alloc_mtt_range(struct mthca_dev *dev, int order,
181 struct mthca_buddy *buddy)
183 u32 seg = mthca_buddy_alloc(buddy, order);
188 if (mthca_is_memfree(dev))
189 if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg,
190 seg + (1 << order) - 1)) {
191 mthca_buddy_free(buddy, seg, order);
198 static struct mthca_mtt *__mthca_alloc_mtt(struct mthca_dev *dev, int size,
199 struct mthca_buddy *buddy)
201 struct mthca_mtt *mtt;
205 return ERR_PTR(-EINVAL);
207 mtt = kmalloc(sizeof *mtt, GFP_KERNEL);
209 return ERR_PTR(-ENOMEM);
213 for (i = MTHCA_MTT_SEG_SIZE / 8; i < size; i <<= 1)
216 mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy);
217 if (mtt->first_seg == -1) {
219 return ERR_PTR(-ENOMEM);
225 struct mthca_mtt *mthca_alloc_mtt(struct mthca_dev *dev, int size)
227 return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy);
230 void mthca_free_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt)
235 mthca_buddy_free(mtt->buddy, mtt->first_seg, mtt->order);
237 mthca_table_put_range(dev, dev->mr_table.mtt_table,
239 mtt->first_seg + (1 << mtt->order) - 1);
244 static int __mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
245 int start_index, u64 *buffer_list, int list_len)
247 struct mthca_mailbox *mailbox;
253 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
255 return PTR_ERR(mailbox);
256 mtt_entry = mailbox->buf;
258 while (list_len > 0) {
259 mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
260 mtt->first_seg * MTHCA_MTT_SEG_SIZE +
263 for (i = 0; i < list_len && i < MTHCA_MAILBOX_SIZE / 8 - 2; ++i)
264 mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
265 MTHCA_MTT_FLAG_PRESENT);
268 * If we have an odd number of entries to write, add
269 * one more dummy entry for firmware efficiency.
272 mtt_entry[i + 2] = 0;
274 err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1, &status);
276 mthca_warn(dev, "WRITE_MTT failed (%d)\n", err);
280 mthca_warn(dev, "WRITE_MTT returned status 0x%02x\n",
292 mthca_free_mailbox(dev, mailbox);
296 int mthca_write_mtt_size(struct mthca_dev *dev)
298 if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy ||
299 !(dev->mthca_flags & MTHCA_FLAG_FMR))
301 * Be friendly to WRITE_MTT command
302 * and leave two empty slots for the
303 * index and reserved fields of the
306 return PAGE_SIZE / sizeof (u64) - 2;
308 /* For Arbel, all MTTs must fit in the same page. */
309 return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff;
312 static void mthca_tavor_write_mtt_seg(struct mthca_dev *dev,
313 struct mthca_mtt *mtt, int start_index,
314 u64 *buffer_list, int list_len)
319 mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * MTHCA_MTT_SEG_SIZE +
320 start_index * sizeof (u64);
321 for (i = 0; i < list_len; ++i)
322 mthca_write64_raw(cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT),
326 static void mthca_arbel_write_mtt_seg(struct mthca_dev *dev,
327 struct mthca_mtt *mtt, int start_index,
328 u64 *buffer_list, int list_len)
331 dma_addr_t dma_handle;
333 int s = start_index * sizeof (u64);
335 /* For Arbel, all MTTs must fit in the same page. */
336 BUG_ON(s / PAGE_SIZE != (s + list_len * sizeof(u64) - 1) / PAGE_SIZE);
337 /* Require full segments */
338 BUG_ON(s % MTHCA_MTT_SEG_SIZE);
340 mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg +
341 s / MTHCA_MTT_SEG_SIZE, &dma_handle);
345 for (i = 0; i < list_len; ++i)
346 mtts[i] = cpu_to_be64(buffer_list[i] | MTHCA_MTT_FLAG_PRESENT);
348 dma_sync_single(&dev->pdev->dev, dma_handle, list_len * sizeof (u64), DMA_TO_DEVICE);
351 int mthca_write_mtt(struct mthca_dev *dev, struct mthca_mtt *mtt,
352 int start_index, u64 *buffer_list, int list_len)
354 int size = mthca_write_mtt_size(dev);
357 if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy ||
358 !(dev->mthca_flags & MTHCA_FLAG_FMR))
359 return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len);
361 while (list_len > 0) {
362 chunk = min(size, list_len);
363 if (mthca_is_memfree(dev))
364 mthca_arbel_write_mtt_seg(dev, mtt, start_index,
367 mthca_tavor_write_mtt_seg(dev, mtt, start_index,
371 start_index += chunk;
372 buffer_list += chunk;
378 static inline u32 tavor_hw_index_to_key(u32 ind)
383 static inline u32 tavor_key_to_hw_index(u32 key)
388 static inline u32 arbel_hw_index_to_key(u32 ind)
390 return (ind >> 24) | (ind << 8);
393 static inline u32 arbel_key_to_hw_index(u32 key)
395 return (key << 24) | (key >> 8);
398 static inline u32 hw_index_to_key(struct mthca_dev *dev, u32 ind)
400 if (mthca_is_memfree(dev))
401 return arbel_hw_index_to_key(ind);
403 return tavor_hw_index_to_key(ind);
406 static inline u32 key_to_hw_index(struct mthca_dev *dev, u32 key)
408 if (mthca_is_memfree(dev))
409 return arbel_key_to_hw_index(key);
411 return tavor_key_to_hw_index(key);
414 static inline u32 adjust_key(struct mthca_dev *dev, u32 key)
416 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
417 return ((key << 20) & 0x800000) | (key & 0x7fffff);
422 int mthca_mr_alloc(struct mthca_dev *dev, u32 pd, int buffer_size_shift,
423 u64 iova, u64 total_size, u32 access, struct mthca_mr *mr)
425 struct mthca_mailbox *mailbox;
426 struct mthca_mpt_entry *mpt_entry;
432 WARN_ON(buffer_size_shift >= 32);
434 key = mthca_alloc(&dev->mr_table.mpt_alloc);
437 key = adjust_key(dev, key);
438 mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
440 if (mthca_is_memfree(dev)) {
441 err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
443 goto err_out_mpt_free;
446 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
447 if (IS_ERR(mailbox)) {
448 err = PTR_ERR(mailbox);
451 mpt_entry = mailbox->buf;
453 mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
455 MTHCA_MPT_FLAG_REGION |
458 mpt_entry->flags |= cpu_to_be32(MTHCA_MPT_FLAG_PHYSICAL);
460 mpt_entry->page_size = cpu_to_be32(buffer_size_shift - 12);
461 mpt_entry->key = cpu_to_be32(key);
462 mpt_entry->pd = cpu_to_be32(pd);
463 mpt_entry->start = cpu_to_be64(iova);
464 mpt_entry->length = cpu_to_be64(total_size);
466 memset(&mpt_entry->lkey, 0,
467 sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
471 cpu_to_be64(dev->mr_table.mtt_base +
472 mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE);
475 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
476 for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
478 printk("[%02x] ", i * 4);
479 printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
480 if ((i + 1) % 4 == 0)
485 err = mthca_SW2HW_MPT(dev, mailbox,
486 key & (dev->limits.num_mpts - 1),
489 mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
490 goto err_out_mailbox;
492 mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
495 goto err_out_mailbox;
498 mthca_free_mailbox(dev, mailbox);
502 mthca_free_mailbox(dev, mailbox);
505 mthca_table_put(dev, dev->mr_table.mpt_table, key);
508 mthca_free(&dev->mr_table.mpt_alloc, key);
512 int mthca_mr_alloc_notrans(struct mthca_dev *dev, u32 pd,
513 u32 access, struct mthca_mr *mr)
516 return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr);
519 int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
520 u64 *buffer_list, int buffer_size_shift,
521 int list_len, u64 iova, u64 total_size,
522 u32 access, struct mthca_mr *mr)
526 mr->mtt = mthca_alloc_mtt(dev, list_len);
528 return PTR_ERR(mr->mtt);
530 err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len);
532 mthca_free_mtt(dev, mr->mtt);
536 err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova,
537 total_size, access, mr);
539 mthca_free_mtt(dev, mr->mtt);
545 static void mthca_free_region(struct mthca_dev *dev, u32 lkey)
547 mthca_table_put(dev, dev->mr_table.mpt_table,
548 key_to_hw_index(dev, lkey));
550 mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey));
553 void mthca_free_mr(struct mthca_dev *dev, struct mthca_mr *mr)
558 err = mthca_HW2SW_MPT(dev, NULL,
559 key_to_hw_index(dev, mr->ibmr.lkey) &
560 (dev->limits.num_mpts - 1),
563 mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err);
565 mthca_warn(dev, "HW2SW_MPT returned status 0x%02x\n",
568 mthca_free_region(dev, mr->ibmr.lkey);
569 mthca_free_mtt(dev, mr->mtt);
572 int mthca_fmr_alloc(struct mthca_dev *dev, u32 pd,
573 u32 access, struct mthca_fmr *mr)
575 struct mthca_mpt_entry *mpt_entry;
576 struct mthca_mailbox *mailbox;
580 int list_len = mr->attr.max_pages;
584 if (mr->attr.page_shift < 12 || mr->attr.page_shift >= 32)
587 /* For Arbel, all MTTs must fit in the same page. */
588 if (mthca_is_memfree(dev) &&
589 mr->attr.max_pages * sizeof *mr->mem.arbel.mtts > PAGE_SIZE)
594 key = mthca_alloc(&dev->mr_table.mpt_alloc);
597 key = adjust_key(dev, key);
599 idx = key & (dev->limits.num_mpts - 1);
600 mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key);
602 if (mthca_is_memfree(dev)) {
603 err = mthca_table_get(dev, dev->mr_table.mpt_table, key);
605 goto err_out_mpt_free;
607 mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL);
608 BUG_ON(!mr->mem.arbel.mpt);
610 mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base +
611 sizeof *(mr->mem.tavor.mpt) * idx;
613 mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy);
614 if (IS_ERR(mr->mtt)) {
615 err = PTR_ERR(mr->mtt);
619 mtt_seg = mr->mtt->first_seg * MTHCA_MTT_SEG_SIZE;
621 if (mthca_is_memfree(dev)) {
622 mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table,
624 &mr->mem.arbel.dma_handle);
625 BUG_ON(!mr->mem.arbel.mtts);
627 mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg;
629 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
630 if (IS_ERR(mailbox)) {
631 err = PTR_ERR(mailbox);
632 goto err_out_free_mtt;
635 mpt_entry = mailbox->buf;
637 mpt_entry->flags = cpu_to_be32(MTHCA_MPT_FLAG_SW_OWNS |
639 MTHCA_MPT_FLAG_REGION |
642 mpt_entry->page_size = cpu_to_be32(mr->attr.page_shift - 12);
643 mpt_entry->key = cpu_to_be32(key);
644 mpt_entry->pd = cpu_to_be32(pd);
645 memset(&mpt_entry->start, 0,
646 sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, start));
647 mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg);
650 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);
651 for (i = 0; i < sizeof (struct mthca_mpt_entry) / 4; ++i) {
653 printk("[%02x] ", i * 4);
654 printk(" %08x", be32_to_cpu(((__be32 *) mpt_entry)[i]));
655 if ((i + 1) % 4 == 0)
660 err = mthca_SW2HW_MPT(dev, mailbox,
661 key & (dev->limits.num_mpts - 1),
664 mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err);
665 goto err_out_mailbox_free;
668 mthca_warn(dev, "SW2HW_MPT returned status 0x%02x\n",
671 goto err_out_mailbox_free;
674 mthca_free_mailbox(dev, mailbox);
677 err_out_mailbox_free:
678 mthca_free_mailbox(dev, mailbox);
681 mthca_free_mtt(dev, mr->mtt);
684 mthca_table_put(dev, dev->mr_table.mpt_table, key);
687 mthca_free(&dev->mr_table.mpt_alloc, key);
691 int mthca_free_fmr(struct mthca_dev *dev, struct mthca_fmr *fmr)
696 mthca_free_region(dev, fmr->ibmr.lkey);
697 mthca_free_mtt(dev, fmr->mtt);
702 static inline int mthca_check_fmr(struct mthca_fmr *fmr, u64 *page_list,
703 int list_len, u64 iova)
707 if (list_len > fmr->attr.max_pages)
710 page_mask = (1 << fmr->attr.page_shift) - 1;
712 /* We are getting page lists, so va must be page aligned. */
713 if (iova & page_mask)
716 /* Trust the user not to pass misaligned data in page_list */
718 for (i = 0; i < list_len; ++i) {
719 if (page_list[i] & ~page_mask)
723 if (fmr->maps >= fmr->attr.max_maps)
730 int mthca_tavor_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
731 int list_len, u64 iova)
733 struct mthca_fmr *fmr = to_mfmr(ibfmr);
734 struct mthca_dev *dev = to_mdev(ibfmr->device);
735 struct mthca_mpt_entry mpt_entry;
739 err = mthca_check_fmr(fmr, page_list, list_len, iova);
745 key = tavor_key_to_hw_index(fmr->ibmr.lkey);
746 key += dev->limits.num_mpts;
747 fmr->ibmr.lkey = fmr->ibmr.rkey = tavor_hw_index_to_key(key);
749 writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
751 for (i = 0; i < list_len; ++i) {
752 __be64 mtt_entry = cpu_to_be64(page_list[i] |
753 MTHCA_MTT_FLAG_PRESENT);
754 mthca_write64_raw(mtt_entry, fmr->mem.tavor.mtts + i);
757 mpt_entry.lkey = cpu_to_be32(key);
758 mpt_entry.length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
759 mpt_entry.start = cpu_to_be64(iova);
761 __raw_writel((__force u32) mpt_entry.lkey, &fmr->mem.tavor.mpt->key);
762 memcpy_toio(&fmr->mem.tavor.mpt->start, &mpt_entry.start,
763 offsetof(struct mthca_mpt_entry, window_count) -
764 offsetof(struct mthca_mpt_entry, start));
766 writeb(MTHCA_MPT_STATUS_HW, fmr->mem.tavor.mpt);
771 int mthca_arbel_map_phys_fmr(struct ib_fmr *ibfmr, u64 *page_list,
772 int list_len, u64 iova)
774 struct mthca_fmr *fmr = to_mfmr(ibfmr);
775 struct mthca_dev *dev = to_mdev(ibfmr->device);
779 err = mthca_check_fmr(fmr, page_list, list_len, iova);
785 key = arbel_key_to_hw_index(fmr->ibmr.lkey);
786 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
787 key += SINAI_FMR_KEY_INC;
789 key += dev->limits.num_mpts;
790 fmr->ibmr.lkey = fmr->ibmr.rkey = arbel_hw_index_to_key(key);
792 *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
796 for (i = 0; i < list_len; ++i)
797 fmr->mem.arbel.mtts[i] = cpu_to_be64(page_list[i] |
798 MTHCA_MTT_FLAG_PRESENT);
800 dma_sync_single(&dev->pdev->dev, fmr->mem.arbel.dma_handle,
801 list_len * sizeof(u64), DMA_TO_DEVICE);
803 fmr->mem.arbel.mpt->key = cpu_to_be32(key);
804 fmr->mem.arbel.mpt->lkey = cpu_to_be32(key);
805 fmr->mem.arbel.mpt->length = cpu_to_be64(list_len * (1ull << fmr->attr.page_shift));
806 fmr->mem.arbel.mpt->start = cpu_to_be64(iova);
810 *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_HW;
817 void mthca_tavor_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
824 writeb(MTHCA_MPT_STATUS_SW, fmr->mem.tavor.mpt);
827 void mthca_arbel_fmr_unmap(struct mthca_dev *dev, struct mthca_fmr *fmr)
834 *(u8 *) fmr->mem.arbel.mpt = MTHCA_MPT_STATUS_SW;
837 int mthca_init_mr_table(struct mthca_dev *dev)
840 int mpts, mtts, err, i;
842 err = mthca_alloc_init(&dev->mr_table.mpt_alloc,
843 dev->limits.num_mpts,
844 ~0, dev->limits.reserved_mrws);
848 if (!mthca_is_memfree(dev) &&
849 (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN))
850 dev->limits.fmr_reserved_mtts = 0;
852 dev->mthca_flags |= MTHCA_FLAG_FMR;
854 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
855 mthca_dbg(dev, "Memory key throughput optimization activated.\n");
857 err = mthca_buddy_init(&dev->mr_table.mtt_buddy,
858 fls(dev->limits.num_mtt_segs - 1));
863 dev->mr_table.tavor_fmr.mpt_base = NULL;
864 dev->mr_table.tavor_fmr.mtt_base = NULL;
866 if (dev->limits.fmr_reserved_mtts) {
867 i = fls(dev->limits.fmr_reserved_mtts - 1);
870 mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n");
874 mpts = mtts = 1 << i;
876 mtts = dev->limits.num_mtt_segs;
877 mpts = dev->limits.num_mpts;
880 if (!mthca_is_memfree(dev) &&
881 (dev->mthca_flags & MTHCA_FLAG_FMR)) {
883 addr = pci_resource_start(dev->pdev, 4) +
884 ((pci_resource_len(dev->pdev, 4) - 1) &
885 dev->mr_table.mpt_base);
887 dev->mr_table.tavor_fmr.mpt_base =
888 ioremap(addr, mpts * sizeof(struct mthca_mpt_entry));
890 if (!dev->mr_table.tavor_fmr.mpt_base) {
891 mthca_warn(dev, "MPT ioremap for FMR failed.\n");
896 addr = pci_resource_start(dev->pdev, 4) +
897 ((pci_resource_len(dev->pdev, 4) - 1) &
898 dev->mr_table.mtt_base);
900 dev->mr_table.tavor_fmr.mtt_base =
901 ioremap(addr, mtts * MTHCA_MTT_SEG_SIZE);
902 if (!dev->mr_table.tavor_fmr.mtt_base) {
903 mthca_warn(dev, "MTT ioremap for FMR failed.\n");
909 if (dev->limits.fmr_reserved_mtts) {
910 err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1));
912 goto err_fmr_mtt_buddy;
914 /* Prevent regular MRs from using FMR keys */
915 err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1));
917 goto err_reserve_fmr;
919 dev->mr_table.fmr_mtt_buddy =
920 &dev->mr_table.tavor_fmr.mtt_buddy;
922 dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy;
924 /* FMR table is always the first, take reserved MTTs out of there */
925 if (dev->limits.reserved_mtts) {
926 i = fls(dev->limits.reserved_mtts - 1);
928 if (mthca_alloc_mtt_range(dev, i,
929 dev->mr_table.fmr_mtt_buddy) == -1) {
930 mthca_warn(dev, "MTT table of order %d is too small.\n",
931 dev->mr_table.fmr_mtt_buddy->max_order);
933 goto err_reserve_mtts;
941 if (dev->limits.fmr_reserved_mtts)
942 mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
945 if (dev->mr_table.tavor_fmr.mtt_base)
946 iounmap(dev->mr_table.tavor_fmr.mtt_base);
949 if (dev->mr_table.tavor_fmr.mpt_base)
950 iounmap(dev->mr_table.tavor_fmr.mpt_base);
953 mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
956 mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);
961 void mthca_cleanup_mr_table(struct mthca_dev *dev)
963 /* XXX check if any MRs are still allocated? */
964 if (dev->limits.fmr_reserved_mtts)
965 mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy);
967 mthca_buddy_cleanup(&dev->mr_table.mtt_buddy);
969 if (dev->mr_table.tavor_fmr.mtt_base)
970 iounmap(dev->mr_table.tavor_fmr.mtt_base);
971 if (dev->mr_table.tavor_fmr.mpt_base)
972 iounmap(dev->mr_table.tavor_fmr.mpt_base);
974 mthca_alloc_cleanup(&dev->mr_table.mpt_alloc);