git.oblomov.eu Git - linux-2.6/blob - arch/sparc64/kernel/time.c

   1 /* time.c: UltraSparc timer and TOD clock support.
   2  *
   3  * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net)
   4  * Copyright (C) 1998 Eddie C. Dost   (ecd@skynet.be)
   5  *
   6  * Based largely on code which is:
   7  *
   8  * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
   9  */
  10
  11 #include <linux/errno.h>
  12 #include <linux/module.h>
  13 #include <linux/sched.h>
  14 #include <linux/kernel.h>
  15 #include <linux/param.h>
  16 #include <linux/string.h>
  17 #include <linux/mm.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/time.h>
  20 #include <linux/timex.h>
  21 #include <linux/init.h>
  22 #include <linux/ioport.h>
  23 #include <linux/mc146818rtc.h>
  24 #include <linux/delay.h>
  25 #include <linux/profile.h>
  26 #include <linux/bcd.h>
  27 #include <linux/jiffies.h>
  28 #include <linux/cpufreq.h>
  29 #include <linux/percpu.h>
  30 #include <linux/miscdevice.h>
  31 #include <linux/rtc.h>
  32 #include <linux/kernel_stat.h>
  33 #include <linux/clockchips.h>
  34 #include <linux/clocksource.h>
  35
  36 #include <asm/oplib.h>
  37 #include <asm/mostek.h>
  38 #include <asm/timer.h>
  39 #include <asm/irq.h>
  40 #include <asm/io.h>
  41 #include <asm/prom.h>
  42 #include <asm/of_device.h>
  43 #include <asm/starfire.h>
  44 #include <asm/smp.h>
  45 #include <asm/sections.h>
  46 #include <asm/cpudata.h>
  47 #include <asm/uaccess.h>
  48 #include <asm/irq_regs.h>
  49
  50 #include "entry.h"
  51
  52 DEFINE_SPINLOCK(mostek_lock);
  53 DEFINE_SPINLOCK(rtc_lock);
  54 void __iomem *mstk48t02_regs = NULL;
  55 #ifdef CONFIG_PCI
  56 unsigned long ds1287_regs = 0UL;
  57 static void __iomem *bq4802_regs;
  58 #endif
  59
  60 static void __iomem *mstk48t08_regs;
  61 static void __iomem *mstk48t59_regs;
  62
  63 static int set_rtc_mmss(unsigned long);
  64
  65 #define TICK_PRIV_BIT   (1UL << 63)
  66 #define TICKCMP_IRQ_BIT (1UL << 63)
  67
  68 #ifdef CONFIG_SMP
  69 unsigned long profile_pc(struct pt_regs *regs)
  70 {
  71         unsigned long pc = instruction_pointer(regs);
  72
  73         if (in_lock_functions(pc))
  74                 return regs->u_regs[UREG_RETPC];
  75         return pc;
  76 }
  77 EXPORT_SYMBOL(profile_pc);
  78 #endif
  79
  80 static void tick_disable_protection(void)
  81 {
  82         /* Set things up so user can access tick register for profiling
  83          * purposes.  Also workaround BB_ERRATA_1 by doing a dummy
  84          * read back of %tick after writing it.
  85          */
  86         __asm__ __volatile__(
  87         "       ba,pt   %%xcc, 1f\n"
  88         "        nop\n"
  89         "       .align  64\n"
  90         "1:     rd      %%tick, %%g2\n"
  91         "       add     %%g2, 6, %%g2\n"
  92         "       andn    %%g2, %0, %%g2\n"
  93         "       wrpr    %%g2, 0, %%tick\n"
  94         "       rdpr    %%tick, %%g0"
  95         : /* no outputs */
  96         : "r" (TICK_PRIV_BIT)
  97         : "g2");
  98 }
  99
 100 static void tick_disable_irq(void)
 101 {
 102         __asm__ __volatile__(
 103         "       ba,pt   %%xcc, 1f\n"
 104         "        nop\n"
 105         "       .align  64\n"
 106         "1:     wr      %0, 0x0, %%tick_cmpr\n"
 107         "       rd      %%tick_cmpr, %%g0"
 108         : /* no outputs */
 109         : "r" (TICKCMP_IRQ_BIT));
 110 }
 111
 112 static void tick_init_tick(void)
 113 {
 114         tick_disable_protection();
 115         tick_disable_irq();
 116 }
 117
 118 static unsigned long tick_get_tick(void)
 119 {
 120         unsigned long ret;
 121
 122         __asm__ __volatile__("rd        %%tick, %0\n\t"
 123                              "mov       %0, %0"
 124                              : "=r" (ret));
 125
 126         return ret & ~TICK_PRIV_BIT;
 127 }
 128
 129 static int tick_add_compare(unsigned long adj)
 130 {
 131         unsigned long orig_tick, new_tick, new_compare;
 132
 133         __asm__ __volatile__("rd        %%tick, %0"
 134                              : "=r" (orig_tick));
 135
 136         orig_tick &= ~TICKCMP_IRQ_BIT;
 137
 138         /* Workaround for Spitfire Errata (#54 I think??), I discovered
 139          * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
 140          * number 103640.
 141          *
 142          * On Blackbird writes to %tick_cmpr can fail, the
 143          * workaround seems to be to execute the wr instruction
 144          * at the start of an I-cache line, and perform a dummy
 145          * read back from %tick_cmpr right after writing to it. -DaveM
 146          */
 147         __asm__ __volatile__("ba,pt     %%xcc, 1f\n\t"
 148                              " add      %1, %2, %0\n\t"
 149                              ".align    64\n"
 150                              "1:\n\t"
 151                              "wr        %0, 0, %%tick_cmpr\n\t"
 152                              "rd        %%tick_cmpr, %%g0\n\t"
 153                              : "=r" (new_compare)
 154                              : "r" (orig_tick), "r" (adj));
 155
 156         __asm__ __volatile__("rd        %%tick, %0"
 157                              : "=r" (new_tick));
 158         new_tick &= ~TICKCMP_IRQ_BIT;
 159
 160         return ((long)(new_tick - (orig_tick+adj))) > 0L;
 161 }
 162
 163 static unsigned long tick_add_tick(unsigned long adj)
 164 {
 165         unsigned long new_tick;
 166
 167         /* Also need to handle Blackbird bug here too. */
 168         __asm__ __volatile__("rd        %%tick, %0\n\t"
 169                              "add       %0, %1, %0\n\t"
 170                              "wrpr      %0, 0, %%tick\n\t"
 171                              : "=&r" (new_tick)
 172                              : "r" (adj));
 173
 174         return new_tick;
 175 }
 176
 177 static struct sparc64_tick_ops tick_operations __read_mostly = {
 178         .name           =       "tick",
 179         .init_tick      =       tick_init_tick,
 180         .disable_irq    =       tick_disable_irq,
 181         .get_tick       =       tick_get_tick,
 182         .add_tick       =       tick_add_tick,
 183         .add_compare    =       tick_add_compare,
 184         .softint_mask   =       1UL << 0,
 185 };
 186
 187 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
 188
 189 static void stick_disable_irq(void)
 190 {
 191         __asm__ __volatile__(
 192         "wr     %0, 0x0, %%asr25"
 193         : /* no outputs */
 194         : "r" (TICKCMP_IRQ_BIT));
 195 }
 196
 197 static void stick_init_tick(void)
 198 {
 199         /* Writes to the %tick and %stick register are not
 200          * allowed on sun4v.  The Hypervisor controls that
 201          * bit, per-strand.
 202          */
 203         if (tlb_type != hypervisor) {
 204                 tick_disable_protection();
 205                 tick_disable_irq();
 206
 207                 /* Let the user get at STICK too. */
 208                 __asm__ __volatile__(
 209                 "       rd      %%asr24, %%g2\n"
 210                 "       andn    %%g2, %0, %%g2\n"
 211                 "       wr      %%g2, 0, %%asr24"
 212                 : /* no outputs */
 213                 : "r" (TICK_PRIV_BIT)
 214                 : "g1", "g2");
 215         }
 216
 217         stick_disable_irq();
 218 }
 219
 220 static unsigned long stick_get_tick(void)
 221 {
 222         unsigned long ret;
 223
 224         __asm__ __volatile__("rd        %%asr24, %0"
 225                              : "=r" (ret));
 226
 227         return ret & ~TICK_PRIV_BIT;
 228 }
 229
 230 static unsigned long stick_add_tick(unsigned long adj)
 231 {
 232         unsigned long new_tick;
 233
 234         __asm__ __volatile__("rd        %%asr24, %0\n\t"
 235                              "add       %0, %1, %0\n\t"
 236                              "wr        %0, 0, %%asr24\n\t"
 237                              : "=&r" (new_tick)
 238                              : "r" (adj));
 239
 240         return new_tick;
 241 }
 242
 243 static int stick_add_compare(unsigned long adj)
 244 {
 245         unsigned long orig_tick, new_tick;
 246
 247         __asm__ __volatile__("rd        %%asr24, %0"
 248                              : "=r" (orig_tick));
 249         orig_tick &= ~TICKCMP_IRQ_BIT;
 250
 251         __asm__ __volatile__("wr        %0, 0, %%asr25"
 252                              : /* no outputs */
 253                              : "r" (orig_tick + adj));
 254
 255         __asm__ __volatile__("rd        %%asr24, %0"
 256                              : "=r" (new_tick));
 257         new_tick &= ~TICKCMP_IRQ_BIT;
 258
 259         return ((long)(new_tick - (orig_tick+adj))) > 0L;
 260 }
 261
 262 static struct sparc64_tick_ops stick_operations __read_mostly = {
 263         .name           =       "stick",
 264         .init_tick      =       stick_init_tick,
 265         .disable_irq    =       stick_disable_irq,
 266         .get_tick       =       stick_get_tick,
 267         .add_tick       =       stick_add_tick,
 268         .add_compare    =       stick_add_compare,
 269         .softint_mask   =       1UL << 16,
 270 };
 271
 272 /* On Hummingbird the STICK/STICK_CMPR register is implemented
 273  * in I/O space.  There are two 64-bit registers each, the
 274  * first holds the low 32-bits of the value and the second holds
 275  * the high 32-bits.
 276  *
 277  * Since STICK is constantly updating, we have to access it carefully.
 278  *
 279  * The sequence we use to read is:
 280  * 1) read high
 281  * 2) read low
 282  * 3) read high again, if it rolled re-read both low and high again.
 283  *
 284  * Writing STICK safely is also tricky:
 285  * 1) write low to zero
 286  * 2) write high
 287  * 3) write low
 288  */
 289 #define HBIRD_STICKCMP_ADDR     0x1fe0000f060UL
 290 #define HBIRD_STICK_ADDR        0x1fe0000f070UL
 291
 292 static unsigned long __hbird_read_stick(void)
 293 {
 294         unsigned long ret, tmp1, tmp2, tmp3;
 295         unsigned long addr = HBIRD_STICK_ADDR+8;
 296
 297         __asm__ __volatile__("ldxa      [%1] %5, %2\n"
 298                              "1:\n\t"
 299                              "sub       %1, 0x8, %1\n\t"
 300                              "ldxa      [%1] %5, %3\n\t"
 301                              "add       %1, 0x8, %1\n\t"
 302                              "ldxa      [%1] %5, %4\n\t"
 303                              "cmp       %4, %2\n\t"
 304                              "bne,a,pn  %%xcc, 1b\n\t"
 305                              " mov      %4, %2\n\t"
 306                              "sllx      %4, 32, %4\n\t"
 307                              "or        %3, %4, %0\n\t"
 308                              : "=&r" (ret), "=&r" (addr),
 309                                "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
 310                              : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
 311
 312         return ret;
 313 }
 314
 315 static void __hbird_write_stick(unsigned long val)
 316 {
 317         unsigned long low = (val & 0xffffffffUL);
 318         unsigned long high = (val >> 32UL);
 319         unsigned long addr = HBIRD_STICK_ADDR;
 320
 321         __asm__ __volatile__("stxa      %%g0, [%0] %4\n\t"
 322                              "add       %0, 0x8, %0\n\t"
 323                              "stxa      %3, [%0] %4\n\t"
 324                              "sub       %0, 0x8, %0\n\t"
 325                              "stxa      %2, [%0] %4"
 326                              : "=&r" (addr)
 327                              : "0" (addr), "r" (low), "r" (high),
 328                                "i" (ASI_PHYS_BYPASS_EC_E));
 329 }
 330
 331 static void __hbird_write_compare(unsigned long val)
 332 {
 333         unsigned long low = (val & 0xffffffffUL);
 334         unsigned long high = (val >> 32UL);
 335         unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
 336
 337         __asm__ __volatile__("stxa      %3, [%0] %4\n\t"
 338                              "sub       %0, 0x8, %0\n\t"
 339                              "stxa      %2, [%0] %4"
 340                              : "=&r" (addr)
 341                              : "0" (addr), "r" (low), "r" (high),
 342                                "i" (ASI_PHYS_BYPASS_EC_E));
 343 }
 344
 345 static void hbtick_disable_irq(void)
 346 {
 347         __hbird_write_compare(TICKCMP_IRQ_BIT);
 348 }
 349
 350 static void hbtick_init_tick(void)
 351 {
 352         tick_disable_protection();
 353
 354         /* XXX This seems to be necessary to 'jumpstart' Hummingbird
 355          * XXX into actually sending STICK interrupts.  I think because
 356          * XXX of how we store %tick_cmpr in head.S this somehow resets the
 357          * XXX {TICK + STICK} interrupt mux.  -DaveM
 358          */
 359         __hbird_write_stick(__hbird_read_stick());
 360
 361         hbtick_disable_irq();
 362 }
 363
 364 static unsigned long hbtick_get_tick(void)
 365 {
 366         return __hbird_read_stick() & ~TICK_PRIV_BIT;
 367 }
 368
 369 static unsigned long hbtick_add_tick(unsigned long adj)
 370 {
 371         unsigned long val;
 372
 373         val = __hbird_read_stick() + adj;
 374         __hbird_write_stick(val);
 375
 376         return val;
 377 }
 378
 379 static int hbtick_add_compare(unsigned long adj)
 380 {
 381         unsigned long val = __hbird_read_stick();
 382         unsigned long val2;
 383
 384         val &= ~TICKCMP_IRQ_BIT;
 385         val += adj;
 386         __hbird_write_compare(val);
 387
 388         val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
 389
 390         return ((long)(val2 - val)) > 0L;
 391 }
 392
 393 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
 394         .name           =       "hbtick",
 395         .init_tick      =       hbtick_init_tick,
 396         .disable_irq    =       hbtick_disable_irq,
 397         .get_tick       =       hbtick_get_tick,
 398         .add_tick       =       hbtick_add_tick,
 399         .add_compare    =       hbtick_add_compare,
 400         .softint_mask   =       1UL << 0,
 401 };
 402
 403 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
 404
 405 int update_persistent_clock(struct timespec now)
 406 {
 407         return set_rtc_mmss(now.tv_sec);
 408 }
 409
 410 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
 411 static void __init kick_start_clock(void)
 412 {
 413         void __iomem *regs = mstk48t02_regs;
 414         u8 sec, tmp;
 415         int i, count;
 416
 417         prom_printf("CLOCK: Clock was stopped. Kick start ");
 418
 419         spin_lock_irq(&mostek_lock);
 420
 421         /* Turn on the kick start bit to start the oscillator. */
 422         tmp = mostek_read(regs + MOSTEK_CREG);
 423         tmp |= MSTK_CREG_WRITE;
 424         mostek_write(regs + MOSTEK_CREG, tmp);
 425         tmp = mostek_read(regs + MOSTEK_SEC);
 426         tmp &= ~MSTK_STOP;
 427         mostek_write(regs + MOSTEK_SEC, tmp);
 428         tmp = mostek_read(regs + MOSTEK_HOUR);
 429         tmp |= MSTK_KICK_START;
 430         mostek_write(regs + MOSTEK_HOUR, tmp);
 431         tmp = mostek_read(regs + MOSTEK_CREG);
 432         tmp &= ~MSTK_CREG_WRITE;
 433         mostek_write(regs + MOSTEK_CREG, tmp);
 434
 435         spin_unlock_irq(&mostek_lock);
 436
 437         /* Delay to allow the clock oscillator to start. */
 438         sec = MSTK_REG_SEC(regs);
 439         for (i = 0; i < 3; i++) {
 440                 while (sec == MSTK_REG_SEC(regs))
 441                         for (count = 0; count < 100000; count++)
 442                                 /* nothing */ ;
 443                 prom_printf(".");
 444                 sec = MSTK_REG_SEC(regs);
 445         }
 446         prom_printf("\n");
 447
 448         spin_lock_irq(&mostek_lock);
 449
 450         /* Turn off kick start and set a "valid" time and date. */
 451         tmp = mostek_read(regs + MOSTEK_CREG);
 452         tmp |= MSTK_CREG_WRITE;
 453         mostek_write(regs + MOSTEK_CREG, tmp);
 454         tmp = mostek_read(regs + MOSTEK_HOUR);
 455         tmp &= ~MSTK_KICK_START;
 456         mostek_write(regs + MOSTEK_HOUR, tmp);
 457         MSTK_SET_REG_SEC(regs,0);
 458         MSTK_SET_REG_MIN(regs,0);
 459         MSTK_SET_REG_HOUR(regs,0);
 460         MSTK_SET_REG_DOW(regs,5);
 461         MSTK_SET_REG_DOM(regs,1);
 462         MSTK_SET_REG_MONTH(regs,8);
 463         MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
 464         tmp = mostek_read(regs + MOSTEK_CREG);
 465         tmp &= ~MSTK_CREG_WRITE;
 466         mostek_write(regs + MOSTEK_CREG, tmp);
 467
 468         spin_unlock_irq(&mostek_lock);
 469
 470         /* Ensure the kick start bit is off. If it isn't, turn it off. */
 471         while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
 472                 prom_printf("CLOCK: Kick start still on!\n");
 473
 474                 spin_lock_irq(&mostek_lock);
 475
 476                 tmp = mostek_read(regs + MOSTEK_CREG);
 477                 tmp |= MSTK_CREG_WRITE;
 478                 mostek_write(regs + MOSTEK_CREG, tmp);
 479
 480                 tmp = mostek_read(regs + MOSTEK_HOUR);
 481                 tmp &= ~MSTK_KICK_START;
 482                 mostek_write(regs + MOSTEK_HOUR, tmp);
 483
 484                 tmp = mostek_read(regs + MOSTEK_CREG);
 485                 tmp &= ~MSTK_CREG_WRITE;
 486                 mostek_write(regs + MOSTEK_CREG, tmp);
 487
 488                 spin_unlock_irq(&mostek_lock);
 489         }
 490
 491         prom_printf("CLOCK: Kick start procedure successful.\n");
 492 }
 493
 494 /* Return nonzero if the clock chip battery is low. */
 495 static int __init has_low_battery(void)
 496 {
 497         void __iomem *regs = mstk48t02_regs;
 498         u8 data1, data2;
 499
 500         spin_lock_irq(&mostek_lock);
 501
 502         data1 = mostek_read(regs + MOSTEK_EEPROM);      /* Read some data. */
 503         mostek_write(regs + MOSTEK_EEPROM, ~data1);     /* Write back the complement. */
 504         data2 = mostek_read(regs + MOSTEK_EEPROM);      /* Read back the complement. */
 505         mostek_write(regs + MOSTEK_EEPROM, data1);      /* Restore original value. */
 506
 507         spin_unlock_irq(&mostek_lock);
 508
 509         return (data1 == data2);        /* Was the write blocked? */
 510 }
 511
 512 static void __init mostek_set_system_time(void __iomem *mregs)
 513 {
 514         unsigned int year, mon, day, hour, min, sec;
 515         u8 tmp;
 516
 517         spin_lock_irq(&mostek_lock);
 518
 519         /* Traditional Mostek chip. */
 520         tmp = mostek_read(mregs + MOSTEK_CREG);
 521         tmp |= MSTK_CREG_READ;
 522         mostek_write(mregs + MOSTEK_CREG, tmp);
 523
 524         sec = MSTK_REG_SEC(mregs);
 525         min = MSTK_REG_MIN(mregs);
 526         hour = MSTK_REG_HOUR(mregs);
 527         day = MSTK_REG_DOM(mregs);
 528         mon = MSTK_REG_MONTH(mregs);
 529         year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
 530
 531         xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
 532         xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 533         set_normalized_timespec(&wall_to_monotonic,
 534                                 -xtime.tv_sec, -xtime.tv_nsec);
 535
 536         tmp = mostek_read(mregs + MOSTEK_CREG);
 537         tmp &= ~MSTK_CREG_READ;
 538         mostek_write(mregs + MOSTEK_CREG, tmp);
 539
 540         spin_unlock_irq(&mostek_lock);
 541 }
 542
 543 /* Probe for the real time clock chip. */
 544 static void __init set_system_time(void)
 545 {
 546         unsigned int year, mon, day, hour, min, sec;
 547         void __iomem *mregs = mstk48t02_regs;
 548 #ifdef CONFIG_PCI
 549         unsigned long dregs = ds1287_regs;
 550         void __iomem *bregs = bq4802_regs;
 551 #else
 552         unsigned long dregs = 0UL;
 553         void __iomem *bregs = 0UL;
 554 #endif
 555
 556         if (!mregs && !dregs && !bregs) {
 557                 prom_printf("Something wrong, clock regs not mapped yet.\n");
 558                 prom_halt();
 559         }
 560
 561         if (mregs) {
 562                 mostek_set_system_time(mregs);
 563                 return;
 564         }
 565
 566         if (bregs) {
 567                 unsigned char val = readb(bregs + 0x0e);
 568                 unsigned int century;
 569
 570                 /* BQ4802 RTC chip. */
 571
 572                 writeb(val | 0x08, bregs + 0x0e);
 573
 574                 sec  = readb(bregs + 0x00);
 575                 min  = readb(bregs + 0x02);
 576                 hour = readb(bregs + 0x04);
 577                 day  = readb(bregs + 0x06);
 578                 mon  = readb(bregs + 0x09);
 579                 year = readb(bregs + 0x0a);
 580                 century = readb(bregs + 0x0f);
 581
 582                 writeb(val, bregs + 0x0e);
 583
 584                 BCD_TO_BIN(sec);
 585                 BCD_TO_BIN(min);
 586                 BCD_TO_BIN(hour);
 587                 BCD_TO_BIN(day);
 588                 BCD_TO_BIN(mon);
 589                 BCD_TO_BIN(year);
 590                 BCD_TO_BIN(century);
 591
 592                 year += (century * 100);
 593         } else {
 594                 /* Dallas 12887 RTC chip. */
 595
 596                 do {
 597                         sec  = CMOS_READ(RTC_SECONDS);
 598                         min  = CMOS_READ(RTC_MINUTES);
 599                         hour = CMOS_READ(RTC_HOURS);
 600                         day  = CMOS_READ(RTC_DAY_OF_MONTH);
 601                         mon  = CMOS_READ(RTC_MONTH);
 602                         year = CMOS_READ(RTC_YEAR);
 603                 } while (sec != CMOS_READ(RTC_SECONDS));
 604
 605                 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
 606                         BCD_TO_BIN(sec);
 607                         BCD_TO_BIN(min);
 608                         BCD_TO_BIN(hour);
 609                         BCD_TO_BIN(day);
 610                         BCD_TO_BIN(mon);
 611                         BCD_TO_BIN(year);
 612                 }
 613                 if ((year += 1900) < 1970)
 614                         year += 100;
 615         }
 616
 617         xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
 618         xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 619         set_normalized_timespec(&wall_to_monotonic,
 620                                 -xtime.tv_sec, -xtime.tv_nsec);
 621 }
 622
 623 /* davem suggests we keep this within the 4M locked kernel image */
 624 static u32 starfire_get_time(void)
 625 {
 626         static char obp_gettod[32];
 627         static u32 unix_tod;
 628
 629         sprintf(obp_gettod, "h# %08x unix-gettod",
 630                 (unsigned int) (long) &unix_tod);
 631         prom_feval(obp_gettod);
 632
 633         return unix_tod;
 634 }
 635
 636 static int starfire_set_time(u32 val)
 637 {
 638         /* Do nothing, time is set using the service processor
 639          * console on this platform.
 640          */
 641         return 0;
 642 }
 643
 644 static u32 hypervisor_get_time(void)
 645 {
 646         unsigned long ret, time;
 647         int retries = 10000;
 648
 649 retry:
 650         ret = sun4v_tod_get(&time);
 651         if (ret == HV_EOK)
 652                 return time;
 653         if (ret == HV_EWOULDBLOCK) {
 654                 if (--retries > 0) {
 655                         udelay(100);
 656                         goto retry;
 657                 }
 658                 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
 659                 return 0;
 660         }
 661         printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
 662         return 0;
 663 }
 664
 665 static int hypervisor_set_time(u32 secs)
 666 {
 667         unsigned long ret;
 668         int retries = 10000;
 669
 670 retry:
 671         ret = sun4v_tod_set(secs);
 672         if (ret == HV_EOK)
 673                 return 0;
 674         if (ret == HV_EWOULDBLOCK) {
 675                 if (--retries > 0) {
 676                         udelay(100);
 677                         goto retry;
 678                 }
 679                 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
 680                 return -EAGAIN;
 681         }
 682         printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
 683         return -EOPNOTSUPP;
 684 }
 685
 686 static int __init clock_model_matches(const char *model)
 687 {
 688         if (strcmp(model, "mk48t02") &&
 689             strcmp(model, "mk48t08") &&
 690             strcmp(model, "mk48t59") &&
 691             strcmp(model, "m5819") &&
 692             strcmp(model, "m5819p") &&
 693             strcmp(model, "m5823") &&
 694             strcmp(model, "ds1287") &&
 695             strcmp(model, "bq4802"))
 696                 return 0;
 697
 698         return 1;
 699 }
 700
 701 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
 702 {
 703         struct device_node *dp = op->node;
 704         const char *model = of_get_property(dp, "model", NULL);
 705         const char *compat = of_get_property(dp, "compatible", NULL);
 706         unsigned long size, flags;
 707         void __iomem *regs;
 708
 709         if (!model)
 710                 model = compat;
 711
 712         if (!model || !clock_model_matches(model))
 713                 return -ENODEV;
 714
 715         /* On an Enterprise system there can be multiple mostek clocks.
 716          * We should only match the one that is on the central FHC bus.
 717          */
 718         if (!strcmp(dp->parent->name, "fhc") &&
 719             strcmp(dp->parent->parent->name, "central") != 0)
 720                 return -ENODEV;
 721
 722         size = (op->resource[0].end - op->resource[0].start) + 1;
 723         regs = of_ioremap(&op->resource[0], 0, size, "clock");
 724         if (!regs)
 725                 return -ENOMEM;
 726
 727 #ifdef CONFIG_PCI
 728         if (!strcmp(model, "ds1287") ||
 729             !strcmp(model, "m5819") ||
 730             !strcmp(model, "m5819p") ||
 731             !strcmp(model, "m5823")) {
 732                 ds1287_regs = (unsigned long) regs;
 733         } else if (!strcmp(model, "bq4802")) {
 734                 bq4802_regs = regs;
 735         } else
 736 #endif
 737         if (model[5] == '0' && model[6] == '2') {
 738                 mstk48t02_regs = regs;
 739         } else if(model[5] == '0' && model[6] == '8') {
 740                 mstk48t08_regs = regs;
 741                 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
 742         } else {
 743                 mstk48t59_regs = regs;
 744                 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
 745         }
 746
 747         printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
 748
 749         local_irq_save(flags);
 750
 751         if (mstk48t02_regs != NULL) {
 752                 /* Report a low battery voltage condition. */
 753                 if (has_low_battery())
 754                         prom_printf("NVRAM: Low battery voltage!\n");
 755
 756                 /* Kick start the clock if it is completely stopped. */
 757                 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
 758                         kick_start_clock();
 759         }
 760
 761         set_system_time();
 762
 763         local_irq_restore(flags);
 764
 765         return 0;
 766 }
 767
 768 static struct of_device_id clock_match[] = {
 769         {
 770                 .name = "eeprom",
 771         },
 772         {
 773                 .name = "rtc",
 774         },
 775         {},
 776 };
 777
 778 static struct of_platform_driver clock_driver = {
 779         .match_table    = clock_match,
 780         .probe          = clock_probe,
 781         .driver         = {
 782                 .name   = "clock",
 783         },
 784 };
 785
 786 static int __init clock_init(void)
 787 {
 788         if (this_is_starfire) {
 789                 xtime.tv_sec = starfire_get_time();
 790                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 791                 set_normalized_timespec(&wall_to_monotonic,
 792                                         -xtime.tv_sec, -xtime.tv_nsec);
 793                 return 0;
 794         }
 795         if (tlb_type == hypervisor) {
 796                 xtime.tv_sec = hypervisor_get_time();
 797                 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
 798                 set_normalized_timespec(&wall_to_monotonic,
 799                                         -xtime.tv_sec, -xtime.tv_nsec);
 800                 return 0;
 801         }
 802
 803         return of_register_driver(&clock_driver, &of_platform_bus_type);
 804 }
 805
 806 /* Must be after subsys_initcall() so that busses are probed.  Must
 807  * be before device_initcall() because things like the RTC driver
 808  * need to see the clock registers.
 809  */
 810 fs_initcall(clock_init);
 811
 812 /* This is gets the master TICK_INT timer going. */
 813 static unsigned long sparc64_init_timers(void)
 814 {
 815         struct device_node *dp;
 816         unsigned long clock;
 817
 818         dp = of_find_node_by_path("/");
 819         if (tlb_type == spitfire) {
 820                 unsigned long ver, manuf, impl;
 821
 822                 __asm__ __volatile__ ("rdpr %%ver, %0"
 823                                       : "=&r" (ver));
 824                 manuf = ((ver >> 48) & 0xffff);
 825                 impl = ((ver >> 32) & 0xffff);
 826                 if (manuf == 0x17 && impl == 0x13) {
 827                         /* Hummingbird, aka Ultra-IIe */
 828                         tick_ops = &hbtick_operations;
 829                         clock = of_getintprop_default(dp, "stick-frequency", 0);
 830                 } else {
 831                         tick_ops = &tick_operations;
 832                         clock = local_cpu_data().clock_tick;
 833                 }
 834         } else {
 835                 tick_ops = &stick_operations;
 836                 clock = of_getintprop_default(dp, "stick-frequency", 0);
 837         }
 838
 839         return clock;
 840 }
 841
 842 struct freq_table {
 843         unsigned long clock_tick_ref;
 844         unsigned int ref_freq;
 845 };
 846 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
 847
 848 unsigned long sparc64_get_clock_tick(unsigned int cpu)
 849 {
 850         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
 851
 852         if (ft->clock_tick_ref)
 853                 return ft->clock_tick_ref;
 854         return cpu_data(cpu).clock_tick;
 855 }
 856
 857 #ifdef CONFIG_CPU_FREQ
 858
 859 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
 860                                     void *data)
 861 {
 862         struct cpufreq_freqs *freq = data;
 863         unsigned int cpu = freq->cpu;
 864         struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
 865
 866         if (!ft->ref_freq) {
 867                 ft->ref_freq = freq->old;
 868                 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
 869         }
 870         if ((val == CPUFREQ_PRECHANGE  && freq->old < freq->new) ||
 871             (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
 872             (val == CPUFREQ_RESUMECHANGE)) {
 873                 cpu_data(cpu).clock_tick =
 874                         cpufreq_scale(ft->clock_tick_ref,
 875                                       ft->ref_freq,
 876                                       freq->new);
 877         }
 878
 879         return 0;
 880 }
 881
 882 static struct notifier_block sparc64_cpufreq_notifier_block = {
 883         .notifier_call  = sparc64_cpufreq_notifier
 884 };
 885
 886 #endif /* CONFIG_CPU_FREQ */
 887
 888 static int sparc64_next_event(unsigned long delta,
 889                               struct clock_event_device *evt)
 890 {
 891         return tick_ops->add_compare(delta) ? -ETIME : 0;
 892 }
 893
 894 static void sparc64_timer_setup(enum clock_event_mode mode,
 895                                 struct clock_event_device *evt)
 896 {
 897         switch (mode) {
 898         case CLOCK_EVT_MODE_ONESHOT:
 899         case CLOCK_EVT_MODE_RESUME:
 900                 break;
 901
 902         case CLOCK_EVT_MODE_SHUTDOWN:
 903                 tick_ops->disable_irq();
 904                 break;
 905
 906         case CLOCK_EVT_MODE_PERIODIC:
 907         case CLOCK_EVT_MODE_UNUSED:
 908                 WARN_ON(1);
 909                 break;
 910         };
 911 }
 912
 913 static struct clock_event_device sparc64_clockevent = {
 914         .features       = CLOCK_EVT_FEAT_ONESHOT,
 915         .set_mode       = sparc64_timer_setup,
 916         .set_next_event = sparc64_next_event,
 917         .rating         = 100,
 918         .shift          = 30,
 919         .irq            = -1,
 920 };
 921 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
 922
 923 void timer_interrupt(int irq, struct pt_regs *regs)
 924 {
 925         struct pt_regs *old_regs = set_irq_regs(regs);
 926         unsigned long tick_mask = tick_ops->softint_mask;
 927         int cpu = smp_processor_id();
 928         struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
 929
 930         clear_softint(tick_mask);
 931
 932         irq_enter();
 933
 934         kstat_this_cpu.irqs[0]++;
 935
 936         if (unlikely(!evt->event_handler)) {
 937                 printk(KERN_WARNING
 938                        "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
 939         } else
 940                 evt->event_handler(evt);
 941
 942         irq_exit();
 943
 944         set_irq_regs(old_regs);
 945 }
 946
 947 void __devinit setup_sparc64_timer(void)
 948 {
 949         struct clock_event_device *sevt;
 950         unsigned long pstate;
 951
 952         /* Guarantee that the following sequences execute
 953          * uninterrupted.
 954          */
 955         __asm__ __volatile__("rdpr      %%pstate, %0\n\t"
 956                              "wrpr      %0, %1, %%pstate"
 957                              : "=r" (pstate)
 958                              : "i" (PSTATE_IE));
 959
 960         tick_ops->init_tick();
 961
 962         /* Restore PSTATE_IE. */
 963         __asm__ __volatile__("wrpr      %0, 0x0, %%pstate"
 964                              : /* no outputs */
 965                              : "r" (pstate));
 966
 967         sevt = &__get_cpu_var(sparc64_events);
 968
 969         memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
 970         sevt->cpumask = cpumask_of_cpu(smp_processor_id());
 971
 972         clockevents_register_device(sevt);
 973 }
 974
 975 #define SPARC64_NSEC_PER_CYC_SHIFT      10UL
 976
 977 static struct clocksource clocksource_tick = {
 978         .rating         = 100,
 979         .mask           = CLOCKSOURCE_MASK(64),
 980         .shift          = 16,
 981         .flags          = CLOCK_SOURCE_IS_CONTINUOUS,
 982 };
 983
 984 static void __init setup_clockevent_multiplier(unsigned long hz)
 985 {
 986         unsigned long mult, shift = 32;
 987
 988         while (1) {
 989                 mult = div_sc(hz, NSEC_PER_SEC, shift);
 990                 if (mult && (mult >> 32UL) == 0UL)
 991                         break;
 992
 993                 shift--;
 994         }
 995
 996         sparc64_clockevent.shift = shift;
 997         sparc64_clockevent.mult = mult;
 998 }
 999
1000 static unsigned long tb_ticks_per_usec __read_mostly;
1001
1002 void __delay(unsigned long loops)
1003 {
1004         unsigned long bclock, now;
1005
1006         bclock = tick_ops->get_tick();
1007         do {
1008                 now = tick_ops->get_tick();
1009         } while ((now-bclock) < loops);
1010 }
1011 EXPORT_SYMBOL(__delay);
1012
1013 void udelay(unsigned long usecs)
1014 {
1015         __delay(tb_ticks_per_usec * usecs);
1016 }
1017 EXPORT_SYMBOL(udelay);
1018
1019 void __init time_init(void)
1020 {
1021         unsigned long clock = sparc64_init_timers();
1022
1023         tb_ticks_per_usec = clock / USEC_PER_SEC;
1024
1025         timer_ticks_per_nsec_quotient =
1026                 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
1027
1028         clocksource_tick.name = tick_ops->name;
1029         clocksource_tick.mult =
1030                 clocksource_hz2mult(clock,
1031                                     clocksource_tick.shift);
1032         clocksource_tick.read = tick_ops->get_tick;
1033
1034         printk("clocksource: mult[%x] shift[%d]\n",
1035                clocksource_tick.mult, clocksource_tick.shift);
1036
1037         clocksource_register(&clocksource_tick);
1038
1039         sparc64_clockevent.name = tick_ops->name;
1040
1041         setup_clockevent_multiplier(clock);
1042
1043         sparc64_clockevent.max_delta_ns =
1044                 clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent);
1045         sparc64_clockevent.min_delta_ns =
1046                 clockevent_delta2ns(0xF, &sparc64_clockevent);
1047
1048         printk("clockevent: mult[%lx] shift[%d]\n",
1049                sparc64_clockevent.mult, sparc64_clockevent.shift);
1050
1051         setup_sparc64_timer();
1052
1053 #ifdef CONFIG_CPU_FREQ
1054         cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1055                                   CPUFREQ_TRANSITION_NOTIFIER);
1056 #endif
1057 }
1058
1059 unsigned long long sched_clock(void)
1060 {
1061         unsigned long ticks = tick_ops->get_tick();
1062
1063         return (ticks * timer_ticks_per_nsec_quotient)
1064                 >> SPARC64_NSEC_PER_CYC_SHIFT;
1065 }
1066
1067 static int set_rtc_mmss(unsigned long nowtime)
1068 {
1069         int real_seconds, real_minutes, chip_minutes;
1070         void __iomem *mregs = mstk48t02_regs;
1071 #ifdef CONFIG_PCI
1072         unsigned long dregs = ds1287_regs;
1073         void __iomem *bregs = bq4802_regs;
1074 #else
1075         unsigned long dregs = 0UL;
1076         void __iomem *bregs = 0UL;
1077 #endif
1078         unsigned long flags;
1079         u8 tmp;
1080
1081         /*
1082          * Not having a register set can lead to trouble.
1083          * Also starfire doesn't have a tod clock.
1084          */
1085         if (!mregs && !dregs && !bregs)
1086                 return -1;
1087
1088         if (mregs) {
1089                 spin_lock_irqsave(&mostek_lock, flags);
1090
1091                 /* Read the current RTC minutes. */
1092                 tmp = mostek_read(mregs + MOSTEK_CREG);
1093                 tmp |= MSTK_CREG_READ;
1094                 mostek_write(mregs + MOSTEK_CREG, tmp);
1095
1096                 chip_minutes = MSTK_REG_MIN(mregs);
1097
1098                 tmp = mostek_read(mregs + MOSTEK_CREG);
1099                 tmp &= ~MSTK_CREG_READ;
1100                 mostek_write(mregs + MOSTEK_CREG, tmp);
1101
1102                 /*
1103                  * since we're only adjusting minutes and seconds,
1104                  * don't interfere with hour overflow. This avoids
1105                  * messing with unknown time zones but requires your
1106                  * RTC not to be off by more than 15 minutes
1107                  */
1108                 real_seconds = nowtime % 60;
1109                 real_minutes = nowtime / 60;
1110                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1111                         real_minutes += 30;     /* correct for half hour time zone */
1112                 real_minutes %= 60;
1113
1114                 if (abs(real_minutes - chip_minutes) < 30) {
1115                         tmp = mostek_read(mregs + MOSTEK_CREG);
1116                         tmp |= MSTK_CREG_WRITE;
1117                         mostek_write(mregs + MOSTEK_CREG, tmp);
1118
1119                         MSTK_SET_REG_SEC(mregs,real_seconds);
1120                         MSTK_SET_REG_MIN(mregs,real_minutes);
1121
1122                         tmp = mostek_read(mregs + MOSTEK_CREG);
1123                         tmp &= ~MSTK_CREG_WRITE;
1124                         mostek_write(mregs + MOSTEK_CREG, tmp);
1125
1126                         spin_unlock_irqrestore(&mostek_lock, flags);
1127
1128                         return 0;
1129                 } else {
1130                         spin_unlock_irqrestore(&mostek_lock, flags);
1131
1132                         return -1;
1133                 }
1134         } else if (bregs) {
1135                 int retval = 0;
1136                 unsigned char val = readb(bregs + 0x0e);
1137
1138                 /* BQ4802 RTC chip. */
1139
1140                 writeb(val | 0x08, bregs + 0x0e);
1141
1142                 chip_minutes = readb(bregs + 0x02);
1143                 BCD_TO_BIN(chip_minutes);
1144                 real_seconds = nowtime % 60;
1145                 real_minutes = nowtime / 60;
1146                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1147                         real_minutes += 30;
1148                 real_minutes %= 60;
1149
1150                 if (abs(real_minutes - chip_minutes) < 30) {
1151                         BIN_TO_BCD(real_seconds);
1152                         BIN_TO_BCD(real_minutes);
1153                         writeb(real_seconds, bregs + 0x00);
1154                         writeb(real_minutes, bregs + 0x02);
1155                 } else {
1156                         printk(KERN_WARNING
1157                                "set_rtc_mmss: can't update from %d to %d\n",
1158                                chip_minutes, real_minutes);
1159                         retval = -1;
1160                 }
1161
1162                 writeb(val, bregs + 0x0e);
1163
1164                 return retval;
1165         } else {
1166                 int retval = 0;
1167                 unsigned char save_control, save_freq_select;
1168
1169                 /* Stolen from arch/i386/kernel/time.c, see there for
1170                  * credits and descriptive comments.
1171                  */
1172                 spin_lock_irqsave(&rtc_lock, flags);
1173                 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1174                 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1175
1176                 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1177                 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1178
1179                 chip_minutes = CMOS_READ(RTC_MINUTES);
1180                 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1181                         BCD_TO_BIN(chip_minutes);
1182                 real_seconds = nowtime % 60;
1183                 real_minutes = nowtime / 60;
1184                 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1185                         real_minutes += 30;
1186                 real_minutes %= 60;
1187
1188                 if (abs(real_minutes - chip_minutes) < 30) {
1189                         if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1190                                 BIN_TO_BCD(real_seconds);
1191                                 BIN_TO_BCD(real_minutes);
1192                         }
1193                         CMOS_WRITE(real_seconds,RTC_SECONDS);
1194                         CMOS_WRITE(real_minutes,RTC_MINUTES);
1195                 } else {
1196                         printk(KERN_WARNING
1197                                "set_rtc_mmss: can't update from %d to %d\n",
1198                                chip_minutes, real_minutes);
1199                         retval = -1;
1200                 }
1201
1202                 CMOS_WRITE(save_control, RTC_CONTROL);
1203                 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1204                 spin_unlock_irqrestore(&rtc_lock, flags);
1205
1206                 return retval;
1207         }
1208 }
1209
1210 #define RTC_IS_OPEN             0x01    /* means /dev/rtc is in use     */
1211 static unsigned char mini_rtc_status;   /* bitmapped status byte.       */
1212
1213 #define FEBRUARY        2
1214 #define STARTOFTIME     1970
1215 #define SECDAY          86400L
1216 #define SECYR           (SECDAY * 365)
1217 #define leapyear(year)          ((year) % 4 == 0 && \
1218                                  ((year) % 100 != 0 || (year) % 400 == 0))
1219 #define days_in_year(a)         (leapyear(a) ? 366 : 365)
1220 #define days_in_month(a)        (month_days[(a) - 1])
1221
1222 static int month_days[12] = {
1223         31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1224 };
1225
1226 /*
1227  * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1228  */
1229 static void GregorianDay(struct rtc_time * tm)
1230 {
1231         int leapsToDate;
1232         int lastYear;
1233         int day;
1234         int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1235
1236         lastYear = tm->tm_year - 1;
1237
1238         /*
1239          * Number of leap corrections to apply up to end of last year
1240          */
1241         leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1242
1243         /*
1244          * This year is a leap year if it is divisible by 4 except when it is
1245          * divisible by 100 unless it is divisible by 400
1246          *
1247          * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1248          */
1249         day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1250
1251         day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1252                    tm->tm_mday;
1253
1254         tm->tm_wday = day % 7;
1255 }
1256
1257 static void to_tm(int tim, struct rtc_time *tm)
1258 {
1259         register int    i;
1260         register long   hms, day;
1261
1262         day = tim / SECDAY;
1263         hms = tim % SECDAY;
1264
1265         /* Hours, minutes, seconds are easy */
1266         tm->tm_hour = hms / 3600;
1267         tm->tm_min = (hms % 3600) / 60;
1268         tm->tm_sec = (hms % 3600) % 60;
1269
1270         /* Number of years in days */
1271         for (i = STARTOFTIME; day >= days_in_year(i); i++)
1272                 day -= days_in_year(i);
1273         tm->tm_year = i;
1274
1275         /* Number of months in days left */
1276         if (leapyear(tm->tm_year))
1277                 days_in_month(FEBRUARY) = 29;
1278         for (i = 1; day >= days_in_month(i); i++)
1279                 day -= days_in_month(i);
1280         days_in_month(FEBRUARY) = 28;
1281         tm->tm_mon = i;
1282
1283         /* Days are what is left over (+1) from all that. */
1284         tm->tm_mday = day + 1;
1285
1286         /*
1287          * Determine the day of week
1288          */
1289         GregorianDay(tm);
1290 }
1291
1292 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1293  * aka Unix time.  So we have to convert to/from rtc_time.
1294  */
1295 static void starfire_get_rtc_time(struct rtc_time *time)
1296 {
1297         u32 seconds = starfire_get_time();
1298
1299         to_tm(seconds, time);
1300         time->tm_year -= 1900;
1301         time->tm_mon -= 1;
1302 }
1303
1304 static int starfire_set_rtc_time(struct rtc_time *time)
1305 {
1306         u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1307                              time->tm_mday, time->tm_hour,
1308                              time->tm_min, time->tm_sec);
1309
1310         return starfire_set_time(seconds);
1311 }
1312
1313 static void hypervisor_get_rtc_time(struct rtc_time *time)
1314 {
1315         u32 seconds = hypervisor_get_time();
1316
1317         to_tm(seconds, time);
1318         time->tm_year -= 1900;
1319         time->tm_mon -= 1;
1320 }
1321
1322 static int hypervisor_set_rtc_time(struct rtc_time *time)
1323 {
1324         u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1325                              time->tm_mday, time->tm_hour,
1326                              time->tm_min, time->tm_sec);
1327
1328         return hypervisor_set_time(seconds);
1329 }
1330
1331 #ifdef CONFIG_PCI
1332 static void bq4802_get_rtc_time(struct rtc_time *time)
1333 {
1334         unsigned char val = readb(bq4802_regs + 0x0e);
1335         unsigned int century;
1336
1337         writeb(val | 0x08, bq4802_regs + 0x0e);
1338
1339         time->tm_sec = readb(bq4802_regs + 0x00);
1340         time->tm_min = readb(bq4802_regs + 0x02);
1341         time->tm_hour = readb(bq4802_regs + 0x04);
1342         time->tm_mday = readb(bq4802_regs + 0x06);
1343         time->tm_mon = readb(bq4802_regs + 0x09);
1344         time->tm_year = readb(bq4802_regs + 0x0a);
1345         time->tm_wday = readb(bq4802_regs + 0x08);
1346         century = readb(bq4802_regs + 0x0f);
1347
1348         writeb(val, bq4802_regs + 0x0e);
1349
1350         BCD_TO_BIN(time->tm_sec);
1351         BCD_TO_BIN(time->tm_min);
1352         BCD_TO_BIN(time->tm_hour);
1353         BCD_TO_BIN(time->tm_mday);
1354         BCD_TO_BIN(time->tm_mon);
1355         BCD_TO_BIN(time->tm_year);
1356         BCD_TO_BIN(time->tm_wday);
1357         BCD_TO_BIN(century);
1358
1359         time->tm_year += (century * 100);
1360         time->tm_year -= 1900;
1361
1362         time->tm_mon--;
1363 }
1364
1365 static int bq4802_set_rtc_time(struct rtc_time *time)
1366 {
1367         unsigned char val = readb(bq4802_regs + 0x0e);
1368         unsigned char sec, min, hrs, day, mon, yrs, century;
1369         unsigned int year;
1370
1371         year = time->tm_year + 1900;
1372         century = year / 100;
1373         yrs = year % 100;
1374
1375         mon = time->tm_mon + 1;   /* tm_mon starts at zero */
1376         day = time->tm_mday;
1377         hrs = time->tm_hour;
1378         min = time->tm_min;
1379         sec = time->tm_sec;
1380
1381         BIN_TO_BCD(sec);
1382         BIN_TO_BCD(min);
1383         BIN_TO_BCD(hrs);
1384         BIN_TO_BCD(day);
1385         BIN_TO_BCD(mon);
1386         BIN_TO_BCD(yrs);
1387         BIN_TO_BCD(century);
1388
1389         writeb(val | 0x08, bq4802_regs + 0x0e);
1390
1391         writeb(sec, bq4802_regs + 0x00);
1392         writeb(min, bq4802_regs + 0x02);
1393         writeb(hrs, bq4802_regs + 0x04);
1394         writeb(day, bq4802_regs + 0x06);
1395         writeb(mon, bq4802_regs + 0x09);
1396         writeb(yrs, bq4802_regs + 0x0a);
1397         writeb(century, bq4802_regs + 0x0f);
1398
1399         writeb(val, bq4802_regs + 0x0e);
1400
1401         return 0;
1402 }
1403
1404 static void cmos_get_rtc_time(struct rtc_time *rtc_tm)
1405 {
1406         unsigned char ctrl;
1407
1408         rtc_tm->tm_sec = CMOS_READ(RTC_SECONDS);
1409         rtc_tm->tm_min = CMOS_READ(RTC_MINUTES);
1410         rtc_tm->tm_hour = CMOS_READ(RTC_HOURS);
1411         rtc_tm->tm_mday = CMOS_READ(RTC_DAY_OF_MONTH);
1412         rtc_tm->tm_mon = CMOS_READ(RTC_MONTH);
1413         rtc_tm->tm_year = CMOS_READ(RTC_YEAR);
1414         rtc_tm->tm_wday = CMOS_READ(RTC_DAY_OF_WEEK);
1415
1416         ctrl = CMOS_READ(RTC_CONTROL);
1417         if (!(ctrl & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1418                 BCD_TO_BIN(rtc_tm->tm_sec);
1419                 BCD_TO_BIN(rtc_tm->tm_min);
1420                 BCD_TO_BIN(rtc_tm->tm_hour);
1421                 BCD_TO_BIN(rtc_tm->tm_mday);
1422                 BCD_TO_BIN(rtc_tm->tm_mon);
1423                 BCD_TO_BIN(rtc_tm->tm_year);
1424                 BCD_TO_BIN(rtc_tm->tm_wday);
1425         }
1426
1427         if (rtc_tm->tm_year <= 69)
1428                 rtc_tm->tm_year += 100;
1429
1430         rtc_tm->tm_mon--;
1431 }
1432
1433 static int cmos_set_rtc_time(struct rtc_time *rtc_tm)
1434 {
1435         unsigned char mon, day, hrs, min, sec;
1436         unsigned char save_control, save_freq_select;
1437         unsigned int yrs;
1438
1439         yrs = rtc_tm->tm_year;
1440         mon = rtc_tm->tm_mon + 1;
1441         day = rtc_tm->tm_mday;
1442         hrs = rtc_tm->tm_hour;
1443         min = rtc_tm->tm_min;
1444         sec = rtc_tm->tm_sec;
1445
1446         if (yrs >= 100)
1447                 yrs -= 100;
1448
1449         if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1450                 BIN_TO_BCD(sec);
1451                 BIN_TO_BCD(min);
1452                 BIN_TO_BCD(hrs);
1453                 BIN_TO_BCD(day);
1454                 BIN_TO_BCD(mon);
1455                 BIN_TO_BCD(yrs);
1456         }
1457
1458         save_control = CMOS_READ(RTC_CONTROL);
1459         CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1460         save_freq_select = CMOS_READ(RTC_FREQ_SELECT);
1461         CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1462
1463         CMOS_WRITE(yrs, RTC_YEAR);
1464         CMOS_WRITE(mon, RTC_MONTH);
1465         CMOS_WRITE(day, RTC_DAY_OF_MONTH);
1466         CMOS_WRITE(hrs, RTC_HOURS);
1467         CMOS_WRITE(min, RTC_MINUTES);
1468         CMOS_WRITE(sec, RTC_SECONDS);
1469
1470         CMOS_WRITE(save_control, RTC_CONTROL);
1471         CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1472
1473         return 0;
1474 }
1475 #endif /* CONFIG_PCI */
1476
1477 static void mostek_get_rtc_time(struct rtc_time *rtc_tm)
1478 {
1479         void __iomem *regs = mstk48t02_regs;
1480         u8 tmp;
1481
1482         spin_lock_irq(&mostek_lock);
1483
1484         tmp = mostek_read(regs + MOSTEK_CREG);
1485         tmp |= MSTK_CREG_READ;
1486         mostek_write(regs + MOSTEK_CREG, tmp);
1487
1488         rtc_tm->tm_sec = MSTK_REG_SEC(regs);
1489         rtc_tm->tm_min = MSTK_REG_MIN(regs);
1490         rtc_tm->tm_hour = MSTK_REG_HOUR(regs);
1491         rtc_tm->tm_mday = MSTK_REG_DOM(regs);
1492         rtc_tm->tm_mon = MSTK_REG_MONTH(regs);
1493         rtc_tm->tm_year = MSTK_CVT_YEAR( MSTK_REG_YEAR(regs) );
1494         rtc_tm->tm_wday = MSTK_REG_DOW(regs);
1495
1496         tmp = mostek_read(regs + MOSTEK_CREG);
1497         tmp &= ~MSTK_CREG_READ;
1498         mostek_write(regs + MOSTEK_CREG, tmp);
1499
1500         spin_unlock_irq(&mostek_lock);
1501
1502         rtc_tm->tm_mon--;
1503         rtc_tm->tm_wday--;
1504         rtc_tm->tm_year -= 1900;
1505 }
1506
1507 static int mostek_set_rtc_time(struct rtc_time *rtc_tm)
1508 {
1509         unsigned char mon, day, hrs, min, sec, wday;
1510         void __iomem *regs = mstk48t02_regs;
1511         unsigned int yrs;
1512         u8 tmp;
1513
1514         yrs = rtc_tm->tm_year + 1900;
1515         mon = rtc_tm->tm_mon + 1;
1516         day = rtc_tm->tm_mday;
1517         wday = rtc_tm->tm_wday + 1;
1518         hrs = rtc_tm->tm_hour;
1519         min = rtc_tm->tm_min;
1520         sec = rtc_tm->tm_sec;
1521
1522         spin_lock_irq(&mostek_lock);
1523
1524         tmp = mostek_read(regs + MOSTEK_CREG);
1525         tmp |= MSTK_CREG_WRITE;
1526         mostek_write(regs + MOSTEK_CREG, tmp);
1527
1528         MSTK_SET_REG_SEC(regs, sec);
1529         MSTK_SET_REG_MIN(regs, min);
1530         MSTK_SET_REG_HOUR(regs, hrs);
1531         MSTK_SET_REG_DOW(regs, wday);
1532         MSTK_SET_REG_DOM(regs, day);
1533         MSTK_SET_REG_MONTH(regs, mon);
1534         MSTK_SET_REG_YEAR(regs, yrs - MSTK_YEAR_ZERO);
1535
1536         tmp = mostek_read(regs + MOSTEK_CREG);
1537         tmp &= ~MSTK_CREG_WRITE;
1538         mostek_write(regs + MOSTEK_CREG, tmp);
1539
1540         spin_unlock_irq(&mostek_lock);
1541
1542         return 0;
1543 }
1544
1545 struct mini_rtc_ops {
1546         void (*get_rtc_time)(struct rtc_time *);
1547         int (*set_rtc_time)(struct rtc_time *);
1548 };
1549
1550 static struct mini_rtc_ops starfire_rtc_ops = {
1551         .get_rtc_time = starfire_get_rtc_time,
1552         .set_rtc_time = starfire_set_rtc_time,
1553 };
1554
1555 static struct mini_rtc_ops hypervisor_rtc_ops = {
1556         .get_rtc_time = hypervisor_get_rtc_time,
1557         .set_rtc_time = hypervisor_set_rtc_time,
1558 };
1559
1560 #ifdef CONFIG_PCI
1561 static struct mini_rtc_ops bq4802_rtc_ops = {
1562         .get_rtc_time = bq4802_get_rtc_time,
1563         .set_rtc_time = bq4802_set_rtc_time,
1564 };
1565
1566 static struct mini_rtc_ops cmos_rtc_ops = {
1567         .get_rtc_time = cmos_get_rtc_time,
1568         .set_rtc_time = cmos_set_rtc_time,
1569 };
1570 #endif /* CONFIG_PCI */
1571
1572 static struct mini_rtc_ops mostek_rtc_ops = {
1573         .get_rtc_time = mostek_get_rtc_time,
1574         .set_rtc_time = mostek_set_rtc_time,
1575 };
1576
1577 static struct mini_rtc_ops *mini_rtc_ops;
1578
1579 static inline void mini_get_rtc_time(struct rtc_time *time)
1580 {
1581         unsigned long flags;
1582
1583         spin_lock_irqsave(&rtc_lock, flags);
1584         mini_rtc_ops->get_rtc_time(time);
1585         spin_unlock_irqrestore(&rtc_lock, flags);
1586 }
1587
1588 static inline int mini_set_rtc_time(struct rtc_time *time)
1589 {
1590         unsigned long flags;
1591         int err;
1592
1593         spin_lock_irqsave(&rtc_lock, flags);
1594         err = mini_rtc_ops->set_rtc_time(time);
1595         spin_unlock_irqrestore(&rtc_lock, flags);
1596
1597         return err;
1598 }
1599
1600 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1601                           unsigned int cmd, unsigned long arg)
1602 {
1603         struct rtc_time wtime;
1604         void __user *argp = (void __user *)arg;
1605
1606         switch (cmd) {
1607
1608         case RTC_PLL_GET:
1609                 return -EINVAL;
1610
1611         case RTC_PLL_SET:
1612                 return -EINVAL;
1613
1614         case RTC_UIE_OFF:       /* disable ints from RTC updates.       */
1615                 return 0;
1616
1617         case RTC_UIE_ON:        /* enable ints for RTC updates. */
1618                 return -EINVAL;
1619
1620         case RTC_RD_TIME:       /* Read the time/date from RTC  */
1621                 /* this doesn't get week-day, who cares */
1622                 memset(&wtime, 0, sizeof(wtime));
1623                 mini_get_rtc_time(&wtime);
1624
1625                 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1626
1627         case RTC_SET_TIME:      /* Set the RTC */
1628             {
1629                 int year, days;
1630
1631                 if (!capable(CAP_SYS_TIME))
1632                         return -EACCES;
1633
1634                 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1635                         return -EFAULT;
1636
1637                 year = wtime.tm_year + 1900;
1638                 days = month_days[wtime.tm_mon] +
1639                        ((wtime.tm_mon == 1) && leapyear(year));
1640
1641                 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) ||
1642                     (wtime.tm_mday < 1))
1643                         return -EINVAL;
1644
1645                 if (wtime.tm_mday < 0 || wtime.tm_mday > days)
1646                         return -EINVAL;
1647
1648                 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1649                     wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1650                     wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1651                         return -EINVAL;
1652
1653                 return mini_set_rtc_time(&wtime);
1654             }
1655         }
1656
1657         return -EINVAL;
1658 }
1659
1660 static int mini_rtc_open(struct inode *inode, struct file *file)
1661 {
1662         if (mini_rtc_status & RTC_IS_OPEN)
1663                 return -EBUSY;
1664
1665         mini_rtc_status |= RTC_IS_OPEN;
1666
1667         return 0;
1668 }
1669
1670 static int mini_rtc_release(struct inode *inode, struct file *file)
1671 {
1672         mini_rtc_status &= ~RTC_IS_OPEN;
1673         return 0;
1674 }
1675
1676
1677 static const struct file_operations mini_rtc_fops = {
1678         .owner          = THIS_MODULE,
1679         .ioctl          = mini_rtc_ioctl,
1680         .open           = mini_rtc_open,
1681         .release        = mini_rtc_release,
1682 };
1683
1684 static struct miscdevice rtc_mini_dev =
1685 {
1686         .minor          = RTC_MINOR,
1687         .name           = "rtc",
1688         .fops           = &mini_rtc_fops,
1689 };
1690
1691 static int __init rtc_mini_init(void)
1692 {
1693         int retval;
1694
1695         if (tlb_type == hypervisor)
1696                 mini_rtc_ops = &hypervisor_rtc_ops;
1697         else if (this_is_starfire)
1698                 mini_rtc_ops = &starfire_rtc_ops;
1699 #ifdef CONFIG_PCI
1700         else if (bq4802_regs)
1701                 mini_rtc_ops = &bq4802_rtc_ops;
1702         else if (ds1287_regs)
1703                 mini_rtc_ops = &cmos_rtc_ops;
1704 #endif /* CONFIG_PCI */
1705         else if (mstk48t02_regs)
1706                 mini_rtc_ops = &mostek_rtc_ops;
1707         else
1708                 return -ENODEV;
1709
1710         printk(KERN_INFO "Mini RTC Driver\n");
1711
1712         retval = misc_register(&rtc_mini_dev);
1713         if (retval < 0)
1714                 return retval;
1715
1716         return 0;
1717 }
1718
1719 static void __exit rtc_mini_exit(void)
1720 {
1721         misc_deregister(&rtc_mini_dev);
1722 }
1723
1724 int __devinit read_current_timer(unsigned long *timer_val)
1725 {
1726         *timer_val = tick_ops->get_tick();
1727         return 0;
1728 }
1729
1730 module_init(rtc_mini_init);
1731 module_exit(rtc_mini_exit);