git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/iwlwifi/iwl-3945.c

   1 /******************************************************************************
   2  *
   3  * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of version 2 of the GNU General Public License as
   7  * published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  *
  14  * You should have received a copy of the GNU General Public License along with
  15  * this program; if not, write to the Free Software Foundation, Inc.,
  16  * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17  *
  18  * The full GNU General Public License is included in this distribution in the
  19  * file called LICENSE.
  20  *
  21  * Contact Information:
  22  * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24  *
  25  *****************************************************************************/
  26
  27 #include <linux/kernel.h>
  28 #include <linux/module.h>
  29 #include <linux/version.h>
  30 #include <linux/init.h>
  31 #include <linux/pci.h>
  32 #include <linux/dma-mapping.h>
  33 #include <linux/delay.h>
  34 #include <linux/skbuff.h>
  35 #include <linux/netdevice.h>
  36 #include <linux/wireless.h>
  37 #include <linux/firmware.h>
  38 #include <net/mac80211.h>
  39
  40 #include <linux/etherdevice.h>
  41
  42 #include "iwl-3945.h"
  43 #include "iwl-helpers.h"
  44 #include "iwl-3945-rs.h"
  45
  46 #define IWL_DECLARE_RATE_INFO(r, ip, in, rp, rn, pp, np)    \
  47         [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP,   \
  48                                     IWL_RATE_##r##M_IEEE,   \
  49                                     IWL_RATE_##ip##M_INDEX, \
  50                                     IWL_RATE_##in##M_INDEX, \
  51                                     IWL_RATE_##rp##M_INDEX, \
  52                                     IWL_RATE_##rn##M_INDEX, \
  53                                     IWL_RATE_##pp##M_INDEX, \
  54                                     IWL_RATE_##np##M_INDEX, \
  55                                     IWL_RATE_##r##M_INDEX_TABLE, \
  56                                     IWL_RATE_##ip##M_INDEX_TABLE }
  57
  58 /*
  59  * Parameter order:
  60  *   rate, prev rate, next rate, prev tgg rate, next tgg rate
  61  *
  62  * If there isn't a valid next or previous rate then INV is used which
  63  * maps to IWL_RATE_INVALID
  64  *
  65  */
  66 const struct iwl3945_rate_info iwl3945_rates[IWL_RATE_COUNT] = {
  67         IWL_DECLARE_RATE_INFO(1, INV, 2, INV, 2, INV, 2),    /*  1mbps */
  68         IWL_DECLARE_RATE_INFO(2, 1, 5, 1, 5, 1, 5),          /*  2mbps */
  69         IWL_DECLARE_RATE_INFO(5, 2, 6, 2, 11, 2, 11),        /*5.5mbps */
  70         IWL_DECLARE_RATE_INFO(11, 9, 12, 5, 12, 5, 18),      /* 11mbps */
  71         IWL_DECLARE_RATE_INFO(6, 5, 9, 5, 11, 5, 11),        /*  6mbps */
  72         IWL_DECLARE_RATE_INFO(9, 6, 11, 5, 11, 5, 11),       /*  9mbps */
  73         IWL_DECLARE_RATE_INFO(12, 11, 18, 11, 18, 11, 18),   /* 12mbps */
  74         IWL_DECLARE_RATE_INFO(18, 12, 24, 12, 24, 11, 24),   /* 18mbps */
  75         IWL_DECLARE_RATE_INFO(24, 18, 36, 18, 36, 18, 36),   /* 24mbps */
  76         IWL_DECLARE_RATE_INFO(36, 24, 48, 24, 48, 24, 48),   /* 36mbps */
  77         IWL_DECLARE_RATE_INFO(48, 36, 54, 36, 54, 36, 54),   /* 48mbps */
  78         IWL_DECLARE_RATE_INFO(54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  79 };
  80
  81 /* 1 = enable the iwl3945_disable_events() function */
  82 #define IWL_EVT_DISABLE (0)
  83 #define IWL_EVT_DISABLE_SIZE (1532/32)
  84
  85 /**
  86  * iwl3945_disable_events - Disable selected events in uCode event log
  87  *
  88  * Disable an event by writing "1"s into "disable"
  89  *   bitmap in SRAM.  Bit position corresponds to Event # (id/type).
  90  *   Default values of 0 enable uCode events to be logged.
  91  * Use for only special debugging.  This function is just a placeholder as-is,
  92  *   you'll need to provide the special bits! ...
  93  *   ... and set IWL_EVT_DISABLE to 1. */
  94 void iwl3945_disable_events(struct iwl3945_priv *priv)
  95 {
  96         int ret;
  97         int i;
  98         u32 base;               /* SRAM address of event log header */
  99         u32 disable_ptr;        /* SRAM address of event-disable bitmap array */
 100         u32 array_size;         /* # of u32 entries in array */
 101         u32 evt_disable[IWL_EVT_DISABLE_SIZE] = {
 102                 0x00000000,     /*   31 -    0  Event id numbers */
 103                 0x00000000,     /*   63 -   32 */
 104                 0x00000000,     /*   95 -   64 */
 105                 0x00000000,     /*  127 -   96 */
 106                 0x00000000,     /*  159 -  128 */
 107                 0x00000000,     /*  191 -  160 */
 108                 0x00000000,     /*  223 -  192 */
 109                 0x00000000,     /*  255 -  224 */
 110                 0x00000000,     /*  287 -  256 */
 111                 0x00000000,     /*  319 -  288 */
 112                 0x00000000,     /*  351 -  320 */
 113                 0x00000000,     /*  383 -  352 */
 114                 0x00000000,     /*  415 -  384 */
 115                 0x00000000,     /*  447 -  416 */
 116                 0x00000000,     /*  479 -  448 */
 117                 0x00000000,     /*  511 -  480 */
 118                 0x00000000,     /*  543 -  512 */
 119                 0x00000000,     /*  575 -  544 */
 120                 0x00000000,     /*  607 -  576 */
 121                 0x00000000,     /*  639 -  608 */
 122                 0x00000000,     /*  671 -  640 */
 123                 0x00000000,     /*  703 -  672 */
 124                 0x00000000,     /*  735 -  704 */
 125                 0x00000000,     /*  767 -  736 */
 126                 0x00000000,     /*  799 -  768 */
 127                 0x00000000,     /*  831 -  800 */
 128                 0x00000000,     /*  863 -  832 */
 129                 0x00000000,     /*  895 -  864 */
 130                 0x00000000,     /*  927 -  896 */
 131                 0x00000000,     /*  959 -  928 */
 132                 0x00000000,     /*  991 -  960 */
 133                 0x00000000,     /* 1023 -  992 */
 134                 0x00000000,     /* 1055 - 1024 */
 135                 0x00000000,     /* 1087 - 1056 */
 136                 0x00000000,     /* 1119 - 1088 */
 137                 0x00000000,     /* 1151 - 1120 */
 138                 0x00000000,     /* 1183 - 1152 */
 139                 0x00000000,     /* 1215 - 1184 */
 140                 0x00000000,     /* 1247 - 1216 */
 141                 0x00000000,     /* 1279 - 1248 */
 142                 0x00000000,     /* 1311 - 1280 */
 143                 0x00000000,     /* 1343 - 1312 */
 144                 0x00000000,     /* 1375 - 1344 */
 145                 0x00000000,     /* 1407 - 1376 */
 146                 0x00000000,     /* 1439 - 1408 */
 147                 0x00000000,     /* 1471 - 1440 */
 148                 0x00000000,     /* 1503 - 1472 */
 149         };
 150
 151         base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
 152         if (!iwl3945_hw_valid_rtc_data_addr(base)) {
 153                 IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
 154                 return;
 155         }
 156
 157         ret = iwl3945_grab_nic_access(priv);
 158         if (ret) {
 159                 IWL_WARNING("Can not read from adapter at this time.\n");
 160                 return;
 161         }
 162
 163         disable_ptr = iwl3945_read_targ_mem(priv, base + (4 * sizeof(u32)));
 164         array_size = iwl3945_read_targ_mem(priv, base + (5 * sizeof(u32)));
 165         iwl3945_release_nic_access(priv);
 166
 167         if (IWL_EVT_DISABLE && (array_size == IWL_EVT_DISABLE_SIZE)) {
 168                 IWL_DEBUG_INFO("Disabling selected uCode log events at 0x%x\n",
 169                                disable_ptr);
 170                 ret = iwl3945_grab_nic_access(priv);
 171                 for (i = 0; i < IWL_EVT_DISABLE_SIZE; i++)
 172                         iwl3945_write_targ_mem(priv,
 173                                            disable_ptr + (i * sizeof(u32)),
 174                                            evt_disable[i]);
 175
 176                 iwl3945_release_nic_access(priv);
 177         } else {
 178                 IWL_DEBUG_INFO("Selected uCode log events may be disabled\n");
 179                 IWL_DEBUG_INFO("  by writing \"1\"s into disable bitmap\n");
 180                 IWL_DEBUG_INFO("  in SRAM at 0x%x, size %d u32s\n",
 181                                disable_ptr, array_size);
 182         }
 183
 184 }
 185
 186 /**
 187  * iwl3945_get_antenna_flags - Get antenna flags for RXON command
 188  * @priv: eeprom and antenna fields are used to determine antenna flags
 189  *
 190  * priv->eeprom  is used to determine if antenna AUX/MAIN are reversed
 191  * priv->antenna specifies the antenna diversity mode:
 192  *
 193  * IWL_ANTENNA_DIVERISTY - NIC selects best antenna by itself
 194  * IWL_ANTENNA_MAIN      - Force MAIN antenna
 195  * IWL_ANTENNA_AUX       - Force AUX antenna
 196  */
 197 __le32 iwl3945_get_antenna_flags(const struct iwl3945_priv *priv)
 198 {
 199         switch (priv->antenna) {
 200         case IWL_ANTENNA_DIVERSITY:
 201                 return 0;
 202
 203         case IWL_ANTENNA_MAIN:
 204                 if (priv->eeprom.antenna_switch_type)
 205                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 206                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 207
 208         case IWL_ANTENNA_AUX:
 209                 if (priv->eeprom.antenna_switch_type)
 210                         return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
 211                 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
 212         }
 213
 214         /* bad antenna selector value */
 215         IWL_ERROR("Bad antenna selector value (0x%x)\n", priv->antenna);
 216         return 0;               /* "diversity" is default if error */
 217 }
 218
 219 /*****************************************************************************
 220  *
 221  * Intel PRO/Wireless 3945ABG/BG Network Connection
 222  *
 223  *  RX handler implementations
 224  *
 225  *  Used by iwl-base.c
 226  *
 227  *****************************************************************************/
 228
 229 void iwl3945_hw_rx_statistics(struct iwl3945_priv *priv, struct iwl3945_rx_mem_buffer *rxb)
 230 {
 231         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 232         IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
 233                      (int)sizeof(struct iwl3945_notif_statistics),
 234                      le32_to_cpu(pkt->len));
 235
 236         memcpy(&priv->statistics, pkt->u.raw, sizeof(priv->statistics));
 237
 238         priv->last_statistics_time = jiffies;
 239 }
 240
 241 static void iwl3945_handle_data_packet(struct iwl3945_priv *priv, int is_data,
 242                                    struct iwl3945_rx_mem_buffer *rxb,
 243                                    struct ieee80211_rx_status *stats,
 244                                    u16 phy_flags)
 245 {
 246         struct ieee80211_hdr *hdr;
 247         struct iwl3945_rx_packet *pkt = (struct iwl3945_rx_packet *)rxb->skb->data;
 248         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 249         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 250         short len = le16_to_cpu(rx_hdr->len);
 251
 252         /* We received data from the HW, so stop the watchdog */
 253         if (unlikely((len + IWL_RX_FRAME_SIZE) > skb_tailroom(rxb->skb))) {
 254                 IWL_DEBUG_DROP("Corruption detected!\n");
 255                 return;
 256         }
 257
 258         /* We only process data packets if the interface is open */
 259         if (unlikely(!priv->is_open)) {
 260                 IWL_DEBUG_DROP_LIMIT
 261                     ("Dropping packet while interface is not open.\n");
 262                 return;
 263         }
 264         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 265                 if (iwl3945_param_hwcrypto)
 266                         iwl3945_set_decrypted_flag(priv, rxb->skb,
 267                                                le32_to_cpu(rx_end->status),
 268                                                stats);
 269                 iwl3945_handle_data_packet_monitor(priv, rxb, IWL_RX_DATA(pkt),
 270                                                len, stats, phy_flags);
 271                 return;
 272         }
 273
 274         skb_reserve(rxb->skb, (void *)rx_hdr->payload - (void *)pkt);
 275         /* Set the size of the skb to the size of the frame */
 276         skb_put(rxb->skb, le16_to_cpu(rx_hdr->len));
 277
 278         hdr = (void *)rxb->skb->data;
 279
 280         if (iwl3945_param_hwcrypto)
 281                 iwl3945_set_decrypted_flag(priv, rxb->skb,
 282                                        le32_to_cpu(rx_end->status), stats);
 283
 284         ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
 285         rxb->skb = NULL;
 286 }
 287
 288 #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
 289
 290 static void iwl3945_rx_reply_rx(struct iwl3945_priv *priv,
 291                                 struct iwl3945_rx_mem_buffer *rxb)
 292 {
 293         struct iwl3945_rx_packet *pkt = (void *)rxb->skb->data;
 294         struct iwl3945_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
 295         struct iwl3945_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
 296         struct iwl3945_rx_frame_end *rx_end = IWL_RX_END(pkt);
 297         struct ieee80211_hdr *header;
 298         u16 phy_flags = le16_to_cpu(rx_hdr->phy_flags);
 299         u16 rx_stats_sig_avg = le16_to_cpu(rx_stats->sig_avg);
 300         u16 rx_stats_noise_diff = le16_to_cpu(rx_stats->noise_diff);
 301         struct ieee80211_rx_status stats = {
 302                 .mactime = le64_to_cpu(rx_end->timestamp),
 303                 .freq = ieee80211chan2mhz(le16_to_cpu(rx_hdr->channel)),
 304                 .channel = le16_to_cpu(rx_hdr->channel),
 305                 .phymode = (rx_hdr->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
 306                 MODE_IEEE80211G : MODE_IEEE80211A,
 307                 .antenna = 0,
 308                 .rate = rx_hdr->rate,
 309                 .flag = 0,
 310         };
 311         u8 network_packet;
 312         int snr;
 313
 314         if ((unlikely(rx_stats->phy_count > 20))) {
 315                 IWL_DEBUG_DROP
 316                     ("dsp size out of range [0,20]: "
 317                      "%d/n", rx_stats->phy_count);
 318                 return;
 319         }
 320
 321         if (!(rx_end->status & RX_RES_STATUS_NO_CRC32_ERROR)
 322             || !(rx_end->status & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
 323                 IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n", rx_end->status);
 324                 return;
 325         }
 326
 327         if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
 328                 iwl3945_handle_data_packet(priv, 1, rxb, &stats, phy_flags);
 329                 return;
 330         }
 331
 332         /* Convert 3945's rssi indicator to dBm */
 333         stats.ssi = rx_stats->rssi - IWL_RSSI_OFFSET;
 334
 335         /* Set default noise value to -127 */
 336         if (priv->last_rx_noise == 0)
 337                 priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
 338
 339         /* 3945 provides noise info for OFDM frames only.
 340          * sig_avg and noise_diff are measured by the 3945's digital signal
 341          *   processor (DSP), and indicate linear levels of signal level and
 342          *   distortion/noise within the packet preamble after
 343          *   automatic gain control (AGC).  sig_avg should stay fairly
 344          *   constant if the radio's AGC is working well.
 345          * Since these values are linear (not dB or dBm), linear
 346          *   signal-to-noise ratio (SNR) is (sig_avg / noise_diff).
 347          * Convert linear SNR to dB SNR, then subtract that from rssi dBm
 348          *   to obtain noise level in dBm.
 349          * Calculate stats.signal (quality indicator in %) based on SNR. */
 350         if (rx_stats_noise_diff) {
 351                 snr = rx_stats_sig_avg / rx_stats_noise_diff;
 352                 stats.noise = stats.ssi - iwl3945_calc_db_from_ratio(snr);
 353                 stats.signal = iwl3945_calc_sig_qual(stats.ssi, stats.noise);
 354
 355         /* If noise info not available, calculate signal quality indicator (%)
 356          *   using just the dBm signal level. */
 357         } else {
 358                 stats.noise = priv->last_rx_noise;
 359                 stats.signal = iwl3945_calc_sig_qual(stats.ssi, 0);
 360         }
 361
 362
 363         IWL_DEBUG_STATS("Rssi %d noise %d qual %d sig_avg %d noise_diff %d\n",
 364                         stats.ssi, stats.noise, stats.signal,
 365                         rx_stats_sig_avg, rx_stats_noise_diff);
 366
 367         stats.freq = ieee80211chan2mhz(stats.channel);
 368
 369         /* can be covered by iwl3945_report_frame() in most cases */
 370 /*      IWL_DEBUG_RX("RX status: 0x%08X\n", rx_end->status); */
 371
 372         header = (struct ieee80211_hdr *)IWL_RX_DATA(pkt);
 373
 374         network_packet = iwl3945_is_network_packet(priv, header);
 375
 376 #ifdef CONFIG_IWL3945_DEBUG
 377         if (iwl3945_debug_level & IWL_DL_STATS && net_ratelimit())
 378                 IWL_DEBUG_STATS
 379                     ("[%c] %d RSSI: %d Signal: %u, Noise: %u, Rate: %u\n",
 380                      network_packet ? '*' : ' ',
 381                      stats.channel, stats.ssi, stats.ssi,
 382                      stats.ssi, stats.rate);
 383
 384         if (iwl3945_debug_level & (IWL_DL_RX))
 385                 /* Set "1" to report good data frames in groups of 100 */
 386                 iwl3945_report_frame(priv, pkt, header, 1);
 387 #endif
 388
 389         if (network_packet) {
 390                 priv->last_beacon_time = le32_to_cpu(rx_end->beacon_timestamp);
 391                 priv->last_tsf = le64_to_cpu(rx_end->timestamp);
 392                 priv->last_rx_rssi = stats.ssi;
 393                 priv->last_rx_noise = stats.noise;
 394         }
 395
 396         switch (le16_to_cpu(header->frame_control) & IEEE80211_FCTL_FTYPE) {
 397         case IEEE80211_FTYPE_MGMT:
 398                 switch (le16_to_cpu(header->frame_control) &
 399                         IEEE80211_FCTL_STYPE) {
 400                 case IEEE80211_STYPE_PROBE_RESP:
 401                 case IEEE80211_STYPE_BEACON:{
 402                                 /* If this is a beacon or probe response for
 403                                  * our network then cache the beacon
 404                                  * timestamp */
 405                                 if ((((priv->iw_mode == IEEE80211_IF_TYPE_STA)
 406                                       && !compare_ether_addr(header->addr2,
 407                                                              priv->bssid)) ||
 408                                      ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 409                                       && !compare_ether_addr(header->addr3,
 410                                                              priv->bssid)))) {
 411                                         struct ieee80211_mgmt *mgmt =
 412                                             (struct ieee80211_mgmt *)header;
 413                                         __le32 *pos;
 414                                         pos =
 415                                             (__le32 *) & mgmt->u.beacon.
 416                                             timestamp;
 417                                         priv->timestamp0 = le32_to_cpu(pos[0]);
 418                                         priv->timestamp1 = le32_to_cpu(pos[1]);
 419                                         priv->beacon_int = le16_to_cpu(
 420                                             mgmt->u.beacon.beacon_int);
 421                                         if (priv->call_post_assoc_from_beacon &&
 422                                             (priv->iw_mode ==
 423                                                 IEEE80211_IF_TYPE_STA))
 424                                                 queue_work(priv->workqueue,
 425                                                     &priv->post_associate.work);
 426
 427                                         priv->call_post_assoc_from_beacon = 0;
 428                                 }
 429
 430                                 break;
 431                         }
 432
 433                 case IEEE80211_STYPE_ACTION:
 434                         /* TODO: Parse 802.11h frames for CSA... */
 435                         break;
 436
 437                         /*
 438                          * TODO: There is no callback function from upper
 439                          * stack to inform us when associated status. this
 440                          * work around to sniff assoc_resp management frame
 441                          * and finish the association process.
 442                          */
 443                 case IEEE80211_STYPE_ASSOC_RESP:
 444                 case IEEE80211_STYPE_REASSOC_RESP:{
 445                                 struct ieee80211_mgmt *mgnt =
 446                                     (struct ieee80211_mgmt *)header;
 447
 448                                 /* We have just associated, give some
 449                                  * time for the 4-way handshake if
 450                                  * any. Don't start scan too early. */
 451                                 priv->next_scan_jiffies = jiffies +
 452                                         IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
 453
 454                                 priv->assoc_id = (~((1 << 15) | (1 << 14)) &
 455                                                   le16_to_cpu(mgnt->u.
 456                                                               assoc_resp.aid));
 457                                 priv->assoc_capability =
 458                                     le16_to_cpu(mgnt->u.assoc_resp.capab_info);
 459                                 if (priv->beacon_int)
 460                                         queue_work(priv->workqueue,
 461                                             &priv->post_associate.work);
 462                                 else
 463                                         priv->call_post_assoc_from_beacon = 1;
 464                                 break;
 465                         }
 466
 467                 case IEEE80211_STYPE_PROBE_REQ:{
 468                                 DECLARE_MAC_BUF(mac1);
 469                                 DECLARE_MAC_BUF(mac2);
 470                                 DECLARE_MAC_BUF(mac3);
 471                                 if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
 472                                         IWL_DEBUG_DROP
 473                                             ("Dropping (non network): %s"
 474                                              ", %s, %s\n",
 475                                              print_mac(mac1, header->addr1),
 476                                              print_mac(mac2, header->addr2),
 477                                              print_mac(mac3, header->addr3));
 478                                 return;
 479                         }
 480                 }
 481
 482                 iwl3945_handle_data_packet(priv, 0, rxb, &stats, phy_flags);
 483                 break;
 484
 485         case IEEE80211_FTYPE_CTL:
 486                 break;
 487
 488         case IEEE80211_FTYPE_DATA: {
 489                 DECLARE_MAC_BUF(mac1);
 490                 DECLARE_MAC_BUF(mac2);
 491                 DECLARE_MAC_BUF(mac3);
 492
 493                 if (unlikely(iwl3945_is_duplicate_packet(priv, header)))
 494                         IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
 495                                        print_mac(mac1, header->addr1),
 496                                        print_mac(mac2, header->addr2),
 497                                        print_mac(mac3, header->addr3));
 498                 else
 499                         iwl3945_handle_data_packet(priv, 1, rxb, &stats,
 500                                                    phy_flags);
 501                 break;
 502         }
 503         }
 504 }
 505
 506 int iwl3945_hw_txq_attach_buf_to_tfd(struct iwl3945_priv *priv, void *ptr,
 507                                  dma_addr_t addr, u16 len)
 508 {
 509         int count;
 510         u32 pad;
 511         struct iwl3945_tfd_frame *tfd = (struct iwl3945_tfd_frame *)ptr;
 512
 513         count = TFD_CTL_COUNT_GET(le32_to_cpu(tfd->control_flags));
 514         pad = TFD_CTL_PAD_GET(le32_to_cpu(tfd->control_flags));
 515
 516         if ((count >= NUM_TFD_CHUNKS) || (count < 0)) {
 517                 IWL_ERROR("Error can not send more than %d chunks\n",
 518                           NUM_TFD_CHUNKS);
 519                 return -EINVAL;
 520         }
 521
 522         tfd->pa[count].addr = cpu_to_le32(addr);
 523         tfd->pa[count].len = cpu_to_le32(len);
 524
 525         count++;
 526
 527         tfd->control_flags = cpu_to_le32(TFD_CTL_COUNT_SET(count) |
 528                                          TFD_CTL_PAD_SET(pad));
 529
 530         return 0;
 531 }
 532
 533 /**
 534  * iwl3945_hw_txq_free_tfd - Free one TFD, those at index [txq->q.read_ptr]
 535  *
 536  * Does NOT advance any indexes
 537  */
 538 int iwl3945_hw_txq_free_tfd(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
 539 {
 540         struct iwl3945_tfd_frame *bd_tmp = (struct iwl3945_tfd_frame *)&txq->bd[0];
 541         struct iwl3945_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
 542         struct pci_dev *dev = priv->pci_dev;
 543         int i;
 544         int counter;
 545
 546         /* classify bd */
 547         if (txq->q.id == IWL_CMD_QUEUE_NUM)
 548                 /* nothing to cleanup after for host commands */
 549                 return 0;
 550
 551         /* sanity check */
 552         counter = TFD_CTL_COUNT_GET(le32_to_cpu(bd->control_flags));
 553         if (counter > NUM_TFD_CHUNKS) {
 554                 IWL_ERROR("Too many chunks: %i\n", counter);
 555                 /* @todo issue fatal error, it is quite serious situation */
 556                 return 0;
 557         }
 558
 559         /* unmap chunks if any */
 560
 561         for (i = 1; i < counter; i++) {
 562                 pci_unmap_single(dev, le32_to_cpu(bd->pa[i].addr),
 563                                  le32_to_cpu(bd->pa[i].len), PCI_DMA_TODEVICE);
 564                 if (txq->txb[txq->q.read_ptr].skb[0]) {
 565                         struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[0];
 566                         if (txq->txb[txq->q.read_ptr].skb[0]) {
 567                                 /* Can be called from interrupt context */
 568                                 dev_kfree_skb_any(skb);
 569                                 txq->txb[txq->q.read_ptr].skb[0] = NULL;
 570                         }
 571                 }
 572         }
 573         return 0;
 574 }
 575
 576 u8 iwl3945_hw_find_station(struct iwl3945_priv *priv, const u8 *addr)
 577 {
 578         int i;
 579         int ret = IWL_INVALID_STATION;
 580         unsigned long flags;
 581         DECLARE_MAC_BUF(mac);
 582
 583         spin_lock_irqsave(&priv->sta_lock, flags);
 584         for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
 585                 if ((priv->stations[i].used) &&
 586                     (!compare_ether_addr
 587                      (priv->stations[i].sta.sta.addr, addr))) {
 588                         ret = i;
 589                         goto out;
 590                 }
 591
 592         IWL_DEBUG_INFO("can not find STA %s (total %d)\n",
 593                        print_mac(mac, addr), priv->num_stations);
 594  out:
 595         spin_unlock_irqrestore(&priv->sta_lock, flags);
 596         return ret;
 597 }
 598
 599 /**
 600  * iwl3945_hw_build_tx_cmd_rate - Add rate portion to TX_CMD:
 601  *
 602 */
 603 void iwl3945_hw_build_tx_cmd_rate(struct iwl3945_priv *priv,
 604                               struct iwl3945_cmd *cmd,
 605                               struct ieee80211_tx_control *ctrl,
 606                               struct ieee80211_hdr *hdr, int sta_id, int tx_id)
 607 {
 608         unsigned long flags;
 609         u16 rate_index = min(ctrl->tx_rate & 0xffff, IWL_RATE_COUNT - 1);
 610         u16 rate_mask;
 611         int rate;
 612         u8 rts_retry_limit;
 613         u8 data_retry_limit;
 614         __le32 tx_flags;
 615         u16 fc = le16_to_cpu(hdr->frame_control);
 616
 617         rate = iwl3945_rates[rate_index].plcp;
 618         tx_flags = cmd->cmd.tx.tx_flags;
 619
 620         /* We need to figure out how to get the sta->supp_rates while
 621          * in this running context; perhaps encoding into ctrl->tx_rate? */
 622         rate_mask = IWL_RATES_MASK;
 623
 624         spin_lock_irqsave(&priv->sta_lock, flags);
 625
 626         priv->stations[sta_id].current_rate.rate_n_flags = rate;
 627
 628         if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
 629             (sta_id != IWL3945_BROADCAST_ID) &&
 630                 (sta_id != IWL_MULTICAST_ID))
 631                 priv->stations[IWL_STA_ID].current_rate.rate_n_flags = rate;
 632
 633         spin_unlock_irqrestore(&priv->sta_lock, flags);
 634
 635         if (tx_id >= IWL_CMD_QUEUE_NUM)
 636                 rts_retry_limit = 3;
 637         else
 638                 rts_retry_limit = 7;
 639
 640         if (ieee80211_is_probe_response(fc)) {
 641                 data_retry_limit = 3;
 642                 if (data_retry_limit < rts_retry_limit)
 643                         rts_retry_limit = data_retry_limit;
 644         } else
 645                 data_retry_limit = IWL_DEFAULT_TX_RETRY;
 646
 647         if (priv->data_retry_limit != -1)
 648                 data_retry_limit = priv->data_retry_limit;
 649
 650         if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
 651                 switch (fc & IEEE80211_FCTL_STYPE) {
 652                 case IEEE80211_STYPE_AUTH:
 653                 case IEEE80211_STYPE_DEAUTH:
 654                 case IEEE80211_STYPE_ASSOC_REQ:
 655                 case IEEE80211_STYPE_REASSOC_REQ:
 656                         if (tx_flags & TX_CMD_FLG_RTS_MSK) {
 657                                 tx_flags &= ~TX_CMD_FLG_RTS_MSK;
 658                                 tx_flags |= TX_CMD_FLG_CTS_MSK;
 659                         }
 660                         break;
 661                 default:
 662                         break;
 663                 }
 664         }
 665
 666         cmd->cmd.tx.rts_retry_limit = rts_retry_limit;
 667         cmd->cmd.tx.data_retry_limit = data_retry_limit;
 668         cmd->cmd.tx.rate = rate;
 669         cmd->cmd.tx.tx_flags = tx_flags;
 670
 671         /* OFDM */
 672         cmd->cmd.tx.supp_rates[0] =
 673            ((rate_mask & IWL_OFDM_RATES_MASK) >> IWL_FIRST_OFDM_RATE) & 0xFF;
 674
 675         /* CCK */
 676         cmd->cmd.tx.supp_rates[1] = (rate_mask & 0xF);
 677
 678         IWL_DEBUG_RATE("Tx sta id: %d, rate: %d (plcp), flags: 0x%4X "
 679                        "cck/ofdm mask: 0x%x/0x%x\n", sta_id,
 680                        cmd->cmd.tx.rate, le32_to_cpu(cmd->cmd.tx.tx_flags),
 681                        cmd->cmd.tx.supp_rates[1], cmd->cmd.tx.supp_rates[0]);
 682 }
 683
 684 u8 iwl3945_sync_sta(struct iwl3945_priv *priv, int sta_id, u16 tx_rate, u8 flags)
 685 {
 686         unsigned long flags_spin;
 687         struct iwl3945_station_entry *station;
 688
 689         if (sta_id == IWL_INVALID_STATION)
 690                 return IWL_INVALID_STATION;
 691
 692         spin_lock_irqsave(&priv->sta_lock, flags_spin);
 693         station = &priv->stations[sta_id];
 694
 695         station->sta.sta.modify_mask = STA_MODIFY_TX_RATE_MSK;
 696         station->sta.rate_n_flags = cpu_to_le16(tx_rate);
 697         station->current_rate.rate_n_flags = tx_rate;
 698         station->sta.mode = STA_CONTROL_MODIFY_MSK;
 699
 700         spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
 701
 702         iwl3945_send_add_station(priv, &station->sta, flags);
 703         IWL_DEBUG_RATE("SCALE sync station %d to rate %d\n",
 704                         sta_id, tx_rate);
 705         return sta_id;
 706 }
 707
 708 static int iwl3945_nic_set_pwr_src(struct iwl3945_priv *priv, int pwr_max)
 709 {
 710         int rc;
 711         unsigned long flags;
 712
 713         spin_lock_irqsave(&priv->lock, flags);
 714         rc = iwl3945_grab_nic_access(priv);
 715         if (rc) {
 716                 spin_unlock_irqrestore(&priv->lock, flags);
 717                 return rc;
 718         }
 719
 720         if (!pwr_max) {
 721                 u32 val;
 722
 723                 rc = pci_read_config_dword(priv->pci_dev,
 724                                 PCI_POWER_SOURCE, &val);
 725                 if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT) {
 726                         iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 727                                         APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
 728                                         ~APMG_PS_CTRL_MSK_PWR_SRC);
 729                         iwl3945_release_nic_access(priv);
 730
 731                         iwl3945_poll_bit(priv, CSR_GPIO_IN,
 732                                      CSR_GPIO_IN_VAL_VAUX_PWR_SRC,
 733                                      CSR_GPIO_IN_BIT_AUX_POWER, 5000);
 734                 } else
 735                         iwl3945_release_nic_access(priv);
 736         } else {
 737                 iwl3945_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
 738                                 APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
 739                                 ~APMG_PS_CTRL_MSK_PWR_SRC);
 740
 741                 iwl3945_release_nic_access(priv);
 742                 iwl3945_poll_bit(priv, CSR_GPIO_IN, CSR_GPIO_IN_VAL_VMAIN_PWR_SRC,
 743                              CSR_GPIO_IN_BIT_AUX_POWER, 5000);  /* uS */
 744         }
 745         spin_unlock_irqrestore(&priv->lock, flags);
 746
 747         return rc;
 748 }
 749
 750 static int iwl3945_rx_init(struct iwl3945_priv *priv, struct iwl3945_rx_queue *rxq)
 751 {
 752         int rc;
 753         unsigned long flags;
 754
 755         spin_lock_irqsave(&priv->lock, flags);
 756         rc = iwl3945_grab_nic_access(priv);
 757         if (rc) {
 758                 spin_unlock_irqrestore(&priv->lock, flags);
 759                 return rc;
 760         }
 761
 762         iwl3945_write_direct32(priv, FH_RCSR_RBD_BASE(0), rxq->dma_addr);
 763         iwl3945_write_direct32(priv, FH_RCSR_RPTR_ADDR(0),
 764                              priv->hw_setting.shared_phys +
 765                              offsetof(struct iwl3945_shared, rx_read_ptr[0]));
 766         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), 0);
 767         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0),
 768                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_DMA_CHNL_EN_ENABLE |
 769                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_RDRBD_EN_ENABLE |
 770                 ALM_FH_RCSR_RX_CONFIG_REG_BIT_WR_STTS_EN |
 771                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MAX_FRAG_SIZE_128 |
 772                 (RX_QUEUE_SIZE_LOG << ALM_FH_RCSR_RX_CONFIG_REG_POS_RBDC_SIZE) |
 773                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_IRQ_DEST_INT_HOST |
 774                 (1 << ALM_FH_RCSR_RX_CONFIG_REG_POS_IRQ_RBTH) |
 775                 ALM_FH_RCSR_RX_CONFIG_REG_VAL_MSG_MODE_FH);
 776
 777         /* fake read to flush all prev I/O */
 778         iwl3945_read_direct32(priv, FH_RSSR_CTRL);
 779
 780         iwl3945_release_nic_access(priv);
 781         spin_unlock_irqrestore(&priv->lock, flags);
 782
 783         return 0;
 784 }
 785
 786 static int iwl3945_tx_reset(struct iwl3945_priv *priv)
 787 {
 788         int rc;
 789         unsigned long flags;
 790
 791         spin_lock_irqsave(&priv->lock, flags);
 792         rc = iwl3945_grab_nic_access(priv);
 793         if (rc) {
 794                 spin_unlock_irqrestore(&priv->lock, flags);
 795                 return rc;
 796         }
 797
 798         /* bypass mode */
 799         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0x2);
 800
 801         /* RA 0 is active */
 802         iwl3945_write_prph(priv, ALM_SCD_ARASTAT_REG, 0x01);
 803
 804         /* all 6 fifo are active */
 805         iwl3945_write_prph(priv, ALM_SCD_TXFACT_REG, 0x3f);
 806
 807         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_1_REG, 0x010000);
 808         iwl3945_write_prph(priv, ALM_SCD_SBYP_MODE_2_REG, 0x030002);
 809         iwl3945_write_prph(priv, ALM_SCD_TXF4MF_REG, 0x000004);
 810         iwl3945_write_prph(priv, ALM_SCD_TXF5MF_REG, 0x000005);
 811
 812         iwl3945_write_direct32(priv, FH_TSSR_CBB_BASE,
 813                              priv->hw_setting.shared_phys);
 814
 815         iwl3945_write_direct32(priv, FH_TSSR_MSG_CONFIG,
 816                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TXPD_ON |
 817                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_TXPD_ON |
 818                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_MAX_FRAG_SIZE_128B |
 819                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_SNOOP_RD_TFD_ON |
 820                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RD_CBB_ON |
 821                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_ORDER_RSP_WAIT_TH |
 822                 ALM_FH_TSSR_TX_MSG_CONFIG_REG_VAL_RSP_WAIT_TH);
 823
 824         iwl3945_release_nic_access(priv);
 825         spin_unlock_irqrestore(&priv->lock, flags);
 826
 827         return 0;
 828 }
 829
 830 /**
 831  * iwl3945_txq_ctx_reset - Reset TX queue context
 832  *
 833  * Destroys all DMA structures and initialize them again
 834  */
 835 static int iwl3945_txq_ctx_reset(struct iwl3945_priv *priv)
 836 {
 837         int rc;
 838         int txq_id, slots_num;
 839
 840         iwl3945_hw_txq_ctx_free(priv);
 841
 842         /* Tx CMD queue */
 843         rc = iwl3945_tx_reset(priv);
 844         if (rc)
 845                 goto error;
 846
 847         /* Tx queue(s) */
 848         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++) {
 849                 slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
 850                                 TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
 851                 rc = iwl3945_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
 852                                 txq_id);
 853                 if (rc) {
 854                         IWL_ERROR("Tx %d queue init failed\n", txq_id);
 855                         goto error;
 856                 }
 857         }
 858
 859         return rc;
 860
 861  error:
 862         iwl3945_hw_txq_ctx_free(priv);
 863         return rc;
 864 }
 865
 866 int iwl3945_hw_nic_init(struct iwl3945_priv *priv)
 867 {
 868         u8 rev_id;
 869         int rc;
 870         unsigned long flags;
 871         struct iwl3945_rx_queue *rxq = &priv->rxq;
 872
 873         iwl3945_power_init_handle(priv);
 874
 875         spin_lock_irqsave(&priv->lock, flags);
 876         iwl3945_set_bit(priv, CSR_ANA_PLL_CFG, (1 << 24));
 877         iwl3945_set_bit(priv, CSR_GIO_CHICKEN_BITS,
 878                     CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
 879
 880         iwl3945_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
 881         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
 882                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
 883                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
 884         if (rc < 0) {
 885                 spin_unlock_irqrestore(&priv->lock, flags);
 886                 IWL_DEBUG_INFO("Failed to init the card\n");
 887                 return rc;
 888         }
 889
 890         rc = iwl3945_grab_nic_access(priv);
 891         if (rc) {
 892                 spin_unlock_irqrestore(&priv->lock, flags);
 893                 return rc;
 894         }
 895         iwl3945_write_prph(priv, APMG_CLK_EN_REG,
 896                                  APMG_CLK_VAL_DMA_CLK_RQT |
 897                                  APMG_CLK_VAL_BSM_CLK_RQT);
 898         udelay(20);
 899         iwl3945_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
 900                                     APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
 901         iwl3945_release_nic_access(priv);
 902         spin_unlock_irqrestore(&priv->lock, flags);
 903
 904         /* Determine HW type */
 905         rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
 906         if (rc)
 907                 return rc;
 908         IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
 909
 910         iwl3945_nic_set_pwr_src(priv, 1);
 911         spin_lock_irqsave(&priv->lock, flags);
 912
 913         if (rev_id & PCI_CFG_REV_ID_BIT_RTP)
 914                 IWL_DEBUG_INFO("RTP type \n");
 915         else if (rev_id & PCI_CFG_REV_ID_BIT_BASIC_SKU) {
 916                 IWL_DEBUG_INFO("ALM-MB type\n");
 917                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 918                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MB);
 919         } else {
 920                 IWL_DEBUG_INFO("ALM-MM type\n");
 921                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 922                             CSR_HW_IF_CONFIG_REG_BIT_ALMAGOR_MM);
 923         }
 924
 925         spin_unlock_irqrestore(&priv->lock, flags);
 926
 927         /* Initialize the EEPROM */
 928         rc = iwl3945_eeprom_init(priv);
 929         if (rc)
 930                 return rc;
 931
 932         spin_lock_irqsave(&priv->lock, flags);
 933         if (EEPROM_SKU_CAP_OP_MODE_MRC == priv->eeprom.sku_cap) {
 934                 IWL_DEBUG_INFO("SKU OP mode is mrc\n");
 935                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 936                             CSR_HW_IF_CONFIG_REG_BIT_SKU_MRC);
 937         } else
 938                 IWL_DEBUG_INFO("SKU OP mode is basic\n");
 939
 940         if ((priv->eeprom.board_revision & 0xF0) == 0xD0) {
 941                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 942                                priv->eeprom.board_revision);
 943                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 944                             CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 945         } else {
 946                 IWL_DEBUG_INFO("3945ABG revision is 0x%X\n",
 947                                priv->eeprom.board_revision);
 948                 iwl3945_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
 949                               CSR_HW_IF_CONFIG_REG_BIT_BOARD_TYPE);
 950         }
 951
 952         if (priv->eeprom.almgor_m_version <= 1) {
 953                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 954                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_A);
 955                 IWL_DEBUG_INFO("Card M type A version is 0x%X\n",
 956                                priv->eeprom.almgor_m_version);
 957         } else {
 958                 IWL_DEBUG_INFO("Card M type B version is 0x%X\n",
 959                                priv->eeprom.almgor_m_version);
 960                 iwl3945_set_bit(priv, CSR_HW_IF_CONFIG_REG,
 961                             CSR_HW_IF_CONFIG_REG_BITS_SILICON_TYPE_B);
 962         }
 963         spin_unlock_irqrestore(&priv->lock, flags);
 964
 965         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
 966                 IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
 967
 968         if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
 969                 IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
 970
 971         /* Allocate the RX queue, or reset if it is already allocated */
 972         if (!rxq->bd) {
 973                 rc = iwl3945_rx_queue_alloc(priv);
 974                 if (rc) {
 975                         IWL_ERROR("Unable to initialize Rx queue\n");
 976                         return -ENOMEM;
 977                 }
 978         } else
 979                 iwl3945_rx_queue_reset(priv, rxq);
 980
 981         iwl3945_rx_replenish(priv);
 982
 983         iwl3945_rx_init(priv, rxq);
 984
 985         spin_lock_irqsave(&priv->lock, flags);
 986
 987         /* Look at using this instead:
 988         rxq->need_update = 1;
 989         iwl3945_rx_queue_update_write_ptr(priv, rxq);
 990         */
 991
 992         rc = iwl3945_grab_nic_access(priv);
 993         if (rc) {
 994                 spin_unlock_irqrestore(&priv->lock, flags);
 995                 return rc;
 996         }
 997         iwl3945_write_direct32(priv, FH_RCSR_WPTR(0), rxq->write & ~7);
 998         iwl3945_release_nic_access(priv);
 999
1000         spin_unlock_irqrestore(&priv->lock, flags);
1001
1002         rc = iwl3945_txq_ctx_reset(priv);
1003         if (rc)
1004                 return rc;
1005
1006         set_bit(STATUS_INIT, &priv->status);
1007
1008         return 0;
1009 }
1010
1011 /**
1012  * iwl3945_hw_txq_ctx_free - Free TXQ Context
1013  *
1014  * Destroy all TX DMA queues and structures
1015  */
1016 void iwl3945_hw_txq_ctx_free(struct iwl3945_priv *priv)
1017 {
1018         int txq_id;
1019
1020         /* Tx queues */
1021         for (txq_id = 0; txq_id < TFD_QUEUE_MAX; txq_id++)
1022                 iwl3945_tx_queue_free(priv, &priv->txq[txq_id]);
1023 }
1024
1025 void iwl3945_hw_txq_ctx_stop(struct iwl3945_priv *priv)
1026 {
1027         int queue;
1028         unsigned long flags;
1029
1030         spin_lock_irqsave(&priv->lock, flags);
1031         if (iwl3945_grab_nic_access(priv)) {
1032                 spin_unlock_irqrestore(&priv->lock, flags);
1033                 iwl3945_hw_txq_ctx_free(priv);
1034                 return;
1035         }
1036
1037         /* stop SCD */
1038         iwl3945_write_prph(priv, ALM_SCD_MODE_REG, 0);
1039
1040         /* reset TFD queues */
1041         for (queue = TFD_QUEUE_MIN; queue < TFD_QUEUE_MAX; queue++) {
1042                 iwl3945_write_direct32(priv, FH_TCSR_CONFIG(queue), 0x0);
1043                 iwl3945_poll_direct_bit(priv, FH_TSSR_TX_STATUS,
1044                                 ALM_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE(queue),
1045                                 1000);
1046         }
1047
1048         iwl3945_release_nic_access(priv);
1049         spin_unlock_irqrestore(&priv->lock, flags);
1050
1051         iwl3945_hw_txq_ctx_free(priv);
1052 }
1053
1054 int iwl3945_hw_nic_stop_master(struct iwl3945_priv *priv)
1055 {
1056         int rc = 0;
1057         u32 reg_val;
1058         unsigned long flags;
1059
1060         spin_lock_irqsave(&priv->lock, flags);
1061
1062         /* set stop master bit */
1063         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1064
1065         reg_val = iwl3945_read32(priv, CSR_GP_CNTRL);
1066
1067         if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
1068             (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
1069                 IWL_DEBUG_INFO("Card in power save, master is already "
1070                                "stopped\n");
1071         else {
1072                 rc = iwl3945_poll_bit(priv, CSR_RESET,
1073                                   CSR_RESET_REG_FLAG_MASTER_DISABLED,
1074                                   CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
1075                 if (rc < 0) {
1076                         spin_unlock_irqrestore(&priv->lock, flags);
1077                         return rc;
1078                 }
1079         }
1080
1081         spin_unlock_irqrestore(&priv->lock, flags);
1082         IWL_DEBUG_INFO("stop master\n");
1083
1084         return rc;
1085 }
1086
1087 int iwl3945_hw_nic_reset(struct iwl3945_priv *priv)
1088 {
1089         int rc;
1090         unsigned long flags;
1091
1092         iwl3945_hw_nic_stop_master(priv);
1093
1094         spin_lock_irqsave(&priv->lock, flags);
1095
1096         iwl3945_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1097
1098         rc = iwl3945_poll_bit(priv, CSR_GP_CNTRL,
1099                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1100                           CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1101
1102         rc = iwl3945_grab_nic_access(priv);
1103         if (!rc) {
1104                 iwl3945_write_prph(priv, APMG_CLK_CTRL_REG,
1105                                          APMG_CLK_VAL_BSM_CLK_RQT);
1106
1107                 udelay(10);
1108
1109                 iwl3945_set_bit(priv, CSR_GP_CNTRL,
1110                             CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1111
1112                 iwl3945_write_prph(priv, APMG_RTC_INT_MSK_REG, 0x0);
1113                 iwl3945_write_prph(priv, APMG_RTC_INT_STT_REG,
1114                                         0xFFFFFFFF);
1115
1116                 /* enable DMA */
1117                 iwl3945_write_prph(priv, APMG_CLK_EN_REG,
1118                                          APMG_CLK_VAL_DMA_CLK_RQT |
1119                                          APMG_CLK_VAL_BSM_CLK_RQT);
1120                 udelay(10);
1121
1122                 iwl3945_set_bits_prph(priv, APMG_PS_CTRL_REG,
1123                                 APMG_PS_CTRL_VAL_RESET_REQ);
1124                 udelay(5);
1125                 iwl3945_clear_bits_prph(priv, APMG_PS_CTRL_REG,
1126                                 APMG_PS_CTRL_VAL_RESET_REQ);
1127                 iwl3945_release_nic_access(priv);
1128         }
1129
1130         /* Clear the 'host command active' bit... */
1131         clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1132
1133         wake_up_interruptible(&priv->wait_command_queue);
1134         spin_unlock_irqrestore(&priv->lock, flags);
1135
1136         return rc;
1137 }
1138
1139 /**
1140  * iwl3945_hw_reg_adjust_power_by_temp
1141  * return index delta into power gain settings table
1142 */
1143 static int iwl3945_hw_reg_adjust_power_by_temp(int new_reading, int old_reading)
1144 {
1145         return (new_reading - old_reading) * (-11) / 100;
1146 }
1147
1148 /**
1149  * iwl3945_hw_reg_temp_out_of_range - Keep temperature in sane range
1150  */
1151 static inline int iwl3945_hw_reg_temp_out_of_range(int temperature)
1152 {
1153         return (((temperature < -260) || (temperature > 25)) ? 1 : 0);
1154 }
1155
1156 int iwl3945_hw_get_temperature(struct iwl3945_priv *priv)
1157 {
1158         return iwl3945_read32(priv, CSR_UCODE_DRV_GP2);
1159 }
1160
1161 /**
1162  * iwl3945_hw_reg_txpower_get_temperature
1163  * get the current temperature by reading from NIC
1164 */
1165 static int iwl3945_hw_reg_txpower_get_temperature(struct iwl3945_priv *priv)
1166 {
1167         int temperature;
1168
1169         temperature = iwl3945_hw_get_temperature(priv);
1170
1171         /* driver's okay range is -260 to +25.
1172          *   human readable okay range is 0 to +285 */
1173         IWL_DEBUG_INFO("Temperature: %d\n", temperature + IWL_TEMP_CONVERT);
1174
1175         /* handle insane temp reading */
1176         if (iwl3945_hw_reg_temp_out_of_range(temperature)) {
1177                 IWL_ERROR("Error bad temperature value  %d\n", temperature);
1178
1179                 /* if really really hot(?),
1180                  *   substitute the 3rd band/group's temp measured at factory */
1181                 if (priv->last_temperature > 100)
1182                         temperature = priv->eeprom.groups[2].temperature;
1183                 else /* else use most recent "sane" value from driver */
1184                         temperature = priv->last_temperature;
1185         }
1186
1187         return temperature;     /* raw, not "human readable" */
1188 }
1189
1190 /* Adjust Txpower only if temperature variance is greater than threshold.
1191  *
1192  * Both are lower than older versions' 9 degrees */
1193 #define IWL_TEMPERATURE_LIMIT_TIMER   6
1194
1195 /**
1196  * is_temp_calib_needed - determines if new calibration is needed
1197  *
1198  * records new temperature in tx_mgr->temperature.
1199  * replaces tx_mgr->last_temperature *only* if calib needed
1200  *    (assumes caller will actually do the calibration!). */
1201 static int is_temp_calib_needed(struct iwl3945_priv *priv)
1202 {
1203         int temp_diff;
1204
1205         priv->temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1206         temp_diff = priv->temperature - priv->last_temperature;
1207
1208         /* get absolute value */
1209         if (temp_diff < 0) {
1210                 IWL_DEBUG_POWER("Getting cooler, delta %d,\n", temp_diff);
1211                 temp_diff = -temp_diff;
1212         } else if (temp_diff == 0)
1213                 IWL_DEBUG_POWER("Same temp,\n");
1214         else
1215                 IWL_DEBUG_POWER("Getting warmer, delta %d,\n", temp_diff);
1216
1217         /* if we don't need calibration, *don't* update last_temperature */
1218         if (temp_diff < IWL_TEMPERATURE_LIMIT_TIMER) {
1219                 IWL_DEBUG_POWER("Timed thermal calib not needed\n");
1220                 return 0;
1221         }
1222
1223         IWL_DEBUG_POWER("Timed thermal calib needed\n");
1224
1225         /* assume that caller will actually do calib ...
1226          *   update the "last temperature" value */
1227         priv->last_temperature = priv->temperature;
1228         return 1;
1229 }
1230
1231 #define IWL_MAX_GAIN_ENTRIES 78
1232 #define IWL_CCK_FROM_OFDM_POWER_DIFF  -5
1233 #define IWL_CCK_FROM_OFDM_INDEX_DIFF (10)
1234
1235 /* radio and DSP power table, each step is 1/2 dB.
1236  * 1st number is for RF analog gain, 2nd number is for DSP pre-DAC gain. */
1237 static struct iwl3945_tx_power power_gain_table[2][IWL_MAX_GAIN_ENTRIES] = {
1238         {
1239          {251, 127},            /* 2.4 GHz, highest power */
1240          {251, 127},
1241          {251, 127},
1242          {251, 127},
1243          {251, 125},
1244          {251, 110},
1245          {251, 105},
1246          {251, 98},
1247          {187, 125},
1248          {187, 115},
1249          {187, 108},
1250          {187, 99},
1251          {243, 119},
1252          {243, 111},
1253          {243, 105},
1254          {243, 97},
1255          {243, 92},
1256          {211, 106},
1257          {211, 100},
1258          {179, 120},
1259          {179, 113},
1260          {179, 107},
1261          {147, 125},
1262          {147, 119},
1263          {147, 112},
1264          {147, 106},
1265          {147, 101},
1266          {147, 97},
1267          {147, 91},
1268          {115, 107},
1269          {235, 121},
1270          {235, 115},
1271          {235, 109},
1272          {203, 127},
1273          {203, 121},
1274          {203, 115},
1275          {203, 108},
1276          {203, 102},
1277          {203, 96},
1278          {203, 92},
1279          {171, 110},
1280          {171, 104},
1281          {171, 98},
1282          {139, 116},
1283          {227, 125},
1284          {227, 119},
1285          {227, 113},
1286          {227, 107},
1287          {227, 101},
1288          {227, 96},
1289          {195, 113},
1290          {195, 106},
1291          {195, 102},
1292          {195, 95},
1293          {163, 113},
1294          {163, 106},
1295          {163, 102},
1296          {163, 95},
1297          {131, 113},
1298          {131, 106},
1299          {131, 102},
1300          {131, 95},
1301          {99, 113},
1302          {99, 106},
1303          {99, 102},
1304          {99, 95},
1305          {67, 113},
1306          {67, 106},
1307          {67, 102},
1308          {67, 95},
1309          {35, 113},
1310          {35, 106},
1311          {35, 102},
1312          {35, 95},
1313          {3, 113},
1314          {3, 106},
1315          {3, 102},
1316          {3, 95} },             /* 2.4 GHz, lowest power */
1317         {
1318          {251, 127},            /* 5.x GHz, highest power */
1319          {251, 120},
1320          {251, 114},
1321          {219, 119},
1322          {219, 101},
1323          {187, 113},
1324          {187, 102},
1325          {155, 114},
1326          {155, 103},
1327          {123, 117},
1328          {123, 107},
1329          {123, 99},
1330          {123, 92},
1331          {91, 108},
1332          {59, 125},
1333          {59, 118},
1334          {59, 109},
1335          {59, 102},
1336          {59, 96},
1337          {59, 90},
1338          {27, 104},
1339          {27, 98},
1340          {27, 92},
1341          {115, 118},
1342          {115, 111},
1343          {115, 104},
1344          {83, 126},
1345          {83, 121},
1346          {83, 113},
1347          {83, 105},
1348          {83, 99},
1349          {51, 118},
1350          {51, 111},
1351          {51, 104},
1352          {51, 98},
1353          {19, 116},
1354          {19, 109},
1355          {19, 102},
1356          {19, 98},
1357          {19, 93},
1358          {171, 113},
1359          {171, 107},
1360          {171, 99},
1361          {139, 120},
1362          {139, 113},
1363          {139, 107},
1364          {139, 99},
1365          {107, 120},
1366          {107, 113},
1367          {107, 107},
1368          {107, 99},
1369          {75, 120},
1370          {75, 113},
1371          {75, 107},
1372          {75, 99},
1373          {43, 120},
1374          {43, 113},
1375          {43, 107},
1376          {43, 99},
1377          {11, 120},
1378          {11, 113},
1379          {11, 107},
1380          {11, 99},
1381          {131, 107},
1382          {131, 99},
1383          {99, 120},
1384          {99, 113},
1385          {99, 107},
1386          {99, 99},
1387          {67, 120},
1388          {67, 113},
1389          {67, 107},
1390          {67, 99},
1391          {35, 120},
1392          {35, 113},
1393          {35, 107},
1394          {35, 99},
1395          {3, 120} }             /* 5.x GHz, lowest power */
1396 };
1397
1398 static inline u8 iwl3945_hw_reg_fix_power_index(int index)
1399 {
1400         if (index < 0)
1401                 return 0;
1402         if (index >= IWL_MAX_GAIN_ENTRIES)
1403                 return IWL_MAX_GAIN_ENTRIES - 1;
1404         return (u8) index;
1405 }
1406
1407 /* Kick off thermal recalibration check every 60 seconds */
1408 #define REG_RECALIB_PERIOD (60)
1409
1410 /**
1411  * iwl3945_hw_reg_set_scan_power - Set Tx power for scan probe requests
1412  *
1413  * Set (in our channel info database) the direct scan Tx power for 1 Mbit (CCK)
1414  * or 6 Mbit (OFDM) rates.
1415  */
1416 static void iwl3945_hw_reg_set_scan_power(struct iwl3945_priv *priv, u32 scan_tbl_index,
1417                                s32 rate_index, const s8 *clip_pwrs,
1418                                struct iwl3945_channel_info *ch_info,
1419                                int band_index)
1420 {
1421         struct iwl3945_scan_power_info *scan_power_info;
1422         s8 power;
1423         u8 power_index;
1424
1425         scan_power_info = &ch_info->scan_pwr_info[scan_tbl_index];
1426
1427         /* use this channel group's 6Mbit clipping/saturation pwr,
1428          *   but cap at regulatory scan power restriction (set during init
1429          *   based on eeprom channel data) for this channel.  */
1430         power = min(ch_info->scan_power, clip_pwrs[IWL_RATE_6M_INDEX_TABLE]);
1431
1432         /* further limit to user's max power preference.
1433          * FIXME:  Other spectrum management power limitations do not
1434          *   seem to apply?? */
1435         power = min(power, priv->user_txpower_limit);
1436         scan_power_info->requested_power = power;
1437
1438         /* find difference between new scan *power* and current "normal"
1439          *   Tx *power* for 6Mb.  Use this difference (x2) to adjust the
1440          *   current "normal" temperature-compensated Tx power *index* for
1441          *   this rate (1Mb or 6Mb) to yield new temp-compensated scan power
1442          *   *index*. */
1443         power_index = ch_info->power_info[rate_index].power_table_index
1444             - (power - ch_info->power_info
1445                [IWL_RATE_6M_INDEX_TABLE].requested_power) * 2;
1446
1447         /* store reference index that we use when adjusting *all* scan
1448          *   powers.  So we can accommodate user (all channel) or spectrum
1449          *   management (single channel) power changes "between" temperature
1450          *   feedback compensation procedures.
1451          * don't force fit this reference index into gain table; it may be a
1452          *   negative number.  This will help avoid errors when we're at
1453          *   the lower bounds (highest gains, for warmest temperatures)
1454          *   of the table. */
1455
1456         /* don't exceed table bounds for "real" setting */
1457         power_index = iwl3945_hw_reg_fix_power_index(power_index);
1458
1459         scan_power_info->power_table_index = power_index;
1460         scan_power_info->tpc.tx_gain =
1461             power_gain_table[band_index][power_index].tx_gain;
1462         scan_power_info->tpc.dsp_atten =
1463             power_gain_table[band_index][power_index].dsp_atten;
1464 }
1465
1466 /**
1467  * iwl3945_hw_reg_send_txpower - fill in Tx Power command with gain settings
1468  *
1469  * Configures power settings for all rates for the current channel,
1470  * using values from channel info struct, and send to NIC
1471  */
1472 int iwl3945_hw_reg_send_txpower(struct iwl3945_priv *priv)
1473 {
1474         int rate_idx, i;
1475         const struct iwl3945_channel_info *ch_info = NULL;
1476         struct iwl3945_txpowertable_cmd txpower = {
1477                 .channel = priv->active_rxon.channel,
1478         };
1479
1480         txpower.band = (priv->phymode == MODE_IEEE80211A) ? 0 : 1;
1481         ch_info = iwl3945_get_channel_info(priv,
1482                                        priv->phymode,
1483                                        le16_to_cpu(priv->active_rxon.channel));
1484         if (!ch_info) {
1485                 IWL_ERROR
1486                     ("Failed to get channel info for channel %d [%d]\n",
1487                      le16_to_cpu(priv->active_rxon.channel), priv->phymode);
1488                 return -EINVAL;
1489         }
1490
1491         if (!is_channel_valid(ch_info)) {
1492                 IWL_DEBUG_POWER("Not calling TX_PWR_TABLE_CMD on "
1493                                 "non-Tx channel.\n");
1494                 return 0;
1495         }
1496
1497         /* fill cmd with power settings for all rates for current channel */
1498         /* Fill OFDM rate */
1499         for (rate_idx = IWL_FIRST_OFDM_RATE, i = 0;
1500              rate_idx <= IWL_LAST_OFDM_RATE; rate_idx++, i++) {
1501
1502                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1503                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1504
1505                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1506                                 le16_to_cpu(txpower.channel),
1507                                 txpower.band,
1508                                 txpower.power[i].tpc.tx_gain,
1509                                 txpower.power[i].tpc.dsp_atten,
1510                                 txpower.power[i].rate);
1511         }
1512         /* Fill CCK rates */
1513         for (rate_idx = IWL_FIRST_CCK_RATE;
1514              rate_idx <= IWL_LAST_CCK_RATE; rate_idx++, i++) {
1515                 txpower.power[i].tpc = ch_info->power_info[i].tpc;
1516                 txpower.power[i].rate = iwl3945_rates[rate_idx].plcp;
1517
1518                 IWL_DEBUG_POWER("ch %d:%d rf %d dsp %3d rate code 0x%02x\n",
1519                                 le16_to_cpu(txpower.channel),
1520                                 txpower.band,
1521                                 txpower.power[i].tpc.tx_gain,
1522                                 txpower.power[i].tpc.dsp_atten,
1523                                 txpower.power[i].rate);
1524         }
1525
1526         return iwl3945_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD,
1527                         sizeof(struct iwl3945_txpowertable_cmd), &txpower);
1528
1529 }
1530
1531 /**
1532  * iwl3945_hw_reg_set_new_power - Configures power tables at new levels
1533  * @ch_info: Channel to update.  Uses power_info.requested_power.
1534  *
1535  * Replace requested_power and base_power_index ch_info fields for
1536  * one channel.
1537  *
1538  * Called if user or spectrum management changes power preferences.
1539  * Takes into account h/w and modulation limitations (clip power).
1540  *
1541  * This does *not* send anything to NIC, just sets up ch_info for one channel.
1542  *
1543  * NOTE: reg_compensate_for_temperature_dif() *must* be run after this to
1544  *       properly fill out the scan powers, and actual h/w gain settings,
1545  *       and send changes to NIC
1546  */
1547 static int iwl3945_hw_reg_set_new_power(struct iwl3945_priv *priv,
1548                              struct iwl3945_channel_info *ch_info)
1549 {
1550         struct iwl3945_channel_power_info *power_info;
1551         int power_changed = 0;
1552         int i;
1553         const s8 *clip_pwrs;
1554         int power;
1555
1556         /* Get this chnlgrp's rate-to-max/clip-powers table */
1557         clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1558
1559         /* Get this channel's rate-to-current-power settings table */
1560         power_info = ch_info->power_info;
1561
1562         /* update OFDM Txpower settings */
1563         for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE;
1564              i++, ++power_info) {
1565                 int delta_idx;
1566
1567                 /* limit new power to be no more than h/w capability */
1568                 power = min(ch_info->curr_txpow, clip_pwrs[i]);
1569                 if (power == power_info->requested_power)
1570                         continue;
1571
1572                 /* find difference between old and new requested powers,
1573                  *    update base (non-temp-compensated) power index */
1574                 delta_idx = (power - power_info->requested_power) * 2;
1575                 power_info->base_power_index -= delta_idx;
1576
1577                 /* save new requested power value */
1578                 power_info->requested_power = power;
1579
1580                 power_changed = 1;
1581         }
1582
1583         /* update CCK Txpower settings, based on OFDM 12M setting ...
1584          *    ... all CCK power settings for a given channel are the *same*. */
1585         if (power_changed) {
1586                 power =
1587                     ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1588                     requested_power + IWL_CCK_FROM_OFDM_POWER_DIFF;
1589
1590                 /* do all CCK rates' iwl3945_channel_power_info structures */
1591                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++) {
1592                         power_info->requested_power = power;
1593                         power_info->base_power_index =
1594                             ch_info->power_info[IWL_RATE_12M_INDEX_TABLE].
1595                             base_power_index + IWL_CCK_FROM_OFDM_INDEX_DIFF;
1596                         ++power_info;
1597                 }
1598         }
1599
1600         return 0;
1601 }
1602
1603 /**
1604  * iwl3945_hw_reg_get_ch_txpower_limit - returns new power limit for channel
1605  *
1606  * NOTE: Returned power limit may be less (but not more) than requested,
1607  *       based strictly on regulatory (eeprom and spectrum mgt) limitations
1608  *       (no consideration for h/w clipping limitations).
1609  */
1610 static int iwl3945_hw_reg_get_ch_txpower_limit(struct iwl3945_channel_info *ch_info)
1611 {
1612         s8 max_power;
1613
1614 #if 0
1615         /* if we're using TGd limits, use lower of TGd or EEPROM */
1616         if (ch_info->tgd_data.max_power != 0)
1617                 max_power = min(ch_info->tgd_data.max_power,
1618                                 ch_info->eeprom.max_power_avg);
1619
1620         /* else just use EEPROM limits */
1621         else
1622 #endif
1623                 max_power = ch_info->eeprom.max_power_avg;
1624
1625         return min(max_power, ch_info->max_power_avg);
1626 }
1627
1628 /**
1629  * iwl3945_hw_reg_comp_txpower_temp - Compensate for temperature
1630  *
1631  * Compensate txpower settings of *all* channels for temperature.
1632  * This only accounts for the difference between current temperature
1633  *   and the factory calibration temperatures, and bases the new settings
1634  *   on the channel's base_power_index.
1635  *
1636  * If RxOn is "associated", this sends the new Txpower to NIC!
1637  */
1638 static int iwl3945_hw_reg_comp_txpower_temp(struct iwl3945_priv *priv)
1639 {
1640         struct iwl3945_channel_info *ch_info = NULL;
1641         int delta_index;
1642         const s8 *clip_pwrs; /* array of h/w max power levels for each rate */
1643         u8 a_band;
1644         u8 rate_index;
1645         u8 scan_tbl_index;
1646         u8 i;
1647         int ref_temp;
1648         int temperature = priv->temperature;
1649
1650         /* set up new Tx power info for each and every channel, 2.4 and 5.x */
1651         for (i = 0; i < priv->channel_count; i++) {
1652                 ch_info = &priv->channel_info[i];
1653                 a_band = is_channel_a_band(ch_info);
1654
1655                 /* Get this chnlgrp's factory calibration temperature */
1656                 ref_temp = (s16)priv->eeprom.groups[ch_info->group_index].
1657                     temperature;
1658
1659                 /* get power index adjustment based on curr and factory
1660                  * temps */
1661                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1662                                                               ref_temp);
1663
1664                 /* set tx power value for all rates, OFDM and CCK */
1665                 for (rate_index = 0; rate_index < IWL_RATE_COUNT;
1666                      rate_index++) {
1667                         int power_idx =
1668                             ch_info->power_info[rate_index].base_power_index;
1669
1670                         /* temperature compensate */
1671                         power_idx += delta_index;
1672
1673                         /* stay within table range */
1674                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
1675                         ch_info->power_info[rate_index].
1676                             power_table_index = (u8) power_idx;
1677                         ch_info->power_info[rate_index].tpc =
1678                             power_gain_table[a_band][power_idx];
1679                 }
1680
1681                 /* Get this chnlgrp's rate-to-max/clip-powers table */
1682                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1683
1684                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
1685                 for (scan_tbl_index = 0;
1686                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
1687                         s32 actual_index = (scan_tbl_index == 0) ?
1688                             IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
1689                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
1690                                            actual_index, clip_pwrs,
1691                                            ch_info, a_band);
1692                 }
1693         }
1694
1695         /* send Txpower command for current channel to ucode */
1696         return iwl3945_hw_reg_send_txpower(priv);
1697 }
1698
1699 int iwl3945_hw_reg_set_txpower(struct iwl3945_priv *priv, s8 power)
1700 {
1701         struct iwl3945_channel_info *ch_info;
1702         s8 max_power;
1703         u8 a_band;
1704         u8 i;
1705
1706         if (priv->user_txpower_limit == power) {
1707                 IWL_DEBUG_POWER("Requested Tx power same as current "
1708                                 "limit: %ddBm.\n", power);
1709                 return 0;
1710         }
1711
1712         IWL_DEBUG_POWER("Setting upper limit clamp to %ddBm.\n", power);
1713         priv->user_txpower_limit = power;
1714
1715         /* set up new Tx powers for each and every channel, 2.4 and 5.x */
1716
1717         for (i = 0; i < priv->channel_count; i++) {
1718                 ch_info = &priv->channel_info[i];
1719                 a_band = is_channel_a_band(ch_info);
1720
1721                 /* find minimum power of all user and regulatory constraints
1722                  *    (does not consider h/w clipping limitations) */
1723                 max_power = iwl3945_hw_reg_get_ch_txpower_limit(ch_info);
1724                 max_power = min(power, max_power);
1725                 if (max_power != ch_info->curr_txpow) {
1726                         ch_info->curr_txpow = max_power;
1727
1728                         /* this considers the h/w clipping limitations */
1729                         iwl3945_hw_reg_set_new_power(priv, ch_info);
1730                 }
1731         }
1732
1733         /* update txpower settings for all channels,
1734          *   send to NIC if associated. */
1735         is_temp_calib_needed(priv);
1736         iwl3945_hw_reg_comp_txpower_temp(priv);
1737
1738         return 0;
1739 }
1740
1741 /* will add 3945 channel switch cmd handling later */
1742 int iwl3945_hw_channel_switch(struct iwl3945_priv *priv, u16 channel)
1743 {
1744         return 0;
1745 }
1746
1747 /**
1748  * iwl3945_reg_txpower_periodic -  called when time to check our temperature.
1749  *
1750  * -- reset periodic timer
1751  * -- see if temp has changed enough to warrant re-calibration ... if so:
1752  *     -- correct coeffs for temp (can reset temp timer)
1753  *     -- save this temp as "last",
1754  *     -- send new set of gain settings to NIC
1755  * NOTE:  This should continue working, even when we're not associated,
1756  *   so we can keep our internal table of scan powers current. */
1757 void iwl3945_reg_txpower_periodic(struct iwl3945_priv *priv)
1758 {
1759         /* This will kick in the "brute force"
1760          * iwl3945_hw_reg_comp_txpower_temp() below */
1761         if (!is_temp_calib_needed(priv))
1762                 goto reschedule;
1763
1764         /* Set up a new set of temp-adjusted TxPowers, send to NIC.
1765          * This is based *only* on current temperature,
1766          * ignoring any previous power measurements */
1767         iwl3945_hw_reg_comp_txpower_temp(priv);
1768
1769  reschedule:
1770         queue_delayed_work(priv->workqueue,
1771                            &priv->thermal_periodic, REG_RECALIB_PERIOD * HZ);
1772 }
1773
1774 static void iwl3945_bg_reg_txpower_periodic(struct work_struct *work)
1775 {
1776         struct iwl3945_priv *priv = container_of(work, struct iwl3945_priv,
1777                                              thermal_periodic.work);
1778
1779         if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1780                 return;
1781
1782         mutex_lock(&priv->mutex);
1783         iwl3945_reg_txpower_periodic(priv);
1784         mutex_unlock(&priv->mutex);
1785 }
1786
1787 /**
1788  * iwl3945_hw_reg_get_ch_grp_index - find the channel-group index (0-4)
1789  *                                 for the channel.
1790  *
1791  * This function is used when initializing channel-info structs.
1792  *
1793  * NOTE: These channel groups do *NOT* match the bands above!
1794  *       These channel groups are based on factory-tested channels;
1795  *       on A-band, EEPROM's "group frequency" entries represent the top
1796  *       channel in each group 1-4.  Group 5 All B/G channels are in group 0.
1797  */
1798 static u16 iwl3945_hw_reg_get_ch_grp_index(struct iwl3945_priv *priv,
1799                                        const struct iwl3945_channel_info *ch_info)
1800 {
1801         struct iwl3945_eeprom_txpower_group *ch_grp = &priv->eeprom.groups[0];
1802         u8 group;
1803         u16 group_index = 0;    /* based on factory calib frequencies */
1804         u8 grp_channel;
1805
1806         /* Find the group index for the channel ... don't use index 1(?) */
1807         if (is_channel_a_band(ch_info)) {
1808                 for (group = 1; group < 5; group++) {
1809                         grp_channel = ch_grp[group].group_channel;
1810                         if (ch_info->channel <= grp_channel) {
1811                                 group_index = group;
1812                                 break;
1813                         }
1814                 }
1815                 /* group 4 has a few channels *above* its factory cal freq */
1816                 if (group == 5)
1817                         group_index = 4;
1818         } else
1819                 group_index = 0;        /* 2.4 GHz, group 0 */
1820
1821         IWL_DEBUG_POWER("Chnl %d mapped to grp %d\n", ch_info->channel,
1822                         group_index);
1823         return group_index;
1824 }
1825
1826 /**
1827  * iwl3945_hw_reg_get_matched_power_index - Interpolate to get nominal index
1828  *
1829  * Interpolate to get nominal (i.e. at factory calibration temperature) index
1830  *   into radio/DSP gain settings table for requested power.
1831  */
1832 static int iwl3945_hw_reg_get_matched_power_index(struct iwl3945_priv *priv,
1833                                        s8 requested_power,
1834                                        s32 setting_index, s32 *new_index)
1835 {
1836         const struct iwl3945_eeprom_txpower_group *chnl_grp = NULL;
1837         s32 index0, index1;
1838         s32 power = 2 * requested_power;
1839         s32 i;
1840         const struct iwl3945_eeprom_txpower_sample *samples;
1841         s32 gains0, gains1;
1842         s32 res;
1843         s32 denominator;
1844
1845         chnl_grp = &priv->eeprom.groups[setting_index];
1846         samples = chnl_grp->samples;
1847         for (i = 0; i < 5; i++) {
1848                 if (power == samples[i].power) {
1849                         *new_index = samples[i].gain_index;
1850                         return 0;
1851                 }
1852         }
1853
1854         if (power > samples[1].power) {
1855                 index0 = 0;
1856                 index1 = 1;
1857         } else if (power > samples[2].power) {
1858                 index0 = 1;
1859                 index1 = 2;
1860         } else if (power > samples[3].power) {
1861                 index0 = 2;
1862                 index1 = 3;
1863         } else {
1864                 index0 = 3;
1865                 index1 = 4;
1866         }
1867
1868         denominator = (s32) samples[index1].power - (s32) samples[index0].power;
1869         if (denominator == 0)
1870                 return -EINVAL;
1871         gains0 = (s32) samples[index0].gain_index * (1 << 19);
1872         gains1 = (s32) samples[index1].gain_index * (1 << 19);
1873         res = gains0 + (gains1 - gains0) *
1874             ((s32) power - (s32) samples[index0].power) / denominator +
1875             (1 << 18);
1876         *new_index = res >> 19;
1877         return 0;
1878 }
1879
1880 static void iwl3945_hw_reg_init_channel_groups(struct iwl3945_priv *priv)
1881 {
1882         u32 i;
1883         s32 rate_index;
1884         const struct iwl3945_eeprom_txpower_group *group;
1885
1886         IWL_DEBUG_POWER("Initializing factory calib info from EEPROM\n");
1887
1888         for (i = 0; i < IWL_NUM_TX_CALIB_GROUPS; i++) {
1889                 s8 *clip_pwrs;  /* table of power levels for each rate */
1890                 s8 satur_pwr;   /* saturation power for each chnl group */
1891                 group = &priv->eeprom.groups[i];
1892
1893                 /* sanity check on factory saturation power value */
1894                 if (group->saturation_power < 40) {
1895                         IWL_WARNING("Error: saturation power is %d, "
1896                                     "less than minimum expected 40\n",
1897                                     group->saturation_power);
1898                         return;
1899                 }
1900
1901                 /*
1902                  * Derive requested power levels for each rate, based on
1903                  *   hardware capabilities (saturation power for band).
1904                  * Basic value is 3dB down from saturation, with further
1905                  *   power reductions for highest 3 data rates.  These
1906                  *   backoffs provide headroom for high rate modulation
1907                  *   power peaks, without too much distortion (clipping).
1908                  */
1909                 /* we'll fill in this array with h/w max power levels */
1910                 clip_pwrs = (s8 *) priv->clip_groups[i].clip_powers;
1911
1912                 /* divide factory saturation power by 2 to find -3dB level */
1913                 satur_pwr = (s8) (group->saturation_power >> 1);
1914
1915                 /* fill in channel group's nominal powers for each rate */
1916                 for (rate_index = 0;
1917                      rate_index < IWL_RATE_COUNT; rate_index++, clip_pwrs++) {
1918                         switch (rate_index) {
1919                         case IWL_RATE_36M_INDEX_TABLE:
1920                                 if (i == 0)     /* B/G */
1921                                         *clip_pwrs = satur_pwr;
1922                                 else    /* A */
1923                                         *clip_pwrs = satur_pwr - 5;
1924                                 break;
1925                         case IWL_RATE_48M_INDEX_TABLE:
1926                                 if (i == 0)
1927                                         *clip_pwrs = satur_pwr - 7;
1928                                 else
1929                                         *clip_pwrs = satur_pwr - 10;
1930                                 break;
1931                         case IWL_RATE_54M_INDEX_TABLE:
1932                                 if (i == 0)
1933                                         *clip_pwrs = satur_pwr - 9;
1934                                 else
1935                                         *clip_pwrs = satur_pwr - 12;
1936                                 break;
1937                         default:
1938                                 *clip_pwrs = satur_pwr;
1939                                 break;
1940                         }
1941                 }
1942         }
1943 }
1944
1945 /**
1946  * iwl3945_txpower_set_from_eeprom - Set channel power info based on EEPROM
1947  *
1948  * Second pass (during init) to set up priv->channel_info
1949  *
1950  * Set up Tx-power settings in our channel info database for each VALID
1951  * (for this geo/SKU) channel, at all Tx data rates, based on eeprom values
1952  * and current temperature.
1953  *
1954  * Since this is based on current temperature (at init time), these values may
1955  * not be valid for very long, but it gives us a starting/default point,
1956  * and allows us to active (i.e. using Tx) scan.
1957  *
1958  * This does *not* write values to NIC, just sets up our internal table.
1959  */
1960 int iwl3945_txpower_set_from_eeprom(struct iwl3945_priv *priv)
1961 {
1962         struct iwl3945_channel_info *ch_info = NULL;
1963         struct iwl3945_channel_power_info *pwr_info;
1964         int delta_index;
1965         u8 rate_index;
1966         u8 scan_tbl_index;
1967         const s8 *clip_pwrs;    /* array of power levels for each rate */
1968         u8 gain, dsp_atten;
1969         s8 power;
1970         u8 pwr_index, base_pwr_index, a_band;
1971         u8 i;
1972         int temperature;
1973
1974         /* save temperature reference,
1975          *   so we can determine next time to calibrate */
1976         temperature = iwl3945_hw_reg_txpower_get_temperature(priv);
1977         priv->last_temperature = temperature;
1978
1979         iwl3945_hw_reg_init_channel_groups(priv);
1980
1981         /* initialize Tx power info for each and every channel, 2.4 and 5.x */
1982         for (i = 0, ch_info = priv->channel_info; i < priv->channel_count;
1983              i++, ch_info++) {
1984                 a_band = is_channel_a_band(ch_info);
1985                 if (!is_channel_valid(ch_info))
1986                         continue;
1987
1988                 /* find this channel's channel group (*not* "band") index */
1989                 ch_info->group_index =
1990                         iwl3945_hw_reg_get_ch_grp_index(priv, ch_info);
1991
1992                 /* Get this chnlgrp's rate->max/clip-powers table */
1993                 clip_pwrs = priv->clip_groups[ch_info->group_index].clip_powers;
1994
1995                 /* calculate power index *adjustment* value according to
1996                  *  diff between current temperature and factory temperature */
1997                 delta_index = iwl3945_hw_reg_adjust_power_by_temp(temperature,
1998                                 priv->eeprom.groups[ch_info->group_index].
1999                                 temperature);
2000
2001                 IWL_DEBUG_POWER("Delta index for channel %d: %d [%d]\n",
2002                                 ch_info->channel, delta_index, temperature +
2003                                 IWL_TEMP_CONVERT);
2004
2005                 /* set tx power value for all OFDM rates */
2006                 for (rate_index = 0; rate_index < IWL_OFDM_RATES;
2007                      rate_index++) {
2008                         s32 power_idx;
2009                         int rc;
2010
2011                         /* use channel group's clip-power table,
2012                          *   but don't exceed channel's max power */
2013                         s8 pwr = min(ch_info->max_power_avg,
2014                                      clip_pwrs[rate_index]);
2015
2016                         pwr_info = &ch_info->power_info[rate_index];
2017
2018                         /* get base (i.e. at factory-measured temperature)
2019                          *    power table index for this rate's power */
2020                         rc = iwl3945_hw_reg_get_matched_power_index(priv, pwr,
2021                                                          ch_info->group_index,
2022                                                          &power_idx);
2023                         if (rc) {
2024                                 IWL_ERROR("Invalid power index\n");
2025                                 return rc;
2026                         }
2027                         pwr_info->base_power_index = (u8) power_idx;
2028
2029                         /* temperature compensate */
2030                         power_idx += delta_index;
2031
2032                         /* stay within range of gain table */
2033                         power_idx = iwl3945_hw_reg_fix_power_index(power_idx);
2034
2035                         /* fill 1 OFDM rate's iwl3945_channel_power_info struct */
2036                         pwr_info->requested_power = pwr;
2037                         pwr_info->power_table_index = (u8) power_idx;
2038                         pwr_info->tpc.tx_gain =
2039                             power_gain_table[a_band][power_idx].tx_gain;
2040                         pwr_info->tpc.dsp_atten =
2041                             power_gain_table[a_band][power_idx].dsp_atten;
2042                 }
2043
2044                 /* set tx power for CCK rates, based on OFDM 12 Mbit settings*/
2045                 pwr_info = &ch_info->power_info[IWL_RATE_12M_INDEX_TABLE];
2046                 power = pwr_info->requested_power +
2047                         IWL_CCK_FROM_OFDM_POWER_DIFF;
2048                 pwr_index = pwr_info->power_table_index +
2049                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2050                 base_pwr_index = pwr_info->base_power_index +
2051                         IWL_CCK_FROM_OFDM_INDEX_DIFF;
2052
2053                 /* stay within table range */
2054                 pwr_index = iwl3945_hw_reg_fix_power_index(pwr_index);
2055                 gain = power_gain_table[a_band][pwr_index].tx_gain;
2056                 dsp_atten = power_gain_table[a_band][pwr_index].dsp_atten;
2057
2058                 /* fill each CCK rate's iwl3945_channel_power_info structure
2059                  * NOTE:  All CCK-rate Txpwrs are the same for a given chnl!
2060                  * NOTE:  CCK rates start at end of OFDM rates! */
2061                 for (rate_index = 0;
2062                      rate_index < IWL_CCK_RATES; rate_index++) {
2063                         pwr_info = &ch_info->power_info[rate_index+IWL_OFDM_RATES];
2064                         pwr_info->requested_power = power;
2065                         pwr_info->power_table_index = pwr_index;
2066                         pwr_info->base_power_index = base_pwr_index;
2067                         pwr_info->tpc.tx_gain = gain;
2068                         pwr_info->tpc.dsp_atten = dsp_atten;
2069                 }
2070
2071                 /* set scan tx power, 1Mbit for CCK, 6Mbit for OFDM */
2072                 for (scan_tbl_index = 0;
2073                      scan_tbl_index < IWL_NUM_SCAN_RATES; scan_tbl_index++) {
2074                         s32 actual_index = (scan_tbl_index == 0) ?
2075                                 IWL_RATE_1M_INDEX_TABLE : IWL_RATE_6M_INDEX_TABLE;
2076                         iwl3945_hw_reg_set_scan_power(priv, scan_tbl_index,
2077                                 actual_index, clip_pwrs, ch_info, a_band);
2078                 }
2079         }
2080
2081         return 0;
2082 }
2083
2084 int iwl3945_hw_rxq_stop(struct iwl3945_priv *priv)
2085 {
2086         int rc;
2087         unsigned long flags;
2088
2089         spin_lock_irqsave(&priv->lock, flags);
2090         rc = iwl3945_grab_nic_access(priv);
2091         if (rc) {
2092                 spin_unlock_irqrestore(&priv->lock, flags);
2093                 return rc;
2094         }
2095
2096         iwl3945_write_direct32(priv, FH_RCSR_CONFIG(0), 0);
2097         rc = iwl3945_poll_direct_bit(priv, FH_RSSR_STATUS, (1 << 24), 1000);
2098         if (rc < 0)
2099                 IWL_ERROR("Can't stop Rx DMA.\n");
2100
2101         iwl3945_release_nic_access(priv);
2102         spin_unlock_irqrestore(&priv->lock, flags);
2103
2104         return 0;
2105 }
2106
2107 int iwl3945_hw_tx_queue_init(struct iwl3945_priv *priv, struct iwl3945_tx_queue *txq)
2108 {
2109         int rc;
2110         unsigned long flags;
2111         int txq_id = txq->q.id;
2112
2113         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2114
2115         shared_data->tx_base_ptr[txq_id] = cpu_to_le32((u32)txq->q.dma_addr);
2116
2117         spin_lock_irqsave(&priv->lock, flags);
2118         rc = iwl3945_grab_nic_access(priv);
2119         if (rc) {
2120                 spin_unlock_irqrestore(&priv->lock, flags);
2121                 return rc;
2122         }
2123         iwl3945_write_direct32(priv, FH_CBCC_CTRL(txq_id), 0);
2124         iwl3945_write_direct32(priv, FH_CBCC_BASE(txq_id), 0);
2125
2126         iwl3945_write_direct32(priv, FH_TCSR_CONFIG(txq_id),
2127                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_RTC_NOINT |
2128                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_MSG_MODE_TXF |
2129                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_CIRQ_HOST_IFTFD |
2130                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL |
2131                 ALM_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE);
2132         iwl3945_release_nic_access(priv);
2133
2134         /* fake read to flush all prev. writes */
2135         iwl3945_read32(priv, FH_TSSR_CBB_BASE);
2136         spin_unlock_irqrestore(&priv->lock, flags);
2137
2138         return 0;
2139 }
2140
2141 int iwl3945_hw_get_rx_read(struct iwl3945_priv *priv)
2142 {
2143         struct iwl3945_shared *shared_data = priv->hw_setting.shared_virt;
2144
2145         return le32_to_cpu(shared_data->rx_read_ptr[0]);
2146 }
2147
2148 /**
2149  * iwl3945_init_hw_rate_table - Initialize the hardware rate fallback table
2150  */
2151 int iwl3945_init_hw_rate_table(struct iwl3945_priv *priv)
2152 {
2153         int rc, i, index, prev_index;
2154         struct iwl3945_rate_scaling_cmd rate_cmd = {
2155                 .reserved = {0, 0, 0},
2156         };
2157         struct iwl3945_rate_scaling_info *table = rate_cmd.table;
2158
2159         for (i = 0; i < ARRAY_SIZE(iwl3945_rates); i++) {
2160                 index = iwl3945_rates[i].table_rs_index;
2161
2162                 table[index].rate_n_flags =
2163                         iwl3945_hw_set_rate_n_flags(iwl3945_rates[i].plcp, 0);
2164                 table[index].try_cnt = priv->retry_rate;
2165                 prev_index = iwl3945_get_prev_ieee_rate(i);
2166                 table[index].next_rate_index = iwl3945_rates[prev_index].table_rs_index;
2167         }
2168
2169         switch (priv->phymode) {
2170         case MODE_IEEE80211A:
2171                 IWL_DEBUG_RATE("Select A mode rate scale\n");
2172                 /* If one of the following CCK rates is used,
2173                  * have it fall back to the 6M OFDM rate */
2174                 for (i = IWL_RATE_1M_INDEX_TABLE; i <= IWL_RATE_11M_INDEX_TABLE; i++)
2175                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2176
2177                 /* Don't fall back to CCK rates */
2178                 table[IWL_RATE_12M_INDEX_TABLE].next_rate_index = IWL_RATE_9M_INDEX_TABLE;
2179
2180                 /* Don't drop out of OFDM rates */
2181                 table[IWL_RATE_6M_INDEX_TABLE].next_rate_index =
2182                     iwl3945_rates[IWL_FIRST_OFDM_RATE].table_rs_index;
2183                 break;
2184
2185         case MODE_IEEE80211B:
2186                 IWL_DEBUG_RATE("Select B mode rate scale\n");
2187                 /* If an OFDM rate is used, have it fall back to the
2188                  * 1M CCK rates */
2189                 for (i = IWL_RATE_6M_INDEX_TABLE; i <= IWL_RATE_54M_INDEX_TABLE; i++)
2190                         table[i].next_rate_index = iwl3945_rates[IWL_FIRST_CCK_RATE].table_rs_index;
2191
2192                 /* CCK shouldn't fall back to OFDM... */
2193                 table[IWL_RATE_11M_INDEX_TABLE].next_rate_index = IWL_RATE_5M_INDEX_TABLE;
2194                 break;
2195
2196         default:
2197                 IWL_DEBUG_RATE("Select G mode rate scale\n");
2198                 break;
2199         }
2200
2201         /* Update the rate scaling for control frame Tx */
2202         rate_cmd.table_id = 0;
2203         rc = iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2204                               &rate_cmd);
2205         if (rc)
2206                 return rc;
2207
2208         /* Update the rate scaling for data frame Tx */
2209         rate_cmd.table_id = 1;
2210         return iwl3945_send_cmd_pdu(priv, REPLY_RATE_SCALE, sizeof(rate_cmd),
2211                                 &rate_cmd);
2212 }
2213
2214 /* Called when initializing driver */
2215 int iwl3945_hw_set_hw_setting(struct iwl3945_priv *priv)
2216 {
2217         memset((void *)&priv->hw_setting, 0,
2218                sizeof(struct iwl3945_driver_hw_info));
2219
2220         priv->hw_setting.shared_virt =
2221             pci_alloc_consistent(priv->pci_dev,
2222                                  sizeof(struct iwl3945_shared),
2223                                  &priv->hw_setting.shared_phys);
2224
2225         if (!priv->hw_setting.shared_virt) {
2226                 IWL_ERROR("failed to allocate pci memory\n");
2227                 mutex_unlock(&priv->mutex);
2228                 return -ENOMEM;
2229         }
2230
2231         priv->hw_setting.ac_queue_count = AC_NUM;
2232         priv->hw_setting.rx_buffer_size = IWL_RX_BUF_SIZE;
2233         priv->hw_setting.tx_cmd_len = sizeof(struct iwl3945_tx_cmd);
2234         priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
2235         priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
2236         priv->hw_setting.max_stations = IWL3945_STATION_COUNT;
2237         priv->hw_setting.bcast_sta_id = IWL3945_BROADCAST_ID;
2238         return 0;
2239 }
2240
2241 unsigned int iwl3945_hw_get_beacon_cmd(struct iwl3945_priv *priv,
2242                           struct iwl3945_frame *frame, u8 rate)
2243 {
2244         struct iwl3945_tx_beacon_cmd *tx_beacon_cmd;
2245         unsigned int frame_size;
2246
2247         tx_beacon_cmd = (struct iwl3945_tx_beacon_cmd *)&frame->u;
2248         memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
2249
2250         tx_beacon_cmd->tx.sta_id = IWL3945_BROADCAST_ID;
2251         tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2252
2253         frame_size = iwl3945_fill_beacon_frame(priv,
2254                                 tx_beacon_cmd->frame,
2255                                 iwl3945_broadcast_addr,
2256                                 sizeof(frame->u) - sizeof(*tx_beacon_cmd));
2257
2258         BUG_ON(frame_size > MAX_MPDU_SIZE);
2259         tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
2260
2261         tx_beacon_cmd->tx.rate = rate;
2262         tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
2263                                       TX_CMD_FLG_TSF_MSK);
2264
2265         /* supp_rates[0] == OFDM start at IWL_FIRST_OFDM_RATE*/
2266         tx_beacon_cmd->tx.supp_rates[0] =
2267                 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
2268
2269         tx_beacon_cmd->tx.supp_rates[1] =
2270                 (IWL_CCK_BASIC_RATES_MASK & 0xF);
2271
2272         return (sizeof(struct iwl3945_tx_beacon_cmd) + frame_size);
2273 }
2274
2275 void iwl3945_hw_rx_handler_setup(struct iwl3945_priv *priv)
2276 {
2277         priv->rx_handlers[REPLY_3945_RX] = iwl3945_rx_reply_rx;
2278 }
2279
2280 void iwl3945_hw_setup_deferred_work(struct iwl3945_priv *priv)
2281 {
2282         INIT_DELAYED_WORK(&priv->thermal_periodic,
2283                           iwl3945_bg_reg_txpower_periodic);
2284 }
2285
2286 void iwl3945_hw_cancel_deferred_work(struct iwl3945_priv *priv)
2287 {
2288         cancel_delayed_work(&priv->thermal_periodic);
2289 }
2290
2291 struct pci_device_id iwl3945_hw_card_ids[] = {
2292         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4222)},
2293         {PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x4227)},
2294         {0}
2295 };
2296
2297 /*
2298  * Clear the OWNER_MSK, to establish driver (instead of uCode running on
2299  * embedded controller) as EEPROM reader; each read is a series of pulses
2300  * to/from the EEPROM chip, not a single event, so even reads could conflict
2301  * if they weren't arbitrated by some ownership mechanism.  Here, the driver
2302  * simply claims ownership, which should be safe when this function is called
2303  * (i.e. before loading uCode!).
2304  */
2305 inline int iwl3945_eeprom_acquire_semaphore(struct iwl3945_priv *priv)
2306 {
2307         _iwl3945_clear_bit(priv, CSR_EEPROM_GP, CSR_EEPROM_GP_IF_OWNER_MSK);
2308         return 0;
2309 }
2310
2311 MODULE_DEVICE_TABLE(pci, iwl3945_hw_card_ids);