2 * arch/s390/kernel/head31.S
4 * Copyright (C) IBM Corp. 2005,2006
6 * Author(s): Hartmut Penner <hp@de.ibm.com>
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>
8 * Rob van der Heij <rvdhei@iae.nl>
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
14 # startup-code at 0x10000, running in absolute addressing mode
15 # this is called either by the ipl loader or directly by PSW restart
16 # or linload or SALIPL
19 startup:basr %r13,0 # get base
20 .LPG0: l %r13,0f-.LPG0(%r13)
22 0: .long startup_continue
25 # params at 10400 (setup.h)
28 .long 0,0 # IPL_DEVICE
29 .long 0,0 # INITRD_START
30 .long 0,0 # INITRD_SIZE
33 .byte "root=/dev/ram0 ro"
39 basr %r13,0 # get base
40 .LPG1: mvi __LC_AR_MODE_ID,0 # set ESA flag (mode 0)
41 lctl %c0,%c15,.Lctl-.LPG1(%r13) # load control registers
42 l %r12,.Lparmaddr-.LPG1(%r13) # pointer to parameter area
43 # move IPL device to lowcore
44 mvc __LC_IPLDEV(4),IPL_DEVICE-PARMAREA(%r12)
48 l %r15,.Linittu-.LPG1(%r13)
49 mvc __LC_CURRENT(4),__TI_task(%r15)
50 ahi %r15,1<<(PAGE_SHIFT+THREAD_ORDER) # init_task_union+THREAD_SIZE
51 st %r15,__LC_KERNEL_STACK # set end of kernel stack
53 xc __SF_BACKCHAIN(4,%r15),__SF_BACKCHAIN(%r15) # clear backchain
55 l %r14,.Lipl_save_parameters-.LPG1(%r13)
60 l %r2,.Lbss_bgn-.LPG1(%r13) # start of bss
61 l %r3,.Lbss_end-.LPG1(%r13) # end of bss
62 sr %r3,%r2 # length of bss
64 sr %r5,%r5 # set src,length and pad to zero
66 mvcle %r2,%r4,0 # clear mem
67 jo .-4 # branch back, if not finish
69 l %r2,.Lrcp-.LPG1(%r13) # Read SCP forced command word
71 stosm .Lpmask-.LPG1(%r13),0x01 # authorize ext interrupts
73 stctl %r0, %r0,.Lcr-.LPG1(%r13) # get cr0
74 la %r1,0x200 # set bit 22
75 o %r1,.Lcr-.LPG1(%r13) # or old cr0 with r1
76 st %r1,.Lcr-.LPG1(%r13)
77 lctl %r0, %r0,.Lcr-.LPG1(%r13) # load modified cr0
79 mvc __LC_EXT_NEW_PSW(8),.Lpcext-.LPG1(%r13) # set postcall psw
80 la %r1, .Lsclph-.LPG1(%r13)
81 a %r1,__LC_EXT_NEW_PSW+4 # set handler
82 st %r1,__LC_EXT_NEW_PSW+4
84 l %r4,.Lsccbaddr-.LPG1(%r13) # %r4 is our index for sccb stuff
86 .insn rre,0xb2200000,%r2,%r1 # service call
88 srl %r1,28 # get cc code
91 be .Lfchunk-.LPG1(%r13) # leave
93 be .Lservicecall-.LPG1(%r13)
94 lpsw .Lwaitsclp-.LPG1(%r13)
96 lh %r1,.Lsccbr-.Lsccb(%r4)
97 chi %r1,0x10 # 0x0010 is the sucess code
98 je .Lprocsccb # let's process the sccb
100 bne .Lfchunk-.LPG1(%r13) # unhandled error code
101 c %r2, .Lrcp-.LPG1(%r13) # Did we try Read SCP forced
102 bne .Lfchunk-.LPG1(%r13) # if no, give up
103 l %r2, .Lrcp2-.LPG1(%r13) # try with Read SCP
104 b .Lservicecall-.LPG1(%r13)
107 icm %r1,3,.Lscpincr1-.Lsccb(%r4) # use this one if != 0
109 lhi %r1,0x800 # otherwise report 2GB
111 lhi %r3,0x800 # limit reported memory size to 2GB
116 xr %r3,%r3 # same logic
117 ic %r3,.Lscpa1-.Lsccb(%r4)
120 l %r3,.Lscpa2-.Lsccb(%r4)
122 mr %r2,%r1 # mem in MB on 128-bit
123 l %r1,.Lonemb-.LPG1(%r13)
124 mr %r2,%r1 # mem size in bytes in %r3
125 b .Lfchunk-.LPG1(%r13)
128 .Lipl_save_parameters:
129 .long ipl_save_parameters
131 .long init_thread_union
135 .Lpcext:.long 0x00080000,0x80000000
137 .long 0x00 # place holder for cr0
139 .long 0x010a0000,0x80000000 + .Lsclph
141 .int 0x00120001 # Read SCP forced code
143 .int 0x00020001 # Read SCP code
149 # find memory chunks.
151 lr %r9,%r3 # end of mem
152 mvc __LC_PGM_NEW_PSW(8),.Lpcmem-.LPG1(%r13)
153 la %r1,1 # test in increments of 128KB
155 l %r3,.Lmchunk-.LPG1(%r13) # get pointer to memory_chunk array
156 slr %r4,%r4 # set start of chunk to zero
157 slr %r5,%r5 # set end of chunk to zero
158 slr %r6,%r6 # set access code to zero
159 la %r10, MEMORY_CHUNKS # number of chunks
161 tprot 0(%r5),0 # test protection of first byte
164 clr %r6,%r7 # compare cc with last access code
165 be .Lsame-.LPG1(%r13)
166 b .Lchkmem-.LPG1(%r13)
168 ar %r5,%r1 # add 128KB to end of chunk
169 bno .Lloop-.LPG1(%r13) # r1 < 0x80000000 -> loop
170 .Lchkmem: # > 2GB or tprot got a program check
171 clr %r4,%r5 # chunk size > 0?
172 be .Lchkloop-.LPG1(%r13)
173 st %r4,0(%r3) # store start address of chunk
176 st %r0,4(%r3) # store size of chunk
177 st %r6,8(%r3) # store type of chunk
179 l %r4,.Lmemsize-.LPG1(%r13) # address of variable memory_size
180 st %r5,0(%r4) # store last end to memory size
181 ahi %r10,-1 # update chunk number
183 lr %r6,%r7 # set access code to last cc
184 # we got an exception or we're starting a new
185 # chunk , we must check if we should
186 # still try to find valid memory (if we detected
187 # the amount of available storage), and if we
190 clr %r0,%r9 # did we detect memory?
191 je .Ldonemem # if not, leave
192 chi %r10,0 # do we have chunks left?
194 alr %r5,%r1 # add 128KB to end of chunk
195 lr %r4,%r5 # potential new chunk
196 clr %r5,%r9 # should we go on?
199 l %r12,.Lmflags-.LPG1(%r13) # get address of machine_flags
201 # find out if we are running under VM
203 stidp __LC_CPUID # store cpuid
204 tm __LC_CPUID,0xff # running under VM ?
205 bno .Lnovm-.LPG1(%r13)
206 oi 3(%r12),1 # set VM flag
208 lh %r0,__LC_CPUID+4 # get cpu version
209 chi %r0,0x7490 # running on a P/390 ?
210 bne .Lnop390-.LPG1(%r13)
211 oi 3(%r12),4 # set P/390 flag
215 # find out if we have an IEEE fpu
217 mvc __LC_PGM_NEW_PSW(8),.Lpcfpu-.LPG1(%r13)
218 efpc %r0,0 # test IEEE extract fpc instruction
219 oi 3(%r12),2 # set IEEE fpu flag
223 # find out if we have the CSP instruction
225 mvc __LC_PGM_NEW_PSW(8),.Lpccsp-.LPG1(%r13)
229 csp %r0,%r2 # Test CSP instruction
230 oi 3(%r12),8 # set CSP flag
234 # find out if we have the MVPG instruction
236 mvc __LC_PGM_NEW_PSW(8),.Lpcmvpg-.LPG1(%r13)
240 mvpg %r1,%r2 # Test CSP instruction
241 oi 3(%r12),16 # set MVPG flag
245 # find out if we have the IDTE instruction
247 mvc __LC_PGM_NEW_PSW(8),.Lpcidte-.LPG1(%r13)
248 .long 0xb2b10000 # store facility list
249 tm 0xc8,0x08 # check bit for clearing-by-ASCE
250 bno .Lchkidte-.LPG1(%r13)
254 oi 3(%r12),0x80 # set IDTE flag
257 lpsw .Lentry-.LPG1(13) # jump to _stext in primary-space,
258 # virtual and never return ...
260 .Lentry:.long 0x00080000,0x80000000 + _stext
261 .Lctl: .long 0x04b50002 # cr0: various things
262 .long 0 # cr1: primary space segment table
263 .long .Lduct # cr2: dispatchable unit control table
264 .long 0 # cr3: instruction authorization
265 .long 0 # cr4: instruction authorization
266 .long 0xffffffff # cr5: primary-aste origin
267 .long 0 # cr6: I/O interrupts
268 .long 0 # cr7: secondary space segment table
269 .long 0 # cr8: access registers translation
270 .long 0 # cr9: tracing off
271 .long 0 # cr10: tracing off
272 .long 0 # cr11: tracing off
273 .long 0 # cr12: tracing off
274 .long 0 # cr13: home space segment table
275 .long 0xc0000000 # cr14: machine check handling off
276 .long 0 # cr15: linkage stack operations
277 .Lduct: .long 0,0,0,0,0,0,0,0
278 .long 0,0,0,0,0,0,0,0
279 .Lpcmem:.long 0x00080000,0x80000000 + .Lchkmem
280 .Lpcfpu:.long 0x00080000,0x80000000 + .Lchkfpu
281 .Lpccsp:.long 0x00080000,0x80000000 + .Lchkcsp
282 .Lpcmvpg:.long 0x00080000,0x80000000 + .Lchkmvpg
283 .Lpcidte:.long 0x00080000,0x80000000 + .Lchkidte
284 .Lmemsize:.long memory_size
285 .Lmchunk:.long memory_chunk
286 .Lmflags:.long machine_flags
287 .Lbss_bgn: .long __bss_start
288 .Lbss_end: .long _end
289 .Lparmaddr: .long PARMAREA
290 .Lsccbaddr: .long .Lsccb
306 .globl s390_readinfo_sccb
309 .hword 0x1000 # length, one page
311 .byte 0x80 # variable response bit set
313 .hword 0x00 # response code
326 #ifdef CONFIG_SHARED_KERNEL
331 # startup-code, running in absolute addressing mode
334 _stext: basr %r13,0 # get base
336 # check control registers
337 stctl %c0,%c15,0(%r15)
338 oi 2(%r15),0x40 # enable sigp emergency signal
339 oi 0(%r15),0x10 # switch on low address protection
340 lctl %c0,%c15,0(%r15)
343 lam 0,15,.Laregs-.LPG3(%r13) # load access regs needed by uaccess
344 l %r14,.Lstart-.LPG3(%r13)
345 basr %r14,%r14 # call start_kernel
347 # We returned from start_kernel ?!? PANIK
350 lpsw .Ldw-.(%r13) # load disabled wait psw
353 .Ldw: .long 0x000a0000,0x00000000
354 .Lstart:.long start_kernel
355 .Laregs:.long 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0