2 * Motorola ECC prpmc280/f101 & prpmc2800/f101e platform code.
4 * Author: Mark A. Greer <mgreer@mvista.com>
6 * 2007 (c) MontaVista, Software, Inc. This file is licensed under
7 * the terms of the GNU General Public License version 2. This program
8 * is licensed "as is" without any warranty of any kind, whether express
21 #include "gunzip_util.h"
27 #define MHz (1000U*1000U)
28 #define GHz (1000U*MHz)
30 #define BOARD_MODEL "PrPMC2800"
31 #define BOARD_MODEL_MAX 32 /* max strlen(BOARD_MODEL) + 1 */
33 #define EEPROM2_ADDR 0xa4
34 #define EEPROM3_ADDR 0xa8
38 static u8 *bridge_base;
42 BOARD_MODEL_PRPMC2800,
43 } prpmc2800_board_model;
48 } prpmc2800_bridge_type;
50 struct prpmc2800_board_info {
51 prpmc2800_board_model model;
53 prpmc2800_bridge_type bridge_type;
64 static struct prpmc2800_board_info prpmc2800_board_info[] = {
66 .model = BOARD_MODEL_PRPMC280,
68 .bridge_type = BRIDGE_TYPE_MV64360,
79 .model = BOARD_MODEL_PRPMC280,
81 .bridge_type = BRIDGE_TYPE_MV64362,
92 .model = BOARD_MODEL_PRPMC280,
94 .bridge_type = BRIDGE_TYPE_MV64360,
99 .core_speed = 733*MHz,
105 .model = BOARD_MODEL_PRPMC280,
107 .bridge_type = BRIDGE_TYPE_MV64360,
118 .model = BOARD_MODEL_PRPMC280,
120 .bridge_type = BRIDGE_TYPE_MV64360,
131 .model = BOARD_MODEL_PRPMC280,
133 .bridge_type = BRIDGE_TYPE_MV64362,
138 .core_speed = 733*MHz,
144 .model = BOARD_MODEL_PRPMC280,
146 .bridge_type = BRIDGE_TYPE_MV64360,
157 .model = BOARD_MODEL_PRPMC280,
159 .bridge_type = BRIDGE_TYPE_MV64360,
170 .model = BOARD_MODEL_PRPMC2800,
172 .bridge_type = BRIDGE_TYPE_MV64360,
183 .model = BOARD_MODEL_PRPMC2800,
185 .bridge_type = BRIDGE_TYPE_MV64362,
196 .model = BOARD_MODEL_PRPMC2800,
198 .bridge_type = BRIDGE_TYPE_MV64360,
203 .core_speed = 733*MHz,
209 .model = BOARD_MODEL_PRPMC2800,
211 .bridge_type = BRIDGE_TYPE_MV64360,
222 .model = BOARD_MODEL_PRPMC2800,
224 .bridge_type = BRIDGE_TYPE_MV64360,
235 .model = BOARD_MODEL_PRPMC2800,
237 .bridge_type = BRIDGE_TYPE_MV64362,
242 .core_speed = 733*MHz,
248 .model = BOARD_MODEL_PRPMC2800,
250 .bridge_type = BRIDGE_TYPE_MV64360,
261 .model = BOARD_MODEL_PRPMC2800,
263 .bridge_type = BRIDGE_TYPE_MV64360,
268 .core_speed = 733*MHz,
275 static struct prpmc2800_board_info *prpmc2800_get_board_info(u8 *vpd)
277 struct prpmc2800_board_info *bip;
280 for (i=0,bip=prpmc2800_board_info; i<ARRAY_SIZE(prpmc2800_board_info);
282 if ((vpd[0] == bip->subsys0) && (vpd[1] == bip->subsys1)
283 && ((vpd[4] & bip->vpd4_mask) == bip->vpd4))
289 /* Get VPD from i2c eeprom 2, then match it to a board info entry */
290 static struct prpmc2800_board_info *prpmc2800_get_bip(void)
292 struct prpmc2800_board_info *bip;
296 if (mv64x60_i2c_open())
297 fatal("Error: Can't open i2c device\n\r");
299 /* Get VPD from i2c eeprom-2 */
300 memset(vpd, 0, sizeof(vpd));
301 rc = mv64x60_i2c_read(EEPROM2_ADDR, vpd, 0x1fde, 2, sizeof(vpd));
303 fatal("Error: Couldn't read eeprom2\n\r");
306 /* Get board type & related info */
307 bip = prpmc2800_get_board_info(vpd);
309 printf("Error: Unsupported board or corrupted VPD:\n\r");
310 printf(" 0x%x 0x%x 0x%x 0x%x 0x%x\n\r",
311 vpd[0], vpd[1], vpd[2], vpd[3], vpd[4]);
312 printf("Using device tree defaults...\n\r");
318 static void prpmc2800_bridge_setup(u32 mem_size)
320 u32 i, v[12], enables, acc_bits;
321 u32 pci_base_hi, pci_base_lo, size, buf[2];
322 unsigned long cpu_base;
325 u8 *bridge_pbase, is_coherent;
326 struct mv64x60_cpu2pci_win *tbl;
328 bridge_pbase = mv64x60_get_bridge_pbase();
329 is_coherent = mv64x60_is_coherent();
332 acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB
333 | MV64x60_PCI_ACC_CNTL_SWAP_NONE
334 | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES
335 | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES;
337 acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE
338 | MV64x60_PCI_ACC_CNTL_SWAP_NONE
339 | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES
340 | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES;
342 mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent);
343 mv64x60_config_pci_windows(bridge_base, bridge_pbase, 0, 0, mem_size,
346 /* Get the cpu -> pci i/o & mem mappings from the device tree */
347 devp = finddevice("/mv64x60/pci@80000000");
349 fatal("Error: Missing /mv64x60/pci@80000000"
350 " device tree node\n\r");
352 rc = getprop(devp, "ranges", v, sizeof(v));
354 fatal("Error: Can't find /mv64x60/pci@80000000/ranges"
357 /* Get the cpu -> pci i/o & mem mappings from the device tree */
358 devp = finddevice("/mv64x60");
360 fatal("Error: Missing /mv64x60 device tree node\n\r");
362 enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE));
363 enables |= 0x0007fe00; /* Disable all cpu->pci windows */
364 out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
366 for (i=0; i<12; i+=6) {
367 switch (v[i] & 0xff000000) {
368 case 0x01000000: /* PCI I/O Space */
369 tbl = mv64x60_cpu2pci_io;
371 case 0x02000000: /* PCI MEM Space */
372 tbl = mv64x60_cpu2pci_mem;
378 pci_base_hi = v[i+1];
379 pci_base_lo = v[i+2];
386 if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base))
387 fatal("Error: Can't translate PCI address 0x%x\n\r",
390 mv64x60_config_cpu2pci_window(bridge_base, 0, pci_base_hi,
391 pci_base_lo, cpu_base, size, tbl);
394 enables &= ~0x00000600; /* Enable cpu->pci0 i/o, cpu->pci0 mem0 */
395 out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
398 static void prpmc2800_fixups(void)
400 u32 v[2], l, mem_size;
403 char model[BOARD_MODEL_MAX];
404 struct prpmc2800_board_info *bip;
406 bip = prpmc2800_get_bip(); /* Get board info based on VPD */
408 mem_size = (bip) ? bip->mem_size : mv64x60_get_mem_size(bridge_base);
409 prpmc2800_bridge_setup(mem_size); /* Do necessary bridge setup */
411 /* If the VPD doesn't match what we know about, just use the
412 * defaults already in the device tree.
417 /* Know the board type so override device tree defaults */
418 /* Set /model appropriately */
419 devp = finddevice("/");
421 fatal("Error: Missing '/' device tree node\n\r");
422 memset(model, 0, BOARD_MODEL_MAX);
423 strncpy(model, BOARD_MODEL, BOARD_MODEL_MAX - 2);
425 if (bip->model == BOARD_MODEL_PRPMC280)
427 model[l++] = bip->variant;
429 setprop(devp, "model", model, l);
431 /* Set /cpus/PowerPC,7447/clock-frequency */
432 devp = finddevice("/cpus/PowerPC,7447");
434 fatal("Error: Missing proper /cpus device tree node\n\r");
435 v[0] = bip->core_speed;
436 setprop(devp, "clock-frequency", &v[0], sizeof(v[0]));
438 /* Set /memory/reg size */
439 devp = finddevice("/memory");
441 fatal("Error: Missing /memory device tree node\n\r");
443 v[1] = bip->mem_size;
444 setprop(devp, "reg", v, sizeof(v));
446 /* Update /mv64x60/model, if this is a mv64362 */
447 if (bip->bridge_type == BRIDGE_TYPE_MV64362) {
448 devp = finddevice("/mv64x60");
450 fatal("Error: Missing /mv64x60 device tree node\n\r");
451 setprop(devp, "model", "mv64362", strlen("mv64362") + 1);
454 /* Set User FLASH size */
455 devp = finddevice("/mv64x60/flash@a0000000");
457 fatal("Error: Missing User FLASH device tree node\n\r");
458 rc = getprop(devp, "reg", v, sizeof(v));
460 fatal("Error: Can't find User FLASH reg property\n\r");
461 v[1] = bip->user_flash;
462 setprop(devp, "reg", v, sizeof(v));
465 #define MV64x60_MPP_CNTL_0 0xf000
466 #define MV64x60_MPP_CNTL_2 0xf008
467 #define MV64x60_GPP_IO_CNTL 0xf100
468 #define MV64x60_GPP_LEVEL_CNTL 0xf110
469 #define MV64x60_GPP_VALUE_SET 0xf118
471 static void prpmc2800_reset(void)
477 if (bridge_base != 0) {
478 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0));
480 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp);
482 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
484 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
486 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
488 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
490 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2));
492 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp);
494 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
496 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
498 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
500 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
502 out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET),
509 #define HEAP_SIZE (16*MB)
510 static struct gunzip_state gzstate;
512 void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
513 unsigned long r6, unsigned long r7)
516 char *heap_start, *dtb;
517 int dt_size = _dtb_end - _dtb_start;
518 void *vmlinuz_addr = _vmlinux_start;
519 unsigned long vmlinuz_size = _vmlinux_end - _vmlinux_start;
522 if (dt_size <= 0) /* No fdt */
526 * Start heap after end of the kernel (after decompressed to
527 * address 0) or the end of the zImage, whichever is higher.
528 * That's so things allocated by simple_alloc won't overwrite
529 * any part of the zImage and the kernel won't overwrite the dtb
530 * when decompressed & relocated.
532 gunzip_start(&gzstate, vmlinuz_addr, vmlinuz_size);
533 gunzip_exactly(&gzstate, elfheader, sizeof(elfheader));
535 if (!parse_elf32(elfheader, &ei))
538 heap_start = (char *)(ei.memsize + ei.elfoffset); /* end of kernel*/
539 heap_start = max(heap_start, (char *)_end); /* end of zImage */
541 if ((unsigned)simple_alloc_init(heap_start, HEAP_SIZE, 2*KB, 16)
545 /* Relocate dtb to safe area past end of zImage & kernel */
546 dtb = malloc(dt_size);
549 memmove(dtb, _dtb_start, dt_size);
552 bridge_base = mv64x60_get_bridge_base();
554 platform_ops.fixups = prpmc2800_fixups;
555 platform_ops.exit = prpmc2800_reset;
557 if (serial_console_init() < 0)
561 /* _zimage_start called very early--need to turn off external interrupts */
562 asm (" .globl _zimage_start\n\
565 rlwinm 10,10,0,~(1<<15) /* Clear MSR_EE */\n\
569 b _zimage_start_lib\n\