2 * linux/arch/i386/kernel/head.S -- the 32-bit startup code.
4 * Copyright (C) 1991, 1992 Linus Torvalds
6 * Enhanced CPU detection and feature setting code by Mike Jagdis
7 * and Martin Mares, November 1997.
11 #include <linux/threads.h>
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/segment.h>
16 #include <asm/pgtable.h>
18 #include <asm/cache.h>
19 #include <asm/thread_info.h>
20 #include <asm/asm-offsets.h>
21 #include <asm/setup.h>
24 * References to members of the new_cpu_data structure.
27 #define X86 new_cpu_data+CPUINFO_x86
28 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
29 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
30 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
31 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
32 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
33 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
34 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
37 * This is how much memory *in addition to the memory covered up to
38 * and including _end* we need mapped initially.
40 * - one bit for each possible page, but only in low memory, which means
41 * 2^32/4096/8 = 128K worst case (4G/4G split.)
42 * - enough space to map all low memory, which means
43 * (2^32/4096) / 1024 pages (worst case, non PAE)
44 * (2^32/4096) / 512 + 4 pages (worst case for PAE)
45 * - a few pages for allocator use before the kernel pagetable has
48 * Modulo rounding, each megabyte assigned here requires a kilobyte of
49 * memory, which is currently unreclaimed.
51 * This should be a multiple of a page.
53 LOW_PAGES = 1<<(32-PAGE_SHIFT_asm)
56 * To preserve the DMA pool in PAGEALLOC kernels, we'll allocate
57 * pagetables from above the 16MB DMA limit, so we'll have to set
58 * up pagetables 16MB more (worst-case):
60 #ifdef CONFIG_DEBUG_PAGEALLOC
61 LOW_PAGES = LOW_PAGES + 0x1000000
65 PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PMD) + PTRS_PER_PGD
67 PAGE_TABLE_SIZE = (LOW_PAGES / PTRS_PER_PGD)
69 BOOTBITMAP_SIZE = LOW_PAGES / 8
72 INIT_MAP_BEYOND_END = BOOTBITMAP_SIZE + (PAGE_TABLE_SIZE + ALLOCATOR_SLOP)*PAGE_SIZE_asm
75 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
76 * %esi points to the real-mode code as a 32-bit pointer.
77 * CS and DS must be 4 GB flat segments, but we don't depend on
78 * any particular GDT layout, because we load our own as soon as we
81 .section .text.head,"ax",@progbits
83 /* check to see if KEEP_SEGMENTS flag is meaningful */
84 cmpw $0x207, BP_version(%esi)
87 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
88 us to not reload segments */
89 testb $(1<<6), BP_loadflags(%esi)
93 * Set segments to known values.
95 1: lgdt boot_gdt_descr - __PAGE_OFFSET
96 movl $(__BOOT_DS),%eax
104 * Clear BSS first so that there are no surprises...
108 movl $__bss_start - __PAGE_OFFSET,%edi
109 movl $__bss_stop - __PAGE_OFFSET,%ecx
114 * Copy bootup parameters out of the way.
115 * Note: %esi still has the pointer to the real-mode data.
116 * With the kexec as boot loader, parameter segment might be loaded beyond
117 * kernel image and might not even be addressable by early boot page tables.
118 * (kexec on panic case). Hence copy out the parameters before initializing
121 movl $(boot_params - __PAGE_OFFSET),%edi
122 movl $(PARAM_SIZE/4),%ecx
126 movl boot_params - __PAGE_OFFSET + NEW_CL_POINTER,%esi
128 jz 1f # No comand line
129 movl $(boot_command_line - __PAGE_OFFSET),%edi
130 movl $(COMMAND_LINE_SIZE/4),%ecx
135 #ifdef CONFIG_PARAVIRT
136 cmpw $0x207, (boot_params + BP_version - __PAGE_OFFSET)
139 /* Paravirt-compatible boot parameters. Look to see what architecture
140 we're booting under. */
141 movl (boot_params + BP_hardware_subarch - __PAGE_OFFSET), %eax
142 cmpl $num_subarch_entries, %eax
145 movl subarch_entries - __PAGE_OFFSET(,%eax,4), %eax
146 subl $__PAGE_OFFSET, %eax
152 /* Unknown implementation; there's really
153 nothing we can do at this point. */
159 .long default_entry /* normal x86/PC */
160 .long lguest_entry /* lguest hypervisor */
161 .long xen_entry /* Xen hypervisor */
162 num_subarch_entries = (. - subarch_entries) / 4
164 #endif /* CONFIG_PARAVIRT */
167 * Initialize page tables. This creates a PDE and a set of page
168 * tables, which are located immediately beyond _end. The variable
169 * init_pg_tables_end is set up to point to the first "safe" location.
170 * Mappings are created both at virtual address 0 (identity mapping)
171 * and PAGE_OFFSET for up to _end+sizeof(page tables)+INIT_MAP_BEYOND_END.
173 * Warning: don't use %esi or the stack in this code. However, %esp
174 * can be used as a GPR if you really need it...
176 page_pde_offset = (__PAGE_OFFSET >> 20);
179 movl $(pg0 - __PAGE_OFFSET), %edi
180 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
181 movl $0x007, %eax /* 0x007 = PRESENT+RW+USER */
183 leal 0x007(%edi),%ecx /* Create PDE entry */
184 movl %ecx,(%edx) /* Store identity PDE entry */
185 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
192 /* End condition: we must map up to and including INIT_MAP_BEYOND_END */
193 /* bytes beyond the end of our own page tables; the +0x007 is the attribute bits */
194 leal (INIT_MAP_BEYOND_END+0x007)(%edi),%ebp
197 movl %edi,(init_pg_tables_end - __PAGE_OFFSET)
199 /* Do an early initialization of the fixmap area */
200 movl $(swapper_pg_dir - __PAGE_OFFSET), %edx
201 movl $(swapper_pg_pmd - __PAGE_OFFSET), %eax
202 addl $0x67, %eax /* 0x67 == _PAGE_TABLE */
203 movl %eax, 4092(%edx)
207 * Non-boot CPU entry point; entered from trampoline.S
208 * We can't lgdt here, because lgdt itself uses a data segment, but
209 * we know the trampoline has already loaded the boot_gdt for us.
211 * If cpu hotplug is not supported then this code can go in init section
212 * which will be freed later
215 #ifndef CONFIG_HOTPLUG_CPU
216 .section .init.text,"ax",@progbits
220 ENTRY(startup_32_smp)
222 movl $(__BOOT_DS),%eax
227 #endif /* CONFIG_SMP */
231 * New page tables may be in 4Mbyte page mode and may
232 * be using the global pages.
234 * NOTE! If we are on a 486 we may have no cr4 at all!
235 * So we do not try to touch it unless we really have
236 * some bits in it to set. This won't work if the BSP
237 * implements cr4 but this AP does not -- very unlikely
238 * but be warned! The same applies to the pse feature
239 * if not equally supported. --macro
241 * NOTE! We have to correct for the fact that we're
242 * not yet offset PAGE_OFFSET..
244 #define cr4_bits mmu_cr4_features-__PAGE_OFFSET
248 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
252 btl $5, %eax # check if PAE is enabled
255 /* Check if extended functions are implemented */
256 movl $0x80000000, %eax
258 cmpl $0x80000000, %eax
260 mov $0x80000001, %eax
262 /* Execute Disable bit supported? */
266 /* Setup EFER (Extended Feature Enable Register) */
267 movl $0xc0000080, %ecx
271 /* Make changes effective */
279 movl $swapper_pg_dir-__PAGE_OFFSET,%eax
280 movl %eax,%cr3 /* set the page table pointer.. */
283 movl %eax,%cr0 /* ..and set paging (PG) bit */
284 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
286 /* Set up the stack pointer */
290 * Initialize eflags. Some BIOS's leave bits like NT set. This would
291 * confuse the debugger if this code is traced.
292 * XXX - best to initialize before switching to protected mode.
299 jz 1f /* Initial CPU cleans BSS */
302 #endif /* CONFIG_SMP */
305 * start system 32-bit setup. We need to re-do some of the things done
306 * in 16-bit mode for the "real" operations.
312 movl $-1,X86_CPUID # -1 for no CPUID initially
314 /* check if it is 486 or 386. */
316 * XXX - this does a lot of unnecessary setup. Alignment checks don't
317 * apply at our cpl of 0 and the stack ought to be aligned already, and
318 * we don't need to preserve eflags.
321 movb $3,X86 # at least 386
323 popl %eax # get EFLAGS
324 movl %eax,%ecx # save original EFLAGS
325 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
326 pushl %eax # copy to EFLAGS
328 pushfl # get new EFLAGS
329 popl %eax # put it in eax
330 xorl %ecx,%eax # change in flags
331 pushl %ecx # restore original EFLAGS
333 testl $0x40000,%eax # check if AC bit changed
336 movb $4,X86 # at least 486
337 testl $0x200000,%eax # check if ID bit changed
340 /* get vendor info */
341 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
343 movl %eax,X86_CPUID # save CPUID level
344 movl %ebx,X86_VENDOR_ID # lo 4 chars
345 movl %edx,X86_VENDOR_ID+4 # next 4 chars
346 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
348 orl %eax,%eax # do we have processor info as well?
351 movl $1,%eax # Use the CPUID instruction to get CPU type
353 movb %al,%cl # save reg for future use
354 andb $0x0f,%ah # mask processor family
356 andb $0xf0,%al # mask model
359 andb $0x0f,%cl # mask mask revision
361 movl %edx,X86_CAPABILITY
363 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
366 is386: movl $2,%ecx # set MP
368 andl $0x80000011,%eax # Save PG,PE,ET
375 ljmp $(__KERNEL_CS),$1f
376 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
377 movl %eax,%ss # after changing gdt.
378 movl %eax,%fs # gets reset once there's real percpu
380 movl $(__USER_DS),%eax # DS/ES contains default USER segment
384 xorl %eax,%eax # Clear GS and LDT
388 cld # gcc2 wants the direction flag cleared at all times
389 pushl $0 # fake return address for unwinder
393 cmpb $0,%cl # the first CPU calls start_kernel
395 movl $(__KERNEL_PERCPU), %eax
396 movl %eax,%fs # set this cpu's percpu
397 jmp initialize_secondary # all other CPUs call initialize_secondary
399 #endif /* CONFIG_SMP */
403 * We depend on ET to be correct. This checks for 287/387.
406 movb $0,X86_HARD_MATH
412 movl %cr0,%eax /* no coprocessor: have to set bits */
413 xorl $4,%eax /* set EM */
417 1: movb $1,X86_HARD_MATH
418 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
424 * sets up a idt with 256 entries pointing to
425 * ignore_int, interrupt gates. It doesn't actually load
426 * idt - that can be done only after paging has been enabled
427 * and the kernel moved to PAGE_OFFSET. Interrupts
428 * are enabled elsewhere, when we can be relatively
429 * sure everything is ok.
431 * Warning: %esi is live across this function.
435 movl $(__KERNEL_CS << 16),%eax
436 movw %dx,%ax /* selector = 0x0010 = cs */
437 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
448 .macro set_early_handler handler,trapno
450 movl $(__KERNEL_CS << 16),%eax
452 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
454 movl %eax,8*\trapno(%edi)
455 movl %edx,8*\trapno+4(%edi)
458 set_early_handler handler=early_divide_err,trapno=0
459 set_early_handler handler=early_illegal_opcode,trapno=6
460 set_early_handler handler=early_protection_fault,trapno=13
461 set_early_handler handler=early_page_fault,trapno=14
467 pushl $0 /* fake errcode */
470 early_illegal_opcode:
472 pushl $0 /* fake errcode */
475 early_protection_fault:
487 movl $(__KERNEL_DS),%eax
490 cmpl $2,early_recursion_flag
492 incl early_recursion_flag
495 pushl %edx /* trapno */
497 #ifdef CONFIG_EARLY_PRINTK
508 /* This is the default interrupt "handler" :-) */
518 movl $(__KERNEL_DS),%eax
521 cmpl $2,early_recursion_flag
523 incl early_recursion_flag
529 #ifdef CONFIG_EARLY_PRINTK
545 * Real beginning of normal "text" segment
553 .section ".bss.page_aligned","wa"
555 ENTRY(swapper_pg_dir)
557 ENTRY(swapper_pg_pmd)
559 ENTRY(empty_zero_page)
563 * This starts the data section.
567 .long init_thread_union+THREAD_SIZE
572 early_recursion_flag:
576 .asciz "Unknown interrupt or fault at EIP %p %p %p\n"
580 /* fault info: */ "BUG: Int %d: CR2 %p\n" \
581 /* pusha regs: */ " EDI %p ESI %p EBP %p ESP %p\n" \
582 " EBX %p EDX %p ECX %p EAX %p\n" \
583 /* fault frame: */ " err %p EIP %p CS %p flg %p\n" \
585 "Stack: %p %p %p %p %p %p %p %p\n" \
586 " %p %p %p %p %p %p %p %p\n" \
587 " %p %p %p %p %p %p %p %p\n"
589 #include "../../x86/xen/xen-head.S"
592 * The IDT and GDT 'descriptors' are a strange 48-bit object
593 * only used by the lidt and lgdt instructions. They are not
594 * like usual segment descriptors - they consist of a 16-bit
595 * segment size, and 32-bit linear address value:
598 .globl boot_gdt_descr
602 # early boot GDT descriptor (must use 1:1 address mapping)
603 .word 0 # 32 bit align gdt_desc.address
606 .long boot_gdt - __PAGE_OFFSET
608 .word 0 # 32-bit align idt_desc.address
610 .word IDT_ENTRIES*8-1 # idt contains 256 entries
613 # boot GDT descriptor (later on used by CPU#0):
614 .word 0 # 32 bit align gdt_desc.address
615 ENTRY(early_gdt_descr)
616 .word GDT_ENTRIES*8-1
617 .long per_cpu__gdt_page /* Overwritten for secondary CPUs */
620 * The boot_gdt must mirror the equivalent in setup.S and is
621 * used only for booting.
623 .align L1_CACHE_BYTES
625 .fill GDT_ENTRY_BOOT_CS,8,0
626 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
627 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */