1 /* cpwd.c - driver implementation for hardware watchdog
2 * timers found on Sun Microsystems CP1400 and CP1500 boards.
4 * This device supports both the generic Linux watchdog
5 * interface and Solaris-compatible ioctls as best it is
8 * NOTE: CP1400 systems appear to have a defective intr_mask
9 * register on the PLD, preventing the disabling of
10 * timer interrupts. We use a timer to periodically
11 * reset 'stopped' watchdogs on affected platforms.
13 * Copyright (c) 2000 Eric Brower (ebrower@usa.net)
14 * Copyright (C) 2008 David S. Miller <davem@davemloft.net>
17 #include <linux/kernel.h>
18 #include <linux/module.h>
20 #include <linux/errno.h>
21 #include <linux/major.h>
22 #include <linux/init.h>
23 #include <linux/miscdevice.h>
24 #include <linux/interrupt.h>
25 #include <linux/ioport.h>
26 #include <linux/timer.h>
27 #include <linux/smp_lock.h>
30 #include <linux/of_device.h>
31 #include <linux/uaccess.h>
34 #include <asm/watchdog.h>
36 #define DRIVER_NAME "cpwd"
37 #define PFX DRIVER_NAME ": "
39 #define WD_OBPNAME "watchdog"
40 #define WD_BADMODEL "SUNW,501-5336"
41 #define WD_BTIMEOUT (jiffies + (HZ * 1000))
42 #define WD_BLIMIT 0xFFFF
48 /* Internal driver definitions. */
57 #define WD_STAT_INIT 0x01 /* Watchdog timer is initialized */
58 #define WD_STAT_BSTOP 0x02 /* Watchdog timer is brokenstopped */
59 #define WD_STAT_SVCD 0x04 /* Watchdog interrupt occurred */
61 /* Register value definitions
63 #define WD0_INTR_MASK 0x01 /* Watchdog device interrupt masks */
64 #define WD1_INTR_MASK 0x02
65 #define WD2_INTR_MASK 0x04
67 #define WD_S_RUNNING 0x01 /* Watchdog device status running */
68 #define WD_S_EXPIRED 0x02 /* Watchdog device status expired */
76 unsigned long timeout;
83 struct miscdevice misc;
91 static struct cpwd *cpwd_device;
93 /* Sun uses Altera PLD EPF8820ATC144-4
94 * providing three hardware watchdogs:
96 * 1) RIC - sends an interrupt when triggered
97 * 2) XIR - asserts XIR_B_RESET when triggered, resets CPU
98 * 3) POR - asserts POR_B_RESET when triggered, resets CPU, backplane, board
100 *** Timer register block definition (struct wd_timer_regblk)
102 * dcntr and limit registers (halfword access):
103 * -------------------
104 * | 15 | ...| 1 | 0 |
105 * -------------------
107 * -------------------
108 * dcntr - Current 16-bit downcounter value.
109 * When downcounter reaches '0' watchdog expires.
110 * Reading this register resets downcounter with
112 * limit - 16-bit countdown value in 1/10th second increments.
113 * Writing this register begins countdown with input value.
114 * Reading from this register does not affect counter.
115 * NOTES: After watchdog reset, dcntr and limit contain '1'
117 * status register (byte access):
118 * ---------------------------
119 * | 7 | ... | 2 | 1 | 0 |
120 * --------------+------------
121 * |- UNUSED -| EXP | RUN |
122 * ---------------------------
123 * status- Bit 0 - Watchdog is running
124 * Bit 1 - Watchdog has expired
126 *** PLD register block definition (struct wd_pld_regblk)
128 * intr_mask register (byte access):
129 * ---------------------------------
130 * | 7 | ... | 3 | 2 | 1 | 0 |
131 * +-------------+------------------
132 * |- UNUSED -| WD3 | WD2 | WD1 |
133 * ---------------------------------
134 * WD3 - 1 == Interrupt disabled for watchdog 3
135 * WD2 - 1 == Interrupt disabled for watchdog 2
136 * WD1 - 1 == Interrupt disabled for watchdog 1
138 * pld_status register (byte access):
139 * UNKNOWN, MAGICAL MYSTERY REGISTER
142 #define WD_TIMER_REGSZ 16
144 #define WD1_OFF (WD_TIMER_REGSZ * 1)
145 #define WD2_OFF (WD_TIMER_REGSZ * 2)
146 #define PLD_OFF (WD_TIMER_REGSZ * 3)
148 #define WD_DCNTR 0x00
149 #define WD_LIMIT 0x04
150 #define WD_STATUS 0x08
152 #define PLD_IMASK (PLD_OFF + 0x00)
153 #define PLD_STATUS (PLD_OFF + 0x04)
155 static struct timer_list cpwd_timer;
157 static int wd0_timeout;
158 static int wd1_timeout;
159 static int wd2_timeout;
161 module_param(wd0_timeout, int, 0);
162 MODULE_PARM_DESC(wd0_timeout, "Default watchdog0 timeout in 1/10secs");
163 module_param(wd1_timeout, int, 0);
164 MODULE_PARM_DESC(wd1_timeout, "Default watchdog1 timeout in 1/10secs");
165 module_param(wd2_timeout, int, 0);
166 MODULE_PARM_DESC(wd2_timeout, "Default watchdog2 timeout in 1/10secs");
168 MODULE_AUTHOR("Eric Brower <ebrower@usa.net>");
169 MODULE_DESCRIPTION("Hardware watchdog driver for Sun Microsystems CP1400/1500");
170 MODULE_LICENSE("GPL");
171 MODULE_SUPPORTED_DEVICE("watchdog");
173 static void cpwd_writew(u16 val, void __iomem *addr)
175 writew(cpu_to_le16(val), addr);
177 static u16 cpwd_readw(void __iomem *addr)
179 u16 val = readw(addr);
181 return le16_to_cpu(val);
184 static void cpwd_writeb(u8 val, void __iomem *addr)
189 static u8 cpwd_readb(void __iomem *addr)
194 /* Enable or disable watchdog interrupts
195 * Because of the CP1400 defect this should only be
196 * called during initialzation or by wd_[start|stop]timer()
198 * index - sub-device index, or -1 for 'all'
199 * enable - non-zero to enable interrupts, zero to disable
201 static void cpwd_toggleintr(struct cpwd *p, int index, int enable)
203 unsigned char curregs = cpwd_readb(p->regs + PLD_IMASK);
204 unsigned char setregs =
206 (WD0_INTR_MASK | WD1_INTR_MASK | WD2_INTR_MASK) :
207 (p->devs[index].intr_mask);
209 if (enable == WD_INTR_ON)
214 cpwd_writeb(curregs, p->regs + PLD_IMASK);
217 /* Restarts timer with maximum limit value and
218 * does not unset 'brokenstop' value.
220 static void cpwd_resetbrokentimer(struct cpwd *p, int index)
222 cpwd_toggleintr(p, index, WD_INTR_ON);
223 cpwd_writew(WD_BLIMIT, p->devs[index].regs + WD_LIMIT);
226 /* Timer method called to reset stopped watchdogs--
227 * because of the PLD bug on CP1400, we cannot mask
228 * interrupts within the PLD so me must continually
229 * reset the timers ad infinitum.
231 static void cpwd_brokentimer(unsigned long data)
233 struct cpwd *p = (struct cpwd *) data;
236 /* kill a running timer instance, in case we
237 * were called directly instead of by kernel timer
239 if (timer_pending(&cpwd_timer))
240 del_timer(&cpwd_timer);
242 for (id = 0; id < WD_NUMDEVS; id++) {
243 if (p->devs[id].runstatus & WD_STAT_BSTOP) {
245 cpwd_resetbrokentimer(p, id);
250 /* there is at least one timer brokenstopped-- reschedule */
251 cpwd_timer.expires = WD_BTIMEOUT;
252 add_timer(&cpwd_timer);
256 /* Reset countdown timer with 'limit' value and continue countdown.
257 * This will not start a stopped timer.
259 static void cpwd_pingtimer(struct cpwd *p, int index)
261 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING)
262 cpwd_readw(p->devs[index].regs + WD_DCNTR);
265 /* Stop a running watchdog timer-- the timer actually keeps
266 * running, but the interrupt is masked so that no action is
267 * taken upon expiration.
269 static void cpwd_stoptimer(struct cpwd *p, int index)
271 if (cpwd_readb(p->devs[index].regs + WD_STATUS) & WD_S_RUNNING) {
272 cpwd_toggleintr(p, index, WD_INTR_OFF);
275 p->devs[index].runstatus |= WD_STAT_BSTOP;
276 cpwd_brokentimer((unsigned long) p);
281 /* Start a watchdog timer with the specified limit value
282 * If the watchdog is running, it will be restarted with
283 * the provided limit value.
285 * This function will enable interrupts on the specified
288 static void cpwd_starttimer(struct cpwd *p, int index)
291 p->devs[index].runstatus &= ~WD_STAT_BSTOP;
293 p->devs[index].runstatus &= ~WD_STAT_SVCD;
295 cpwd_writew(p->devs[index].timeout, p->devs[index].regs + WD_LIMIT);
296 cpwd_toggleintr(p, index, WD_INTR_ON);
299 static int cpwd_getstatus(struct cpwd *p, int index)
301 unsigned char stat = cpwd_readb(p->devs[index].regs + WD_STATUS);
302 unsigned char intr = cpwd_readb(p->devs[index].regs + PLD_IMASK);
303 unsigned char ret = WD_STOPPED;
305 /* determine STOPPED */
309 /* determine EXPIRED vs FREERUN vs RUNNING */
310 else if (WD_S_EXPIRED & stat) {
312 } else if (WD_S_RUNNING & stat) {
313 if (intr & p->devs[index].intr_mask) {
316 /* Fudge WD_EXPIRED status for defective CP1400--
317 * IF timer is running
318 * AND brokenstop is set
319 * AND an interrupt has been serviced
322 * IF timer is running
323 * AND brokenstop is set
324 * AND no interrupt has been serviced
328 (p->devs[index].runstatus & WD_STAT_BSTOP)) {
329 if (p->devs[index].runstatus & WD_STAT_SVCD) {
332 /* we could as well pretend
342 /* determine SERVICED */
343 if (p->devs[index].runstatus & WD_STAT_SVCD)
349 static irqreturn_t cpwd_interrupt(int irq, void *dev_id)
351 struct cpwd *p = dev_id;
353 /* Only WD0 will interrupt-- others are NMI and we won't
356 spin_lock_irq(&p->lock);
358 cpwd_stoptimer(p, WD0_ID);
359 p->devs[WD0_ID].runstatus |= WD_STAT_SVCD;
361 spin_unlock_irq(&p->lock);
366 static int cpwd_open(struct inode *inode, struct file *f)
368 struct cpwd *p = cpwd_device;
371 switch (iminor(inode)) {
382 /* Register IRQ on first open of device */
383 if (!p->initialized) {
384 if (request_irq(p->irq, &cpwd_interrupt,
385 IRQF_SHARED, DRIVER_NAME, p)) {
386 printk(KERN_ERR PFX "Cannot register IRQ %d\n",
391 p->initialized = true;
396 return nonseekable_open(inode, f);
399 static int cpwd_release(struct inode *inode, struct file *file)
404 static long cpwd_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
406 static struct watchdog_info info = {
407 .options = WDIOF_SETTIMEOUT,
408 .firmware_version = 1,
409 .identity = DRIVER_NAME,
411 void __user *argp = (void __user *)arg;
412 struct inode *inode = file->f_path.dentry->d_inode;
413 int index = iminor(inode) - WD0_MINOR;
414 struct cpwd *p = cpwd_device;
418 /* Generic Linux IOCTLs */
419 case WDIOC_GETSUPPORT:
420 if (copy_to_user(argp, &info, sizeof(struct watchdog_info)))
424 case WDIOC_GETSTATUS:
425 case WDIOC_GETBOOTSTATUS:
426 if (put_user(0, (int __user *)argp))
430 case WDIOC_KEEPALIVE:
431 cpwd_pingtimer(p, index);
434 case WDIOC_SETOPTIONS:
435 if (copy_from_user(&setopt, argp, sizeof(unsigned int)))
438 if (setopt & WDIOS_DISABLECARD) {
441 cpwd_stoptimer(p, index);
442 } else if (setopt & WDIOS_ENABLECARD) {
443 cpwd_starttimer(p, index);
449 /* Solaris-compatible IOCTLs */
451 setopt = cpwd_getstatus(p, index);
452 if (copy_to_user(argp, &setopt, sizeof(unsigned int)))
457 cpwd_starttimer(p, index);
464 cpwd_stoptimer(p, index);
474 static long cpwd_compat_ioctl(struct file *file, unsigned int cmd,
477 int rval = -ENOIOCTLCMD;
480 /* solaris ioctls are specific to this driver */
485 rval = cpwd_ioctl(file, cmd, arg);
489 /* everything else is handled by the generic compat layer */
497 static ssize_t cpwd_write(struct file *file, const char __user *buf,
498 size_t count, loff_t *ppos)
500 struct inode *inode = file->f_path.dentry->d_inode;
501 struct cpwd *p = cpwd_device;
502 int index = iminor(inode);
505 cpwd_pingtimer(p, index);
512 static ssize_t cpwd_read(struct file *file, char __user *buffer,
513 size_t count, loff_t *ppos)
518 static const struct file_operations cpwd_fops = {
519 .owner = THIS_MODULE,
520 .unlocked_ioctl = cpwd_ioctl,
521 .compat_ioctl = cpwd_compat_ioctl,
525 .release = cpwd_release,
528 static int __devinit cpwd_probe(struct of_device *op,
529 const struct of_device_id *match)
531 struct device_node *options;
532 const char *str_prop;
533 const void *prop_val;
534 int i, err = -EINVAL;
540 p = kzalloc(sizeof(*p), GFP_KERNEL);
543 printk(KERN_ERR PFX "Unable to allocate struct cpwd.\n");
547 p->irq = op->irqs[0];
549 spin_lock_init(&p->lock);
551 p->regs = of_ioremap(&op->resource[0], 0,
552 4 * WD_TIMER_REGSZ, DRIVER_NAME);
554 printk(KERN_ERR PFX "Unable to map registers.\n");
558 options = of_find_node_by_path("/options");
561 printk(KERN_ERR PFX "Unable to find /options node.\n");
565 prop_val = of_get_property(options, "watchdog-enable?", NULL);
566 p->enabled = (prop_val ? true : false);
568 prop_val = of_get_property(options, "watchdog-reboot?", NULL);
569 p->reboot = (prop_val ? true : false);
571 str_prop = of_get_property(options, "watchdog-timeout", NULL);
573 p->timeout = simple_strtoul(str_prop, NULL, 10);
575 /* CP1400s seem to have broken PLD implementations-- the
576 * interrupt_mask register cannot be written, so no timer
577 * interrupts can be masked within the PLD.
579 str_prop = of_get_property(op->node, "model", NULL);
580 p->broken = (str_prop && !strcmp(str_prop, WD_BADMODEL));
583 cpwd_toggleintr(p, -1, WD_INTR_OFF);
585 for (i = 0; i < WD_NUMDEVS; i++) {
586 static const char *cpwd_names[] = { "RIC", "XIR", "POR" };
587 static int *parms[] = { &wd0_timeout,
590 struct miscdevice *mp = &p->devs[i].misc;
592 mp->minor = WD0_MINOR + i;
593 mp->name = cpwd_names[i];
594 mp->fops = &cpwd_fops;
596 p->devs[i].regs = p->regs + (i * WD_TIMER_REGSZ);
597 p->devs[i].intr_mask = (WD0_INTR_MASK << i);
598 p->devs[i].runstatus &= ~WD_STAT_BSTOP;
599 p->devs[i].runstatus |= WD_STAT_INIT;
600 p->devs[i].timeout = p->timeout;
602 p->devs[i].timeout = *parms[i];
604 err = misc_register(&p->devs[i].misc);
606 printk(KERN_ERR "Could not register misc device for "
613 init_timer(&cpwd_timer);
614 cpwd_timer.function = cpwd_brokentimer;
615 cpwd_timer.data = (unsigned long) p;
616 cpwd_timer.expires = WD_BTIMEOUT;
618 printk(KERN_INFO PFX "PLD defect workaround enabled for "
619 "model " WD_BADMODEL ".\n");
622 dev_set_drvdata(&op->dev, p);
630 for (i--; i >= 0; i--)
631 misc_deregister(&p->devs[i].misc);
634 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
641 static int __devexit cpwd_remove(struct of_device *op)
643 struct cpwd *p = dev_get_drvdata(&op->dev);
646 for (i = 0; i < 4; i++) {
647 misc_deregister(&p->devs[i].misc);
650 cpwd_stoptimer(p, i);
651 if (p->devs[i].runstatus & WD_STAT_BSTOP)
652 cpwd_resetbrokentimer(p, i);
657 del_timer_sync(&cpwd_timer);
662 of_iounmap(&op->resource[0], p->regs, 4 * WD_TIMER_REGSZ);
670 static const struct of_device_id cpwd_match[] = {
676 MODULE_DEVICE_TABLE(of, cpwd_match);
678 static struct of_platform_driver cpwd_driver = {
680 .match_table = cpwd_match,
682 .remove = __devexit_p(cpwd_remove),
685 static int __init cpwd_init(void)
687 return of_register_driver(&cpwd_driver, &of_bus_type);
690 static void __exit cpwd_exit(void)
692 of_unregister_driver(&cpwd_driver);
695 module_init(cpwd_init);
696 module_exit(cpwd_exit);