git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/rt2x00/rt73usb.c

   1 /*
   2         Copyright (C) 2004 - 2007 rt2x00 SourceForge Project
   3         <http://rt2x00.serialmonkey.com>
   4
   5         This program is free software; you can redistribute it and/or modify
   6         it under the terms of the GNU General Public License as published by
   7         the Free Software Foundation; either version 2 of the License, or
   8         (at your option) any later version.
   9
  10         This program is distributed in the hope that it will be useful,
  11         but WITHOUT ANY WARRANTY; without even the implied warranty of
  12         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13         GNU General Public License for more details.
  14
  15         You should have received a copy of the GNU General Public License
  16         along with this program; if not, write to the
  17         Free Software Foundation, Inc.,
  18         59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  19  */
  20
  21 /*
  22         Module: rt73usb
  23         Abstract: rt73usb device specific routines.
  24         Supported chipsets: rt2571W & rt2671.
  25  */
  26
  27 #include <linux/delay.h>
  28 #include <linux/etherdevice.h>
  29 #include <linux/init.h>
  30 #include <linux/kernel.h>
  31 #include <linux/module.h>
  32 #include <linux/usb.h>
  33
  34 #include "rt2x00.h"
  35 #include "rt2x00usb.h"
  36 #include "rt73usb.h"
  37
  38 /*
  39  * Register access.
  40  * All access to the CSR registers will go through the methods
  41  * rt73usb_register_read and rt73usb_register_write.
  42  * BBP and RF register require indirect register access,
  43  * and use the CSR registers BBPCSR and RFCSR to achieve this.
  44  * These indirect registers work with busy bits,
  45  * and we will try maximal REGISTER_BUSY_COUNT times to access
  46  * the register while taking a REGISTER_BUSY_DELAY us delay
  47  * between each attampt. When the busy bit is still set at that time,
  48  * the access attempt is considered to have failed,
  49  * and we will print an error.
  50  * The _lock versions must be used if you already hold the usb_cache_mutex
  51  */
  52 static inline void rt73usb_register_read(struct rt2x00_dev *rt2x00dev,
  53                                          const unsigned int offset, u32 *value)
  54 {
  55         __le32 reg;
  56         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  57                                       USB_VENDOR_REQUEST_IN, offset,
  58                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  59         *value = le32_to_cpu(reg);
  60 }
  61
  62 static inline void rt73usb_register_read_lock(struct rt2x00_dev *rt2x00dev,
  63                                               const unsigned int offset, u32 *value)
  64 {
  65         __le32 reg;
  66         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_READ,
  67                                        USB_VENDOR_REQUEST_IN, offset,
  68                                        &reg, sizeof(u32), REGISTER_TIMEOUT);
  69         *value = le32_to_cpu(reg);
  70 }
  71
  72 static inline void rt73usb_register_multiread(struct rt2x00_dev *rt2x00dev,
  73                                               const unsigned int offset,
  74                                               void *value, const u32 length)
  75 {
  76         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
  77         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_READ,
  78                                       USB_VENDOR_REQUEST_IN, offset,
  79                                       value, length, timeout);
  80 }
  81
  82 static inline void rt73usb_register_write(struct rt2x00_dev *rt2x00dev,
  83                                           const unsigned int offset, u32 value)
  84 {
  85         __le32 reg = cpu_to_le32(value);
  86         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
  87                                       USB_VENDOR_REQUEST_OUT, offset,
  88                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  89 }
  90
  91 static inline void rt73usb_register_write_lock(struct rt2x00_dev *rt2x00dev,
  92                                                const unsigned int offset, u32 value)
  93 {
  94         __le32 reg = cpu_to_le32(value);
  95         rt2x00usb_vendor_req_buff_lock(rt2x00dev, USB_MULTI_WRITE,
  96                                        USB_VENDOR_REQUEST_OUT, offset,
  97                                       &reg, sizeof(u32), REGISTER_TIMEOUT);
  98 }
  99
 100 static inline void rt73usb_register_multiwrite(struct rt2x00_dev *rt2x00dev,
 101                                                const unsigned int offset,
 102                                                void *value, const u32 length)
 103 {
 104         int timeout = REGISTER_TIMEOUT * (length / sizeof(u32));
 105         rt2x00usb_vendor_request_buff(rt2x00dev, USB_MULTI_WRITE,
 106                                       USB_VENDOR_REQUEST_OUT, offset,
 107                                       value, length, timeout);
 108 }
 109
 110 static u32 rt73usb_bbp_check(struct rt2x00_dev *rt2x00dev)
 111 {
 112         u32 reg;
 113         unsigned int i;
 114
 115         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 116                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR3, &reg);
 117                 if (!rt2x00_get_field32(reg, PHY_CSR3_BUSY))
 118                         break;
 119                 udelay(REGISTER_BUSY_DELAY);
 120         }
 121
 122         return reg;
 123 }
 124
 125 static void rt73usb_bbp_write(struct rt2x00_dev *rt2x00dev,
 126                               const unsigned int word, const u8 value)
 127 {
 128         u32 reg;
 129
 130         mutex_lock(&rt2x00dev->usb_cache_mutex);
 131
 132         /*
 133          * Wait until the BBP becomes ready.
 134          */
 135         reg = rt73usb_bbp_check(rt2x00dev);
 136         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 137                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Write failed.\n");
 138                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 139                 return;
 140         }
 141
 142         /*
 143          * Write the data into the BBP.
 144          */
 145         reg = 0;
 146         rt2x00_set_field32(&reg, PHY_CSR3_VALUE, value);
 147         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 148         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 149         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 0);
 150
 151         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 152         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 153 }
 154
 155 static void rt73usb_bbp_read(struct rt2x00_dev *rt2x00dev,
 156                              const unsigned int word, u8 *value)
 157 {
 158         u32 reg;
 159
 160         mutex_lock(&rt2x00dev->usb_cache_mutex);
 161
 162         /*
 163          * Wait until the BBP becomes ready.
 164          */
 165         reg = rt73usb_bbp_check(rt2x00dev);
 166         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 167                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 168                 mutex_unlock(&rt2x00dev->usb_cache_mutex);
 169                 return;
 170         }
 171
 172         /*
 173          * Write the request into the BBP.
 174          */
 175         reg = 0;
 176         rt2x00_set_field32(&reg, PHY_CSR3_REGNUM, word);
 177         rt2x00_set_field32(&reg, PHY_CSR3_BUSY, 1);
 178         rt2x00_set_field32(&reg, PHY_CSR3_READ_CONTROL, 1);
 179
 180         rt73usb_register_write_lock(rt2x00dev, PHY_CSR3, reg);
 181
 182         /*
 183          * Wait until the BBP becomes ready.
 184          */
 185         reg = rt73usb_bbp_check(rt2x00dev);
 186         if (rt2x00_get_field32(reg, PHY_CSR3_BUSY)) {
 187                 ERROR(rt2x00dev, "PHY_CSR3 register busy. Read failed.\n");
 188                 *value = 0xff;
 189                 return;
 190         }
 191
 192         *value = rt2x00_get_field32(reg, PHY_CSR3_VALUE);
 193         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 194 }
 195
 196 static void rt73usb_rf_write(struct rt2x00_dev *rt2x00dev,
 197                              const unsigned int word, const u32 value)
 198 {
 199         u32 reg;
 200         unsigned int i;
 201
 202         if (!word)
 203                 return;
 204
 205         mutex_lock(&rt2x00dev->usb_cache_mutex);
 206
 207         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
 208                 rt73usb_register_read_lock(rt2x00dev, PHY_CSR4, &reg);
 209                 if (!rt2x00_get_field32(reg, PHY_CSR4_BUSY))
 210                         goto rf_write;
 211                 udelay(REGISTER_BUSY_DELAY);
 212         }
 213
 214         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 215         ERROR(rt2x00dev, "PHY_CSR4 register busy. Write failed.\n");
 216         return;
 217
 218 rf_write:
 219         reg = 0;
 220         rt2x00_set_field32(&reg, PHY_CSR4_VALUE, value);
 221
 222         /*
 223          * RF5225 and RF2527 contain 21 bits per RF register value,
 224          * all others contain 20 bits.
 225          */
 226         rt2x00_set_field32(&reg, PHY_CSR4_NUMBER_OF_BITS,
 227                            20 + (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 228                                  rt2x00_rf(&rt2x00dev->chip, RF2527)));
 229         rt2x00_set_field32(&reg, PHY_CSR4_IF_SELECT, 0);
 230         rt2x00_set_field32(&reg, PHY_CSR4_BUSY, 1);
 231
 232         rt73usb_register_write_lock(rt2x00dev, PHY_CSR4, reg);
 233         rt2x00_rf_write(rt2x00dev, word, value);
 234         mutex_unlock(&rt2x00dev->usb_cache_mutex);
 235 }
 236
 237 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
 238 #define CSR_OFFSET(__word)      ( CSR_REG_BASE + ((__word) * sizeof(u32)) )
 239
 240 static void rt73usb_read_csr(struct rt2x00_dev *rt2x00dev,
 241                              const unsigned int word, u32 *data)
 242 {
 243         rt73usb_register_read(rt2x00dev, CSR_OFFSET(word), data);
 244 }
 245
 246 static void rt73usb_write_csr(struct rt2x00_dev *rt2x00dev,
 247                               const unsigned int word, u32 data)
 248 {
 249         rt73usb_register_write(rt2x00dev, CSR_OFFSET(word), data);
 250 }
 251
 252 static const struct rt2x00debug rt73usb_rt2x00debug = {
 253         .owner  = THIS_MODULE,
 254         .csr    = {
 255                 .read           = rt73usb_read_csr,
 256                 .write          = rt73usb_write_csr,
 257                 .word_size      = sizeof(u32),
 258                 .word_count     = CSR_REG_SIZE / sizeof(u32),
 259         },
 260         .eeprom = {
 261                 .read           = rt2x00_eeprom_read,
 262                 .write          = rt2x00_eeprom_write,
 263                 .word_size      = sizeof(u16),
 264                 .word_count     = EEPROM_SIZE / sizeof(u16),
 265         },
 266         .bbp    = {
 267                 .read           = rt73usb_bbp_read,
 268                 .write          = rt73usb_bbp_write,
 269                 .word_size      = sizeof(u8),
 270                 .word_count     = BBP_SIZE / sizeof(u8),
 271         },
 272         .rf     = {
 273                 .read           = rt2x00_rf_read,
 274                 .write          = rt73usb_rf_write,
 275                 .word_size      = sizeof(u32),
 276                 .word_count     = RF_SIZE / sizeof(u32),
 277         },
 278 };
 279 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
 280
 281 /*
 282  * Configuration handlers.
 283  */
 284 static void rt73usb_config_mac_addr(struct rt2x00_dev *rt2x00dev, __le32 *mac)
 285 {
 286         u32 tmp;
 287
 288         tmp = le32_to_cpu(mac[1]);
 289         rt2x00_set_field32(&tmp, MAC_CSR3_UNICAST_TO_ME_MASK, 0xff);
 290         mac[1] = cpu_to_le32(tmp);
 291
 292         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR2, mac,
 293                                     (2 * sizeof(__le32)));
 294 }
 295
 296 static void rt73usb_config_bssid(struct rt2x00_dev *rt2x00dev, __le32 *bssid)
 297 {
 298         u32 tmp;
 299
 300         tmp = le32_to_cpu(bssid[1]);
 301         rt2x00_set_field32(&tmp, MAC_CSR5_BSS_ID_MASK, 3);
 302         bssid[1] = cpu_to_le32(tmp);
 303
 304         rt73usb_register_multiwrite(rt2x00dev, MAC_CSR4, bssid,
 305                                     (2 * sizeof(__le32)));
 306 }
 307
 308 static void rt73usb_config_type(struct rt2x00_dev *rt2x00dev, const int type,
 309                                 const int tsf_sync)
 310 {
 311         u32 reg;
 312
 313         /*
 314          * Clear current synchronisation setup.
 315          * For the Beacon base registers we only need to clear
 316          * the first byte since that byte contains the VALID and OWNER
 317          * bits which (when set to 0) will invalidate the entire beacon.
 318          */
 319         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
 320         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE0, 0);
 321         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE1, 0);
 322         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE2, 0);
 323         rt73usb_register_write(rt2x00dev, HW_BEACON_BASE3, 0);
 324
 325         /*
 326          * Enable synchronisation.
 327          */
 328         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 329         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_TICKING, 1);
 330         rt2x00_set_field32(&reg, TXRX_CSR9_TBTT_ENABLE, 1);
 331         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 0);
 332         rt2x00_set_field32(&reg, TXRX_CSR9_TSF_SYNC, tsf_sync);
 333         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 334 }
 335
 336 static void rt73usb_config_preamble(struct rt2x00_dev *rt2x00dev,
 337                                       const int short_preamble,
 338                                       const int ack_timeout,
 339                                       const int ack_consume_time)
 340 {
 341         u32 reg;
 342
 343         /*
 344          * When in atomic context, reschedule and let rt2x00lib
 345          * call this function again.
 346          */
 347         if (in_atomic()) {
 348                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->config_work);
 349                 return;
 350         }
 351
 352         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 353         rt2x00_set_field32(&reg, TXRX_CSR0_RX_ACK_TIMEOUT, ack_timeout);
 354         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 355
 356         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 357         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_PREAMBLE,
 358                            !!short_preamble);
 359         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 360 }
 361
 362 static void rt73usb_config_phymode(struct rt2x00_dev *rt2x00dev,
 363                                    const int basic_rate_mask)
 364 {
 365         rt73usb_register_write(rt2x00dev, TXRX_CSR5, basic_rate_mask);
 366 }
 367
 368 static void rt73usb_config_channel(struct rt2x00_dev *rt2x00dev,
 369                                    struct rf_channel *rf, const int txpower)
 370 {
 371         u8 r3;
 372         u8 r94;
 373         u8 smart;
 374
 375         rt2x00_set_field32(&rf->rf3, RF3_TXPOWER, TXPOWER_TO_DEV(txpower));
 376         rt2x00_set_field32(&rf->rf4, RF4_FREQ_OFFSET, rt2x00dev->freq_offset);
 377
 378         smart = !(rt2x00_rf(&rt2x00dev->chip, RF5225) ||
 379                   rt2x00_rf(&rt2x00dev->chip, RF2527));
 380
 381         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 382         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, smart);
 383         rt73usb_bbp_write(rt2x00dev, 3, r3);
 384
 385         r94 = 6;
 386         if (txpower > MAX_TXPOWER && txpower <= (MAX_TXPOWER + r94))
 387                 r94 += txpower - MAX_TXPOWER;
 388         else if (txpower < MIN_TXPOWER && txpower >= (MIN_TXPOWER - r94))
 389                 r94 += txpower;
 390         rt73usb_bbp_write(rt2x00dev, 94, r94);
 391
 392         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 393         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 394         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 395         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 396
 397         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 398         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 399         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 | 0x00000004);
 400         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 401
 402         rt73usb_rf_write(rt2x00dev, 1, rf->rf1);
 403         rt73usb_rf_write(rt2x00dev, 2, rf->rf2);
 404         rt73usb_rf_write(rt2x00dev, 3, rf->rf3 & ~0x00000004);
 405         rt73usb_rf_write(rt2x00dev, 4, rf->rf4);
 406
 407         udelay(10);
 408 }
 409
 410 static void rt73usb_config_txpower(struct rt2x00_dev *rt2x00dev,
 411                                    const int txpower)
 412 {
 413         struct rf_channel rf;
 414
 415         rt2x00_rf_read(rt2x00dev, 1, &rf.rf1);
 416         rt2x00_rf_read(rt2x00dev, 2, &rf.rf2);
 417         rt2x00_rf_read(rt2x00dev, 3, &rf.rf3);
 418         rt2x00_rf_read(rt2x00dev, 4, &rf.rf4);
 419
 420         rt73usb_config_channel(rt2x00dev, &rf, txpower);
 421 }
 422
 423 static void rt73usb_config_antenna_5x(struct rt2x00_dev *rt2x00dev,
 424                                       struct antenna_setup *ant)
 425 {
 426         u8 r3;
 427         u8 r4;
 428         u8 r77;
 429         u8 temp;
 430
 431         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 432         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 433         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 434
 435         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 436
 437         /*
 438          * Configure the RX antenna.
 439          */
 440         switch (ant->rx) {
 441         case ANTENNA_HW_DIVERSITY:
 442                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 443                 temp = !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags)
 444                        && (rt2x00dev->curr_hwmode != HWMODE_A);
 445                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, temp);
 446                 break;
 447         case ANTENNA_A:
 448                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 449                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 450                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 451                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 452                 else
 453                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 454                 break;
 455         case ANTENNA_SW_DIVERSITY:
 456                 /*
 457                  * NOTE: We should never come here because rt2x00lib is
 458                  * supposed to catch this and send us the correct antenna
 459                  * explicitely. However we are nog going to bug about this.
 460                  * Instead, just default to antenna B.
 461                  */
 462         case ANTENNA_B:
 463                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 464                 rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END, 0);
 465                 if (rt2x00dev->curr_hwmode == HWMODE_A)
 466                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 467                 else
 468                         rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 469                 break;
 470         }
 471
 472         rt73usb_bbp_write(rt2x00dev, 77, r77);
 473         rt73usb_bbp_write(rt2x00dev, 3, r3);
 474         rt73usb_bbp_write(rt2x00dev, 4, r4);
 475 }
 476
 477 static void rt73usb_config_antenna_2x(struct rt2x00_dev *rt2x00dev,
 478                                       struct antenna_setup *ant)
 479 {
 480         u8 r3;
 481         u8 r4;
 482         u8 r77;
 483
 484         rt73usb_bbp_read(rt2x00dev, 3, &r3);
 485         rt73usb_bbp_read(rt2x00dev, 4, &r4);
 486         rt73usb_bbp_read(rt2x00dev, 77, &r77);
 487
 488         rt2x00_set_field8(&r3, BBP_R3_SMART_MODE, 0);
 489         rt2x00_set_field8(&r4, BBP_R4_RX_FRAME_END,
 490                           !test_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags));
 491
 492         /*
 493          * Configure the RX antenna.
 494          */
 495         switch (ant->rx) {
 496         case ANTENNA_HW_DIVERSITY:
 497                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 2);
 498                 break;
 499         case ANTENNA_A:
 500                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 3);
 501                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 502                 break;
 503         case ANTENNA_SW_DIVERSITY:
 504                 /*
 505                  * NOTE: We should never come here because rt2x00lib is
 506                  * supposed to catch this and send us the correct antenna
 507                  * explicitely. However we are nog going to bug about this.
 508                  * Instead, just default to antenna B.
 509                  */
 510         case ANTENNA_B:
 511                 rt2x00_set_field8(&r77, BBP_R77_RX_ANTENNA, 0);
 512                 rt2x00_set_field8(&r4, BBP_R4_RX_ANTENNA_CONTROL, 1);
 513                 break;
 514         }
 515
 516         rt73usb_bbp_write(rt2x00dev, 77, r77);
 517         rt73usb_bbp_write(rt2x00dev, 3, r3);
 518         rt73usb_bbp_write(rt2x00dev, 4, r4);
 519 }
 520
 521 struct antenna_sel {
 522         u8 word;
 523         /*
 524          * value[0] -> non-LNA
 525          * value[1] -> LNA
 526          */
 527         u8 value[2];
 528 };
 529
 530 static const struct antenna_sel antenna_sel_a[] = {
 531         { 96,  { 0x58, 0x78 } },
 532         { 104, { 0x38, 0x48 } },
 533         { 75,  { 0xfe, 0x80 } },
 534         { 86,  { 0xfe, 0x80 } },
 535         { 88,  { 0xfe, 0x80 } },
 536         { 35,  { 0x60, 0x60 } },
 537         { 97,  { 0x58, 0x58 } },
 538         { 98,  { 0x58, 0x58 } },
 539 };
 540
 541 static const struct antenna_sel antenna_sel_bg[] = {
 542         { 96,  { 0x48, 0x68 } },
 543         { 104, { 0x2c, 0x3c } },
 544         { 75,  { 0xfe, 0x80 } },
 545         { 86,  { 0xfe, 0x80 } },
 546         { 88,  { 0xfe, 0x80 } },
 547         { 35,  { 0x50, 0x50 } },
 548         { 97,  { 0x48, 0x48 } },
 549         { 98,  { 0x48, 0x48 } },
 550 };
 551
 552 static void rt73usb_config_antenna(struct rt2x00_dev *rt2x00dev,
 553                                    struct antenna_setup *ant)
 554 {
 555         const struct antenna_sel *sel;
 556         unsigned int lna;
 557         unsigned int i;
 558         u32 reg;
 559
 560         if (rt2x00dev->curr_hwmode == HWMODE_A) {
 561                 sel = antenna_sel_a;
 562                 lna = test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
 563         } else {
 564                 sel = antenna_sel_bg;
 565                 lna = test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
 566         }
 567
 568         for (i = 0; i < ARRAY_SIZE(antenna_sel_a); i++)
 569                 rt73usb_bbp_write(rt2x00dev, sel[i].word, sel[i].value[lna]);
 570
 571         rt73usb_register_read(rt2x00dev, PHY_CSR0, &reg);
 572
 573         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_BG,
 574                            (rt2x00dev->curr_hwmode == HWMODE_B ||
 575                             rt2x00dev->curr_hwmode == HWMODE_G));
 576         rt2x00_set_field32(&reg, PHY_CSR0_PA_PE_A,
 577                            (rt2x00dev->curr_hwmode == HWMODE_A));
 578
 579         rt73usb_register_write(rt2x00dev, PHY_CSR0, reg);
 580
 581         if (rt2x00_rf(&rt2x00dev->chip, RF5226) ||
 582             rt2x00_rf(&rt2x00dev->chip, RF5225))
 583                 rt73usb_config_antenna_5x(rt2x00dev, ant);
 584         else if (rt2x00_rf(&rt2x00dev->chip, RF2528) ||
 585                  rt2x00_rf(&rt2x00dev->chip, RF2527))
 586                 rt73usb_config_antenna_2x(rt2x00dev, ant);
 587 }
 588
 589 static void rt73usb_config_duration(struct rt2x00_dev *rt2x00dev,
 590                                     struct rt2x00lib_conf *libconf)
 591 {
 592         u32 reg;
 593
 594         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
 595         rt2x00_set_field32(&reg, MAC_CSR9_SLOT_TIME, libconf->slot_time);
 596         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
 597
 598         rt73usb_register_read(rt2x00dev, MAC_CSR8, &reg);
 599         rt2x00_set_field32(&reg, MAC_CSR8_SIFS, libconf->sifs);
 600         rt2x00_set_field32(&reg, MAC_CSR8_SIFS_AFTER_RX_OFDM, 3);
 601         rt2x00_set_field32(&reg, MAC_CSR8_EIFS, libconf->eifs);
 602         rt73usb_register_write(rt2x00dev, MAC_CSR8, reg);
 603
 604         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 605         rt2x00_set_field32(&reg, TXRX_CSR0_TSF_OFFSET, IEEE80211_HEADER);
 606         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 607
 608         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
 609         rt2x00_set_field32(&reg, TXRX_CSR4_AUTORESPOND_ENABLE, 1);
 610         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
 611
 612         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
 613         rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_INTERVAL,
 614                            libconf->conf->beacon_int * 16);
 615         rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
 616 }
 617
 618 static void rt73usb_config(struct rt2x00_dev *rt2x00dev,
 619                            const unsigned int flags,
 620                            struct rt2x00lib_conf *libconf)
 621 {
 622         if (flags & CONFIG_UPDATE_PHYMODE)
 623                 rt73usb_config_phymode(rt2x00dev, libconf->basic_rates);
 624         if (flags & CONFIG_UPDATE_CHANNEL)
 625                 rt73usb_config_channel(rt2x00dev, &libconf->rf,
 626                                        libconf->conf->power_level);
 627         if ((flags & CONFIG_UPDATE_TXPOWER) && !(flags & CONFIG_UPDATE_CHANNEL))
 628                 rt73usb_config_txpower(rt2x00dev, libconf->conf->power_level);
 629         if (flags & CONFIG_UPDATE_ANTENNA)
 630                 rt73usb_config_antenna(rt2x00dev, &libconf->ant);
 631         if (flags & (CONFIG_UPDATE_SLOT_TIME | CONFIG_UPDATE_BEACON_INT))
 632                 rt73usb_config_duration(rt2x00dev, libconf);
 633 }
 634
 635 /*
 636  * LED functions.
 637  */
 638 static void rt73usb_enable_led(struct rt2x00_dev *rt2x00dev)
 639 {
 640         u32 reg;
 641
 642         rt73usb_register_read(rt2x00dev, MAC_CSR14, &reg);
 643         rt2x00_set_field32(&reg, MAC_CSR14_ON_PERIOD, 70);
 644         rt2x00_set_field32(&reg, MAC_CSR14_OFF_PERIOD, 30);
 645         rt73usb_register_write(rt2x00dev, MAC_CSR14, reg);
 646
 647         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 1);
 648         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS,
 649                            (rt2x00dev->rx_status.phymode == MODE_IEEE80211A));
 650         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS,
 651                            (rt2x00dev->rx_status.phymode != MODE_IEEE80211A));
 652
 653         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 654                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 655 }
 656
 657 static void rt73usb_disable_led(struct rt2x00_dev *rt2x00dev)
 658 {
 659         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_RADIO_STATUS, 0);
 660         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_BG_STATUS, 0);
 661         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LINK_A_STATUS, 0);
 662
 663         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, 0x0000,
 664                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 665 }
 666
 667 static void rt73usb_activity_led(struct rt2x00_dev *rt2x00dev, int rssi)
 668 {
 669         u32 led;
 670
 671         if (rt2x00dev->led_mode != LED_MODE_SIGNAL_STRENGTH)
 672                 return;
 673
 674         /*
 675          * Led handling requires a positive value for the rssi,
 676          * to do that correctly we need to add the correction.
 677          */
 678         rssi += rt2x00dev->rssi_offset;
 679
 680         if (rssi <= 30)
 681                 led = 0;
 682         else if (rssi <= 39)
 683                 led = 1;
 684         else if (rssi <= 49)
 685                 led = 2;
 686         else if (rssi <= 53)
 687                 led = 3;
 688         else if (rssi <= 63)
 689                 led = 4;
 690         else
 691                 led = 5;
 692
 693         rt2x00usb_vendor_request_sw(rt2x00dev, USB_LED_CONTROL, led,
 694                                     rt2x00dev->led_reg, REGISTER_TIMEOUT);
 695 }
 696
 697 /*
 698  * Link tuning
 699  */
 700 static void rt73usb_link_stats(struct rt2x00_dev *rt2x00dev,
 701                                struct link_qual *qual)
 702 {
 703         u32 reg;
 704
 705         /*
 706          * Update FCS error count from register.
 707          */
 708         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
 709         qual->rx_failed = rt2x00_get_field32(reg, STA_CSR0_FCS_ERROR);
 710
 711         /*
 712          * Update False CCA count from register.
 713          */
 714         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
 715         qual->false_cca = rt2x00_get_field32(reg, STA_CSR1_FALSE_CCA_ERROR);
 716 }
 717
 718 static void rt73usb_reset_tuner(struct rt2x00_dev *rt2x00dev)
 719 {
 720         rt73usb_bbp_write(rt2x00dev, 17, 0x20);
 721         rt2x00dev->link.vgc_level = 0x20;
 722 }
 723
 724 static void rt73usb_link_tuner(struct rt2x00_dev *rt2x00dev)
 725 {
 726         int rssi = rt2x00_get_link_rssi(&rt2x00dev->link);
 727         u8 r17;
 728         u8 up_bound;
 729         u8 low_bound;
 730
 731         /*
 732          * Update Led strength
 733          */
 734         rt73usb_activity_led(rt2x00dev, rssi);
 735
 736         rt73usb_bbp_read(rt2x00dev, 17, &r17);
 737
 738         /*
 739          * Determine r17 bounds.
 740          */
 741         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
 742                 low_bound = 0x28;
 743                 up_bound = 0x48;
 744
 745                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
 746                         low_bound += 0x10;
 747                         up_bound += 0x10;
 748                 }
 749         } else {
 750                 if (rssi > -82) {
 751                         low_bound = 0x1c;
 752                         up_bound = 0x40;
 753                 } else if (rssi > -84) {
 754                         low_bound = 0x1c;
 755                         up_bound = 0x20;
 756                 } else {
 757                         low_bound = 0x1c;
 758                         up_bound = 0x1c;
 759                 }
 760
 761                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) {
 762                         low_bound += 0x14;
 763                         up_bound += 0x10;
 764                 }
 765         }
 766
 767         /*
 768          * Special big-R17 for very short distance
 769          */
 770         if (rssi > -35) {
 771                 if (r17 != 0x60)
 772                         rt73usb_bbp_write(rt2x00dev, 17, 0x60);
 773                 return;
 774         }
 775
 776         /*
 777          * Special big-R17 for short distance
 778          */
 779         if (rssi >= -58) {
 780                 if (r17 != up_bound)
 781                         rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 782                 return;
 783         }
 784
 785         /*
 786          * Special big-R17 for middle-short distance
 787          */
 788         if (rssi >= -66) {
 789                 low_bound += 0x10;
 790                 if (r17 != low_bound)
 791                         rt73usb_bbp_write(rt2x00dev, 17, low_bound);
 792                 return;
 793         }
 794
 795         /*
 796          * Special mid-R17 for middle distance
 797          */
 798         if (rssi >= -74) {
 799                 if (r17 != (low_bound + 0x10))
 800                         rt73usb_bbp_write(rt2x00dev, 17, low_bound + 0x08);
 801                 return;
 802         }
 803
 804         /*
 805          * Special case: Change up_bound based on the rssi.
 806          * Lower up_bound when rssi is weaker then -74 dBm.
 807          */
 808         up_bound -= 2 * (-74 - rssi);
 809         if (low_bound > up_bound)
 810                 up_bound = low_bound;
 811
 812         if (r17 > up_bound) {
 813                 rt73usb_bbp_write(rt2x00dev, 17, up_bound);
 814                 return;
 815         }
 816
 817         /*
 818          * r17 does not yet exceed upper limit, continue and base
 819          * the r17 tuning on the false CCA count.
 820          */
 821         if (rt2x00dev->link.qual.false_cca > 512 && r17 < up_bound) {
 822                 r17 += 4;
 823                 if (r17 > up_bound)
 824                         r17 = up_bound;
 825                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 826         } else if (rt2x00dev->link.qual.false_cca < 100 && r17 > low_bound) {
 827                 r17 -= 4;
 828                 if (r17 < low_bound)
 829                         r17 = low_bound;
 830                 rt73usb_bbp_write(rt2x00dev, 17, r17);
 831         }
 832 }
 833
 834 /*
 835  * Firmware name function.
 836  */
 837 static char *rt73usb_get_firmware_name(struct rt2x00_dev *rt2x00dev)
 838 {
 839         return FIRMWARE_RT2571;
 840 }
 841
 842 /*
 843  * Initialization functions.
 844  */
 845 static int rt73usb_load_firmware(struct rt2x00_dev *rt2x00dev, void *data,
 846                                  const size_t len)
 847 {
 848         unsigned int i;
 849         int status;
 850         u32 reg;
 851         char *ptr = data;
 852         char *cache;
 853         int buflen;
 854         int timeout;
 855
 856         /*
 857          * Wait for stable hardware.
 858          */
 859         for (i = 0; i < 100; i++) {
 860                 rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
 861                 if (reg)
 862                         break;
 863                 msleep(1);
 864         }
 865
 866         if (!reg) {
 867                 ERROR(rt2x00dev, "Unstable hardware.\n");
 868                 return -EBUSY;
 869         }
 870
 871         /*
 872          * Write firmware to device.
 873          * We setup a seperate cache for this action,
 874          * since we are going to write larger chunks of data
 875          * then normally used cache size.
 876          */
 877         cache = kmalloc(CSR_CACHE_SIZE_FIRMWARE, GFP_KERNEL);
 878         if (!cache) {
 879                 ERROR(rt2x00dev, "Failed to allocate firmware cache.\n");
 880                 return -ENOMEM;
 881         }
 882
 883         for (i = 0; i < len; i += CSR_CACHE_SIZE_FIRMWARE) {
 884                 buflen = min_t(int, len - i, CSR_CACHE_SIZE_FIRMWARE);
 885                 timeout = REGISTER_TIMEOUT * (buflen / sizeof(u32));
 886
 887                 memcpy(cache, ptr, buflen);
 888
 889                 rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
 890                                          USB_VENDOR_REQUEST_OUT,
 891                                          FIRMWARE_IMAGE_BASE + i, 0x0000,
 892                                          cache, buflen, timeout);
 893
 894                 ptr += buflen;
 895         }
 896
 897         kfree(cache);
 898
 899         /*
 900          * Send firmware request to device to load firmware,
 901          * we need to specify a long timeout time.
 902          */
 903         status = rt2x00usb_vendor_request_sw(rt2x00dev, USB_DEVICE_MODE,
 904                                              0x0000, USB_MODE_FIRMWARE,
 905                                              REGISTER_TIMEOUT_FIRMWARE);
 906         if (status < 0) {
 907                 ERROR(rt2x00dev, "Failed to write Firmware to device.\n");
 908                 return status;
 909         }
 910
 911         rt73usb_disable_led(rt2x00dev);
 912
 913         return 0;
 914 }
 915
 916 static int rt73usb_init_registers(struct rt2x00_dev *rt2x00dev)
 917 {
 918         u32 reg;
 919
 920         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
 921         rt2x00_set_field32(&reg, TXRX_CSR0_AUTO_TX_SEQ, 1);
 922         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX, 0);
 923         rt2x00_set_field32(&reg, TXRX_CSR0_TX_WITHOUT_WAITING, 0);
 924         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
 925
 926         rt73usb_register_read(rt2x00dev, TXRX_CSR1, &reg);
 927         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0, 47); /* CCK Signal */
 928         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID0_VALID, 1);
 929         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1, 30); /* Rssi */
 930         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID1_VALID, 1);
 931         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2, 42); /* OFDM Rate */
 932         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID2_VALID, 1);
 933         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3, 30); /* Rssi */
 934         rt2x00_set_field32(&reg, TXRX_CSR1_BBP_ID3_VALID, 1);
 935         rt73usb_register_write(rt2x00dev, TXRX_CSR1, reg);
 936
 937         /*
 938          * CCK TXD BBP registers
 939          */
 940         rt73usb_register_read(rt2x00dev, TXRX_CSR2, &reg);
 941         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0, 13);
 942         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID0_VALID, 1);
 943         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1, 12);
 944         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID1_VALID, 1);
 945         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2, 11);
 946         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID2_VALID, 1);
 947         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3, 10);
 948         rt2x00_set_field32(&reg, TXRX_CSR2_BBP_ID3_VALID, 1);
 949         rt73usb_register_write(rt2x00dev, TXRX_CSR2, reg);
 950
 951         /*
 952          * OFDM TXD BBP registers
 953          */
 954         rt73usb_register_read(rt2x00dev, TXRX_CSR3, &reg);
 955         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0, 7);
 956         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID0_VALID, 1);
 957         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1, 6);
 958         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID1_VALID, 1);
 959         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2, 5);
 960         rt2x00_set_field32(&reg, TXRX_CSR3_BBP_ID2_VALID, 1);
 961         rt73usb_register_write(rt2x00dev, TXRX_CSR3, reg);
 962
 963         rt73usb_register_read(rt2x00dev, TXRX_CSR7, &reg);
 964         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_6MBS, 59);
 965         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_9MBS, 53);
 966         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_12MBS, 49);
 967         rt2x00_set_field32(&reg, TXRX_CSR7_ACK_CTS_18MBS, 46);
 968         rt73usb_register_write(rt2x00dev, TXRX_CSR7, reg);
 969
 970         rt73usb_register_read(rt2x00dev, TXRX_CSR8, &reg);
 971         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_24MBS, 44);
 972         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_36MBS, 42);
 973         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_48MBS, 42);
 974         rt2x00_set_field32(&reg, TXRX_CSR8_ACK_CTS_54MBS, 42);
 975         rt73usb_register_write(rt2x00dev, TXRX_CSR8, reg);
 976
 977         rt73usb_register_write(rt2x00dev, TXRX_CSR15, 0x0000000f);
 978
 979         rt73usb_register_read(rt2x00dev, MAC_CSR6, &reg);
 980         rt2x00_set_field32(&reg, MAC_CSR6_MAX_FRAME_UNIT, 0xfff);
 981         rt73usb_register_write(rt2x00dev, MAC_CSR6, reg);
 982
 983         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00000718);
 984
 985         if (rt2x00dev->ops->lib->set_device_state(rt2x00dev, STATE_AWAKE))
 986                 return -EBUSY;
 987
 988         rt73usb_register_write(rt2x00dev, MAC_CSR13, 0x00007f00);
 989
 990         /*
 991          * Invalidate all Shared Keys (SEC_CSR0),
 992          * and clear the Shared key Cipher algorithms (SEC_CSR1 & SEC_CSR5)
 993          */
 994         rt73usb_register_write(rt2x00dev, SEC_CSR0, 0x00000000);
 995         rt73usb_register_write(rt2x00dev, SEC_CSR1, 0x00000000);
 996         rt73usb_register_write(rt2x00dev, SEC_CSR5, 0x00000000);
 997
 998         reg = 0x000023b0;
 999         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1000             rt2x00_rf(&rt2x00dev->chip, RF2527))
1001                 rt2x00_set_field32(&reg, PHY_CSR1_RF_RPI, 1);
1002         rt73usb_register_write(rt2x00dev, PHY_CSR1, reg);
1003
1004         rt73usb_register_write(rt2x00dev, PHY_CSR5, 0x00040a06);
1005         rt73usb_register_write(rt2x00dev, PHY_CSR6, 0x00080606);
1006         rt73usb_register_write(rt2x00dev, PHY_CSR7, 0x00000408);
1007
1008         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR0, &reg);
1009         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC0_TX_OP, 0);
1010         rt2x00_set_field32(&reg, AC_TXOP_CSR0_AC1_TX_OP, 0);
1011         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR0, reg);
1012
1013         rt73usb_register_read(rt2x00dev, AC_TXOP_CSR1, &reg);
1014         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC2_TX_OP, 192);
1015         rt2x00_set_field32(&reg, AC_TXOP_CSR1_AC3_TX_OP, 48);
1016         rt73usb_register_write(rt2x00dev, AC_TXOP_CSR1, reg);
1017
1018         rt73usb_register_read(rt2x00dev, MAC_CSR9, &reg);
1019         rt2x00_set_field32(&reg, MAC_CSR9_CW_SELECT, 0);
1020         rt73usb_register_write(rt2x00dev, MAC_CSR9, reg);
1021
1022         /*
1023          * We must clear the error counters.
1024          * These registers are cleared on read,
1025          * so we may pass a useless variable to store the value.
1026          */
1027         rt73usb_register_read(rt2x00dev, STA_CSR0, &reg);
1028         rt73usb_register_read(rt2x00dev, STA_CSR1, &reg);
1029         rt73usb_register_read(rt2x00dev, STA_CSR2, &reg);
1030
1031         /*
1032          * Reset MAC and BBP registers.
1033          */
1034         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1035         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 1);
1036         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 1);
1037         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1038
1039         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1040         rt2x00_set_field32(&reg, MAC_CSR1_SOFT_RESET, 0);
1041         rt2x00_set_field32(&reg, MAC_CSR1_BBP_RESET, 0);
1042         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1043
1044         rt73usb_register_read(rt2x00dev, MAC_CSR1, &reg);
1045         rt2x00_set_field32(&reg, MAC_CSR1_HOST_READY, 1);
1046         rt73usb_register_write(rt2x00dev, MAC_CSR1, reg);
1047
1048         return 0;
1049 }
1050
1051 static int rt73usb_init_bbp(struct rt2x00_dev *rt2x00dev)
1052 {
1053         unsigned int i;
1054         u16 eeprom;
1055         u8 reg_id;
1056         u8 value;
1057
1058         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1059                 rt73usb_bbp_read(rt2x00dev, 0, &value);
1060                 if ((value != 0xff) && (value != 0x00))
1061                         goto continue_csr_init;
1062                 NOTICE(rt2x00dev, "Waiting for BBP register.\n");
1063                 udelay(REGISTER_BUSY_DELAY);
1064         }
1065
1066         ERROR(rt2x00dev, "BBP register access failed, aborting.\n");
1067         return -EACCES;
1068
1069 continue_csr_init:
1070         rt73usb_bbp_write(rt2x00dev, 3, 0x80);
1071         rt73usb_bbp_write(rt2x00dev, 15, 0x30);
1072         rt73usb_bbp_write(rt2x00dev, 21, 0xc8);
1073         rt73usb_bbp_write(rt2x00dev, 22, 0x38);
1074         rt73usb_bbp_write(rt2x00dev, 23, 0x06);
1075         rt73usb_bbp_write(rt2x00dev, 24, 0xfe);
1076         rt73usb_bbp_write(rt2x00dev, 25, 0x0a);
1077         rt73usb_bbp_write(rt2x00dev, 26, 0x0d);
1078         rt73usb_bbp_write(rt2x00dev, 32, 0x0b);
1079         rt73usb_bbp_write(rt2x00dev, 34, 0x12);
1080         rt73usb_bbp_write(rt2x00dev, 37, 0x07);
1081         rt73usb_bbp_write(rt2x00dev, 39, 0xf8);
1082         rt73usb_bbp_write(rt2x00dev, 41, 0x60);
1083         rt73usb_bbp_write(rt2x00dev, 53, 0x10);
1084         rt73usb_bbp_write(rt2x00dev, 54, 0x18);
1085         rt73usb_bbp_write(rt2x00dev, 60, 0x10);
1086         rt73usb_bbp_write(rt2x00dev, 61, 0x04);
1087         rt73usb_bbp_write(rt2x00dev, 62, 0x04);
1088         rt73usb_bbp_write(rt2x00dev, 75, 0xfe);
1089         rt73usb_bbp_write(rt2x00dev, 86, 0xfe);
1090         rt73usb_bbp_write(rt2x00dev, 88, 0xfe);
1091         rt73usb_bbp_write(rt2x00dev, 90, 0x0f);
1092         rt73usb_bbp_write(rt2x00dev, 99, 0x00);
1093         rt73usb_bbp_write(rt2x00dev, 102, 0x16);
1094         rt73usb_bbp_write(rt2x00dev, 107, 0x04);
1095
1096         DEBUG(rt2x00dev, "Start initialization from EEPROM...\n");
1097         for (i = 0; i < EEPROM_BBP_SIZE; i++) {
1098                 rt2x00_eeprom_read(rt2x00dev, EEPROM_BBP_START + i, &eeprom);
1099
1100                 if (eeprom != 0xffff && eeprom != 0x0000) {
1101                         reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID);
1102                         value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE);
1103                         DEBUG(rt2x00dev, "BBP: 0x%02x, value: 0x%02x.\n",
1104                               reg_id, value);
1105                         rt73usb_bbp_write(rt2x00dev, reg_id, value);
1106                 }
1107         }
1108         DEBUG(rt2x00dev, "...End initialization from EEPROM.\n");
1109
1110         return 0;
1111 }
1112
1113 /*
1114  * Device state switch handlers.
1115  */
1116 static void rt73usb_toggle_rx(struct rt2x00_dev *rt2x00dev,
1117                               enum dev_state state)
1118 {
1119         u32 reg;
1120
1121         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1122         rt2x00_set_field32(&reg, TXRX_CSR0_DISABLE_RX,
1123                            state == STATE_RADIO_RX_OFF);
1124         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1125 }
1126
1127 static int rt73usb_enable_radio(struct rt2x00_dev *rt2x00dev)
1128 {
1129         /*
1130          * Initialize all registers.
1131          */
1132         if (rt73usb_init_registers(rt2x00dev) ||
1133             rt73usb_init_bbp(rt2x00dev)) {
1134                 ERROR(rt2x00dev, "Register initialization failed.\n");
1135                 return -EIO;
1136         }
1137
1138         rt2x00usb_enable_radio(rt2x00dev);
1139
1140         /*
1141          * Enable LED
1142          */
1143         rt73usb_enable_led(rt2x00dev);
1144
1145         return 0;
1146 }
1147
1148 static void rt73usb_disable_radio(struct rt2x00_dev *rt2x00dev)
1149 {
1150         /*
1151          * Disable LED
1152          */
1153         rt73usb_disable_led(rt2x00dev);
1154
1155         rt73usb_register_write(rt2x00dev, MAC_CSR10, 0x00001818);
1156
1157         /*
1158          * Disable synchronisation.
1159          */
1160         rt73usb_register_write(rt2x00dev, TXRX_CSR9, 0);
1161
1162         rt2x00usb_disable_radio(rt2x00dev);
1163 }
1164
1165 static int rt73usb_set_state(struct rt2x00_dev *rt2x00dev, enum dev_state state)
1166 {
1167         u32 reg;
1168         unsigned int i;
1169         char put_to_sleep;
1170         char current_state;
1171
1172         put_to_sleep = (state != STATE_AWAKE);
1173
1174         rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1175         rt2x00_set_field32(&reg, MAC_CSR12_FORCE_WAKEUP, !put_to_sleep);
1176         rt2x00_set_field32(&reg, MAC_CSR12_PUT_TO_SLEEP, put_to_sleep);
1177         rt73usb_register_write(rt2x00dev, MAC_CSR12, reg);
1178
1179         /*
1180          * Device is not guaranteed to be in the requested state yet.
1181          * We must wait until the register indicates that the
1182          * device has entered the correct state.
1183          */
1184         for (i = 0; i < REGISTER_BUSY_COUNT; i++) {
1185                 rt73usb_register_read(rt2x00dev, MAC_CSR12, &reg);
1186                 current_state =
1187                     rt2x00_get_field32(reg, MAC_CSR12_BBP_CURRENT_STATE);
1188                 if (current_state == !put_to_sleep)
1189                         return 0;
1190                 msleep(10);
1191         }
1192
1193         NOTICE(rt2x00dev, "Device failed to enter state %d, "
1194                "current device state %d.\n", !put_to_sleep, current_state);
1195
1196         return -EBUSY;
1197 }
1198
1199 static int rt73usb_set_device_state(struct rt2x00_dev *rt2x00dev,
1200                                     enum dev_state state)
1201 {
1202         int retval = 0;
1203
1204         switch (state) {
1205         case STATE_RADIO_ON:
1206                 retval = rt73usb_enable_radio(rt2x00dev);
1207                 break;
1208         case STATE_RADIO_OFF:
1209                 rt73usb_disable_radio(rt2x00dev);
1210                 break;
1211         case STATE_RADIO_RX_ON:
1212         case STATE_RADIO_RX_OFF:
1213                 rt73usb_toggle_rx(rt2x00dev, state);
1214                 break;
1215         case STATE_DEEP_SLEEP:
1216         case STATE_SLEEP:
1217         case STATE_STANDBY:
1218         case STATE_AWAKE:
1219                 retval = rt73usb_set_state(rt2x00dev, state);
1220                 break;
1221         default:
1222                 retval = -ENOTSUPP;
1223                 break;
1224         }
1225
1226         return retval;
1227 }
1228
1229 /*
1230  * TX descriptor initialization
1231  */
1232 static void rt73usb_write_tx_desc(struct rt2x00_dev *rt2x00dev,
1233                                   __le32 *txd,
1234                                   struct txdata_entry_desc *desc,
1235                                   struct ieee80211_hdr *ieee80211hdr,
1236                                   unsigned int length,
1237                                   struct ieee80211_tx_control *control)
1238 {
1239         u32 word;
1240
1241         /*
1242          * Start writing the descriptor words.
1243          */
1244         rt2x00_desc_read(txd, 1, &word);
1245         rt2x00_set_field32(&word, TXD_W1_HOST_Q_ID, desc->queue);
1246         rt2x00_set_field32(&word, TXD_W1_AIFSN, desc->aifs);
1247         rt2x00_set_field32(&word, TXD_W1_CWMIN, desc->cw_min);
1248         rt2x00_set_field32(&word, TXD_W1_CWMAX, desc->cw_max);
1249         rt2x00_set_field32(&word, TXD_W1_IV_OFFSET, IEEE80211_HEADER);
1250         rt2x00_set_field32(&word, TXD_W1_HW_SEQUENCE, 1);
1251         rt2x00_desc_write(txd, 1, word);
1252
1253         rt2x00_desc_read(txd, 2, &word);
1254         rt2x00_set_field32(&word, TXD_W2_PLCP_SIGNAL, desc->signal);
1255         rt2x00_set_field32(&word, TXD_W2_PLCP_SERVICE, desc->service);
1256         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_LOW, desc->length_low);
1257         rt2x00_set_field32(&word, TXD_W2_PLCP_LENGTH_HIGH, desc->length_high);
1258         rt2x00_desc_write(txd, 2, word);
1259
1260         rt2x00_desc_read(txd, 5, &word);
1261         rt2x00_set_field32(&word, TXD_W5_TX_POWER,
1262                            TXPOWER_TO_DEV(control->power_level));
1263         rt2x00_set_field32(&word, TXD_W5_WAITING_DMA_DONE_INT, 1);
1264         rt2x00_desc_write(txd, 5, word);
1265
1266         rt2x00_desc_read(txd, 0, &word);
1267         rt2x00_set_field32(&word, TXD_W0_BURST,
1268                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1269         rt2x00_set_field32(&word, TXD_W0_VALID, 1);
1270         rt2x00_set_field32(&word, TXD_W0_MORE_FRAG,
1271                            test_bit(ENTRY_TXD_MORE_FRAG, &desc->flags));
1272         rt2x00_set_field32(&word, TXD_W0_ACK,
1273                            test_bit(ENTRY_TXD_ACK, &desc->flags));
1274         rt2x00_set_field32(&word, TXD_W0_TIMESTAMP,
1275                            test_bit(ENTRY_TXD_REQ_TIMESTAMP, &desc->flags));
1276         rt2x00_set_field32(&word, TXD_W0_OFDM,
1277                            test_bit(ENTRY_TXD_OFDM_RATE, &desc->flags));
1278         rt2x00_set_field32(&word, TXD_W0_IFS, desc->ifs);
1279         rt2x00_set_field32(&word, TXD_W0_RETRY_MODE,
1280                            !!(control->flags &
1281                               IEEE80211_TXCTL_LONG_RETRY_LIMIT));
1282         rt2x00_set_field32(&word, TXD_W0_TKIP_MIC, 0);
1283         rt2x00_set_field32(&word, TXD_W0_DATABYTE_COUNT, length);
1284         rt2x00_set_field32(&word, TXD_W0_BURST2,
1285                            test_bit(ENTRY_TXD_BURST, &desc->flags));
1286         rt2x00_set_field32(&word, TXD_W0_CIPHER_ALG, CIPHER_NONE);
1287         rt2x00_desc_write(txd, 0, word);
1288 }
1289
1290 static int rt73usb_get_tx_data_len(struct rt2x00_dev *rt2x00dev,
1291                                    struct sk_buff *skb)
1292 {
1293         int length;
1294
1295         /*
1296          * The length _must_ be a multiple of 4,
1297          * but it must _not_ be a multiple of the USB packet size.
1298          */
1299         length = roundup(skb->len, 4);
1300         length += (4 * !(length % rt2x00dev->usb_maxpacket));
1301
1302         return length;
1303 }
1304
1305 /*
1306  * TX data initialization
1307  */
1308 static void rt73usb_kick_tx_queue(struct rt2x00_dev *rt2x00dev,
1309                                   unsigned int queue)
1310 {
1311         u32 reg;
1312
1313         if (queue != IEEE80211_TX_QUEUE_BEACON)
1314                 return;
1315
1316         /*
1317          * For Wi-Fi faily generated beacons between participating stations.
1318          * Set TBTT phase adaptive adjustment step to 8us (default 16us)
1319          */
1320         rt73usb_register_write(rt2x00dev, TXRX_CSR10, 0x00001008);
1321
1322         rt73usb_register_read(rt2x00dev, TXRX_CSR9, &reg);
1323         if (!rt2x00_get_field32(reg, TXRX_CSR9_BEACON_GEN)) {
1324                 rt2x00_set_field32(&reg, TXRX_CSR9_BEACON_GEN, 1);
1325                 rt73usb_register_write(rt2x00dev, TXRX_CSR9, reg);
1326         }
1327 }
1328
1329 /*
1330  * RX control handlers
1331  */
1332 static int rt73usb_agc_to_rssi(struct rt2x00_dev *rt2x00dev, int rxd_w1)
1333 {
1334         u16 eeprom;
1335         u8 offset;
1336         u8 lna;
1337
1338         lna = rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_LNA);
1339         switch (lna) {
1340         case 3:
1341                 offset = 90;
1342                 break;
1343         case 2:
1344                 offset = 74;
1345                 break;
1346         case 1:
1347                 offset = 64;
1348                 break;
1349         default:
1350                 return 0;
1351         }
1352
1353         if (rt2x00dev->rx_status.phymode == MODE_IEEE80211A) {
1354                 if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) {
1355                         if (lna == 3 || lna == 2)
1356                                 offset += 10;
1357                 } else {
1358                         if (lna == 3)
1359                                 offset += 6;
1360                         else if (lna == 2)
1361                                 offset += 8;
1362                 }
1363
1364                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &eeprom);
1365                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_A_1);
1366         } else {
1367                 if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags))
1368                         offset += 14;
1369
1370                 rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &eeprom);
1371                 offset -= rt2x00_get_field16(eeprom, EEPROM_RSSI_OFFSET_BG_1);
1372         }
1373
1374         return rt2x00_get_field32(rxd_w1, RXD_W1_RSSI_AGC) * 2 - offset;
1375 }
1376
1377 static void rt73usb_fill_rxdone(struct data_entry *entry,
1378                                 struct rxdata_entry_desc *desc)
1379 {
1380         __le32 *rxd = (__le32 *)entry->skb->data;
1381         u32 word0;
1382         u32 word1;
1383
1384         rt2x00_desc_read(rxd, 0, &word0);
1385         rt2x00_desc_read(rxd, 1, &word1);
1386
1387         desc->flags = 0;
1388         if (rt2x00_get_field32(word0, RXD_W0_CRC_ERROR))
1389                 desc->flags |= RX_FLAG_FAILED_FCS_CRC;
1390
1391         /*
1392          * Obtain the status about this packet.
1393          */
1394         desc->signal = rt2x00_get_field32(word1, RXD_W1_SIGNAL);
1395         desc->rssi = rt73usb_agc_to_rssi(entry->ring->rt2x00dev, word1);
1396         desc->ofdm = rt2x00_get_field32(word0, RXD_W0_OFDM);
1397         desc->size = rt2x00_get_field32(word0, RXD_W0_DATABYTE_COUNT);
1398
1399         /*
1400          * Pull the skb to clear the descriptor area.
1401          */
1402         skb_pull(entry->skb, entry->ring->desc_size);
1403
1404         return;
1405 }
1406
1407 /*
1408  * Device probe functions.
1409  */
1410 static int rt73usb_validate_eeprom(struct rt2x00_dev *rt2x00dev)
1411 {
1412         u16 word;
1413         u8 *mac;
1414         s8 value;
1415
1416         rt2x00usb_eeprom_read(rt2x00dev, rt2x00dev->eeprom, EEPROM_SIZE);
1417
1418         /*
1419          * Start validation of the data that has been read.
1420          */
1421         mac = rt2x00_eeprom_addr(rt2x00dev, EEPROM_MAC_ADDR_0);
1422         if (!is_valid_ether_addr(mac)) {
1423                 DECLARE_MAC_BUF(macbuf);
1424
1425                 random_ether_addr(mac);
1426                 EEPROM(rt2x00dev, "MAC: %s\n", print_mac(macbuf, mac));
1427         }
1428
1429         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &word);
1430         if (word == 0xffff) {
1431                 rt2x00_set_field16(&word, EEPROM_ANTENNA_NUM, 2);
1432                 rt2x00_set_field16(&word, EEPROM_ANTENNA_TX_DEFAULT,
1433                                    ANTENNA_B);
1434                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RX_DEFAULT,
1435                                    ANTENNA_B);
1436                 rt2x00_set_field16(&word, EEPROM_ANTENNA_FRAME_TYPE, 0);
1437                 rt2x00_set_field16(&word, EEPROM_ANTENNA_DYN_TXAGC, 0);
1438                 rt2x00_set_field16(&word, EEPROM_ANTENNA_HARDWARE_RADIO, 0);
1439                 rt2x00_set_field16(&word, EEPROM_ANTENNA_RF_TYPE, RF5226);
1440                 rt2x00_eeprom_write(rt2x00dev, EEPROM_ANTENNA, word);
1441                 EEPROM(rt2x00dev, "Antenna: 0x%04x\n", word);
1442         }
1443
1444         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &word);
1445         if (word == 0xffff) {
1446                 rt2x00_set_field16(&word, EEPROM_NIC_EXTERNAL_LNA, 0);
1447                 rt2x00_eeprom_write(rt2x00dev, EEPROM_NIC, word);
1448                 EEPROM(rt2x00dev, "NIC: 0x%04x\n", word);
1449         }
1450
1451         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &word);
1452         if (word == 0xffff) {
1453                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_G, 0);
1454                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_RDY_A, 0);
1455                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_ACT, 0);
1456                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_0, 0);
1457                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_1, 0);
1458                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_2, 0);
1459                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_3, 0);
1460                 rt2x00_set_field16(&word, EEPROM_LED_POLARITY_GPIO_4, 0);
1461                 rt2x00_set_field16(&word, EEPROM_LED_LED_MODE,
1462                                    LED_MODE_DEFAULT);
1463                 rt2x00_eeprom_write(rt2x00dev, EEPROM_LED, word);
1464                 EEPROM(rt2x00dev, "Led: 0x%04x\n", word);
1465         }
1466
1467         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &word);
1468         if (word == 0xffff) {
1469                 rt2x00_set_field16(&word, EEPROM_FREQ_OFFSET, 0);
1470                 rt2x00_set_field16(&word, EEPROM_FREQ_SEQ, 0);
1471                 rt2x00_eeprom_write(rt2x00dev, EEPROM_FREQ, word);
1472                 EEPROM(rt2x00dev, "Freq: 0x%04x\n", word);
1473         }
1474
1475         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_BG, &word);
1476         if (word == 0xffff) {
1477                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1478                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1479                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1480                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1481         } else {
1482                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_1);
1483                 if (value < -10 || value > 10)
1484                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_1, 0);
1485                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_BG_2);
1486                 if (value < -10 || value > 10)
1487                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_BG_2, 0);
1488                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_BG, word);
1489         }
1490
1491         rt2x00_eeprom_read(rt2x00dev, EEPROM_RSSI_OFFSET_A, &word);
1492         if (word == 0xffff) {
1493                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1494                 rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1495                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1496                 EEPROM(rt2x00dev, "RSSI OFFSET BG: 0x%04x\n", word);
1497         } else {
1498                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_1);
1499                 if (value < -10 || value > 10)
1500                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_1, 0);
1501                 value = rt2x00_get_field16(word, EEPROM_RSSI_OFFSET_A_2);
1502                 if (value < -10 || value > 10)
1503                         rt2x00_set_field16(&word, EEPROM_RSSI_OFFSET_A_2, 0);
1504                 rt2x00_eeprom_write(rt2x00dev, EEPROM_RSSI_OFFSET_A, word);
1505         }
1506
1507         return 0;
1508 }
1509
1510 static int rt73usb_init_eeprom(struct rt2x00_dev *rt2x00dev)
1511 {
1512         u32 reg;
1513         u16 value;
1514         u16 eeprom;
1515
1516         /*
1517          * Read EEPROM word for configuration.
1518          */
1519         rt2x00_eeprom_read(rt2x00dev, EEPROM_ANTENNA, &eeprom);
1520
1521         /*
1522          * Identify RF chipset.
1523          */
1524         value = rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RF_TYPE);
1525         rt73usb_register_read(rt2x00dev, MAC_CSR0, &reg);
1526         rt2x00_set_chip(rt2x00dev, RT2571, value, reg);
1527
1528         if (!rt2x00_check_rev(&rt2x00dev->chip, 0x25730)) {
1529                 ERROR(rt2x00dev, "Invalid RT chipset detected.\n");
1530                 return -ENODEV;
1531         }
1532
1533         if (!rt2x00_rf(&rt2x00dev->chip, RF5226) &&
1534             !rt2x00_rf(&rt2x00dev->chip, RF2528) &&
1535             !rt2x00_rf(&rt2x00dev->chip, RF5225) &&
1536             !rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1537                 ERROR(rt2x00dev, "Invalid RF chipset detected.\n");
1538                 return -ENODEV;
1539         }
1540
1541         /*
1542          * Identify default antenna configuration.
1543          */
1544         rt2x00dev->default_ant.tx =
1545             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_TX_DEFAULT);
1546         rt2x00dev->default_ant.rx =
1547             rt2x00_get_field16(eeprom, EEPROM_ANTENNA_RX_DEFAULT);
1548
1549         /*
1550          * Read the Frame type.
1551          */
1552         if (rt2x00_get_field16(eeprom, EEPROM_ANTENNA_FRAME_TYPE))
1553                 __set_bit(CONFIG_FRAME_TYPE, &rt2x00dev->flags);
1554
1555         /*
1556          * Read frequency offset.
1557          */
1558         rt2x00_eeprom_read(rt2x00dev, EEPROM_FREQ, &eeprom);
1559         rt2x00dev->freq_offset = rt2x00_get_field16(eeprom, EEPROM_FREQ_OFFSET);
1560
1561         /*
1562          * Read external LNA informations.
1563          */
1564         rt2x00_eeprom_read(rt2x00dev, EEPROM_NIC, &eeprom);
1565
1566         if (rt2x00_get_field16(eeprom, EEPROM_NIC_EXTERNAL_LNA)) {
1567                 __set_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags);
1568                 __set_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags);
1569         }
1570
1571         /*
1572          * Store led settings, for correct led behaviour.
1573          */
1574         rt2x00_eeprom_read(rt2x00dev, EEPROM_LED, &eeprom);
1575
1576         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_LED_MODE,
1577                            rt2x00dev->led_mode);
1578         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_0,
1579                            rt2x00_get_field16(eeprom,
1580                                               EEPROM_LED_POLARITY_GPIO_0));
1581         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_1,
1582                            rt2x00_get_field16(eeprom,
1583                                               EEPROM_LED_POLARITY_GPIO_1));
1584         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_2,
1585                            rt2x00_get_field16(eeprom,
1586                                               EEPROM_LED_POLARITY_GPIO_2));
1587         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_3,
1588                            rt2x00_get_field16(eeprom,
1589                                               EEPROM_LED_POLARITY_GPIO_3));
1590         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_GPIO_4,
1591                            rt2x00_get_field16(eeprom,
1592                                               EEPROM_LED_POLARITY_GPIO_4));
1593         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_ACT,
1594                            rt2x00_get_field16(eeprom, EEPROM_LED_POLARITY_ACT));
1595         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_BG,
1596                            rt2x00_get_field16(eeprom,
1597                                               EEPROM_LED_POLARITY_RDY_G));
1598         rt2x00_set_field16(&rt2x00dev->led_reg, MCU_LEDCS_POLARITY_READY_A,
1599                            rt2x00_get_field16(eeprom,
1600                                               EEPROM_LED_POLARITY_RDY_A));
1601
1602         return 0;
1603 }
1604
1605 /*
1606  * RF value list for RF2528
1607  * Supports: 2.4 GHz
1608  */
1609 static const struct rf_channel rf_vals_bg_2528[] = {
1610         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1611         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1612         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1613         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1614         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1615         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1616         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1617         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1618         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1619         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1620         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1621         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1622         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1623         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1624 };
1625
1626 /*
1627  * RF value list for RF5226
1628  * Supports: 2.4 GHz & 5.2 GHz
1629  */
1630 static const struct rf_channel rf_vals_5226[] = {
1631         { 1,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea0b },
1632         { 2,  0x00002c0c, 0x00000786, 0x00068255, 0x000fea1f },
1633         { 3,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea0b },
1634         { 4,  0x00002c0c, 0x0000078a, 0x00068255, 0x000fea1f },
1635         { 5,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea0b },
1636         { 6,  0x00002c0c, 0x0000078e, 0x00068255, 0x000fea1f },
1637         { 7,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea0b },
1638         { 8,  0x00002c0c, 0x00000792, 0x00068255, 0x000fea1f },
1639         { 9,  0x00002c0c, 0x00000796, 0x00068255, 0x000fea0b },
1640         { 10, 0x00002c0c, 0x00000796, 0x00068255, 0x000fea1f },
1641         { 11, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea0b },
1642         { 12, 0x00002c0c, 0x0000079a, 0x00068255, 0x000fea1f },
1643         { 13, 0x00002c0c, 0x0000079e, 0x00068255, 0x000fea0b },
1644         { 14, 0x00002c0c, 0x000007a2, 0x00068255, 0x000fea13 },
1645
1646         /* 802.11 UNI / HyperLan 2 */
1647         { 36, 0x00002c0c, 0x0000099a, 0x00098255, 0x000fea23 },
1648         { 40, 0x00002c0c, 0x000009a2, 0x00098255, 0x000fea03 },
1649         { 44, 0x00002c0c, 0x000009a6, 0x00098255, 0x000fea0b },
1650         { 48, 0x00002c0c, 0x000009aa, 0x00098255, 0x000fea13 },
1651         { 52, 0x00002c0c, 0x000009ae, 0x00098255, 0x000fea1b },
1652         { 56, 0x00002c0c, 0x000009b2, 0x00098255, 0x000fea23 },
1653         { 60, 0x00002c0c, 0x000009ba, 0x00098255, 0x000fea03 },
1654         { 64, 0x00002c0c, 0x000009be, 0x00098255, 0x000fea0b },
1655
1656         /* 802.11 HyperLan 2 */
1657         { 100, 0x00002c0c, 0x00000a2a, 0x000b8255, 0x000fea03 },
1658         { 104, 0x00002c0c, 0x00000a2e, 0x000b8255, 0x000fea0b },
1659         { 108, 0x00002c0c, 0x00000a32, 0x000b8255, 0x000fea13 },
1660         { 112, 0x00002c0c, 0x00000a36, 0x000b8255, 0x000fea1b },
1661         { 116, 0x00002c0c, 0x00000a3a, 0x000b8255, 0x000fea23 },
1662         { 120, 0x00002c0c, 0x00000a82, 0x000b8255, 0x000fea03 },
1663         { 124, 0x00002c0c, 0x00000a86, 0x000b8255, 0x000fea0b },
1664         { 128, 0x00002c0c, 0x00000a8a, 0x000b8255, 0x000fea13 },
1665         { 132, 0x00002c0c, 0x00000a8e, 0x000b8255, 0x000fea1b },
1666         { 136, 0x00002c0c, 0x00000a92, 0x000b8255, 0x000fea23 },
1667
1668         /* 802.11 UNII */
1669         { 140, 0x00002c0c, 0x00000a9a, 0x000b8255, 0x000fea03 },
1670         { 149, 0x00002c0c, 0x00000aa2, 0x000b8255, 0x000fea1f },
1671         { 153, 0x00002c0c, 0x00000aa6, 0x000b8255, 0x000fea27 },
1672         { 157, 0x00002c0c, 0x00000aae, 0x000b8255, 0x000fea07 },
1673         { 161, 0x00002c0c, 0x00000ab2, 0x000b8255, 0x000fea0f },
1674         { 165, 0x00002c0c, 0x00000ab6, 0x000b8255, 0x000fea17 },
1675
1676         /* MMAC(Japan)J52 ch 34,38,42,46 */
1677         { 34, 0x00002c0c, 0x0008099a, 0x000da255, 0x000d3a0b },
1678         { 38, 0x00002c0c, 0x0008099e, 0x000da255, 0x000d3a13 },
1679         { 42, 0x00002c0c, 0x000809a2, 0x000da255, 0x000d3a1b },
1680         { 46, 0x00002c0c, 0x000809a6, 0x000da255, 0x000d3a23 },
1681 };
1682
1683 /*
1684  * RF value list for RF5225 & RF2527
1685  * Supports: 2.4 GHz & 5.2 GHz
1686  */
1687 static const struct rf_channel rf_vals_5225_2527[] = {
1688         { 1,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa0b },
1689         { 2,  0x00002ccc, 0x00004786, 0x00068455, 0x000ffa1f },
1690         { 3,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa0b },
1691         { 4,  0x00002ccc, 0x0000478a, 0x00068455, 0x000ffa1f },
1692         { 5,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa0b },
1693         { 6,  0x00002ccc, 0x0000478e, 0x00068455, 0x000ffa1f },
1694         { 7,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa0b },
1695         { 8,  0x00002ccc, 0x00004792, 0x00068455, 0x000ffa1f },
1696         { 9,  0x00002ccc, 0x00004796, 0x00068455, 0x000ffa0b },
1697         { 10, 0x00002ccc, 0x00004796, 0x00068455, 0x000ffa1f },
1698         { 11, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa0b },
1699         { 12, 0x00002ccc, 0x0000479a, 0x00068455, 0x000ffa1f },
1700         { 13, 0x00002ccc, 0x0000479e, 0x00068455, 0x000ffa0b },
1701         { 14, 0x00002ccc, 0x000047a2, 0x00068455, 0x000ffa13 },
1702
1703         /* 802.11 UNI / HyperLan 2 */
1704         { 36, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa23 },
1705         { 40, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa03 },
1706         { 44, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa0b },
1707         { 48, 0x00002ccc, 0x000049aa, 0x0009be55, 0x000ffa13 },
1708         { 52, 0x00002ccc, 0x000049ae, 0x0009ae55, 0x000ffa1b },
1709         { 56, 0x00002ccc, 0x000049b2, 0x0009ae55, 0x000ffa23 },
1710         { 60, 0x00002ccc, 0x000049ba, 0x0009ae55, 0x000ffa03 },
1711         { 64, 0x00002ccc, 0x000049be, 0x0009ae55, 0x000ffa0b },
1712
1713         /* 802.11 HyperLan 2 */
1714         { 100, 0x00002ccc, 0x00004a2a, 0x000bae55, 0x000ffa03 },
1715         { 104, 0x00002ccc, 0x00004a2e, 0x000bae55, 0x000ffa0b },
1716         { 108, 0x00002ccc, 0x00004a32, 0x000bae55, 0x000ffa13 },
1717         { 112, 0x00002ccc, 0x00004a36, 0x000bae55, 0x000ffa1b },
1718         { 116, 0x00002ccc, 0x00004a3a, 0x000bbe55, 0x000ffa23 },
1719         { 120, 0x00002ccc, 0x00004a82, 0x000bbe55, 0x000ffa03 },
1720         { 124, 0x00002ccc, 0x00004a86, 0x000bbe55, 0x000ffa0b },
1721         { 128, 0x00002ccc, 0x00004a8a, 0x000bbe55, 0x000ffa13 },
1722         { 132, 0x00002ccc, 0x00004a8e, 0x000bbe55, 0x000ffa1b },
1723         { 136, 0x00002ccc, 0x00004a92, 0x000bbe55, 0x000ffa23 },
1724
1725         /* 802.11 UNII */
1726         { 140, 0x00002ccc, 0x00004a9a, 0x000bbe55, 0x000ffa03 },
1727         { 149, 0x00002ccc, 0x00004aa2, 0x000bbe55, 0x000ffa1f },
1728         { 153, 0x00002ccc, 0x00004aa6, 0x000bbe55, 0x000ffa27 },
1729         { 157, 0x00002ccc, 0x00004aae, 0x000bbe55, 0x000ffa07 },
1730         { 161, 0x00002ccc, 0x00004ab2, 0x000bbe55, 0x000ffa0f },
1731         { 165, 0x00002ccc, 0x00004ab6, 0x000bbe55, 0x000ffa17 },
1732
1733         /* MMAC(Japan)J52 ch 34,38,42,46 */
1734         { 34, 0x00002ccc, 0x0000499a, 0x0009be55, 0x000ffa0b },
1735         { 38, 0x00002ccc, 0x0000499e, 0x0009be55, 0x000ffa13 },
1736         { 42, 0x00002ccc, 0x000049a2, 0x0009be55, 0x000ffa1b },
1737         { 46, 0x00002ccc, 0x000049a6, 0x0009be55, 0x000ffa23 },
1738 };
1739
1740
1741 static void rt73usb_probe_hw_mode(struct rt2x00_dev *rt2x00dev)
1742 {
1743         struct hw_mode_spec *spec = &rt2x00dev->spec;
1744         u8 *txpower;
1745         unsigned int i;
1746
1747         /*
1748          * Initialize all hw fields.
1749          */
1750         rt2x00dev->hw->flags =
1751             IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE |
1752             IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING;
1753         rt2x00dev->hw->extra_tx_headroom = TXD_DESC_SIZE;
1754         rt2x00dev->hw->max_signal = MAX_SIGNAL;
1755         rt2x00dev->hw->max_rssi = MAX_RX_SSI;
1756         rt2x00dev->hw->queues = 5;
1757
1758         SET_IEEE80211_DEV(rt2x00dev->hw, &rt2x00dev_usb(rt2x00dev)->dev);
1759         SET_IEEE80211_PERM_ADDR(rt2x00dev->hw,
1760                                 rt2x00_eeprom_addr(rt2x00dev,
1761                                                    EEPROM_MAC_ADDR_0));
1762
1763         /*
1764          * Convert tx_power array in eeprom.
1765          */
1766         txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_G_START);
1767         for (i = 0; i < 14; i++)
1768                 txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1769
1770         /*
1771          * Initialize hw_mode information.
1772          */
1773         spec->num_modes = 2;
1774         spec->num_rates = 12;
1775         spec->tx_power_a = NULL;
1776         spec->tx_power_bg = txpower;
1777         spec->tx_power_default = DEFAULT_TXPOWER;
1778
1779         if (rt2x00_rf(&rt2x00dev->chip, RF2528)) {
1780                 spec->num_channels = ARRAY_SIZE(rf_vals_bg_2528);
1781                 spec->channels = rf_vals_bg_2528;
1782         } else if (rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1783                 spec->num_channels = ARRAY_SIZE(rf_vals_5226);
1784                 spec->channels = rf_vals_5226;
1785         } else if (rt2x00_rf(&rt2x00dev->chip, RF2527)) {
1786                 spec->num_channels = 14;
1787                 spec->channels = rf_vals_5225_2527;
1788         } else if (rt2x00_rf(&rt2x00dev->chip, RF5225)) {
1789                 spec->num_channels = ARRAY_SIZE(rf_vals_5225_2527);
1790                 spec->channels = rf_vals_5225_2527;
1791         }
1792
1793         if (rt2x00_rf(&rt2x00dev->chip, RF5225) ||
1794             rt2x00_rf(&rt2x00dev->chip, RF5226)) {
1795                 spec->num_modes = 3;
1796
1797                 txpower = rt2x00_eeprom_addr(rt2x00dev, EEPROM_TXPOWER_A_START);
1798                 for (i = 0; i < 14; i++)
1799                         txpower[i] = TXPOWER_FROM_DEV(txpower[i]);
1800
1801                 spec->tx_power_a = txpower;
1802         }
1803 }
1804
1805 static int rt73usb_probe_hw(struct rt2x00_dev *rt2x00dev)
1806 {
1807         int retval;
1808
1809         /*
1810          * Allocate eeprom data.
1811          */
1812         retval = rt73usb_validate_eeprom(rt2x00dev);
1813         if (retval)
1814                 return retval;
1815
1816         retval = rt73usb_init_eeprom(rt2x00dev);
1817         if (retval)
1818                 return retval;
1819
1820         /*
1821          * Initialize hw specifications.
1822          */
1823         rt73usb_probe_hw_mode(rt2x00dev);
1824
1825         /*
1826          * This device requires firmware
1827          */
1828         __set_bit(DRIVER_REQUIRE_FIRMWARE, &rt2x00dev->flags);
1829
1830         /*
1831          * Set the rssi offset.
1832          */
1833         rt2x00dev->rssi_offset = DEFAULT_RSSI_OFFSET;
1834
1835         return 0;
1836 }
1837
1838 /*
1839  * IEEE80211 stack callback functions.
1840  */
1841 static void rt73usb_configure_filter(struct ieee80211_hw *hw,
1842                                      unsigned int changed_flags,
1843                                      unsigned int *total_flags,
1844                                      int mc_count,
1845                                      struct dev_addr_list *mc_list)
1846 {
1847         struct rt2x00_dev *rt2x00dev = hw->priv;
1848         struct interface *intf = &rt2x00dev->interface;
1849         u32 reg;
1850
1851         /*
1852          * Mask off any flags we are going to ignore from
1853          * the total_flags field.
1854          */
1855         *total_flags &=
1856             FIF_ALLMULTI |
1857             FIF_FCSFAIL |
1858             FIF_PLCPFAIL |
1859             FIF_CONTROL |
1860             FIF_OTHER_BSS |
1861             FIF_PROMISC_IN_BSS;
1862
1863         /*
1864          * Apply some rules to the filters:
1865          * - Some filters imply different filters to be set.
1866          * - Some things we can't filter out at all.
1867          * - Some filters are set based on interface type.
1868          */
1869         if (mc_count)
1870                 *total_flags |= FIF_ALLMULTI;
1871         if (*total_flags & FIF_OTHER_BSS ||
1872             *total_flags & FIF_PROMISC_IN_BSS)
1873                 *total_flags |= FIF_PROMISC_IN_BSS | FIF_OTHER_BSS;
1874         if (is_interface_type(intf, IEEE80211_IF_TYPE_AP))
1875                 *total_flags |= FIF_PROMISC_IN_BSS;
1876
1877         /*
1878          * Check if there is any work left for us.
1879          */
1880         if (intf->filter == *total_flags)
1881                 return;
1882         intf->filter = *total_flags;
1883
1884         /*
1885          * When in atomic context, reschedule and let rt2x00lib
1886          * call this function again.
1887          */
1888         if (in_atomic()) {
1889                 queue_work(rt2x00dev->hw->workqueue, &rt2x00dev->filter_work);
1890                 return;
1891         }
1892
1893         /*
1894          * Start configuration steps.
1895          * Note that the version error will always be dropped
1896          * and broadcast frames will always be accepted since
1897          * there is no filter for it at this time.
1898          */
1899         rt73usb_register_read(rt2x00dev, TXRX_CSR0, &reg);
1900         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CRC,
1901                            !(*total_flags & FIF_FCSFAIL));
1902         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_PHYSICAL,
1903                            !(*total_flags & FIF_PLCPFAIL));
1904         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_CONTROL,
1905                            !(*total_flags & FIF_CONTROL));
1906         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_NOT_TO_ME,
1907                            !(*total_flags & FIF_PROMISC_IN_BSS));
1908         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_TO_DS,
1909                            !(*total_flags & FIF_PROMISC_IN_BSS));
1910         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_VERSION_ERROR, 1);
1911         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_MULTICAST,
1912                            !(*total_flags & FIF_ALLMULTI));
1913         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_BROADCAST, 0);
1914         rt2x00_set_field32(&reg, TXRX_CSR0_DROP_ACK_CTS, 1);
1915         rt73usb_register_write(rt2x00dev, TXRX_CSR0, reg);
1916 }
1917
1918 static int rt73usb_set_retry_limit(struct ieee80211_hw *hw,
1919                                    u32 short_retry, u32 long_retry)
1920 {
1921         struct rt2x00_dev *rt2x00dev = hw->priv;
1922         u32 reg;
1923
1924         rt73usb_register_read(rt2x00dev, TXRX_CSR4, &reg);
1925         rt2x00_set_field32(&reg, TXRX_CSR4_LONG_RETRY_LIMIT, long_retry);
1926         rt2x00_set_field32(&reg, TXRX_CSR4_SHORT_RETRY_LIMIT, short_retry);
1927         rt73usb_register_write(rt2x00dev, TXRX_CSR4, reg);
1928
1929         return 0;
1930 }
1931
1932 #if 0
1933 /*
1934  * Mac80211 demands get_tsf must be atomic.
1935  * This is not possible for rt73usb since all register access
1936  * functions require sleeping. Untill mac80211 no longer needs
1937  * get_tsf to be atomic, this function should be disabled.
1938  */
1939 static u64 rt73usb_get_tsf(struct ieee80211_hw *hw)
1940 {
1941         struct rt2x00_dev *rt2x00dev = hw->priv;
1942         u64 tsf;
1943         u32 reg;
1944
1945         rt73usb_register_read(rt2x00dev, TXRX_CSR13, &reg);
1946         tsf = (u64) rt2x00_get_field32(reg, TXRX_CSR13_HIGH_TSFTIMER) << 32;
1947         rt73usb_register_read(rt2x00dev, TXRX_CSR12, &reg);
1948         tsf |= rt2x00_get_field32(reg, TXRX_CSR12_LOW_TSFTIMER);
1949
1950         return tsf;
1951 }
1952 #else
1953 #define rt73usb_get_tsf NULL
1954 #endif
1955
1956 static void rt73usb_reset_tsf(struct ieee80211_hw *hw)
1957 {
1958         struct rt2x00_dev *rt2x00dev = hw->priv;
1959
1960         rt73usb_register_write(rt2x00dev, TXRX_CSR12, 0);
1961         rt73usb_register_write(rt2x00dev, TXRX_CSR13, 0);
1962 }
1963
1964 static int rt73usb_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
1965                           struct ieee80211_tx_control *control)
1966 {
1967         struct rt2x00_dev *rt2x00dev = hw->priv;
1968         struct skb_desc *desc;
1969         struct data_ring *ring;
1970         struct data_entry *entry;
1971         int timeout;
1972
1973         /*
1974          * Just in case the ieee80211 doesn't set this,
1975          * but we need this queue set for the descriptor
1976          * initialization.
1977          */
1978         control->queue = IEEE80211_TX_QUEUE_BEACON;
1979         ring = rt2x00lib_get_ring(rt2x00dev, control->queue);
1980         entry = rt2x00_get_data_entry(ring);
1981
1982         /*
1983          * Add the descriptor in front of the skb.
1984          */
1985         skb_push(skb, ring->desc_size);
1986         memset(skb->data, 0, ring->desc_size);
1987
1988         /*
1989          * Fill in skb descriptor
1990          */
1991         desc = get_skb_desc(skb);
1992         desc->desc_len = ring->desc_size;
1993         desc->data_len = skb->len - ring->desc_size;
1994         desc->desc = skb->data;
1995         desc->data = skb->data + ring->desc_size;
1996         desc->ring = ring;
1997         desc->entry = entry;
1998
1999         rt2x00lib_write_tx_desc(rt2x00dev, skb, control);
2000
2001         /*
2002          * Write entire beacon with descriptor to register,
2003          * and kick the beacon generator.
2004          */
2005         timeout = REGISTER_TIMEOUT * (skb->len / sizeof(u32));
2006         rt2x00usb_vendor_request(rt2x00dev, USB_MULTI_WRITE,
2007                                  USB_VENDOR_REQUEST_OUT,
2008                                  HW_BEACON_BASE0, 0x0000,
2009                                  skb->data, skb->len, timeout);
2010         rt73usb_kick_tx_queue(rt2x00dev, IEEE80211_TX_QUEUE_BEACON);
2011
2012         return 0;
2013 }
2014
2015 static const struct ieee80211_ops rt73usb_mac80211_ops = {
2016         .tx                     = rt2x00mac_tx,
2017         .start                  = rt2x00mac_start,
2018         .stop                   = rt2x00mac_stop,
2019         .add_interface          = rt2x00mac_add_interface,
2020         .remove_interface       = rt2x00mac_remove_interface,
2021         .config                 = rt2x00mac_config,
2022         .config_interface       = rt2x00mac_config_interface,
2023         .configure_filter       = rt73usb_configure_filter,
2024         .get_stats              = rt2x00mac_get_stats,
2025         .set_retry_limit        = rt73usb_set_retry_limit,
2026         .erp_ie_changed         = rt2x00mac_erp_ie_changed,
2027         .conf_tx                = rt2x00mac_conf_tx,
2028         .get_tx_stats           = rt2x00mac_get_tx_stats,
2029         .get_tsf                = rt73usb_get_tsf,
2030         .reset_tsf              = rt73usb_reset_tsf,
2031         .beacon_update          = rt73usb_beacon_update,
2032 };
2033
2034 static const struct rt2x00lib_ops rt73usb_rt2x00_ops = {
2035         .probe_hw               = rt73usb_probe_hw,
2036         .get_firmware_name      = rt73usb_get_firmware_name,
2037         .load_firmware          = rt73usb_load_firmware,
2038         .initialize             = rt2x00usb_initialize,
2039         .uninitialize           = rt2x00usb_uninitialize,
2040         .set_device_state       = rt73usb_set_device_state,
2041         .link_stats             = rt73usb_link_stats,
2042         .reset_tuner            = rt73usb_reset_tuner,
2043         .link_tuner             = rt73usb_link_tuner,
2044         .write_tx_desc          = rt73usb_write_tx_desc,
2045         .write_tx_data          = rt2x00usb_write_tx_data,
2046         .get_tx_data_len        = rt73usb_get_tx_data_len,
2047         .kick_tx_queue          = rt73usb_kick_tx_queue,
2048         .fill_rxdone            = rt73usb_fill_rxdone,
2049         .config_mac_addr        = rt73usb_config_mac_addr,
2050         .config_bssid           = rt73usb_config_bssid,
2051         .config_type            = rt73usb_config_type,
2052         .config_preamble        = rt73usb_config_preamble,
2053         .config                 = rt73usb_config,
2054 };
2055
2056 static const struct rt2x00_ops rt73usb_ops = {
2057         .name           = KBUILD_MODNAME,
2058         .rxd_size       = RXD_DESC_SIZE,
2059         .txd_size       = TXD_DESC_SIZE,
2060         .eeprom_size    = EEPROM_SIZE,
2061         .rf_size        = RF_SIZE,
2062         .lib            = &rt73usb_rt2x00_ops,
2063         .hw             = &rt73usb_mac80211_ops,
2064 #ifdef CONFIG_RT2X00_LIB_DEBUGFS
2065         .debugfs        = &rt73usb_rt2x00debug,
2066 #endif /* CONFIG_RT2X00_LIB_DEBUGFS */
2067 };
2068
2069 /*
2070  * rt73usb module information.
2071  */
2072 static struct usb_device_id rt73usb_device_table[] = {
2073         /* AboCom */
2074         { USB_DEVICE(0x07b8, 0xb21d), USB_DEVICE_DATA(&rt73usb_ops) },
2075         /* Askey */
2076         { USB_DEVICE(0x1690, 0x0722), USB_DEVICE_DATA(&rt73usb_ops) },
2077         /* ASUS */
2078         { USB_DEVICE(0x0b05, 0x1723), USB_DEVICE_DATA(&rt73usb_ops) },
2079         { USB_DEVICE(0x0b05, 0x1724), USB_DEVICE_DATA(&rt73usb_ops) },
2080         /* Belkin */
2081         { USB_DEVICE(0x050d, 0x7050), USB_DEVICE_DATA(&rt73usb_ops) },
2082         { USB_DEVICE(0x050d, 0x705a), USB_DEVICE_DATA(&rt73usb_ops) },
2083         { USB_DEVICE(0x050d, 0x905b), USB_DEVICE_DATA(&rt73usb_ops) },
2084         { USB_DEVICE(0x050d, 0x905c), USB_DEVICE_DATA(&rt73usb_ops) },
2085         /* Billionton */
2086         { USB_DEVICE(0x1631, 0xc019), USB_DEVICE_DATA(&rt73usb_ops) },
2087         /* Buffalo */
2088         { USB_DEVICE(0x0411, 0x00f4), USB_DEVICE_DATA(&rt73usb_ops) },
2089         /* CNet */
2090         { USB_DEVICE(0x1371, 0x9022), USB_DEVICE_DATA(&rt73usb_ops) },
2091         { USB_DEVICE(0x1371, 0x9032), USB_DEVICE_DATA(&rt73usb_ops) },
2092         /* Conceptronic */
2093         { USB_DEVICE(0x14b2, 0x3c22), USB_DEVICE_DATA(&rt73usb_ops) },
2094         /* D-Link */
2095         { USB_DEVICE(0x07d1, 0x3c03), USB_DEVICE_DATA(&rt73usb_ops) },
2096         { USB_DEVICE(0x07d1, 0x3c04), USB_DEVICE_DATA(&rt73usb_ops) },
2097         /* Gemtek */
2098         { USB_DEVICE(0x15a9, 0x0004), USB_DEVICE_DATA(&rt73usb_ops) },
2099         /* Gigabyte */
2100         { USB_DEVICE(0x1044, 0x8008), USB_DEVICE_DATA(&rt73usb_ops) },
2101         { USB_DEVICE(0x1044, 0x800a), USB_DEVICE_DATA(&rt73usb_ops) },
2102         /* Huawei-3Com */
2103         { USB_DEVICE(0x1472, 0x0009), USB_DEVICE_DATA(&rt73usb_ops) },
2104         /* Hercules */
2105         { USB_DEVICE(0x06f8, 0xe010), USB_DEVICE_DATA(&rt73usb_ops) },
2106         { USB_DEVICE(0x06f8, 0xe020), USB_DEVICE_DATA(&rt73usb_ops) },
2107         /* Linksys */
2108         { USB_DEVICE(0x13b1, 0x0020), USB_DEVICE_DATA(&rt73usb_ops) },
2109         { USB_DEVICE(0x13b1, 0x0023), USB_DEVICE_DATA(&rt73usb_ops) },
2110         /* MSI */
2111         { USB_DEVICE(0x0db0, 0x6877), USB_DEVICE_DATA(&rt73usb_ops) },
2112         { USB_DEVICE(0x0db0, 0x6874), USB_DEVICE_DATA(&rt73usb_ops) },
2113         { USB_DEVICE(0x0db0, 0xa861), USB_DEVICE_DATA(&rt73usb_ops) },
2114         { USB_DEVICE(0x0db0, 0xa874), USB_DEVICE_DATA(&rt73usb_ops) },
2115         /* Ralink */
2116         { USB_DEVICE(0x148f, 0x2573), USB_DEVICE_DATA(&rt73usb_ops) },
2117         { USB_DEVICE(0x148f, 0x2671), USB_DEVICE_DATA(&rt73usb_ops) },
2118         /* Qcom */
2119         { USB_DEVICE(0x18e8, 0x6196), USB_DEVICE_DATA(&rt73usb_ops) },
2120         { USB_DEVICE(0x18e8, 0x6229), USB_DEVICE_DATA(&rt73usb_ops) },
2121         { USB_DEVICE(0x18e8, 0x6238), USB_DEVICE_DATA(&rt73usb_ops) },
2122         /* Senao */
2123         { USB_DEVICE(0x1740, 0x7100), USB_DEVICE_DATA(&rt73usb_ops) },
2124         /* Sitecom */
2125         { USB_DEVICE(0x0df6, 0x9712), USB_DEVICE_DATA(&rt73usb_ops) },
2126         { USB_DEVICE(0x0df6, 0x90ac), USB_DEVICE_DATA(&rt73usb_ops) },
2127         /* Surecom */
2128         { USB_DEVICE(0x0769, 0x31f3), USB_DEVICE_DATA(&rt73usb_ops) },
2129         /* Planex */
2130         { USB_DEVICE(0x2019, 0xab01), USB_DEVICE_DATA(&rt73usb_ops) },
2131         { USB_DEVICE(0x2019, 0xab50), USB_DEVICE_DATA(&rt73usb_ops) },
2132         { 0, }
2133 };
2134
2135 MODULE_AUTHOR(DRV_PROJECT);
2136 MODULE_VERSION(DRV_VERSION);
2137 MODULE_DESCRIPTION("Ralink RT73 USB Wireless LAN driver.");
2138 MODULE_SUPPORTED_DEVICE("Ralink RT2571W & RT2671 USB chipset based cards");
2139 MODULE_DEVICE_TABLE(usb, rt73usb_device_table);
2140 MODULE_FIRMWARE(FIRMWARE_RT2571);
2141 MODULE_LICENSE("GPL");
2142
2143 static struct usb_driver rt73usb_driver = {
2144         .name           = KBUILD_MODNAME,
2145         .id_table       = rt73usb_device_table,
2146         .probe          = rt2x00usb_probe,
2147         .disconnect     = rt2x00usb_disconnect,
2148         .suspend        = rt2x00usb_suspend,
2149         .resume         = rt2x00usb_resume,
2150 };
2151
2152 static int __init rt73usb_init(void)
2153 {
2154         return usb_register(&rt73usb_driver);
2155 }
2156
2157 static void __exit rt73usb_exit(void)
2158 {
2159         usb_deregister(&rt73usb_driver);
2160 }
2161
2162 module_init(rt73usb_init);
2163 module_exit(rt73usb_exit);