x86: hpet: fix periodic mode programming on AMD 81xx
[linux-2.6] / arch / x86 / kernel / paravirt_patch_64.c
1 #include <asm/paravirt.h>
2 #include <asm/asm-offsets.h>
3 #include <linux/stringify.h>
4
5 DEF_NATIVE(pv_irq_ops, irq_disable, "cli");
6 DEF_NATIVE(pv_irq_ops, irq_enable, "sti");
7 DEF_NATIVE(pv_irq_ops, restore_fl, "pushq %rdi; popfq");
8 DEF_NATIVE(pv_irq_ops, save_fl, "pushfq; popq %rax");
9 DEF_NATIVE(pv_cpu_ops, iret, "iretq");
10 DEF_NATIVE(pv_mmu_ops, read_cr2, "movq %cr2, %rax");
11 DEF_NATIVE(pv_mmu_ops, read_cr3, "movq %cr3, %rax");
12 DEF_NATIVE(pv_mmu_ops, write_cr3, "movq %rdi, %cr3");
13 DEF_NATIVE(pv_mmu_ops, flush_tlb_single, "invlpg (%rdi)");
14 DEF_NATIVE(pv_cpu_ops, clts, "clts");
15 DEF_NATIVE(pv_cpu_ops, wbinvd, "wbinvd");
16
17 DEF_NATIVE(pv_cpu_ops, irq_enable_sysexit, "swapgs; sti; sysexit");
18 DEF_NATIVE(pv_cpu_ops, usergs_sysret64, "swapgs; sysretq");
19 DEF_NATIVE(pv_cpu_ops, usergs_sysret32, "swapgs; sysretl");
20 DEF_NATIVE(pv_cpu_ops, swapgs, "swapgs");
21
22 DEF_NATIVE(, mov32, "mov %edi, %eax");
23 DEF_NATIVE(, mov64, "mov %rdi, %rax");
24
25 unsigned paravirt_patch_ident_32(void *insnbuf, unsigned len)
26 {
27         return paravirt_patch_insns(insnbuf, len,
28                                     start__mov32, end__mov32);
29 }
30
31 unsigned paravirt_patch_ident_64(void *insnbuf, unsigned len)
32 {
33         return paravirt_patch_insns(insnbuf, len,
34                                     start__mov64, end__mov64);
35 }
36
37 unsigned native_patch(u8 type, u16 clobbers, void *ibuf,
38                       unsigned long addr, unsigned len)
39 {
40         const unsigned char *start, *end;
41         unsigned ret;
42
43 #define PATCH_SITE(ops, x)                                      \
44                 case PARAVIRT_PATCH(ops.x):                     \
45                         start = start_##ops##_##x;              \
46                         end = end_##ops##_##x;                  \
47                         goto patch_site
48         switch(type) {
49                 PATCH_SITE(pv_irq_ops, restore_fl);
50                 PATCH_SITE(pv_irq_ops, save_fl);
51                 PATCH_SITE(pv_irq_ops, irq_enable);
52                 PATCH_SITE(pv_irq_ops, irq_disable);
53                 PATCH_SITE(pv_cpu_ops, iret);
54                 PATCH_SITE(pv_cpu_ops, irq_enable_sysexit);
55                 PATCH_SITE(pv_cpu_ops, usergs_sysret32);
56                 PATCH_SITE(pv_cpu_ops, usergs_sysret64);
57                 PATCH_SITE(pv_cpu_ops, swapgs);
58                 PATCH_SITE(pv_mmu_ops, read_cr2);
59                 PATCH_SITE(pv_mmu_ops, read_cr3);
60                 PATCH_SITE(pv_mmu_ops, write_cr3);
61                 PATCH_SITE(pv_cpu_ops, clts);
62                 PATCH_SITE(pv_mmu_ops, flush_tlb_single);
63                 PATCH_SITE(pv_cpu_ops, wbinvd);
64
65         patch_site:
66                 ret = paravirt_patch_insns(ibuf, len, start, end);
67                 break;
68
69         default:
70                 ret = paravirt_patch_default(type, clobbers, ibuf, addr, len);
71                 break;
72         }
73 #undef PATCH_SITE
74         return ret;
75 }