Merge git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
[linux-2.6] / arch / avr32 / boards / atstk1000 / atstk1002.c
1 /*
2  * ATSTK1002/ATSTK1006 daughterboard-specific init code
3  *
4  * Copyright (C) 2005-2007 Atmel Corporation
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 #include <linux/clk.h>
11 #include <linux/etherdevice.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/platform_device.h>
15 #include <linux/string.h>
16 #include <linux/types.h>
17 #include <linux/spi/spi.h>
18 #include <linux/spi/at73c213.h>
19
20 #include <video/atmel_lcdc.h>
21
22 #include <asm/io.h>
23 #include <asm/setup.h>
24 #include <asm/arch/at32ap700x.h>
25 #include <asm/arch/board.h>
26 #include <asm/arch/init.h>
27 #include <asm/arch/portmux.h>
28
29 #include "atstk1000.h"
30
31 /* Oscillator frequencies. These are board specific */
32 unsigned long at32_board_osc_rates[3] = {
33         [0] = 32768,    /* 32.768 kHz on RTC osc */
34         [1] = 20000000, /* 20 MHz on osc0 */
35         [2] = 12000000, /* 12 MHz on osc1 */
36 };
37
38 /*
39  * The ATSTK1006 daughterboard is very similar to the ATSTK1002. Both
40  * have the AT32AP7000 chip on board; the difference is that the
41  * STK1006 has 128 MB SDRAM (the STK1002 uses the 8 MB SDRAM chip on
42  * the STK1000 motherboard) and 256 MB NAND flash (the STK1002 has
43  * none.)
44  *
45  * The RAM difference is handled by the boot loader, so the only
46  * difference we end up handling here is the NAND flash.
47  */
48 #ifdef CONFIG_BOARD_ATSTK1006
49 #include <linux/mtd/partitions.h>
50 #include <asm/arch/smc.h>
51
52 static struct smc_timing nand_timing __initdata = {
53         .ncs_read_setup         = 0,
54         .nrd_setup              = 10,
55         .ncs_write_setup        = 0,
56         .nwe_setup              = 10,
57
58         .ncs_read_pulse         = 30,
59         .nrd_pulse              = 15,
60         .ncs_write_pulse        = 30,
61         .nwe_pulse              = 15,
62
63         .read_cycle             = 30,
64         .write_cycle            = 30,
65
66         .ncs_read_recover       = 0,
67         .nrd_recover            = 15,
68         .ncs_write_recover      = 0,
69         /* WE# high -> RE# low min 60 ns */
70         .nwe_recover            = 50,
71 };
72
73 static struct smc_config nand_config __initdata = {
74         .bus_width              = 1,
75         .nrd_controlled         = 1,
76         .nwe_controlled         = 1,
77         .nwait_mode             = 0,
78         .byte_write             = 0,
79         .tdf_cycles             = 2,
80         .tdf_mode               = 0,
81 };
82
83 static struct mtd_partition nand_partitions[] = {
84         {
85                 .name           = "main",
86                 .offset         = 0x00000000,
87                 .size           = MTDPART_SIZ_FULL,
88         },
89 };
90
91 static struct mtd_partition *nand_part_info(int size, int *num_partitions)
92 {
93         *num_partitions = ARRAY_SIZE(nand_partitions);
94         return nand_partitions;
95 }
96
97 struct atmel_nand_data atstk1006_nand_data __initdata = {
98         .cle            = 21,
99         .ale            = 22,
100         .rdy_pin        = GPIO_PIN_PB(30),
101         .enable_pin     = GPIO_PIN_PB(29),
102         .partition_info = nand_part_info,
103 };
104 #endif
105
106 struct eth_addr {
107         u8 addr[6];
108 };
109
110 static struct eth_addr __initdata hw_addr[2];
111 static struct eth_platform_data __initdata eth_data[2] = {
112         {
113                 /*
114                  * The MDIO pullups on STK1000 are a bit too weak for
115                  * the autodetection to work properly, so we have to
116                  * mask out everything but the correct address.
117                  */
118                 .phy_mask       = ~(1U << 16),
119         },
120         {
121                 .phy_mask       = ~(1U << 17),
122         },
123 };
124
125 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
126 static struct at73c213_board_info at73c213_data = {
127         .ssc_id         = 0,
128         .shortname      = "AVR32 STK1000 external DAC",
129 };
130 #endif
131
132 #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
133 static struct spi_board_info spi0_board_info[] __initdata = {
134 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
135         {
136                 /* AT73C213 */
137                 .modalias       = "at73c213",
138                 .max_speed_hz   = 200000,
139                 .chip_select    = 0,
140                 .mode           = SPI_MODE_1,
141                 .platform_data  = &at73c213_data,
142         },
143 #endif
144         {
145                 /* QVGA display */
146                 .modalias       = "ltv350qv",
147                 .max_speed_hz   = 16000000,
148                 .chip_select    = 1,
149                 .mode           = SPI_MODE_3,
150         },
151 };
152 #endif
153
154 #ifdef CONFIG_BOARD_ATSTK100X_SPI1
155 static struct spi_board_info spi1_board_info[] __initdata = { {
156         /* patch in custom entries here */
157 } };
158 #endif
159
160 /*
161  * The next two functions should go away as the boot loader is
162  * supposed to initialize the macb address registers with a valid
163  * ethernet address. But we need to keep it around for a while until
164  * we can be reasonably sure the boot loader does this.
165  *
166  * The phy_id is ignored as the driver will probe for it.
167  */
168 static int __init parse_tag_ethernet(struct tag *tag)
169 {
170         int i;
171
172         i = tag->u.ethernet.mac_index;
173         if (i < ARRAY_SIZE(hw_addr))
174                 memcpy(hw_addr[i].addr, tag->u.ethernet.hw_address,
175                        sizeof(hw_addr[i].addr));
176
177         return 0;
178 }
179 __tagtable(ATAG_ETHERNET, parse_tag_ethernet);
180
181 static void __init set_hw_addr(struct platform_device *pdev)
182 {
183         struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
184         const u8 *addr;
185         void __iomem *regs;
186         struct clk *pclk;
187
188         if (!res)
189                 return;
190         if (pdev->id >= ARRAY_SIZE(hw_addr))
191                 return;
192
193         addr = hw_addr[pdev->id].addr;
194         if (!is_valid_ether_addr(addr))
195                 return;
196
197         /*
198          * Since this is board-specific code, we'll cheat and use the
199          * physical address directly as we happen to know that it's
200          * the same as the virtual address.
201          */
202         regs = (void __iomem __force *)res->start;
203         pclk = clk_get(&pdev->dev, "pclk");
204         if (!pclk)
205                 return;
206
207         clk_enable(pclk);
208         __raw_writel((addr[3] << 24) | (addr[2] << 16)
209                      | (addr[1] << 8) | addr[0], regs + 0x98);
210         __raw_writel((addr[5] << 8) | addr[4], regs + 0x9c);
211         clk_disable(pclk);
212         clk_put(pclk);
213 }
214
215 #ifdef CONFIG_BOARD_ATSTK1000_EXTDAC
216 static void __init atstk1002_setup_extdac(void)
217 {
218         struct clk *gclk;
219         struct clk *pll;
220
221         gclk = clk_get(NULL, "gclk0");
222         if (IS_ERR(gclk))
223                 goto err_gclk;
224         pll = clk_get(NULL, "pll0");
225         if (IS_ERR(pll))
226                 goto err_pll;
227
228         if (clk_set_parent(gclk, pll)) {
229                 pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n");
230                 goto err_set_clk;
231         }
232
233         at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0);
234         at73c213_data.dac_clk = gclk;
235
236 err_set_clk:
237         clk_put(pll);
238 err_pll:
239         clk_put(gclk);
240 err_gclk:
241         return;
242 }
243 #else
244 static void __init atstk1002_setup_extdac(void)
245 {
246
247 }
248 #endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */
249
250 void __init setup_board(void)
251 {
252 #ifdef  CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
253         at32_map_usart(0, 1);   /* USART 0/B: /dev/ttyS1, IRDA */
254 #else
255         at32_map_usart(1, 0);   /* USART 1/A: /dev/ttyS0, DB9 */
256 #endif
257         /* USART 2/unused: expansion connector */
258         at32_map_usart(3, 2);   /* USART 3/C: /dev/ttyS2, DB9 */
259
260         at32_setup_serial_console(0);
261 }
262
263 static int __init atstk1002_init(void)
264 {
265         /*
266          * ATSTK1000 uses 32-bit SDRAM interface. Reserve the
267          * SDRAM-specific pins so that nobody messes with them.
268          */
269         at32_reserve_pin(GPIO_PIN_PE(0));       /* DATA[16]     */
270         at32_reserve_pin(GPIO_PIN_PE(1));       /* DATA[17]     */
271         at32_reserve_pin(GPIO_PIN_PE(2));       /* DATA[18]     */
272         at32_reserve_pin(GPIO_PIN_PE(3));       /* DATA[19]     */
273         at32_reserve_pin(GPIO_PIN_PE(4));       /* DATA[20]     */
274         at32_reserve_pin(GPIO_PIN_PE(5));       /* DATA[21]     */
275         at32_reserve_pin(GPIO_PIN_PE(6));       /* DATA[22]     */
276         at32_reserve_pin(GPIO_PIN_PE(7));       /* DATA[23]     */
277         at32_reserve_pin(GPIO_PIN_PE(8));       /* DATA[24]     */
278         at32_reserve_pin(GPIO_PIN_PE(9));       /* DATA[25]     */
279         at32_reserve_pin(GPIO_PIN_PE(10));      /* DATA[26]     */
280         at32_reserve_pin(GPIO_PIN_PE(11));      /* DATA[27]     */
281         at32_reserve_pin(GPIO_PIN_PE(12));      /* DATA[28]     */
282         at32_reserve_pin(GPIO_PIN_PE(13));      /* DATA[29]     */
283         at32_reserve_pin(GPIO_PIN_PE(14));      /* DATA[30]     */
284         at32_reserve_pin(GPIO_PIN_PE(15));      /* DATA[31]     */
285         at32_reserve_pin(GPIO_PIN_PE(26));      /* SDCS         */
286
287         at32_add_system_devices();
288
289 #ifdef CONFIG_BOARD_ATSTK1006
290         smc_set_timing(&nand_config, &nand_timing);
291         smc_set_configuration(3, &nand_config);
292         at32_add_device_nand(0, &atstk1006_nand_data);
293 #endif
294
295 #ifdef  CONFIG_BOARD_ATSTK100X_SW2_CUSTOM
296         at32_add_device_usart(1);
297 #else
298         at32_add_device_usart(0);
299 #endif
300         at32_add_device_usart(2);
301
302 #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM
303         set_hw_addr(at32_add_device_eth(0, &eth_data[0]));
304 #endif
305 #ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM
306         at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info));
307 #endif
308 #ifdef CONFIG_BOARD_ATSTK100X_SPI1
309         at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info));
310 #endif
311 #ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM
312         at32_add_device_mci(0, NULL);
313 #endif
314 #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM
315         set_hw_addr(at32_add_device_eth(1, &eth_data[1]));
316 #else
317         at32_add_device_lcdc(0, &atstk1000_lcdc_data,
318                              fbmem_start, fbmem_size, 0);
319 #endif
320         at32_add_device_usba(0, NULL);
321 #ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM
322         at32_add_device_ssc(0, ATMEL_SSC_TX);
323 #endif
324
325         atstk1000_setup_j2_leds();
326         atstk1002_setup_extdac();
327
328         return 0;
329 }
330 postcore_initcall(atstk1002_init);