Merge branches 'topic/fix/misc' and 'topic/fix/hda' into for-linus
[linux-2.6] / arch / arm / mach-omap2 / mux.c
1 /*
2  * linux/arch/arm/mach-omap2/mux.c
3  *
4  * OMAP2 and OMAP3 pin multiplexing configurations
5  *
6  * Copyright (C) 2004 - 2008 Texas Instruments Inc.
7  * Copyright (C) 2003 - 2008 Nokia Corporation
8  *
9  * Written by Tony Lindgren
10  *
11  * This program is free software; you can redistribute it and/or modify
12  * it under the terms of the GNU General Public License as published by
13  * the Free Software Foundation; either version 2 of the License, or
14  * (at your option) any later version.
15  *
16  * This program is distributed in the hope that it will be useful,
17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19  * GNU General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24  *
25  */
26 #include <linux/module.h>
27 #include <linux/init.h>
28 #include <linux/io.h>
29 #include <linux/spinlock.h>
30
31 #include <asm/system.h>
32
33 #include <mach/control.h>
34 #include <mach/mux.h>
35
36 #ifdef CONFIG_OMAP_MUX
37
38 static struct omap_mux_cfg arch_mux_cfg;
39
40 /* NOTE: See mux.h for the enumeration */
41
42 #ifdef CONFIG_ARCH_OMAP24XX
43 static struct pin_config __initdata_or_module omap24xx_pins[] = {
44 /*
45  *      description                     mux     mux     pull    pull    debug
46  *                                      offset  mode    ena     type
47  */
48
49 /* 24xx I2C */
50 MUX_CFG_24XX("M19_24XX_I2C1_SCL",       0x111,  0,      0,      0,      1)
51 MUX_CFG_24XX("L15_24XX_I2C1_SDA",       0x112,  0,      0,      0,      1)
52 MUX_CFG_24XX("J15_24XX_I2C2_SCL",       0x113,  0,      0,      1,      1)
53 MUX_CFG_24XX("H19_24XX_I2C2_SDA",       0x114,  0,      0,      0,      1)
54
55 /* Menelaus interrupt */
56 MUX_CFG_24XX("W19_24XX_SYS_NIRQ",       0x12c,  0,      1,      1,      1)
57
58 /* 24xx clocks */
59 MUX_CFG_24XX("W14_24XX_SYS_CLKOUT",     0x137,  0,      1,      1,      1)
60
61 /* 24xx GPMC chipselects, wait pin monitoring */
62 MUX_CFG_24XX("E2_GPMC_NCS2",            0x08e,  0,      1,      1,      1)
63 MUX_CFG_24XX("L2_GPMC_NCS7",            0x093,  0,      1,      1,      1)
64 MUX_CFG_24XX("L3_GPMC_WAIT0",           0x09a,  0,      1,      1,      1)
65 MUX_CFG_24XX("N7_GPMC_WAIT1",           0x09b,  0,      1,      1,      1)
66 MUX_CFG_24XX("M1_GPMC_WAIT2",           0x09c,  0,      1,      1,      1)
67 MUX_CFG_24XX("P1_GPMC_WAIT3",           0x09d,  0,      1,      1,      1)
68
69 /* 24xx McBSP */
70 MUX_CFG_24XX("Y15_24XX_MCBSP2_CLKX",    0x124,  1,      1,      0,      1)
71 MUX_CFG_24XX("R14_24XX_MCBSP2_FSX",     0x125,  1,      1,      0,      1)
72 MUX_CFG_24XX("W15_24XX_MCBSP2_DR",      0x126,  1,      1,      0,      1)
73 MUX_CFG_24XX("V15_24XX_MCBSP2_DX",      0x127,  1,      1,      0,      1)
74
75 /* 24xx GPIO */
76 MUX_CFG_24XX("M21_242X_GPIO11",         0x0c9,  3,      1,      1,      1)
77 MUX_CFG_24XX("P21_242X_GPIO12",         0x0ca,  3,      0,      0,      1)
78 MUX_CFG_24XX("AA10_242X_GPIO13",        0x0e5,  3,      0,      0,      1)
79 MUX_CFG_24XX("AA6_242X_GPIO14",         0x0e6,  3,      0,      0,      1)
80 MUX_CFG_24XX("AA4_242X_GPIO15",         0x0e7,  3,      0,      0,      1)
81 MUX_CFG_24XX("Y11_242X_GPIO16",         0x0e8,  3,      0,      0,      1)
82 MUX_CFG_24XX("AA12_242X_GPIO17",        0x0e9,  3,      0,      0,      1)
83 MUX_CFG_24XX("AA8_242X_GPIO58",         0x0ea,  3,      0,      0,      1)
84 MUX_CFG_24XX("Y20_24XX_GPIO60",         0x12c,  3,      0,      0,      1)
85 MUX_CFG_24XX("W4__24XX_GPIO74",         0x0f2,  3,      0,      0,      1)
86 MUX_CFG_24XX("N15_24XX_GPIO85",         0x103,  3,      0,      0,      1)
87 MUX_CFG_24XX("M15_24XX_GPIO92",         0x10a,  3,      0,      0,      1)
88 MUX_CFG_24XX("P20_24XX_GPIO93",         0x10b,  3,      0,      0,      1)
89 MUX_CFG_24XX("P18_24XX_GPIO95",         0x10d,  3,      0,      0,      1)
90 MUX_CFG_24XX("M18_24XX_GPIO96",         0x10e,  3,      0,      0,      1)
91 MUX_CFG_24XX("L14_24XX_GPIO97",         0x10f,  3,      0,      0,      1)
92 MUX_CFG_24XX("J15_24XX_GPIO99",         0x113,  3,      1,      1,      1)
93 MUX_CFG_24XX("V14_24XX_GPIO117",        0x128,  3,      1,      0,      1)
94 MUX_CFG_24XX("P14_24XX_GPIO125",        0x140,  3,      1,      1,      1)
95
96 /* 242x DBG GPIO */
97 MUX_CFG_24XX("V4_242X_GPIO49",          0xd3,   3,      0,      0,      1)
98 MUX_CFG_24XX("W2_242X_GPIO50",          0xd4,   3,      0,      0,      1)
99 MUX_CFG_24XX("U4_242X_GPIO51",          0xd5,   3,      0,      0,      1)
100 MUX_CFG_24XX("V3_242X_GPIO52",          0xd6,   3,      0,      0,      1)
101 MUX_CFG_24XX("V2_242X_GPIO53",          0xd7,   3,      0,      0,      1)
102 MUX_CFG_24XX("V6_242X_GPIO53",          0xcf,   3,      0,      0,      1)
103 MUX_CFG_24XX("T4_242X_GPIO54",          0xd8,   3,      0,      0,      1)
104 MUX_CFG_24XX("Y4_242X_GPIO54",          0xd0,   3,      0,      0,      1)
105 MUX_CFG_24XX("T3_242X_GPIO55",          0xd9,   3,      0,      0,      1)
106 MUX_CFG_24XX("U2_242X_GPIO56",          0xda,   3,      0,      0,      1)
107
108 /* 24xx external DMA requests */
109 MUX_CFG_24XX("AA10_242X_DMAREQ0",       0x0e5,  2,      0,      0,      1)
110 MUX_CFG_24XX("AA6_242X_DMAREQ1",        0x0e6,  2,      0,      0,      1)
111 MUX_CFG_24XX("E4_242X_DMAREQ2",         0x074,  2,      0,      0,      1)
112 MUX_CFG_24XX("G4_242X_DMAREQ3",         0x073,  2,      0,      0,      1)
113 MUX_CFG_24XX("D3_242X_DMAREQ4",         0x072,  2,      0,      0,      1)
114 MUX_CFG_24XX("E3_242X_DMAREQ5",         0x071,  2,      0,      0,      1)
115
116 /* UART3 */
117 MUX_CFG_24XX("K15_24XX_UART3_TX",       0x118,  0,      0,      0,      1)
118 MUX_CFG_24XX("K14_24XX_UART3_RX",       0x119,  0,      0,      0,      1)
119
120 /* MMC/SDIO */
121 MUX_CFG_24XX("G19_24XX_MMC_CLKO",       0x0f3,  0,      0,      0,      1)
122 MUX_CFG_24XX("H18_24XX_MMC_CMD",        0x0f4,  0,      0,      0,      1)
123 MUX_CFG_24XX("F20_24XX_MMC_DAT0",       0x0f5,  0,      0,      0,      1)
124 MUX_CFG_24XX("H14_24XX_MMC_DAT1",       0x0f6,  0,      0,      0,      1)
125 MUX_CFG_24XX("E19_24XX_MMC_DAT2",       0x0f7,  0,      0,      0,      1)
126 MUX_CFG_24XX("D19_24XX_MMC_DAT3",       0x0f8,  0,      0,      0,      1)
127 MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0",   0x0f9,  0,      0,      0,      1)
128 MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1",   0x0fa,  0,      0,      0,      1)
129 MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2",   0x0fb,  0,      0,      0,      1)
130 MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3",   0x0fc,  0,      0,      0,      1)
131 MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR",    0x0fd,  0,      0,      0,      1)
132 MUX_CFG_24XX("H15_24XX_MMC_CLKI",       0x0fe,  0,      0,      0,      1)
133
134 /* Full speed USB */
135 MUX_CFG_24XX("J20_24XX_USB0_PUEN",      0x11d,  0,      0,      0,      1)
136 MUX_CFG_24XX("J19_24XX_USB0_VP",        0x11e,  0,      0,      0,      1)
137 MUX_CFG_24XX("K20_24XX_USB0_VM",        0x11f,  0,      0,      0,      1)
138 MUX_CFG_24XX("J18_24XX_USB0_RCV",       0x120,  0,      0,      0,      1)
139 MUX_CFG_24XX("K19_24XX_USB0_TXEN",      0x121,  0,      0,      0,      1)
140 MUX_CFG_24XX("J14_24XX_USB0_SE0",       0x122,  0,      0,      0,      1)
141 MUX_CFG_24XX("K18_24XX_USB0_DAT",       0x123,  0,      0,      0,      1)
142
143 MUX_CFG_24XX("N14_24XX_USB1_SE0",       0x0ed,  2,      0,      0,      1)
144 MUX_CFG_24XX("W12_24XX_USB1_SE0",       0x0dd,  3,      0,      0,      1)
145 MUX_CFG_24XX("P15_24XX_USB1_DAT",       0x0ee,  2,      0,      0,      1)
146 MUX_CFG_24XX("R13_24XX_USB1_DAT",       0x0e0,  3,      0,      0,      1)
147 MUX_CFG_24XX("W20_24XX_USB1_TXEN",      0x0ec,  2,      0,      0,      1)
148 MUX_CFG_24XX("P13_24XX_USB1_TXEN",      0x0df,  3,      0,      0,      1)
149 MUX_CFG_24XX("V19_24XX_USB1_RCV",       0x0eb,  2,      0,      0,      1)
150 MUX_CFG_24XX("V12_24XX_USB1_RCV",       0x0de,  3,      0,      0,      1)
151
152 MUX_CFG_24XX("AA10_24XX_USB2_SE0",      0x0e5,  2,      0,      0,      1)
153 MUX_CFG_24XX("Y11_24XX_USB2_DAT",       0x0e8,  2,      0,      0,      1)
154 MUX_CFG_24XX("AA12_24XX_USB2_TXEN",     0x0e9,  2,      0,      0,      1)
155 MUX_CFG_24XX("AA6_24XX_USB2_RCV",       0x0e6,  2,      0,      0,      1)
156 MUX_CFG_24XX("AA4_24XX_USB2_TLLSE0",    0x0e7,  2,      0,      0,      1)
157
158 /* Keypad GPIO*/
159 MUX_CFG_24XX("T19_24XX_KBR0",           0x106,  3,      1,      1,      1)
160 MUX_CFG_24XX("R19_24XX_KBR1",           0x107,  3,      1,      1,      1)
161 MUX_CFG_24XX("V18_24XX_KBR2",           0x139,  3,      1,      1,      1)
162 MUX_CFG_24XX("M21_24XX_KBR3",           0xc9,   3,      1,      1,      1)
163 MUX_CFG_24XX("E5__24XX_KBR4",           0x138,  3,      1,      1,      1)
164 MUX_CFG_24XX("M18_24XX_KBR5",           0x10e,  3,      1,      1,      1)
165 MUX_CFG_24XX("R20_24XX_KBC0",           0x108,  3,      0,      0,      1)
166 MUX_CFG_24XX("M14_24XX_KBC1",           0x109,  3,      0,      0,      1)
167 MUX_CFG_24XX("H19_24XX_KBC2",           0x114,  3,      0,      0,      1)
168 MUX_CFG_24XX("V17_24XX_KBC3",           0x135,  3,      0,      0,      1)
169 MUX_CFG_24XX("P21_24XX_KBC4",           0xca,   3,      0,      0,      1)
170 MUX_CFG_24XX("L14_24XX_KBC5",           0x10f,  3,      0,      0,      1)
171 MUX_CFG_24XX("N19_24XX_KBC6",           0x110,  3,      0,      0,      1)
172
173 /* 24xx Menelaus Keypad GPIO */
174 MUX_CFG_24XX("B3__24XX_KBR5",           0x30,   3,      1,      1,      1)
175 MUX_CFG_24XX("AA4_24XX_KBC2",           0xe7,   3,      0,      0,      1)
176 MUX_CFG_24XX("B13_24XX_KBC6",           0x110,  3,      0,      0,      1)
177
178 /* 2430 USB */
179 MUX_CFG_24XX("AD9_2430_USB0_PUEN",      0x133,  4,      0,      0,      1)
180 MUX_CFG_24XX("Y11_2430_USB0_VP",        0x134,  4,      0,      0,      1)
181 MUX_CFG_24XX("AD7_2430_USB0_VM",        0x135,  4,      0,      0,      1)
182 MUX_CFG_24XX("AE7_2430_USB0_RCV",       0x136,  4,      0,      0,      1)
183 MUX_CFG_24XX("AD4_2430_USB0_TXEN",      0x137,  4,      0,      0,      1)
184 MUX_CFG_24XX("AF9_2430_USB0_SE0",       0x138,  4,      0,      0,      1)
185 MUX_CFG_24XX("AE6_2430_USB0_DAT",       0x139,  4,      0,      0,      1)
186 MUX_CFG_24XX("AD24_2430_USB1_SE0",      0x107,  2,      0,      0,      1)
187 MUX_CFG_24XX("AB24_2430_USB1_RCV",      0x108,  2,      0,      0,      1)
188 MUX_CFG_24XX("Y25_2430_USB1_TXEN",      0x109,  2,      0,      0,      1)
189 MUX_CFG_24XX("AA26_2430_USB1_DAT",      0x10A,  2,      0,      0,      1)
190
191 /* 2430 HS-USB */
192 MUX_CFG_24XX("AD9_2430_USB0HS_DATA3",   0x133,  0,      0,      0,      1)
193 MUX_CFG_24XX("Y11_2430_USB0HS_DATA4",   0x134,  0,      0,      0,      1)
194 MUX_CFG_24XX("AD7_2430_USB0HS_DATA5",   0x135,  0,      0,      0,      1)
195 MUX_CFG_24XX("AE7_2430_USB0HS_DATA6",   0x136,  0,      0,      0,      1)
196 MUX_CFG_24XX("AD4_2430_USB0HS_DATA2",   0x137,  0,      0,      0,      1)
197 MUX_CFG_24XX("AF9_2430_USB0HS_DATA0",   0x138,  0,      0,      0,      1)
198 MUX_CFG_24XX("AE6_2430_USB0HS_DATA1",   0x139,  0,      0,      0,      1)
199 MUX_CFG_24XX("AE8_2430_USB0HS_CLK",     0x13A,  0,      0,      0,      1)
200 MUX_CFG_24XX("AD8_2430_USB0HS_DIR",     0x13B,  0,      0,      0,      1)
201 MUX_CFG_24XX("AE5_2430_USB0HS_STP",     0x13c,  0,      1,      1,      1)
202 MUX_CFG_24XX("AE9_2430_USB0HS_NXT",     0x13D,  0,      0,      0,      1)
203 MUX_CFG_24XX("AC7_2430_USB0HS_DATA7",   0x13E,  0,      0,      0,      1)
204
205 /* 2430 McBSP */
206 MUX_CFG_24XX("AC10_2430_MCBSP2_FSX",    0x012E, 1,      0,      0,      1)
207 MUX_CFG_24XX("AD16_2430_MCBSP2_CLX",    0x012F, 1,      0,      0,      1)
208 MUX_CFG_24XX("AE13_2430_MCBSP2_DX",     0x0130, 1,      0,      0,      1)
209 MUX_CFG_24XX("AD13_2430_MCBSP2_DR",     0x0131, 1,      0,      0,      1)
210 MUX_CFG_24XX("AC10_2430_MCBSP2_FSX_OFF",0x012E, 0,      0,      0,      1)
211 MUX_CFG_24XX("AD16_2430_MCBSP2_CLX_OFF",0x012F, 0,      0,      0,      1)
212 MUX_CFG_24XX("AE13_2430_MCBSP2_DX_OFF", 0x0130, 0,      0,      0,      1)
213 MUX_CFG_24XX("AD13_2430_MCBSP2_DR_OFF", 0x0131, 0,      0,      0,      1)
214 };
215
216 #define OMAP24XX_PINS_SZ        ARRAY_SIZE(omap24xx_pins)
217
218 #else
219 #define omap24xx_pins           NULL
220 #define OMAP24XX_PINS_SZ        0
221 #endif  /* CONFIG_ARCH_OMAP24XX */
222
223 #ifdef CONFIG_ARCH_OMAP34XX
224 static struct pin_config __initdata_or_module omap34xx_pins[] = {
225 /*
226  *              Name, reg-offset,
227  *              mux-mode | [active-mode | off-mode]
228  */
229
230 /* 34xx I2C */
231 MUX_CFG_34XX("K21_34XX_I2C1_SCL", 0x1ba,
232                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
233 MUX_CFG_34XX("J21_34XX_I2C1_SDA", 0x1bc,
234                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
235 MUX_CFG_34XX("AF15_34XX_I2C2_SCL", 0x1be,
236                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
237 MUX_CFG_34XX("AE15_34XX_I2C2_SDA", 0x1c0,
238                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
239 MUX_CFG_34XX("AF14_34XX_I2C3_SCL", 0x1c2,
240                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
241 MUX_CFG_34XX("AG14_34XX_I2C3_SDA", 0x1c4,
242                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
243 MUX_CFG_34XX("AD26_34XX_I2C4_SCL", 0xa00,
244                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
245 MUX_CFG_34XX("AE26_34XX_I2C4_SDA", 0xa02,
246                 OMAP34XX_MUX_MODE0 | OMAP34XX_PIN_INPUT_PULLUP)
247
248 /* PHY - HSUSB: 12-pin ULPI PHY: Port 1*/
249 MUX_CFG_34XX("Y8_3430_USB1HS_PHY_CLK", 0x5da,
250                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
251 MUX_CFG_34XX("Y9_3430_USB1HS_PHY_STP", 0x5d8,
252                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
253 MUX_CFG_34XX("AA14_3430_USB1HS_PHY_DIR", 0x5ec,
254                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
255 MUX_CFG_34XX("AA11_3430_USB1HS_PHY_NXT", 0x5ee,
256                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
257 MUX_CFG_34XX("W13_3430_USB1HS_PHY_D0", 0x5dc,
258                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
259 MUX_CFG_34XX("W12_3430_USB1HS_PHY_D1", 0x5de,
260                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
261 MUX_CFG_34XX("W11_3430_USB1HS_PHY_D2", 0x5e0,
262                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
263 MUX_CFG_34XX("Y11_3430_USB1HS_PHY_D3", 0x5ea,
264                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
265 MUX_CFG_34XX("W9_3430_USB1HS_PHY_D4", 0x5e4,
266                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
267 MUX_CFG_34XX("Y12_3430_USB1HS_PHY_D5", 0x5e6,
268                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
269 MUX_CFG_34XX("W8_3430_USB1HS_PHY_D6", 0x5e8,
270                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
271 MUX_CFG_34XX("Y13_3430_USB1HS_PHY_D7", 0x5e2,
272                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
273
274 /* PHY - HSUSB: 12-pin ULPI PHY: Port 2*/
275 MUX_CFG_34XX("AA8_3430_USB2HS_PHY_CLK", 0x5f0,
276                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
277 MUX_CFG_34XX("AA10_3430_USB2HS_PHY_STP", 0x5f2,
278                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_OUTPUT)
279 MUX_CFG_34XX("AA9_3430_USB2HS_PHY_DIR", 0x5f4,
280                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
281 MUX_CFG_34XX("AB11_3430_USB2HS_PHY_NXT", 0x5f6,
282                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
283 MUX_CFG_34XX("AB10_3430_USB2HS_PHY_D0", 0x5f8,
284                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
285 MUX_CFG_34XX("AB9_3430_USB2HS_PHY_D1", 0x5fa,
286                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
287 MUX_CFG_34XX("W3_3430_USB2HS_PHY_D2", 0x1d4,
288                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
289 MUX_CFG_34XX("T4_3430_USB2HS_PHY_D3", 0x1de,
290                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
291 MUX_CFG_34XX("T3_3430_USB2HS_PHY_D4", 0x1d8,
292                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
293 MUX_CFG_34XX("R3_3430_USB2HS_PHY_D5", 0x1da,
294                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
295 MUX_CFG_34XX("R4_3430_USB2HS_PHY_D6", 0x1dc,
296                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
297 MUX_CFG_34XX("T2_3430_USB2HS_PHY_D7", 0x1d6,
298                 OMAP34XX_MUX_MODE3 | OMAP34XX_PIN_INPUT_PULLDOWN)
299
300 /* TLL - HSUSB: 12-pin TLL Port 1*/
301 MUX_CFG_34XX("Y8_3430_USB1HS_TLL_CLK", 0x5da,
302                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
303 MUX_CFG_34XX("Y9_3430_USB1HS_TLL_STP", 0x5d8,
304                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
305 MUX_CFG_34XX("AA14_3430_USB1HS_TLL_DIR", 0x5ec,
306                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
307 MUX_CFG_34XX("AA11_3430_USB1HS_TLL_NXT", 0x5ee,
308                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
309 MUX_CFG_34XX("W13_3430_USB1HS_TLL_D0", 0x5dc,
310                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
311 MUX_CFG_34XX("W12_3430_USB1HS_TLL_D1", 0x5de,
312                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
313 MUX_CFG_34XX("W11_3430_USB1HS_TLL_D2", 0x5e0,
314                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
315 MUX_CFG_34XX("Y11_3430_USB1HS_TLL_D3", 0x5ea,
316                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
317 MUX_CFG_34XX("W9_3430_USB1HS_TLL_D4", 0x5e4,
318                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
319 MUX_CFG_34XX("Y12_3430_USB1HS_TLL_D5", 0x5e6,
320                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
321 MUX_CFG_34XX("W8_3430_USB1HS_TLL_D6", 0x5e8,
322                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
323 MUX_CFG_34XX("Y13_3430_USB1HS_TLL_D7", 0x5e2,
324                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
325
326 /* TLL - HSUSB: 12-pin TLL Port 2*/
327 MUX_CFG_34XX("AA8_3430_USB2HS_TLL_CLK", 0x5f0,
328                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
329 MUX_CFG_34XX("AA10_3430_USB2HS_TLL_STP", 0x5f2,
330                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLUP)
331 MUX_CFG_34XX("AA9_3430_USB2HS_TLL_DIR", 0x5f4,
332                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
333 MUX_CFG_34XX("AB11_3430_USB2HS_TLL_NXT", 0x5f6,
334                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
335 MUX_CFG_34XX("AB10_3430_USB2HS_TLL_D0", 0x5f8,
336                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
337 MUX_CFG_34XX("AB9_3430_USB2HS_TLL_D1", 0x5fa,
338                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
339 MUX_CFG_34XX("W3_3430_USB2HS_TLL_D2", 0x1d4,
340                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
341 MUX_CFG_34XX("T4_3430_USB2HS_TLL_D3", 0x1de,
342                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
343 MUX_CFG_34XX("T3_3430_USB2HS_TLL_D4", 0x1d8,
344                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
345 MUX_CFG_34XX("R3_3430_USB2HS_TLL_D5", 0x1da,
346                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
347 MUX_CFG_34XX("R4_3430_USB2HS_TLL_D6", 0x1dc,
348                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
349 MUX_CFG_34XX("T2_3430_USB2HS_TLL_D7", 0x1d6,
350                 OMAP34XX_MUX_MODE2 | OMAP34XX_PIN_INPUT_PULLDOWN)
351
352 /* TLL - HSUSB: 12-pin TLL Port 3*/
353 MUX_CFG_34XX("AA6_3430_USB3HS_TLL_CLK", 0x180,
354                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
355 MUX_CFG_34XX("AB3_3430_USB3HS_TLL_STP", 0x166,
356                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLUP)
357 MUX_CFG_34XX("AA3_3430_USB3HS_TLL_DIR", 0x168,
358                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
359 MUX_CFG_34XX("Y3_3430_USB3HS_TLL_NXT", 0x16a,
360                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
361 MUX_CFG_34XX("AA5_3430_USB3HS_TLL_D0", 0x186,
362                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
363 MUX_CFG_34XX("Y4_3430_USB3HS_TLL_D1", 0x184,
364                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
365 MUX_CFG_34XX("Y5_3430_USB3HS_TLL_D2", 0x188,
366                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
367 MUX_CFG_34XX("W5_3430_USB3HS_TLL_D3", 0x18a,
368                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
369 MUX_CFG_34XX("AB12_3430_USB3HS_TLL_D4", 0x16c,
370                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
371 MUX_CFG_34XX("AB13_3430_USB3HS_TLL_D5", 0x16e,
372                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
373 MUX_CFG_34XX("AA13_3430_USB3HS_TLL_D6", 0x170,
374                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
375 MUX_CFG_34XX("AA12_3430_USB3HS_TLL_D7", 0x172,
376                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
377
378 /* PHY FSUSB: FS Serial for Port 1 (multiple PHY modes supported) */
379 MUX_CFG_34XX("AF10_3430_USB1FS_PHY_MM1_RXDP", 0x5d8,
380                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
381 MUX_CFG_34XX("AG9_3430_USB1FS_PHY_MM1_RXDM", 0x5ee,
382                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
383 MUX_CFG_34XX("W13_3430_USB1FS_PHY_MM1_RXRCV", 0x5dc,
384                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
385 MUX_CFG_34XX("W12_3430_USB1FS_PHY_MM1_TXSE0", 0x5de,
386                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
387 MUX_CFG_34XX("W11_3430_USB1FS_PHY_MM1_TXDAT", 0x5e0,
388                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
389 MUX_CFG_34XX("Y11_3430_USB1FS_PHY_MM1_TXEN_N", 0x5ea,
390                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
391
392 /* PHY FSUSB: FS Serial for Port 2 (multiple PHY modes supported) */
393 MUX_CFG_34XX("AF7_3430_USB2FS_PHY_MM2_RXDP", 0x5f2,
394                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
395 MUX_CFG_34XX("AH7_3430_USB2FS_PHY_MM2_RXDM", 0x5f6,
396                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
397 MUX_CFG_34XX("AB10_3430_USB2FS_PHY_MM2_RXRCV", 0x5f8,
398                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
399 MUX_CFG_34XX("AB9_3430_USB2FS_PHY_MM2_TXSE0", 0x5fa,
400                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
401 MUX_CFG_34XX("W3_3430_USB2FS_PHY_MM2_TXDAT", 0x1d4,
402                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_INPUT_PULLDOWN)
403 MUX_CFG_34XX("T4_3430_USB2FS_PHY_MM2_TXEN_N", 0x1de,
404                 OMAP34XX_MUX_MODE5 | OMAP34XX_PIN_OUTPUT)
405
406 /* PHY FSUSB: FS Serial for Port 3 (multiple PHY modes supported) */
407 MUX_CFG_34XX("AH3_3430_USB3FS_PHY_MM3_RXDP", 0x166,
408                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
409 MUX_CFG_34XX("AE3_3430_USB3FS_PHY_MM3_RXDM", 0x16a,
410                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
411 MUX_CFG_34XX("AD1_3430_USB3FS_PHY_MM3_RXRCV", 0x186,
412                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
413 MUX_CFG_34XX("AE1_3430_USB3FS_PHY_MM3_TXSE0", 0x184,
414                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
415 MUX_CFG_34XX("AD2_3430_USB3FS_PHY_MM3_TXDAT", 0x188,
416                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_INPUT_PULLDOWN)
417 MUX_CFG_34XX("AC1_3430_USB3FS_PHY_MM3_TXEN_N", 0x18a,
418                 OMAP34XX_MUX_MODE6 | OMAP34XX_PIN_OUTPUT)
419
420 };
421
422 #define OMAP34XX_PINS_SZ        ARRAY_SIZE(omap34xx_pins)
423
424 #else
425 #define omap34xx_pins           NULL
426 #define OMAP34XX_PINS_SZ        0
427 #endif  /* CONFIG_ARCH_OMAP34XX */
428
429 #if defined(CONFIG_OMAP_MUX_DEBUG) || defined(CONFIG_OMAP_MUX_WARNINGS)
430 static void __init_or_module omap2_cfg_debug(const struct pin_config *cfg, u16 reg)
431 {
432         u16 orig;
433         u8 warn = 0, debug = 0;
434
435         if (cpu_is_omap24xx())
436                 orig = omap_ctrl_readb(cfg->mux_reg);
437         else
438                 orig = omap_ctrl_readw(cfg->mux_reg);
439
440 #ifdef  CONFIG_OMAP_MUX_DEBUG
441         debug = cfg->debug;
442 #endif
443         warn = (orig != reg);
444         if (debug || warn)
445                 printk(KERN_WARNING
446                         "MUX: setup %s (0x%p): 0x%04x -> 0x%04x\n",
447                         cfg->name, omap_ctrl_base_get() + cfg->mux_reg,
448                         orig, reg);
449 }
450 #else
451 #define omap2_cfg_debug(x, y)   do {} while (0)
452 #endif
453
454 #ifdef CONFIG_ARCH_OMAP24XX
455 int __init_or_module omap24xx_cfg_reg(const struct pin_config *cfg)
456 {
457         static DEFINE_SPINLOCK(mux_spin_lock);
458         unsigned long flags;
459         u8 reg = 0;
460
461         spin_lock_irqsave(&mux_spin_lock, flags);
462         reg |= cfg->mask & 0x7;
463         if (cfg->pull_val)
464                 reg |= OMAP2_PULL_ENA;
465         if (cfg->pu_pd_val)
466                 reg |= OMAP2_PULL_UP;
467         omap2_cfg_debug(cfg, reg);
468         omap_ctrl_writeb(reg, cfg->mux_reg);
469         spin_unlock_irqrestore(&mux_spin_lock, flags);
470
471         return 0;
472 }
473 #else
474 #define omap24xx_cfg_reg        NULL
475 #endif
476
477 #ifdef CONFIG_ARCH_OMAP34XX
478 static int __init_or_module omap34xx_cfg_reg(const struct pin_config *cfg)
479 {
480         static DEFINE_SPINLOCK(mux_spin_lock);
481         unsigned long flags;
482         u16 reg = 0;
483
484         spin_lock_irqsave(&mux_spin_lock, flags);
485         reg |= cfg->mux_val;
486         omap2_cfg_debug(cfg, reg);
487         omap_ctrl_writew(reg, cfg->mux_reg);
488         spin_unlock_irqrestore(&mux_spin_lock, flags);
489
490         return 0;
491 }
492 #else
493 #define omap34xx_cfg_reg        NULL
494 #endif
495
496 int __init omap2_mux_init(void)
497 {
498         if (cpu_is_omap24xx()) {
499                 arch_mux_cfg.pins       = omap24xx_pins;
500                 arch_mux_cfg.size       = OMAP24XX_PINS_SZ;
501                 arch_mux_cfg.cfg_reg    = omap24xx_cfg_reg;
502         } else if (cpu_is_omap34xx()) {
503                 arch_mux_cfg.pins       = omap34xx_pins;
504                 arch_mux_cfg.size       = OMAP34XX_PINS_SZ;
505                 arch_mux_cfg.cfg_reg    = omap34xx_cfg_reg;
506         }
507
508         return omap_mux_register(&arch_mux_cfg);
509 }
510
511 #endif