1 /* -*- linux-c -*- ------------------------------------------------------- *
3 * Copyright 2002-2004 H. Peter Anvin - All Rights Reserved
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation, Inc., 53 Temple Place Ste 330,
8 * Bostom MA 02111-1307, USA; either version 2 of the License, or
9 * (at your option) any later version; incorporated herein by reference.
11 * ----------------------------------------------------------------------- */
16 * $#-way unrolled portable integer math RAID-6 instruction set
18 * This file is postprocessed using unroll.pl
20 * <benh> hpa: in process,
21 * you can just "steal" the vec unit with enable_kernel_altivec() (but
22 * bracked this with preempt_disable/enable or in a lock)
30 #include <asm/system.h>
31 #include <asm/cputable.h>
34 * This is the C data type to use
37 typedef vector unsigned char unative_t;
39 #define NBYTES(x) ((vector unsigned char) {x,x,x,x, x,x,x,x, x,x,x,x, x,x,x,x})
40 #define NSIZE sizeof(unative_t)
43 * The SHLBYTE() operation shifts each byte left by 1, *not*
44 * rolling over into the next byte
46 static inline __attribute_const__ unative_t SHLBYTE(unative_t v)
52 * The MASK() operation returns 0xFF in any byte for which the high
53 * bit is 1, 0x00 for any byte for which the high bit is 0.
55 static inline __attribute_const__ unative_t MASK(unative_t v)
57 unative_t zv = NBYTES(0);
59 /* vec_cmpgt returns a vector bool char; thus the need for the cast */
60 return (unative_t)vec_cmpgt(zv, v);
64 /* This is noinline to make damned sure that gcc doesn't move any of the
65 Altivec code around the enable/disable code */
67 raid6_altivec$#_gen_syndrome_real(int disks, size_t bytes, void **ptrs)
69 u8 **dptr = (u8 **)ptrs;
73 unative_t wd$$, wq$$, wp$$, w1$$, w2$$;
74 unative_t x1d = NBYTES(0x1d);
76 z0 = disks - 3; /* Highest data disk */
77 p = dptr[z0+1]; /* XOR parity */
78 q = dptr[z0+2]; /* RS syndrome */
80 for ( d = 0 ; d < bytes ; d += NSIZE*$# ) {
81 wq$$ = wp$$ = *(unative_t *)&dptr[z0][d+$$*NSIZE];
82 for ( z = z0-1 ; z >= 0 ; z-- ) {
83 wd$$ = *(unative_t *)&dptr[z][d+$$*NSIZE];
84 wp$$ = vec_xor(wp$$, wd$$);
87 w2$$ = vec_and(w2$$, x1d);
88 w1$$ = vec_xor(w1$$, w2$$);
89 wq$$ = vec_xor(w1$$, wd$$);
91 *(unative_t *)&p[d+NSIZE*$$] = wp$$;
92 *(unative_t *)&q[d+NSIZE*$$] = wq$$;
96 static void raid6_altivec$#_gen_syndrome(int disks, size_t bytes, void **ptrs)
99 enable_kernel_altivec();
101 raid6_altivec$#_gen_syndrome_real(disks, bytes, ptrs);
106 int raid6_have_altivec(void);
108 int raid6_have_altivec(void)
110 /* This assumes either all CPUs have Altivec or none does */
111 return cpu_has_feature(CPU_FTR_ALTIVEC);
115 const struct raid6_calls raid6_altivec$# = {
116 raid6_altivec$#_gen_syndrome,
122 #endif /* CONFIG_ALTIVEC */