2 * File: arch/blackfin/mach-common/irqpanic.c
7 * Description: panic kernel with dump information
9 * Modified: rgetz - added cache checking code 14Feb06
10 * Copyright 2004-2006 Analog Devices Inc.
12 * Bugs: Enter bugs at http://blackfin.uclinux.org/
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or
17 * (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, see the file COPYING, or write
26 * to the Free Software Foundation, Inc.,
27 * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
30 #include <linux/module.h>
31 #include <linux/kernel_stat.h>
32 #include <linux/sched.h>
33 #include <asm/traps.h>
34 #include <asm/blackfin.h>
36 #ifdef CONFIG_DEBUG_ICACHE_CHECK
37 #define L1_ICACHE_START 0xffa10000
38 #define L1_ICACHE_END 0xffa13fff
39 void irq_panic(int reason, struct pt_regs *regs) __attribute__ ((l1_text));
43 * irq_panic - calls panic with string setup
45 asmlinkage void irq_panic(int reason, struct pt_regs *regs)
47 #ifdef CONFIG_DEBUG_ICACHE_CHECK
48 unsigned int cmd, tag, ca, cache_hi, cache_lo, *pa;
49 unsigned short i, j, die;
50 unsigned int bad[10][6];
52 /* check entire cache for coherency
53 * Since printk is in cacheable memory,
54 * don't call it until you have checked everything
62 for (ca = L1_ICACHE_START; ca <= L1_ICACHE_END && i < 10; ca += 32) {
64 /* Grab various address bits for the itest_cmd fields */
65 cmd = (((ca & 0x3000) << 4) | /* ca[13:12] for SBNK[1:0] */
66 ((ca & 0x0c00) << 16) | /* ca[11:10] for WAYSEL[1:0] */
67 ((ca & 0x3f8)) | /* ca[09:03] for SET[4:0] and DW[1:0] */
68 0); /* Access Tag, Read access */
71 bfin_write_ITEST_COMMAND(cmd);
73 tag = bfin_read_ITEST_DATA0();
76 /* if tag is marked as valid, check it */
78 /* The icache is arranged in 4 groups of 64-bits */
79 for (j = 0; j < 32; j += 8) {
80 cmd = ((((ca + j) & 0x3000) << 4) | /* ca[13:12] for SBNK[1:0] */
81 (((ca + j) & 0x0c00) << 16) | /* ca[11:10] for WAYSEL[1:0] */
82 (((ca + j) & 0x3f8)) | /* ca[09:03] for SET[4:0] and DW[1:0] */
83 4); /* Access Data, Read access */
86 bfin_write_ITEST_COMMAND(cmd);
89 cache_hi = bfin_read_ITEST_DATA1();
90 cache_lo = bfin_read_ITEST_DATA0();
92 pa = ((unsigned int *)((tag & 0xffffcc00) |
93 ((ca + j) & ~(0xffffcc00))));
96 * Debugging this, enable
98 * printk("addr: %08x %08x%08x | %08x%08x\n",
99 * ((unsigned int *)((tag & 0xffffcc00) | ((ca+j) & ~(0xffffcc00)))),
100 * cache_hi, cache_lo, *(pa+1), *pa);
103 if (cache_hi != *(pa + 1) || cache_lo != *pa) {
104 /* Since icache is not working, stay out of it, by not printing */
106 bad[i][0] = (ca + j);
107 bad[i][1] = cache_hi;
108 bad[i][2] = cache_lo;
109 bad[i][3] = ((tag & 0xffffcc00) |
110 ((ca + j) & ~(0xffffcc00)));
111 bad[i][4] = *(pa + 1);
119 printk(KERN_EMERG "icache coherency error\n");
120 for (j = 0; j <= i; j++) {
122 "cache address : %08x cache value : %08x%08x\n",
123 bad[j][0], bad[j][1], bad[j][2]);
125 "physical address: %08x SDRAM value : %08x%08x\n",
126 bad[j][3], bad[j][4], bad[j][5]);
128 panic("icache coherency error");
130 printk(KERN_EMERG "icache checked, and OK\n");