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   1 /*
   2  * linux/arch/arm/mach-omap2/devices.c
   3  *
   4  * OMAP2 platform device setup/initialization
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/io.h>
  17 #include <linux/clk.h>
  18
  19 #include <mach/hardware.h>
  20 #include <asm/mach-types.h>
  21 #include <asm/mach/map.h>
  22
  23 #include <mach/control.h>
  24 #include <mach/tc.h>
  25 #include <mach/board.h>
  26 #include <mach/mux.h>
  27 #include <mach/gpio.h>
  28 #include <mach/eac.h>
  29 #include <mach/mmc.h>
  30
  31 #if defined(CONFIG_OMAP_DSP) || defined(CONFIG_OMAP_DSP_MODULE)
  32 #define OMAP2_MBOX_BASE         IO_ADDRESS(OMAP24XX_MAILBOX_BASE)
  33
  34 static struct resource mbox_resources[] = {
  35         {
  36                 .start          = OMAP2_MBOX_BASE,
  37                 .end            = OMAP2_MBOX_BASE + 0x11f,
  38                 .flags          = IORESOURCE_MEM,
  39         },
  40         {
  41                 .start          = INT_24XX_MAIL_U0_MPU,
  42                 .flags          = IORESOURCE_IRQ,
  43         },
  44         {
  45                 .start          = INT_24XX_MAIL_U3_MPU,
  46                 .flags          = IORESOURCE_IRQ,
  47         },
  48 };
  49
  50 static struct platform_device mbox_device = {
  51         .name           = "mailbox",
  52         .id             = -1,
  53         .num_resources  = ARRAY_SIZE(mbox_resources),
  54         .resource       = mbox_resources,
  55 };
  56
  57 static inline void omap_init_mbox(void)
  58 {
  59         platform_device_register(&mbox_device);
  60 }
  61 #else
  62 static inline void omap_init_mbox(void) { }
  63 #endif
  64
  65 #if defined(CONFIG_OMAP_STI)
  66
  67 #if defined(CONFIG_ARCH_OMAP2)
  68
  69 #define OMAP2_STI_BASE          0x48068000
  70 #define OMAP2_STI_CHANNEL_BASE  0x54000000
  71 #define OMAP2_STI_IRQ           4
  72
  73 static struct resource sti_resources[] = {
  74         {
  75                 .start          = OMAP2_STI_BASE,
  76                 .end            = OMAP2_STI_BASE + 0x7ff,
  77                 .flags          = IORESOURCE_MEM,
  78         },
  79         {
  80                 .start          = OMAP2_STI_CHANNEL_BASE,
  81                 .end            = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
  82                 .flags          = IORESOURCE_MEM,
  83         },
  84         {
  85                 .start          = OMAP2_STI_IRQ,
  86                 .flags          = IORESOURCE_IRQ,
  87         }
  88 };
  89 #elif defined(CONFIG_ARCH_OMAP3)
  90
  91 #define OMAP3_SDTI_BASE         0x54500000
  92 #define OMAP3_SDTI_CHANNEL_BASE 0x54600000
  93
  94 static struct resource sti_resources[] = {
  95         {
  96                 .start          = OMAP3_SDTI_BASE,
  97                 .end            = OMAP3_SDTI_BASE + 0xFFF,
  98                 .flags          = IORESOURCE_MEM,
  99         },
 100         {
 101                 .start          = OMAP3_SDTI_CHANNEL_BASE,
 102                 .end            = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
 103                 .flags          = IORESOURCE_MEM,
 104         }
 105 };
 106
 107 #endif
 108
 109 static struct platform_device sti_device = {
 110         .name           = "sti",
 111         .id             = -1,
 112         .num_resources  = ARRAY_SIZE(sti_resources),
 113         .resource       = sti_resources,
 114 };
 115
 116 static inline void omap_init_sti(void)
 117 {
 118         platform_device_register(&sti_device);
 119 }
 120 #else
 121 static inline void omap_init_sti(void) {}
 122 #endif
 123
 124 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
 125
 126 #include <mach/mcspi.h>
 127
 128 #define OMAP2_MCSPI1_BASE               0x48098000
 129 #define OMAP2_MCSPI2_BASE               0x4809a000
 130 #define OMAP2_MCSPI3_BASE               0x480b8000
 131 #define OMAP2_MCSPI4_BASE               0x480ba000
 132
 133 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
 134         .num_cs         = 4,
 135 };
 136
 137 static struct resource omap2_mcspi1_resources[] = {
 138         {
 139                 .start          = OMAP2_MCSPI1_BASE,
 140                 .end            = OMAP2_MCSPI1_BASE + 0xff,
 141                 .flags          = IORESOURCE_MEM,
 142         },
 143 };
 144
 145 static struct platform_device omap2_mcspi1 = {
 146         .name           = "omap2_mcspi",
 147         .id             = 1,
 148         .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
 149         .resource       = omap2_mcspi1_resources,
 150         .dev            = {
 151                 .platform_data = &omap2_mcspi1_config,
 152         },
 153 };
 154
 155 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
 156         .num_cs         = 2,
 157 };
 158
 159 static struct resource omap2_mcspi2_resources[] = {
 160         {
 161                 .start          = OMAP2_MCSPI2_BASE,
 162                 .end            = OMAP2_MCSPI2_BASE + 0xff,
 163                 .flags          = IORESOURCE_MEM,
 164         },
 165 };
 166
 167 static struct platform_device omap2_mcspi2 = {
 168         .name           = "omap2_mcspi",
 169         .id             = 2,
 170         .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
 171         .resource       = omap2_mcspi2_resources,
 172         .dev            = {
 173                 .platform_data = &omap2_mcspi2_config,
 174         },
 175 };
 176
 177 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
 178 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
 179         .num_cs         = 2,
 180 };
 181
 182 static struct resource omap2_mcspi3_resources[] = {
 183         {
 184         .start          = OMAP2_MCSPI3_BASE,
 185         .end            = OMAP2_MCSPI3_BASE + 0xff,
 186         .flags          = IORESOURCE_MEM,
 187         },
 188 };
 189
 190 static struct platform_device omap2_mcspi3 = {
 191         .name           = "omap2_mcspi",
 192         .id             = 3,
 193         .num_resources  = ARRAY_SIZE(omap2_mcspi3_resources),
 194         .resource       = omap2_mcspi3_resources,
 195         .dev            = {
 196                 .platform_data = &omap2_mcspi3_config,
 197         },
 198 };
 199 #endif
 200
 201 #ifdef CONFIG_ARCH_OMAP3
 202 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
 203         .num_cs         = 1,
 204 };
 205
 206 static struct resource omap2_mcspi4_resources[] = {
 207         {
 208                 .start          = OMAP2_MCSPI4_BASE,
 209                 .end            = OMAP2_MCSPI4_BASE + 0xff,
 210                 .flags          = IORESOURCE_MEM,
 211         },
 212 };
 213
 214 static struct platform_device omap2_mcspi4 = {
 215         .name           = "omap2_mcspi",
 216         .id             = 4,
 217         .num_resources  = ARRAY_SIZE(omap2_mcspi4_resources),
 218         .resource       = omap2_mcspi4_resources,
 219         .dev            = {
 220                 .platform_data = &omap2_mcspi4_config,
 221         },
 222 };
 223 #endif
 224
 225 static void omap_init_mcspi(void)
 226 {
 227         platform_device_register(&omap2_mcspi1);
 228         platform_device_register(&omap2_mcspi2);
 229 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3)
 230         platform_device_register(&omap2_mcspi3);
 231 #endif
 232 #ifdef CONFIG_ARCH_OMAP3
 233         platform_device_register(&omap2_mcspi4);
 234 #endif
 235 }
 236
 237 #else
 238 static inline void omap_init_mcspi(void) {}
 239 #endif
 240
 241 #ifdef CONFIG_SND_OMAP24XX_EAC
 242
 243 #define OMAP2_EAC_BASE                  0x48090000
 244
 245 static struct resource omap2_eac_resources[] = {
 246         {
 247                 .start          = OMAP2_EAC_BASE,
 248                 .end            = OMAP2_EAC_BASE + 0x109,
 249                 .flags          = IORESOURCE_MEM,
 250         },
 251 };
 252
 253 static struct platform_device omap2_eac_device = {
 254         .name           = "omap24xx-eac",
 255         .id             = -1,
 256         .num_resources  = ARRAY_SIZE(omap2_eac_resources),
 257         .resource       = omap2_eac_resources,
 258         .dev = {
 259                 .platform_data = NULL,
 260         },
 261 };
 262
 263 void omap_init_eac(struct eac_platform_data *pdata)
 264 {
 265         omap2_eac_device.dev.platform_data = pdata;
 266         platform_device_register(&omap2_eac_device);
 267 }
 268
 269 #else
 270 void omap_init_eac(struct eac_platform_data *pdata) {}
 271 #endif
 272
 273 #ifdef CONFIG_OMAP_SHA1_MD5
 274 static struct resource sha1_md5_resources[] = {
 275         {
 276                 .start  = OMAP24XX_SEC_SHA1MD5_BASE,
 277                 .end    = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
 278                 .flags  = IORESOURCE_MEM,
 279         },
 280         {
 281                 .start  = INT_24XX_SHA1MD5,
 282                 .flags  = IORESOURCE_IRQ,
 283         }
 284 };
 285
 286 static struct platform_device sha1_md5_device = {
 287         .name           = "OMAP SHA1/MD5",
 288         .id             = -1,
 289         .num_resources  = ARRAY_SIZE(sha1_md5_resources),
 290         .resource       = sha1_md5_resources,
 291 };
 292
 293 static void omap_init_sha1_md5(void)
 294 {
 295         platform_device_register(&sha1_md5_device);
 296 }
 297 #else
 298 static inline void omap_init_sha1_md5(void) { }
 299 #endif
 300
 301 /*-------------------------------------------------------------------------*/
 302
 303 #ifdef CONFIG_ARCH_OMAP3
 304
 305 #define MMCHS_SYSCONFIG                 0x0010
 306 #define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
 307 #define MMCHS_SYSSTATUS                 0x0014
 308 #define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
 309
 310 static struct platform_device dummy_pdev = {
 311         .dev = {
 312                 .bus = &platform_bus_type,
 313         },
 314 };
 315
 316 /**
 317  * omap_hsmmc_reset() - Full reset of each HS-MMC controller
 318  *
 319  * Ensure that each MMC controller is fully reset.  Controllers
 320  * left in an unknown state (by bootloader) may prevent retention
 321  * or OFF-mode.  This is especially important in cases where the
 322  * MMC driver is not enabled, _or_ built as a module.
 323  *
 324  * In order for reset to work, interface, functional and debounce
 325  * clocks must be enabled.  The debounce clock comes from func_32k_clk
 326  * and is not under SW control, so we only enable i- and f-clocks.
 327  **/
 328 static void __init omap_hsmmc_reset(void)
 329 {
 330         u32 i, nr_controllers = cpu_is_omap34xx() ? OMAP34XX_NR_MMC :
 331                 OMAP24XX_NR_MMC;
 332
 333         for (i = 0; i < nr_controllers; i++) {
 334                 u32 v, base = 0;
 335                 struct clk *iclk, *fclk;
 336                 struct device *dev = &dummy_pdev.dev;
 337
 338                 switch (i) {
 339                 case 0:
 340                         base = OMAP2_MMC1_BASE;
 341                         break;
 342                 case 1:
 343                         base = OMAP2_MMC2_BASE;
 344                         break;
 345                 case 2:
 346                         base = OMAP3_MMC3_BASE;
 347                         break;
 348                 }
 349
 350                 dummy_pdev.id = i;
 351                 iclk = clk_get(dev, "mmchs_ick");
 352                 if (iclk && clk_enable(iclk))
 353                         iclk = NULL;
 354
 355                 fclk = clk_get(dev, "mmchs_fck");
 356                 if (fclk && clk_enable(fclk))
 357                         fclk = NULL;
 358
 359                 if (!iclk || !fclk) {
 360                         printk(KERN_WARNING
 361                                "%s: Unable to enable clocks for MMC%d, "
 362                                "cannot reset.\n",  __func__, i);
 363                         break;
 364                 }
 365
 366                 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
 367                 v = omap_readl(base + MMCHS_SYSSTATUS);
 368                 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
 369                          MMCHS_SYSSTATUS_RESETDONE))
 370                         cpu_relax();
 371
 372                 if (fclk) {
 373                         clk_disable(fclk);
 374                         clk_put(fclk);
 375                 }
 376                 if (iclk) {
 377                         clk_disable(iclk);
 378                         clk_put(iclk);
 379                 }
 380         }
 381 }
 382 #else
 383 static inline void omap_hsmmc_reset(void) {}
 384 #endif
 385
 386 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
 387         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 388
 389 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 390                         int controller_nr)
 391 {
 392         if (cpu_is_omap2420() && controller_nr == 0) {
 393                 omap_cfg_reg(H18_24XX_MMC_CMD);
 394                 omap_cfg_reg(H15_24XX_MMC_CLKI);
 395                 omap_cfg_reg(G19_24XX_MMC_CLKO);
 396                 omap_cfg_reg(F20_24XX_MMC_DAT0);
 397                 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
 398                 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
 399                 if (mmc_controller->slots[0].wires == 4) {
 400                         omap_cfg_reg(H14_24XX_MMC_DAT1);
 401                         omap_cfg_reg(E19_24XX_MMC_DAT2);
 402                         omap_cfg_reg(D19_24XX_MMC_DAT3);
 403                         omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
 404                         omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
 405                         omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
 406                 }
 407
 408                 /*
 409                  * Use internal loop-back in MMC/SDIO Module Input Clock
 410                  * selection
 411                  */
 412                 if (mmc_controller->slots[0].internal_clock) {
 413                         u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 414                         v |= (1 << 24);
 415                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 416                 }
 417         }
 418 }
 419
 420 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 421                         int nr_controllers)
 422 {
 423         int i;
 424         char *name;
 425
 426         for (i = 0; i < nr_controllers; i++) {
 427                 unsigned long base, size;
 428                 unsigned int irq = 0;
 429
 430                 if (!mmc_data[i])
 431                         continue;
 432
 433                 omap2_mmc_mux(mmc_data[i], i);
 434
 435                 switch (i) {
 436                 case 0:
 437                         base = OMAP2_MMC1_BASE;
 438                         irq = INT_24XX_MMC_IRQ;
 439                         break;
 440                 case 1:
 441                         base = OMAP2_MMC2_BASE;
 442                         irq = INT_24XX_MMC2_IRQ;
 443                         break;
 444                 case 2:
 445                         if (!cpu_is_omap34xx())
 446                                 return;
 447                         base = OMAP3_MMC3_BASE;
 448                         irq = INT_34XX_MMC3_IRQ;
 449                         break;
 450                 default:
 451                         continue;
 452                 }
 453
 454                 if (cpu_is_omap2420()) {
 455                         size = OMAP2420_MMC_SIZE;
 456                         name = "mmci-omap";
 457                 } else {
 458                         size = HSMMC_SIZE;
 459                         name = "mmci-omap-hs";
 460                 }
 461                 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
 462         };
 463 }
 464
 465 #endif
 466
 467 /*-------------------------------------------------------------------------*/
 468
 469 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
 470 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 471 #define OMAP_HDQ_BASE   0x480B2000
 472 #endif
 473 static struct resource omap_hdq_resources[] = {
 474         {
 475                 .start          = OMAP_HDQ_BASE,
 476                 .end            = OMAP_HDQ_BASE + 0x1C,
 477                 .flags          = IORESOURCE_MEM,
 478         },
 479         {
 480                 .start          = INT_24XX_HDQ_IRQ,
 481                 .flags          = IORESOURCE_IRQ,
 482         },
 483 };
 484 static struct platform_device omap_hdq_dev = {
 485         .name = "omap_hdq",
 486         .id = 0,
 487         .dev = {
 488                 .platform_data = NULL,
 489         },
 490         .num_resources  = ARRAY_SIZE(omap_hdq_resources),
 491         .resource       = omap_hdq_resources,
 492 };
 493 static inline void omap_hdq_init(void)
 494 {
 495         (void) platform_device_register(&omap_hdq_dev);
 496 }
 497 #else
 498 static inline void omap_hdq_init(void) {}
 499 #endif
 500
 501 /*-------------------------------------------------------------------------*/
 502
 503 static int __init omap2_init_devices(void)
 504 {
 505         /* please keep these calls, and their implementations above,
 506          * in alphabetical order so they're easier to sort through.
 507          */
 508         omap_hsmmc_reset();
 509         omap_init_mbox();
 510         omap_init_mcspi();
 511         omap_hdq_init();
 512         omap_init_sti();
 513         omap_init_sha1_md5();
 514
 515         return 0;
 516 }
 517 arch_initcall(omap2_init_devices);