2 * Copyright (c) by Jaroslav Kysela <perex@suse.cz>
4 * Routines for control of EMU10K1 chips
6 * Copyright (c) by James Courtier-Dutton <James@superbug.demon.co.uk>
7 * Added support for Audigy 2 Value.
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
32 #include <sound/driver.h>
33 #include <linux/delay.h>
34 #include <linux/init.h>
35 #include <linux/interrupt.h>
36 #include <linux/pci.h>
37 #include <linux/slab.h>
38 #include <linux/vmalloc.h>
40 #include <sound/core.h>
41 #include <sound/emu10k1.h>
45 MODULE_AUTHOR("Jaroslav Kysela <perex@suse.cz>, Creative Labs, Inc.");
46 MODULE_DESCRIPTION("Routines for control of EMU10K1 chips");
47 MODULE_LICENSE("GPL");
50 /*************************************************************************
52 *************************************************************************/
54 void snd_emu10k1_voice_init(emu10k1_t * emu, int ch)
56 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
57 snd_emu10k1_ptr_write(emu, IP, ch, 0);
58 snd_emu10k1_ptr_write(emu, VTFT, ch, 0xffff);
59 snd_emu10k1_ptr_write(emu, CVCF, ch, 0xffff);
60 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
61 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
62 snd_emu10k1_ptr_write(emu, CCR, ch, 0);
64 snd_emu10k1_ptr_write(emu, PSST, ch, 0);
65 snd_emu10k1_ptr_write(emu, DSL, ch, 0x10);
66 snd_emu10k1_ptr_write(emu, CCCA, ch, 0);
67 snd_emu10k1_ptr_write(emu, Z1, ch, 0);
68 snd_emu10k1_ptr_write(emu, Z2, ch, 0);
69 snd_emu10k1_ptr_write(emu, FXRT, ch, 0x32100000);
71 snd_emu10k1_ptr_write(emu, ATKHLDM, ch, 0);
72 snd_emu10k1_ptr_write(emu, DCYSUSM, ch, 0);
73 snd_emu10k1_ptr_write(emu, IFATN, ch, 0xffff);
74 snd_emu10k1_ptr_write(emu, PEFE, ch, 0);
75 snd_emu10k1_ptr_write(emu, FMMOD, ch, 0);
76 snd_emu10k1_ptr_write(emu, TREMFRQ, ch, 24); /* 1 Hz */
77 snd_emu10k1_ptr_write(emu, FM2FRQ2, ch, 24); /* 1 Hz */
78 snd_emu10k1_ptr_write(emu, TEMPENV, ch, 0);
80 /*** these are last so OFF prevents writing ***/
81 snd_emu10k1_ptr_write(emu, LFOVAL2, ch, 0);
82 snd_emu10k1_ptr_write(emu, LFOVAL1, ch, 0);
83 snd_emu10k1_ptr_write(emu, ATKHLDV, ch, 0);
84 snd_emu10k1_ptr_write(emu, ENVVOL, ch, 0);
85 snd_emu10k1_ptr_write(emu, ENVVAL, ch, 0);
87 /* Audigy extra stuffs */
89 snd_emu10k1_ptr_write(emu, 0x4c, ch, 0); /* ?? */
90 snd_emu10k1_ptr_write(emu, 0x4d, ch, 0); /* ?? */
91 snd_emu10k1_ptr_write(emu, 0x4e, ch, 0); /* ?? */
92 snd_emu10k1_ptr_write(emu, 0x4f, ch, 0); /* ?? */
93 snd_emu10k1_ptr_write(emu, A_FXRT1, ch, 0x03020100);
94 snd_emu10k1_ptr_write(emu, A_FXRT2, ch, 0x3f3f3f3f);
95 snd_emu10k1_ptr_write(emu, A_SENDAMOUNTS, ch, 0);
99 static int __devinit snd_emu10k1_init(emu10k1_t * emu, int enable_ir)
102 unsigned int silent_page;
104 emu->fx8010.itram_size = (16 * 1024)/2;
105 emu->fx8010.etram_pages.area = NULL;
106 emu->fx8010.etram_pages.bytes = 0;
108 /* disable audio and lock cache */
109 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
111 /* reset recording buffers */
112 snd_emu10k1_ptr_write(emu, MICBS, 0, ADCBS_BUFSIZE_NONE);
113 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
114 snd_emu10k1_ptr_write(emu, FXBS, 0, ADCBS_BUFSIZE_NONE);
115 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
116 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
117 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
119 /* disable channel interrupt */
120 outl(0, emu->port + INTE);
121 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
122 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
123 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
124 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
127 /* set SPDIF bypass mode */
128 snd_emu10k1_ptr_write(emu, SPBYPASS, 0, SPBYPASS_FORMAT);
129 /* enable rear left + rear right AC97 slots */
130 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_REAR_RIGHT | AC97SLOT_REAR_LEFT);
133 /* init envelope engine */
134 for (ch = 0; ch < NUM_G; ch++) {
135 emu->voices[ch].emu = emu;
136 emu->voices[ch].number = ch;
137 snd_emu10k1_voice_init(emu, ch);
141 * Init to 0x02109204 :
142 * Clock accuracy = 0 (1000ppm)
143 * Sample Rate = 2 (48kHz)
144 * Audio Channel = 1 (Left of 2)
145 * Source Number = 0 (Unspecified)
146 * Generation Status = 1 (Original for Cat Code 12)
147 * Cat Code = 12 (Digital Signal Mixer)
149 * Emphasis = 0 (None)
150 * CP = 1 (Copyright unasserted)
151 * AN = 0 (Audio data)
154 snd_emu10k1_ptr_write(emu, SPCS0, 0,
156 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
157 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
158 SPCS_GENERATIONSTATUS | 0x00001200 |
159 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
160 snd_emu10k1_ptr_write(emu, SPCS1, 0,
162 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
163 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
164 SPCS_GENERATIONSTATUS | 0x00001200 |
165 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
166 snd_emu10k1_ptr_write(emu, SPCS2, 0,
168 SPCS_CLKACCY_1000PPM | SPCS_SAMPLERATE_48 |
169 SPCS_CHANNELNUM_LEFT | SPCS_SOURCENUM_UNSPEC |
170 SPCS_GENERATIONSTATUS | 0x00001200 |
171 0x00000000 | SPCS_EMPHASIS_NONE | SPCS_COPYRIGHT);
173 if (emu->card_capabilities->ca0151_chip) { /* audigy2 */
174 /* Hacks for Alice3 to work independent of haP16V driver */
177 //Setup SRCMulti_I2S SamplingRate
178 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
181 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
183 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
184 snd_emu10k1_ptr20_write(emu, SRCSel, 0, 0x14);
185 /* Setup SRCMulti Input Audio Enable */
186 /* Use 0xFFFFFFFF to enable P16V sounds. */
187 snd_emu10k1_ptr20_write(emu, SRCMULTI_ENABLE, 0, 0xFFFFFFFF);
189 /* Enabled Phased (8-channel) P16V playback */
190 outl(0x0201, emu->port + HCFG2);
191 /* Set playback routing. */
192 snd_emu10k1_ptr20_write(emu, CAPTURE_P16V_SOURCE, 0, 0x78e4);
194 if (emu->audigy && (emu->serial == 0x10011102) ) { /* audigy2 Value */
195 /* Hacks for Alice3 to work independent of haP16V driver */
198 snd_printk(KERN_ERR "Audigy2 value:Special config.\n");
199 //Setup SRCMulti_I2S SamplingRate
200 tmp = snd_emu10k1_ptr_read(emu, A_SPDIF_SAMPLERATE, 0);
203 snd_emu10k1_ptr_write(emu, A_SPDIF_SAMPLERATE, 0, tmp);
205 /* Setup SRCSel (Enable Spdif,I2S SRCMulti) */
206 outl(0x600000, emu->port + 0x20);
207 outl(0x14, emu->port + 0x24);
209 /* Setup SRCMulti Input Audio Enable */
210 outl(0x7b0000, emu->port + 0x20);
211 outl(0xFF000000, emu->port + 0x24);
213 /* Setup SPDIF Out Audio Enable */
214 /* The Audigy 2 Value has a separate SPDIF out,
215 * so no need for a mixer switch
217 outl(0x7a0000, emu->port + 0x20);
218 outl(0xFF000000, emu->port + 0x24);
219 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */
220 outl(tmp, emu->port + A_IOCFG);
225 * Clear page with silence & setup all pointers to this page
227 memset(emu->silent_page.area, 0, PAGE_SIZE);
228 silent_page = emu->silent_page.addr << 1;
229 for (idx = 0; idx < MAXPAGES; idx++)
230 ((u32 *)emu->ptb_pages.area)[idx] = cpu_to_le32(silent_page | idx);
231 snd_emu10k1_ptr_write(emu, PTB, 0, emu->ptb_pages.addr);
232 snd_emu10k1_ptr_write(emu, TCB, 0, 0); /* taken from original driver */
233 snd_emu10k1_ptr_write(emu, TCBS, 0, 4); /* taken from original driver */
235 silent_page = (emu->silent_page.addr << 1) | MAP_PTI_MASK;
236 for (ch = 0; ch < NUM_G; ch++) {
237 snd_emu10k1_ptr_write(emu, MAPA, ch, silent_page);
238 snd_emu10k1_ptr_write(emu, MAPB, ch, silent_page);
243 * Mute Disable Audio = 0
244 * Lock Tank Memory = 1
245 * Lock Sound Memory = 0
249 if (emu->revision == 4) /* audigy2 */
250 outl(HCFG_AUDIOENABLE |
251 HCFG_AC3ENABLE_CDSPDIF |
252 HCFG_AC3ENABLE_GPSPDIF |
253 HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
255 outl(HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
256 } else if (emu->model == 0x20 ||
257 emu->model == 0xc400 ||
258 (emu->model == 0x21 && emu->revision < 6))
259 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE, emu->port + HCFG);
261 // With on-chip joystick
262 outl(HCFG_LOCKTANKCACHE_MASK | HCFG_AUTOMUTE | HCFG_JOYENABLE, emu->port + HCFG);
264 if (enable_ir) { /* enable IR for SB Live */
266 unsigned int reg = inl(emu->port + A_IOCFG);
267 outl(reg | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
269 outl(reg | A_IOCFG_GPOUT1 | A_IOCFG_GPOUT2, emu->port + A_IOCFG);
271 outl(reg, emu->port + A_IOCFG);
273 unsigned int reg = inl(emu->port + HCFG);
274 outl(reg | HCFG_GPOUT2, emu->port + HCFG);
276 outl(reg | HCFG_GPOUT1 | HCFG_GPOUT2, emu->port + HCFG);
278 outl(reg, emu->port + HCFG);
282 if (emu->audigy) { /* enable analog output */
283 unsigned int reg = inl(emu->port + A_IOCFG);
284 outl(reg | A_IOCFG_GPOUT0, emu->port + A_IOCFG);
288 * Initialize the effect engine
290 if ((err = snd_emu10k1_init_efx(emu)) < 0)
294 * Enable the audio bit
296 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG);
298 /* Enable analog/digital outs on audigy */
300 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG);
302 if (emu->revision == 4) { /* audigy2 */
303 /* Unmute Analog now. Set GPO6 to 1 for Apollo.
304 * This has to be done after init ALice3 I2SOut beyond 48KHz.
305 * So, sequence is important. */
306 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG);
307 } else if (emu->serial == 0x10011102) { /* audigy2 value */
308 /* Unmute Analog now. */
309 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG);
311 /* Disable routing from AC97 line out to Front speakers */
312 outl(inl(emu->port + A_IOCFG) | 0x0080, emu->port + A_IOCFG);
319 /* FIXME: the following routine disables LiveDrive-II !! */
322 tmp = inl(emu->port + HCFG);
323 if (tmp & (HCFG_GPINPUT0 | HCFG_GPINPUT1)) {
324 outl(tmp|0x800, emu->port + HCFG);
326 if (tmp != (inl(emu->port + HCFG) & ~0x800)) {
328 outl(tmp, emu->port + HCFG);
334 snd_emu10k1_intr_enable(emu, INTE_PCIERRORENABLE);
336 emu->reserved_page = (emu10k1_memblk_t *)snd_emu10k1_synth_alloc(emu, 4096);
337 if (emu->reserved_page)
338 emu->reserved_page->map_locked = 1;
343 static int snd_emu10k1_done(emu10k1_t * emu)
347 outl(0, emu->port + INTE);
352 for (ch = 0; ch < NUM_G; ch++)
353 snd_emu10k1_ptr_write(emu, DCYSUSV, ch, 0);
354 for (ch = 0; ch < NUM_G; ch++) {
355 snd_emu10k1_ptr_write(emu, VTFT, ch, 0);
356 snd_emu10k1_ptr_write(emu, CVCF, ch, 0);
357 snd_emu10k1_ptr_write(emu, PTRX, ch, 0);
358 snd_emu10k1_ptr_write(emu, CPF, ch, 0);
361 /* reset recording buffers */
362 snd_emu10k1_ptr_write(emu, MICBS, 0, 0);
363 snd_emu10k1_ptr_write(emu, MICBA, 0, 0);
364 snd_emu10k1_ptr_write(emu, FXBS, 0, 0);
365 snd_emu10k1_ptr_write(emu, FXBA, 0, 0);
366 snd_emu10k1_ptr_write(emu, FXWC, 0, 0);
367 snd_emu10k1_ptr_write(emu, ADCBS, 0, ADCBS_BUFSIZE_NONE);
368 snd_emu10k1_ptr_write(emu, ADCBA, 0, 0);
369 snd_emu10k1_ptr_write(emu, TCBS, 0, TCBS_BUFFSIZE_16K);
370 snd_emu10k1_ptr_write(emu, TCB, 0, 0);
372 snd_emu10k1_ptr_write(emu, A_DBG, 0, A_DBG_SINGLE_STEP);
374 snd_emu10k1_ptr_write(emu, DBG, 0, EMU10K1_DBG_SINGLE_STEP);
376 /* disable channel interrupt */
377 snd_emu10k1_ptr_write(emu, CLIEL, 0, 0);
378 snd_emu10k1_ptr_write(emu, CLIEH, 0, 0);
379 snd_emu10k1_ptr_write(emu, SOLEL, 0, 0);
380 snd_emu10k1_ptr_write(emu, SOLEH, 0, 0);
382 /* remove reserved page */
383 if (emu->reserved_page != NULL) {
384 snd_emu10k1_synth_free(emu, (snd_util_memblk_t *)emu->reserved_page);
385 emu->reserved_page = NULL;
388 /* disable audio and lock cache */
389 outl(HCFG_LOCKSOUNDCACHE | HCFG_LOCKTANKCACHE_MASK | HCFG_MUTEBUTTONENABLE, emu->port + HCFG);
390 snd_emu10k1_ptr_write(emu, PTB, 0, 0);
392 snd_emu10k1_free_efx(emu);
397 /*************************************************************************
398 * ECARD functional implementation
399 *************************************************************************/
401 /* In A1 Silicon, these bits are in the HC register */
402 #define HOOKN_BIT (1L << 12)
403 #define HANDN_BIT (1L << 11)
404 #define PULSEN_BIT (1L << 10)
406 #define EC_GDI1 (1 << 13)
407 #define EC_GDI0 (1 << 14)
409 #define EC_NUM_CONTROL_BITS 20
411 #define EC_AC3_DATA_SELN 0x0001L
412 #define EC_EE_DATA_SEL 0x0002L
413 #define EC_EE_CNTRL_SELN 0x0004L
414 #define EC_EECLK 0x0008L
415 #define EC_EECS 0x0010L
416 #define EC_EESDO 0x0020L
417 #define EC_TRIM_CSN 0x0040L
418 #define EC_TRIM_SCLK 0x0080L
419 #define EC_TRIM_SDATA 0x0100L
420 #define EC_TRIM_MUTEN 0x0200L
421 #define EC_ADCCAL 0x0400L
422 #define EC_ADCRSTN 0x0800L
423 #define EC_DACCAL 0x1000L
424 #define EC_DACMUTEN 0x2000L
425 #define EC_LEDN 0x4000L
427 #define EC_SPDIF0_SEL_SHIFT 15
428 #define EC_SPDIF1_SEL_SHIFT 17
429 #define EC_SPDIF0_SEL_MASK (0x3L << EC_SPDIF0_SEL_SHIFT)
430 #define EC_SPDIF1_SEL_MASK (0x7L << EC_SPDIF1_SEL_SHIFT)
431 #define EC_SPDIF0_SELECT(_x) (((_x) << EC_SPDIF0_SEL_SHIFT) & EC_SPDIF0_SEL_MASK)
432 #define EC_SPDIF1_SELECT(_x) (((_x) << EC_SPDIF1_SEL_SHIFT) & EC_SPDIF1_SEL_MASK)
433 #define EC_CURRENT_PROM_VERSION 0x01 /* Self-explanatory. This should
434 * be incremented any time the EEPROM's
435 * format is changed. */
437 #define EC_EEPROM_SIZE 0x40 /* ECARD EEPROM has 64 16-bit words */
439 /* Addresses for special values stored in to EEPROM */
440 #define EC_PROM_VERSION_ADDR 0x20 /* Address of the current prom version */
441 #define EC_BOARDREV0_ADDR 0x21 /* LSW of board rev */
442 #define EC_BOARDREV1_ADDR 0x22 /* MSW of board rev */
444 #define EC_LAST_PROMFILE_ADDR 0x2f
446 #define EC_SERIALNUM_ADDR 0x30 /* First word of serial number. The
447 * can be up to 30 characters in length
448 * and is stored as a NULL-terminated
449 * ASCII string. Any unused bytes must be
450 * filled with zeros */
451 #define EC_CHECKSUM_ADDR 0x3f /* Location at which checksum is stored */
454 /* Most of this stuff is pretty self-evident. According to the hardware
455 * dudes, we need to leave the ADCCAL bit low in order to avoid a DC
456 * offset problem. Weird.
458 #define EC_RAW_RUN_MODE (EC_DACMUTEN | EC_ADCRSTN | EC_TRIM_MUTEN | \
462 #define EC_DEFAULT_ADC_GAIN 0xC4C4
463 #define EC_DEFAULT_SPDIF0_SEL 0x0
464 #define EC_DEFAULT_SPDIF1_SEL 0x4
466 /**************************************************************************
467 * @func Clock bits into the Ecard's control latch. The Ecard uses a
468 * control latch will is loaded bit-serially by toggling the Modem control
469 * lines from function 2 on the E8010. This function hides these details
470 * and presents the illusion that we are actually writing to a distinct
474 static void snd_emu10k1_ecard_write(emu10k1_t * emu, unsigned int value)
476 unsigned short count;
478 unsigned long hc_port;
479 unsigned int hc_value;
481 hc_port = emu->port + HCFG;
482 hc_value = inl(hc_port) & ~(HOOKN_BIT | HANDN_BIT | PULSEN_BIT);
483 outl(hc_value, hc_port);
485 for (count = 0; count < EC_NUM_CONTROL_BITS; count++) {
487 /* Set up the value */
488 data = ((value & 0x1) ? PULSEN_BIT : 0);
491 outl(hc_value | data, hc_port);
493 /* Clock the shift register */
494 outl(hc_value | data | HANDN_BIT, hc_port);
495 outl(hc_value | data, hc_port);
499 outl(hc_value | HOOKN_BIT, hc_port);
500 outl(hc_value, hc_port);
503 /**************************************************************************
504 * @func Set the gain of the ECARD's CS3310 Trim/gain controller. The
505 * trim value consists of a 16bit value which is composed of two
506 * 8 bit gain/trim values, one for the left channel and one for the
507 * right channel. The following table maps from the Gain/Attenuation
508 * value in decibels into the corresponding bit pattern for a single
512 static void snd_emu10k1_ecard_setadcgain(emu10k1_t * emu,
517 /* Enable writing to the TRIM registers */
518 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
520 /* Do it again to insure that we meet hold time requirements */
521 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl & ~EC_TRIM_CSN);
523 for (bit = (1 << 15); bit; bit >>= 1) {
526 value = emu->ecard_ctrl & ~(EC_TRIM_CSN | EC_TRIM_SDATA);
529 value |= EC_TRIM_SDATA;
532 snd_emu10k1_ecard_write(emu, value);
533 snd_emu10k1_ecard_write(emu, value | EC_TRIM_SCLK);
534 snd_emu10k1_ecard_write(emu, value);
537 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
540 static int __devinit snd_emu10k1_ecard_init(emu10k1_t * emu)
542 unsigned int hc_value;
544 /* Set up the initial settings */
545 emu->ecard_ctrl = EC_RAW_RUN_MODE |
546 EC_SPDIF0_SELECT(EC_DEFAULT_SPDIF0_SEL) |
547 EC_SPDIF1_SELECT(EC_DEFAULT_SPDIF1_SEL);
549 /* Step 0: Set the codec type in the hardware control register
550 * and enable audio output */
551 hc_value = inl(emu->port + HCFG);
552 outl(hc_value | HCFG_AUDIOENABLE | HCFG_CODECFORMAT_I2S, emu->port + HCFG);
553 inl(emu->port + HCFG);
555 /* Step 1: Turn off the led and deassert TRIM_CS */
556 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
558 /* Step 2: Calibrate the ADC and DAC */
559 snd_emu10k1_ecard_write(emu, EC_DACCAL | EC_LEDN | EC_TRIM_CSN);
561 /* Step 3: Wait for awhile; XXX We can't get away with this
562 * under a real operating system; we'll need to block and wait that
564 snd_emu10k1_wait(emu, 48000);
566 /* Step 4: Switch off the DAC and ADC calibration. Note
567 * That ADC_CAL is actually an inverted signal, so we assert
568 * it here to stop calibration. */
569 snd_emu10k1_ecard_write(emu, EC_ADCCAL | EC_LEDN | EC_TRIM_CSN);
571 /* Step 4: Switch into run mode */
572 snd_emu10k1_ecard_write(emu, emu->ecard_ctrl);
574 /* Step 5: Set the analog input gain */
575 snd_emu10k1_ecard_setadcgain(emu, EC_DEFAULT_ADC_GAIN);
581 * Create the EMU10K1 instance
584 static int snd_emu10k1_free(emu10k1_t *emu)
586 if (emu->port) { /* avoid access to already used hardware */
587 snd_emu10k1_fx8010_tram_setup(emu, 0);
588 snd_emu10k1_done(emu);
591 snd_util_memhdr_free(emu->memhdr);
592 if (emu->silent_page.area)
593 snd_dma_free_pages(&emu->silent_page);
594 if (emu->ptb_pages.area)
595 snd_dma_free_pages(&emu->ptb_pages);
596 vfree(emu->page_ptr_table);
597 vfree(emu->page_addr_table);
599 free_irq(emu->irq, (void *)emu);
601 pci_release_regions(emu->pci);
602 pci_disable_device(emu->pci);
603 if (emu->card_capabilities->ca0151_chip) /* P16V */
609 static int snd_emu10k1_dev_free(snd_device_t *device)
611 emu10k1_t *emu = device->device_data;
612 return snd_emu10k1_free(emu);
615 static emu_chip_details_t emu_chip_details[] = {
616 /* Audigy 2 Value AC3 out does not work yet. Need to find out how to turn off interpolators.*/
617 {.vendor = 0x1102, .device = 0x0008, .subsystem = 0x10011102,
618 .driver = "Audigy2", .name = "Audigy 2 Value [SB0400]",
624 {.vendor = 0x1102, .device = 0x0008,
625 .driver = "Audigy2", .name = "Audigy 2 Value [Unknown]",
630 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20071102,
631 .driver = "Audigy2", .name = "Audigy 4 PRO [SB0380]",
639 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20021102,
640 .driver = "Audigy2", .name = "Audigy 2 ZS [SB0350]",
648 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x20011102,
649 .driver = "Audigy2", .name = "Audigy 2 ZS [2001]",
657 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10071102,
658 .driver = "Audigy2", .name = "Audigy 2 [SB0240]",
666 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10051102,
667 .driver = "Audigy2", .name = "Audigy 2 EX [1005]",
673 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10021102,
674 .driver = "Audigy2", .name = "Audigy 2 Platinum [SB0240P]",
682 {.vendor = 0x1102, .device = 0x0004, .revision = 0x04,
683 .driver = "Audigy2", .name = "Audigy 2 [Unknown]",
690 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x10020052,
691 .driver = "Audigy", .name = "Audigy 1 ES [SB0160]",
697 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00531102,
698 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
703 {.vendor = 0x1102, .device = 0x0004, .subsystem = 0x00511102,
704 .driver = "Audigy", .name = "Audigy 1 [SB0090]",
709 {.vendor = 0x1102, .device = 0x0004,
710 .driver = "Audigy", .name = "Audigy 1 [Unknown]",
715 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x40011102,
716 .driver = "EMU10K1", .name = "E-mu APS [4001]",
720 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
721 .driver = "EMU10K1", .name = "SBLive! Player 5.1 [SB0060]",
726 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80641102,
727 .driver = "EMU10K1", .name = "SB Live 5.1",
732 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80401102,
733 .driver = "EMU10K1", .name = "SBLive! Platinum [CT4760P]",
737 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00211102,
738 .driver = "EMU10K1", .name = "SBLive! [CT4620]",
743 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x00201102,
744 .driver = "EMU10K1", .name = "SBLive! Value [CT4670]",
749 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80221102,
750 .driver = "EMU10K1", .name = "SBLive! Value [CT4780]",
755 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80231102,
756 .driver = "EMU10K1", .name = "SB PCI512 [CT4790]",
761 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80261102,
762 .driver = "EMU10K1", .name = "SBLive! Value [CT4830]",
767 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80311102,
768 .driver = "EMU10K1", .name = "SBLive! Value [CT4831]",
773 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80271102,
774 .driver = "EMU10K1", .name = "SBLive! Value [CT4832]",
779 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80511102,
780 .driver = "EMU10K1", .name = "SBLive! Value [CT4850]",
785 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80281102,
786 .driver = "EMU10K1", .name = "SBLive! Value [CT4870]",
791 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80321102,
792 .driver = "EMU10K1", .name = "SBLive! Value [CT4871]",
797 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80611102,
798 .driver = "EMU10K1", .name = "SBLive! Value [SB0060]",
803 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x80691102,
804 .driver = "EMU10K1", .name = "SBLive! Value [SB0101]",
809 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806A1102,
810 .driver = "EMU10K1", .name = "SBLive! Value [SB0103]",
815 {.vendor = 0x1102, .device = 0x0002, .subsystem = 0x806B1102,
816 .driver = "EMU10K1", .name = "SBLive! [SB0105]",
821 {.vendor = 0x1102, .device = 0x0002,
822 .driver = "EMU10K1", .name = "SB Live [Unknown]",
830 int __devinit snd_emu10k1_create(snd_card_t * card,
831 struct pci_dev * pci,
832 unsigned short extin_mask,
833 unsigned short extout_mask,
834 long max_cache_bytes,
841 unsigned char revision;
842 const emu_chip_details_t *c;
843 static snd_device_ops_t ops = {
844 .dev_free = snd_emu10k1_dev_free,
849 /* enable PCI device */
850 if ((err = pci_enable_device(pci)) < 0)
853 emu = kcalloc(1, sizeof(*emu), GFP_KERNEL);
855 pci_disable_device(pci);
859 spin_lock_init(&emu->reg_lock);
860 spin_lock_init(&emu->emu_lock);
861 spin_lock_init(&emu->voice_lock);
862 spin_lock_init(&emu->synth_lock);
863 spin_lock_init(&emu->memblk_lock);
864 init_MUTEX(&emu->ptb_lock);
865 init_MUTEX(&emu->fx8010.lock);
866 INIT_LIST_HEAD(&emu->mapped_link_head);
867 INIT_LIST_HEAD(&emu->mapped_order_link_head);
871 emu->get_synth_voice = NULL;
872 /* read revision & serial */
873 pci_read_config_byte(pci, PCI_REVISION_ID, &revision);
874 emu->revision = revision;
875 pci_read_config_dword(pci, PCI_SUBSYSTEM_VENDOR_ID, &emu->serial);
876 pci_read_config_word(pci, PCI_SUBSYSTEM_ID, &emu->model);
877 snd_printdd("vendor=0x%x, device=0x%x, subsystem_vendor_id=0x%x, subsystem_id=0x%x\n",pci->vendor, pci->device, emu->serial, emu->model);
879 for (c = emu_chip_details; c->vendor; c++) {
880 if (c->vendor == pci->vendor && c->device == pci->device) {
881 if (c->subsystem && c->subsystem != emu->serial)
883 if (c->revision && c->revision != emu->revision)
888 if (c->vendor == 0) {
889 snd_printk(KERN_ERR "emu10k1: Card not recognised\n");
891 pci_disable_device(pci);
894 emu->card_capabilities = c;
895 if (c->subsystem != 0)
896 snd_printdd("Sound card name=%s\n", c->name);
898 snd_printdd("Sound card name=%s, vendor=0x%x, device=0x%x, subsystem=0x%x\n", c->name, pci->vendor, pci->device, emu->serial);
900 if (!*card->id && c->id) {
902 strlcpy(card->id, c->id, sizeof(card->id));
904 for (i = 0; i < snd_ecards_limit; i++) {
905 if (snd_cards[i] && !strcmp(snd_cards[i]->id, card->id))
908 if (i >= snd_ecards_limit)
911 if (n >= SNDRV_CARDS)
913 snprintf(card->id, sizeof(card->id), "%s_%d", c->id, n);
917 is_audigy = emu->audigy = c->emu10k2_chip;
919 /* set the DMA transfer mask */
920 emu->dma_mask = is_audigy ? AUDIGY_DMA_MASK : EMU10K1_DMA_MASK;
921 if (pci_set_dma_mask(pci, emu->dma_mask) < 0 ||
922 pci_set_consistent_dma_mask(pci, emu->dma_mask) < 0) {
923 snd_printk(KERN_ERR "architecture does not support PCI busmaster DMA with mask 0x%lx\n", emu->dma_mask);
925 pci_disable_device(pci);
929 emu->gpr_base = A_FXGPREGBASE;
931 emu->gpr_base = FXGPREGBASE;
933 if ((err = pci_request_regions(pci, "EMU10K1")) < 0) {
935 pci_disable_device(pci);
938 emu->port = pci_resource_start(pci, 0);
940 if (request_irq(pci->irq, snd_emu10k1_interrupt, SA_INTERRUPT|SA_SHIRQ, "EMU10K1", (void *)emu)) {
941 snd_emu10k1_free(emu);
946 emu->max_cache_pages = max_cache_bytes >> PAGE_SHIFT;
947 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
948 32 * 1024, &emu->ptb_pages) < 0) {
949 snd_emu10k1_free(emu);
953 emu->page_ptr_table = (void **)vmalloc(emu->max_cache_pages * sizeof(void*));
954 emu->page_addr_table = (unsigned long*)vmalloc(emu->max_cache_pages * sizeof(unsigned long));
955 if (emu->page_ptr_table == NULL || emu->page_addr_table == NULL) {
956 snd_emu10k1_free(emu);
960 if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
961 EMUPAGESIZE, &emu->silent_page) < 0) {
962 snd_emu10k1_free(emu);
965 emu->memhdr = snd_util_memhdr_new(emu->max_cache_pages * PAGE_SIZE);
966 if (emu->memhdr == NULL) {
967 snd_emu10k1_free(emu);
970 emu->memhdr->block_extra_size = sizeof(emu10k1_memblk_t) - sizeof(snd_util_memblk_t);
974 emu->fx8010.fxbus_mask = 0x303f;
977 if (extout_mask == 0)
978 extout_mask = 0x7fff;
979 emu->fx8010.extin_mask = extin_mask;
980 emu->fx8010.extout_mask = extout_mask;
982 if (emu->card_capabilities->ecard) {
983 if ((err = snd_emu10k1_ecard_init(emu)) < 0) {
984 snd_emu10k1_free(emu);
988 /* 5.1: Enable the additional AC97 Slots. If the emu10k1 version
989 does not support this, it shouldn't do any harm */
990 snd_emu10k1_ptr_write(emu, AC97SLOT, 0, AC97SLOT_CNTR|AC97SLOT_LFE);
993 if ((err = snd_emu10k1_init(emu, enable_ir)) < 0) {
994 snd_emu10k1_free(emu);
998 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, emu, &ops)) < 0) {
999 snd_emu10k1_free(emu);
1003 snd_emu10k1_proc_init(emu);
1005 snd_card_set_dev(card, &pci->dev);
1011 EXPORT_SYMBOL(snd_emu10k1_synth_alloc);
1012 EXPORT_SYMBOL(snd_emu10k1_synth_free);
1013 EXPORT_SYMBOL(snd_emu10k1_synth_bzero);
1014 EXPORT_SYMBOL(snd_emu10k1_synth_copy_from_user);
1015 EXPORT_SYMBOL(snd_emu10k1_memblk_map);
1017 EXPORT_SYMBOL(snd_emu10k1_voice_alloc);
1018 EXPORT_SYMBOL(snd_emu10k1_voice_free);
1020 EXPORT_SYMBOL(snd_emu10k1_ptr_read);
1021 EXPORT_SYMBOL(snd_emu10k1_ptr_write);