Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/aegl/linux-2.6
[linux-2.6] / drivers / staging / octeon / cvmx-pko.c
1 /***********************license start***************
2  * Author: Cavium Networks
3  *
4  * Contact: support@caviumnetworks.com
5  * This file is part of the OCTEON SDK
6  *
7  * Copyright (c) 2003-2008 Cavium Networks
8  *
9  * This file is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License, Version 2, as
11  * published by the Free Software Foundation.
12  *
13  * This file is distributed in the hope that it will be useful, but
14  * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16  * NONINFRINGEMENT.  See the GNU General Public License for more
17  * details.
18  *
19  * You should have received a copy of the GNU General Public License
20  * along with this file; if not, write to the Free Software
21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22  * or visit http://www.gnu.org/licenses/.
23  *
24  * This file may also be available under a different license from Cavium.
25  * Contact Cavium Networks for more information
26  ***********************license end**************************************/
27
28 /*
29  * Support library for the hardware Packet Output unit.
30  */
31
32 #include <asm/octeon/octeon.h>
33
34 #include "cvmx-config.h"
35 #include "cvmx-pko.h"
36 #include "cvmx-helper.h"
37
38 /**
39  * Internal state of packet output
40  */
41
42 /**
43  * Call before any other calls to initialize the packet
44  * output system.  This does chip global config, and should only be
45  * done by one core.
46  */
47
48 void cvmx_pko_initialize_global(void)
49 {
50         int i;
51         uint64_t priority = 8;
52         union cvmx_pko_reg_cmd_buf config;
53
54         /*
55          * Set the size of the PKO command buffers to an odd number of
56          * 64bit words. This allows the normal two word send to stay
57          * aligned and never span a comamnd word buffer.
58          */
59         config.u64 = 0;
60         config.s.pool = CVMX_FPA_OUTPUT_BUFFER_POOL;
61         config.s.size = CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE / 8 - 1;
62
63         cvmx_write_csr(CVMX_PKO_REG_CMD_BUF, config.u64);
64
65         for (i = 0; i < CVMX_PKO_MAX_OUTPUT_QUEUES; i++)
66                 cvmx_pko_config_port(CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID, i, 1,
67                                      &priority);
68
69         /*
70          * If we aren't using all of the queues optimize PKO's
71          * internal memory.
72          */
73         if (OCTEON_IS_MODEL(OCTEON_CN38XX) || OCTEON_IS_MODEL(OCTEON_CN58XX)
74             || OCTEON_IS_MODEL(OCTEON_CN56XX)
75             || OCTEON_IS_MODEL(OCTEON_CN52XX)) {
76                 int num_interfaces = cvmx_helper_get_number_of_interfaces();
77                 int last_port =
78                     cvmx_helper_get_last_ipd_port(num_interfaces - 1);
79                 int max_queues =
80                     cvmx_pko_get_base_queue(last_port) +
81                     cvmx_pko_get_num_queues(last_port);
82                 if (OCTEON_IS_MODEL(OCTEON_CN38XX)) {
83                         if (max_queues <= 32)
84                                 cvmx_write_csr(CVMX_PKO_REG_QUEUE_MODE, 2);
85                         else if (max_queues <= 64)
86                                 cvmx_write_csr(CVMX_PKO_REG_QUEUE_MODE, 1);
87                 } else {
88                         if (max_queues <= 64)
89                                 cvmx_write_csr(CVMX_PKO_REG_QUEUE_MODE, 2);
90                         else if (max_queues <= 128)
91                                 cvmx_write_csr(CVMX_PKO_REG_QUEUE_MODE, 1);
92                 }
93         }
94 }
95
96 /**
97  * This function does per-core initialization required by the PKO routines.
98  * This must be called on all cores that will do packet output, and must
99  * be called after the FPA has been initialized and filled with pages.
100  *
101  * Returns 0 on success
102  *         !0 on failure
103  */
104 int cvmx_pko_initialize_local(void)
105 {
106         /* Nothing to do */
107         return 0;
108 }
109
110 /**
111  * Enables the packet output hardware. It must already be
112  * configured.
113  */
114 void cvmx_pko_enable(void)
115 {
116         union cvmx_pko_reg_flags flags;
117
118         flags.u64 = cvmx_read_csr(CVMX_PKO_REG_FLAGS);
119         if (flags.s.ena_pko)
120                 cvmx_dprintf
121                     ("Warning: Enabling PKO when PKO already enabled.\n");
122
123         flags.s.ena_dwb = 1;
124         flags.s.ena_pko = 1;
125         /*
126          * always enable big endian for 3-word command. Does nothing
127          * for 2-word.
128          */
129         flags.s.store_be = 1;
130         cvmx_write_csr(CVMX_PKO_REG_FLAGS, flags.u64);
131 }
132
133 /**
134  * Disables the packet output. Does not affect any configuration.
135  */
136 void cvmx_pko_disable(void)
137 {
138         union cvmx_pko_reg_flags pko_reg_flags;
139         pko_reg_flags.u64 = cvmx_read_csr(CVMX_PKO_REG_FLAGS);
140         pko_reg_flags.s.ena_pko = 0;
141         cvmx_write_csr(CVMX_PKO_REG_FLAGS, pko_reg_flags.u64);
142 }
143
144
145 /**
146  * Reset the packet output.
147  */
148 static void __cvmx_pko_reset(void)
149 {
150         union cvmx_pko_reg_flags pko_reg_flags;
151         pko_reg_flags.u64 = cvmx_read_csr(CVMX_PKO_REG_FLAGS);
152         pko_reg_flags.s.reset = 1;
153         cvmx_write_csr(CVMX_PKO_REG_FLAGS, pko_reg_flags.u64);
154 }
155
156 /**
157  * Shutdown and free resources required by packet output.
158  */
159 void cvmx_pko_shutdown(void)
160 {
161         union cvmx_pko_mem_queue_ptrs config;
162         int queue;
163
164         cvmx_pko_disable();
165
166         for (queue = 0; queue < CVMX_PKO_MAX_OUTPUT_QUEUES; queue++) {
167                 config.u64 = 0;
168                 config.s.tail = 1;
169                 config.s.index = 0;
170                 config.s.port = CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID;
171                 config.s.queue = queue & 0x7f;
172                 config.s.qos_mask = 0;
173                 config.s.buf_ptr = 0;
174                 if (!OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
175                         union cvmx_pko_reg_queue_ptrs1 config1;
176                         config1.u64 = 0;
177                         config1.s.qid7 = queue >> 7;
178                         cvmx_write_csr(CVMX_PKO_REG_QUEUE_PTRS1, config1.u64);
179                 }
180                 cvmx_write_csr(CVMX_PKO_MEM_QUEUE_PTRS, config.u64);
181                 cvmx_cmd_queue_shutdown(CVMX_CMD_QUEUE_PKO(queue));
182         }
183         __cvmx_pko_reset();
184 }
185
186 /**
187  * Configure a output port and the associated queues for use.
188  *
189  * @port:       Port to configure.
190  * @base_queue: First queue number to associate with this port.
191  * @num_queues: Number of queues to associate with this port
192  * @priority:   Array of priority levels for each queue. Values are
193  *                   allowed to be 0-8. A value of 8 get 8 times the traffic
194  *                   of a value of 1.  A value of 0 indicates that no rounds
195  *                   will be participated in. These priorities can be changed
196  *                   on the fly while the pko is enabled. A priority of 9
197  *                   indicates that static priority should be used.  If static
198  *                   priority is used all queues with static priority must be
199  *                   contiguous starting at the base_queue, and lower numbered
200  *                   queues have higher priority than higher numbered queues.
201  *                   There must be num_queues elements in the array.
202  */
203 cvmx_pko_status_t cvmx_pko_config_port(uint64_t port, uint64_t base_queue,
204                                        uint64_t num_queues,
205                                        const uint64_t priority[])
206 {
207         cvmx_pko_status_t result_code;
208         uint64_t queue;
209         union cvmx_pko_mem_queue_ptrs config;
210         union cvmx_pko_reg_queue_ptrs1 config1;
211         int static_priority_base = -1;
212         int static_priority_end = -1;
213
214         if ((port >= CVMX_PKO_NUM_OUTPUT_PORTS)
215             && (port != CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID)) {
216                 cvmx_dprintf("ERROR: cvmx_pko_config_port: Invalid port %llu\n",
217                              (unsigned long long)port);
218                 return CVMX_PKO_INVALID_PORT;
219         }
220
221         if (base_queue + num_queues > CVMX_PKO_MAX_OUTPUT_QUEUES) {
222                 cvmx_dprintf
223                     ("ERROR: cvmx_pko_config_port: Invalid queue range %llu\n",
224                      (unsigned long long)(base_queue + num_queues));
225                 return CVMX_PKO_INVALID_QUEUE;
226         }
227
228         if (port != CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID) {
229                 /*
230                  * Validate the static queue priority setup and set
231                  * static_priority_base and static_priority_end
232                  * accordingly.
233                  */
234                 for (queue = 0; queue < num_queues; queue++) {
235                         /* Find first queue of static priority */
236                         if (static_priority_base == -1
237                             && priority[queue] ==
238                             CVMX_PKO_QUEUE_STATIC_PRIORITY)
239                                 static_priority_base = queue;
240                         /* Find last queue of static priority */
241                         if (static_priority_base != -1
242                             && static_priority_end == -1
243                             && priority[queue] != CVMX_PKO_QUEUE_STATIC_PRIORITY
244                             && queue)
245                                 static_priority_end = queue - 1;
246                         else if (static_priority_base != -1
247                                  && static_priority_end == -1
248                                  && queue == num_queues - 1)
249                                 /* all queues are static priority */
250                                 static_priority_end = queue;
251                         /*
252                          * Check to make sure all static priority
253                          * queues are contiguous.  Also catches some
254                          * cases of static priorites not starting at
255                          * queue 0.
256                          */
257                         if (static_priority_end != -1
258                             && (int)queue > static_priority_end
259                             && priority[queue] ==
260                             CVMX_PKO_QUEUE_STATIC_PRIORITY) {
261                                 cvmx_dprintf("ERROR: cvmx_pko_config_port: "
262                                              "Static priority queues aren't "
263                                              "contiguous or don't start at "
264                                              "base queue. q: %d, eq: %d\n",
265                                         (int)queue, static_priority_end);
266                                 return CVMX_PKO_INVALID_PRIORITY;
267                         }
268                 }
269                 if (static_priority_base > 0) {
270                         cvmx_dprintf("ERROR: cvmx_pko_config_port: Static "
271                                      "priority queues don't start at base "
272                                      "queue. sq: %d\n",
273                                 static_priority_base);
274                         return CVMX_PKO_INVALID_PRIORITY;
275                 }
276 #if 0
277                 cvmx_dprintf("Port %d: Static priority queue base: %d, "
278                              "end: %d\n", port,
279                         static_priority_base, static_priority_end);
280 #endif
281         }
282         /*
283          * At this point, static_priority_base and static_priority_end
284          * are either both -1, or are valid start/end queue
285          * numbers.
286          */
287
288         result_code = CVMX_PKO_SUCCESS;
289
290 #ifdef PKO_DEBUG
291         cvmx_dprintf("num queues: %d (%lld,%lld)\n", num_queues,
292                      CVMX_PKO_QUEUES_PER_PORT_INTERFACE0,
293                      CVMX_PKO_QUEUES_PER_PORT_INTERFACE1);
294 #endif
295
296         for (queue = 0; queue < num_queues; queue++) {
297                 uint64_t *buf_ptr = NULL;
298
299                 config1.u64 = 0;
300                 config1.s.idx3 = queue >> 3;
301                 config1.s.qid7 = (base_queue + queue) >> 7;
302
303                 config.u64 = 0;
304                 config.s.tail = queue == (num_queues - 1);
305                 config.s.index = queue;
306                 config.s.port = port;
307                 config.s.queue = base_queue + queue;
308
309                 if (!cvmx_octeon_is_pass1()) {
310                         config.s.static_p = static_priority_base >= 0;
311                         config.s.static_q = (int)queue <= static_priority_end;
312                         config.s.s_tail = (int)queue == static_priority_end;
313                 }
314                 /*
315                  * Convert the priority into an enable bit field. Try
316                  * to space the bits out evenly so the packet don't
317                  * get grouped up
318                  */
319                 switch ((int)priority[queue]) {
320                 case 0:
321                         config.s.qos_mask = 0x00;
322                         break;
323                 case 1:
324                         config.s.qos_mask = 0x01;
325                         break;
326                 case 2:
327                         config.s.qos_mask = 0x11;
328                         break;
329                 case 3:
330                         config.s.qos_mask = 0x49;
331                         break;
332                 case 4:
333                         config.s.qos_mask = 0x55;
334                         break;
335                 case 5:
336                         config.s.qos_mask = 0x57;
337                         break;
338                 case 6:
339                         config.s.qos_mask = 0x77;
340                         break;
341                 case 7:
342                         config.s.qos_mask = 0x7f;
343                         break;
344                 case 8:
345                         config.s.qos_mask = 0xff;
346                         break;
347                 case CVMX_PKO_QUEUE_STATIC_PRIORITY:
348                         /* Pass 1 will fall through to the error case */
349                         if (!cvmx_octeon_is_pass1()) {
350                                 config.s.qos_mask = 0xff;
351                                 break;
352                         }
353                 default:
354                         cvmx_dprintf("ERROR: cvmx_pko_config_port: Invalid "
355                                      "priority %llu\n",
356                                 (unsigned long long)priority[queue]);
357                         config.s.qos_mask = 0xff;
358                         result_code = CVMX_PKO_INVALID_PRIORITY;
359                         break;
360                 }
361
362                 if (port != CVMX_PKO_MEM_QUEUE_PTRS_ILLEGAL_PID) {
363                         cvmx_cmd_queue_result_t cmd_res =
364                             cvmx_cmd_queue_initialize(CVMX_CMD_QUEUE_PKO
365                                                       (base_queue + queue),
366                                                       CVMX_PKO_MAX_QUEUE_DEPTH,
367                                                       CVMX_FPA_OUTPUT_BUFFER_POOL,
368                                                       CVMX_FPA_OUTPUT_BUFFER_POOL_SIZE
369                                                       -
370                                                       CVMX_PKO_COMMAND_BUFFER_SIZE_ADJUST
371                                                       * 8);
372                         if (cmd_res != CVMX_CMD_QUEUE_SUCCESS) {
373                                 switch (cmd_res) {
374                                 case CVMX_CMD_QUEUE_NO_MEMORY:
375                                         cvmx_dprintf("ERROR: "
376                                                      "cvmx_pko_config_port: "
377                                                      "Unable to allocate "
378                                                      "output buffer.\n");
379                                         return CVMX_PKO_NO_MEMORY;
380                                 case CVMX_CMD_QUEUE_ALREADY_SETUP:
381                                         cvmx_dprintf
382                                             ("ERROR: cvmx_pko_config_port: Port already setup.\n");
383                                         return CVMX_PKO_PORT_ALREADY_SETUP;
384                                 case CVMX_CMD_QUEUE_INVALID_PARAM:
385                                 default:
386                                         cvmx_dprintf
387                                             ("ERROR: cvmx_pko_config_port: Command queue initialization failed.\n");
388                                         return CVMX_PKO_CMD_QUEUE_INIT_ERROR;
389                                 }
390                         }
391
392                         buf_ptr =
393                             (uint64_t *)
394                             cvmx_cmd_queue_buffer(CVMX_CMD_QUEUE_PKO
395                                                   (base_queue + queue));
396                         config.s.buf_ptr = cvmx_ptr_to_phys(buf_ptr);
397                 } else
398                         config.s.buf_ptr = 0;
399
400                 CVMX_SYNCWS;
401
402                 if (!OCTEON_IS_MODEL(OCTEON_CN3XXX))
403                         cvmx_write_csr(CVMX_PKO_REG_QUEUE_PTRS1, config1.u64);
404                 cvmx_write_csr(CVMX_PKO_MEM_QUEUE_PTRS, config.u64);
405         }
406
407         return result_code;
408 }
409
410 #ifdef PKO_DEBUG
411 /**
412  * Show map of ports -> queues for different cores.
413  */
414 void cvmx_pko_show_queue_map()
415 {
416         int core, port;
417         int pko_output_ports = 36;
418
419         cvmx_dprintf("port");
420         for (port = 0; port < pko_output_ports; port++)
421                 cvmx_dprintf("%3d ", port);
422         cvmx_dprintf("\n");
423
424         for (core = 0; core < CVMX_MAX_CORES; core++) {
425                 cvmx_dprintf("\n%2d: ", core);
426                 for (port = 0; port < pko_output_ports; port++) {
427                         cvmx_dprintf("%3d ",
428                                      cvmx_pko_get_base_queue_per_core(port,
429                                                                       core));
430                 }
431         }
432         cvmx_dprintf("\n");
433 }
434 #endif
435
436 /**
437  * Rate limit a PKO port to a max packets/sec. This function is only
438  * supported on CN51XX and higher, excluding CN58XX.
439  *
440  * @port:      Port to rate limit
441  * @packets_s: Maximum packet/sec
442  * @burst:     Maximum number of packets to burst in a row before rate
443  *                  limiting cuts in.
444  *
445  * Returns Zero on success, negative on failure
446  */
447 int cvmx_pko_rate_limit_packets(int port, int packets_s, int burst)
448 {
449         union cvmx_pko_mem_port_rate0 pko_mem_port_rate0;
450         union cvmx_pko_mem_port_rate1 pko_mem_port_rate1;
451
452         pko_mem_port_rate0.u64 = 0;
453         pko_mem_port_rate0.s.pid = port;
454         pko_mem_port_rate0.s.rate_pkt =
455             cvmx_sysinfo_get()->cpu_clock_hz / packets_s / 16;
456         /* No cost per word since we are limited by packets/sec, not bits/sec */
457         pko_mem_port_rate0.s.rate_word = 0;
458
459         pko_mem_port_rate1.u64 = 0;
460         pko_mem_port_rate1.s.pid = port;
461         pko_mem_port_rate1.s.rate_lim =
462             ((uint64_t) pko_mem_port_rate0.s.rate_pkt * burst) >> 8;
463
464         cvmx_write_csr(CVMX_PKO_MEM_PORT_RATE0, pko_mem_port_rate0.u64);
465         cvmx_write_csr(CVMX_PKO_MEM_PORT_RATE1, pko_mem_port_rate1.u64);
466         return 0;
467 }
468
469 /**
470  * Rate limit a PKO port to a max bits/sec. This function is only
471  * supported on CN51XX and higher, excluding CN58XX.
472  *
473  * @port:   Port to rate limit
474  * @bits_s: PKO rate limit in bits/sec
475  * @burst:  Maximum number of bits to burst before rate
476  *               limiting cuts in.
477  *
478  * Returns Zero on success, negative on failure
479  */
480 int cvmx_pko_rate_limit_bits(int port, uint64_t bits_s, int burst)
481 {
482         union cvmx_pko_mem_port_rate0 pko_mem_port_rate0;
483         union cvmx_pko_mem_port_rate1 pko_mem_port_rate1;
484         uint64_t clock_rate = cvmx_sysinfo_get()->cpu_clock_hz;
485         uint64_t tokens_per_bit = clock_rate * 16 / bits_s;
486
487         pko_mem_port_rate0.u64 = 0;
488         pko_mem_port_rate0.s.pid = port;
489         /*
490          * Each packet has a 12 bytes of interframe gap, an 8 byte
491          * preamble, and a 4 byte CRC. These are not included in the
492          * per word count. Multiply by 8 to covert to bits and divide
493          * by 256 for limit granularity.
494          */
495         pko_mem_port_rate0.s.rate_pkt = (12 + 8 + 4) * 8 * tokens_per_bit / 256;
496         /* Each 8 byte word has 64bits */
497         pko_mem_port_rate0.s.rate_word = 64 * tokens_per_bit;
498
499         pko_mem_port_rate1.u64 = 0;
500         pko_mem_port_rate1.s.pid = port;
501         pko_mem_port_rate1.s.rate_lim = tokens_per_bit * burst / 256;
502
503         cvmx_write_csr(CVMX_PKO_MEM_PORT_RATE0, pko_mem_port_rate0.u64);
504         cvmx_write_csr(CVMX_PKO_MEM_PORT_RATE1, pko_mem_port_rate1.u64);
505         return 0;
506 }