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   1 /*
   2  *  linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
   3  *
   4  *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
   5  *                     Rob Scott (rscott@mtrob.fdns.net)
   6  *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  *
  23  * These are the low level assembler for performing cache and TLB
  24  * functions on the ARM720T.  The ARM720T has a writethrough IDC
  25  * cache, so we don't need to clean it.
  26  *
  27  *  Changelog:
  28  *   05-09-2000 SJH     Created by moving 720 specific functions
  29  *                      out of 'proc-arm6,7.S' per RMK discussion
  30  *   07-25-2000 SJH     Added idle function.
  31  *   08-25-2000 DBS     Updated for integration of ARM Ltd version.
  32  */
  33 #include <linux/linkage.h>
  34 #include <linux/init.h>
  35 #include <asm/assembler.h>
  36 #include <asm/asm-offsets.h>
  37 #include <asm/pgtable.h>
  38 #include <asm/procinfo.h>
  39 #include <asm/ptrace.h>
  40
  41 /*
  42  * Function: arm720_proc_init (void)
  43  *         : arm720_proc_fin (void)
  44  *
  45  * Notes   : This processor does not require these
  46  */
  47 ENTRY(cpu_arm720_dcache_clean_area)
  48 ENTRY(cpu_arm720_proc_init)
  49                 mov     pc, lr
  50
  51 ENTRY(cpu_arm720_proc_fin)
  52                 stmfd   sp!, {lr}
  53                 mov     ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
  54                 msr     cpsr_c, ip
  55                 mrc     p15, 0, r0, c1, c0, 0
  56                 bic     r0, r0, #0x1000                 @ ...i............
  57                 bic     r0, r0, #0x000e                 @ ............wca.
  58                 mcr     p15, 0, r0, c1, c0, 0           @ disable caches
  59                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
  60                 ldmfd   sp!, {pc}
  61
  62 /*
  63  * Function: arm720_proc_do_idle(void)
  64  * Params  : r0 = unused
  65  * Purpose : put the processer in proper idle mode
  66  */
  67 ENTRY(cpu_arm720_do_idle)
  68                 mov     pc, lr
  69
  70 /*
  71  * Function: arm720_switch_mm(unsigned long pgd_phys)
  72  * Params  : pgd_phys   Physical address of page table
  73  * Purpose : Perform a task switch, saving the old process' state and restoring
  74  *           the new.
  75  */
  76 ENTRY(cpu_arm720_switch_mm)
  77                 mov     r1, #0
  78                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
  79                 mcr     p15, 0, r0, c2, c0, 0           @ update page table ptr
  80                 mcr     p15, 0, r1, c8, c7, 0           @ flush TLB (v4)
  81                 mov     pc, lr
  82
  83 /*
  84  * Function: arm720_set_pte(pte_t *ptep, pte_t pte)
  85  * Params  : r0 = Address to set
  86  *         : r1 = value to set
  87  * Purpose : Set a PTE and flush it out of any WB cache
  88  */
  89                 .align  5
  90 ENTRY(cpu_arm720_set_pte)
  91                 str     r1, [r0], #-2048                @ linux version
  92
  93                 eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
  94
  95                 bic     r2, r1, #PTE_SMALL_AP_MASK
  96                 bic     r2, r2, #PTE_TYPE_MASK
  97                 orr     r2, r2, #PTE_TYPE_SMALL
  98
  99                 tst     r1, #L_PTE_USER                 @ User?
 100                 orrne   r2, r2, #PTE_SMALL_AP_URO_SRW
 101
 102                 tst     r1, #L_PTE_WRITE | L_PTE_DIRTY  @ Write and Dirty?
 103                 orreq   r2, r2, #PTE_SMALL_AP_UNO_SRW
 104
 105                 tst     r1, #L_PTE_PRESENT | L_PTE_YOUNG        @ Present and Young
 106                 movne   r2, #0
 107
 108                 str     r2, [r0]                        @ hardware version
 109                 mov     pc, lr
 110
 111 /*
 112  * Function: arm720_reset
 113  * Params  : r0 = address to jump to
 114  * Notes   : This sets up everything for a reset
 115  */
 116 ENTRY(cpu_arm720_reset)
 117                 mov     ip, #0
 118                 mcr     p15, 0, ip, c7, c7, 0           @ invalidate cache
 119                 mcr     p15, 0, ip, c8, c7, 0           @ flush TLB (v4)
 120                 mrc     p15, 0, ip, c1, c0, 0           @ get ctrl register
 121                 bic     ip, ip, #0x000f                 @ ............wcam
 122                 bic     ip, ip, #0x2100                 @ ..v....s........
 123                 mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
 124                 mov     pc, r0
 125
 126         __INIT
 127
 128         .type   __arm710_setup, #function
 129 __arm710_setup:
 130         mov     r0, #0
 131         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
 132         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
 133         mrc     p15, 0, r0, c1, c0              @ get control register
 134         ldr     r5, arm710_cr1_clear
 135         bic     r0, r0, r5
 136         ldr     r5, arm710_cr1_set
 137         orr     r0, r0, r5
 138         mov     pc, lr                          @ __ret (head.S)
 139         .size   __arm710_setup, . - __arm710_setup
 140
 141         /*
 142          *  R
 143          * .RVI ZFRS BLDP WCAM
 144          * .... 0001 ..11 1101
 145          *
 146          */
 147         .type   arm710_cr1_clear, #object
 148         .type   arm710_cr1_set, #object
 149 arm710_cr1_clear:
 150         .word   0x0f3f
 151 arm710_cr1_set:
 152         .word   0x013d
 153
 154         .type   __arm720_setup, #function
 155 __arm720_setup:
 156         mov     r0, #0
 157         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
 158         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
 159         mrc     p15, 0, r0, c1, c0              @ get control register
 160         ldr     r5, arm720_cr1_clear
 161         bic     r0, r0, r5
 162         ldr     r5, arm720_cr1_set
 163         orr     r0, r0, r5
 164         mov     pc, lr                          @ __ret (head.S)
 165         .size   __arm720_setup, . - __arm720_setup
 166
 167         /*
 168          *  R
 169          * .RVI ZFRS BLDP WCAM
 170          * ..1. 1001 ..11 1101
 171          *
 172          */
 173         .type   arm720_cr1_clear, #object
 174         .type   arm720_cr1_set, #object
 175 arm720_cr1_clear:
 176         .word   0x2f3f
 177 arm720_cr1_set:
 178         .word   0x213d
 179
 180                 __INITDATA
 181
 182 /*
 183  * Purpose : Function pointers used to access above functions - all calls
 184  *           come through these
 185  */
 186                 .type   arm720_processor_functions, #object
 187 ENTRY(arm720_processor_functions)
 188                 .word   v4t_late_abort
 189                 .word   cpu_arm720_proc_init
 190                 .word   cpu_arm720_proc_fin
 191                 .word   cpu_arm720_reset
 192                 .word   cpu_arm720_do_idle
 193                 .word   cpu_arm720_dcache_clean_area
 194                 .word   cpu_arm720_switch_mm
 195                 .word   cpu_arm720_set_pte
 196                 .size   arm720_processor_functions, . - arm720_processor_functions
 197
 198                 .section ".rodata"
 199
 200                 .type   cpu_arch_name, #object
 201 cpu_arch_name:  .asciz  "armv4t"
 202                 .size   cpu_arch_name, . - cpu_arch_name
 203
 204                 .type   cpu_elf_name, #object
 205 cpu_elf_name:   .asciz  "v4"
 206                 .size   cpu_elf_name, . - cpu_elf_name
 207
 208                 .type   cpu_arm710_name, #object
 209 cpu_arm710_name:
 210                 .asciz  "ARM710T"
 211                 .size   cpu_arm710_name, . - cpu_arm710_name
 212
 213                 .type   cpu_arm720_name, #object
 214 cpu_arm720_name:
 215                 .asciz  "ARM720T"
 216                 .size   cpu_arm720_name, . - cpu_arm720_name
 217
 218                 .align
 219
 220 /*
 221  * See linux/include/asm-arm/procinfo.h for a definition of this structure.
 222  */
 223
 224                 .section ".proc.info.init", #alloc, #execinstr
 225
 226                 .type   __arm710_proc_info, #object
 227 __arm710_proc_info:
 228                 .long   0x41807100                              @ cpu_val
 229                 .long   0xffffff00                              @ cpu_mask
 230                 .long   PMD_TYPE_SECT | \
 231                         PMD_SECT_BUFFERABLE | \
 232                         PMD_SECT_CACHEABLE | \
 233                         PMD_BIT4 | \
 234                         PMD_SECT_AP_WRITE | \
 235                         PMD_SECT_AP_READ
 236                 b       __arm710_setup                          @ cpu_flush
 237                 .long   cpu_arch_name                           @ arch_name
 238                 .long   cpu_elf_name                            @ elf_name
 239                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
 240                 .long   cpu_arm710_name                         @ name
 241                 .long   arm720_processor_functions
 242                 .long   v4_tlb_fns
 243                 .long   v4wt_user_fns
 244                 .long   v4_cache_fns
 245                 .size   __arm710_proc_info, . - __arm710_proc_info
 246
 247                 .type   __arm720_proc_info, #object
 248 __arm720_proc_info:
 249                 .long   0x41807200                              @ cpu_val
 250                 .long   0xffffff00                              @ cpu_mask
 251                 .long   PMD_TYPE_SECT | \
 252                         PMD_SECT_BUFFERABLE | \
 253                         PMD_SECT_CACHEABLE | \
 254                         PMD_BIT4 | \
 255                         PMD_SECT_AP_WRITE | \
 256                         PMD_SECT_AP_READ
 257                 b       __arm720_setup                          @ cpu_flush
 258                 .long   cpu_arch_name                           @ arch_name
 259                 .long   cpu_elf_name                            @ elf_name
 260                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
 261                 .long   cpu_arm720_name                         @ name
 262                 .long   arm720_processor_functions
 263                 .long   v4_tlb_fns
 264                 .long   v4wt_user_fns
 265                 .long   v4_cache_fns
 266                 .size   __arm720_proc_info, . - __arm720_proc_info