2 * MPC834x SYS board specific routines
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
6 * Copyright 2005 Freescale Semiconductor Inc.
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
14 #include <linux/config.h>
15 #include <linux/stddef.h>
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/errno.h>
19 #include <linux/reboot.h>
20 #include <linux/pci.h>
21 #include <linux/kdev_t.h>
22 #include <linux/major.h>
23 #include <linux/console.h>
24 #include <linux/delay.h>
25 #include <linux/seq_file.h>
26 #include <linux/root_dev.h>
27 #include <linux/serial.h>
28 #include <linux/tty.h> /* for linux/serial_core.h */
29 #include <linux/serial_core.h>
30 #include <linux/initrd.h>
31 #include <linux/module.h>
32 #include <linux/fsl_devices.h>
34 #include <asm/system.h>
35 #include <asm/pgtable.h>
37 #include <asm/atomic.h>
40 #include <asm/machdep.h>
42 #include <asm/bootinfo.h>
43 #include <asm/pci-bridge.h>
44 #include <asm/mpc83xx.h>
47 #include <asm/ppc_sys.h>
48 #include <mm/mmu_decl.h>
50 #include <syslib/ppc83xx_setup.h>
53 unsigned long isa_io_base = 0;
54 unsigned long isa_mem_base = 0;
57 extern unsigned long total_memory; /* in mm/init */
59 unsigned char __res[sizeof (bd_t)];
63 mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
65 static char pci_irq_table[][4] =
67 * PCI IDSEL/INTPIN->INTLINE
71 {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
72 {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
73 {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */
75 {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */
76 {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */
77 {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */
78 {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */
79 {0, 0, 0, 0}, /* idsel 0x19 */
80 {0, 0, 0, 0}, /* idsel 0x20 */
83 const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4;
84 return PCI_IRQ_TABLE_LOOKUP;
88 mpc83xx_exclude_device(u_char bus, u_char devfn)
90 return PCIBIOS_SUCCESSFUL;
92 #endif /* CONFIG_PCI */
94 /* ************************************************************************
96 * Setup the architecture
100 mpc834x_sys_setup_arch(void)
102 bd_t *binfo = (bd_t *) __res;
104 struct gianfar_platform_data *pdata;
105 struct gianfar_mdio_data *mdata;
107 /* get the core frequency */
108 freq = binfo->bi_intfreq;
110 /* Set loops_per_jiffy to a half-way reasonable value,
111 for use until calibrate_delay gets called. */
112 loops_per_jiffy = freq / HZ;
115 /* setup PCI host bridges */
116 mpc83xx_setup_hose();
118 mpc83xx_early_serial_map();
120 /* setup the board related info for the MDIO bus */
121 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC83xx_MDIO);
123 mdata->irq[0] = MPC83xx_IRQ_EXT1;
124 mdata->irq[1] = MPC83xx_IRQ_EXT2;
128 /* setup the board related information for the enet controllers */
129 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
131 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
134 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
137 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
139 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
142 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
145 #ifdef CONFIG_BLK_DEV_INITRD
147 ROOT_DEV = Root_RAM0;
150 #ifdef CONFIG_ROOT_NFS
153 ROOT_DEV = Root_HDA1;
158 mpc834x_sys_map_io(void)
160 /* we steal the lowest ioremap addr for virt space */
161 io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
165 mpc834x_sys_show_cpuinfo(struct seq_file *m)
167 uint pvid, svid, phid1;
168 bd_t *binfo = (bd_t *) __res;
171 /* get the core frequency */
172 freq = binfo->bi_intfreq;
174 pvid = mfspr(SPRN_PVR);
175 svid = mfspr(SPRN_SVR);
177 seq_printf(m, "Vendor\t\t: Freescale Inc.\n");
178 seq_printf(m, "Machine\t\t: mpc%s sys\n", cur_ppc_sys_spec->ppc_sys_name);
179 seq_printf(m, "core clock\t: %d MHz\n"
180 "bus clock\t: %d MHz\n",
181 (int)(binfo->bi_intfreq / 1000000),
182 (int)(binfo->bi_busfreq / 1000000));
183 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
184 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
186 /* Display cpu Pll setting */
187 phid1 = mfspr(SPRN_HID1);
188 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
190 /* Display the amount of memory */
191 seq_printf(m, "Memory\t\t: %d MB\n", (int)(binfo->bi_memsize / (1024 * 1024)));
198 mpc834x_sys_init_IRQ(void)
200 bd_t *binfo = (bd_t *) __res;
204 IRQ_SENSE_LEVEL, /* EXT 1 */
205 IRQ_SENSE_LEVEL, /* EXT 2 */
208 IRQ_SENSE_LEVEL, /* EXT 4 */
209 IRQ_SENSE_LEVEL, /* EXT 5 */
210 IRQ_SENSE_LEVEL, /* EXT 6 */
211 IRQ_SENSE_LEVEL, /* EXT 7 */
220 ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
222 /* Initialize the default interrupt mapping priorities,
223 * in case the boot rom changed something on us.
225 ipic_set_default_priority();
228 #if defined(CONFIG_I2C_MPC) && defined(CONFIG_SENSORS_DS1374)
229 extern ulong ds1374_get_rtc_time(void);
230 extern int ds1374_set_rtc_time(ulong);
233 mpc834x_rtc_hookup(void)
237 ppc_md.get_rtc_time = ds1374_get_rtc_time;
238 ppc_md.set_rtc_time = ds1374_set_rtc_time;
241 tv.tv_sec = (ppc_md.get_rtc_time)();
242 do_settimeofday(&tv);
246 late_initcall(mpc834x_rtc_hookup);
248 static __inline__ void
249 mpc834x_sys_set_bat(void)
251 /* we steal the lowest ioremap addr for virt space */
253 mtspr(SPRN_DBAT1U, VIRT_IMMRBAR | 0x1e);
254 mtspr(SPRN_DBAT1L, immrbar | 0x2a);
259 platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
260 unsigned long r6, unsigned long r7)
262 bd_t *binfo = (bd_t *) __res;
264 /* parse_bootinfo must always be called first */
265 parse_bootinfo(find_bootinfo());
268 * If we were passed in a board information, copy it into the
269 * residual data area.
272 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
276 #if defined(CONFIG_BLK_DEV_INITRD)
278 * If the init RAM disk has been configured in, and there's a valid
279 * starting address for it, set it up.
282 initrd_start = r4 + KERNELBASE;
283 initrd_end = r5 + KERNELBASE;
285 #endif /* CONFIG_BLK_DEV_INITRD */
287 /* Copy the kernel command line arguments to a safe place. */
289 *(char *) (r7 + KERNELBASE) = 0;
290 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
293 immrbar = binfo->bi_immr_base;
295 mpc834x_sys_set_bat();
297 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
301 memset(&p, 0, sizeof (p));
303 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
304 p.uartclk = binfo->bi_busfreq;
308 memset(&p, 0, sizeof (p));
310 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
311 p.uartclk = binfo->bi_busfreq;
317 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
319 /* setup the PowerPC module struct */
320 ppc_md.setup_arch = mpc834x_sys_setup_arch;
321 ppc_md.show_cpuinfo = mpc834x_sys_show_cpuinfo;
323 ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
324 ppc_md.get_irq = ipic_get_irq;
326 ppc_md.restart = mpc83xx_restart;
327 ppc_md.power_off = mpc83xx_power_off;
328 ppc_md.halt = mpc83xx_halt;
330 ppc_md.find_end_of_memory = mpc83xx_find_end_of_memory;
331 ppc_md.setup_io_mappings = mpc834x_sys_map_io;
333 ppc_md.time_init = mpc83xx_time_init;
334 ppc_md.set_rtc_time = NULL;
335 ppc_md.get_rtc_time = NULL;
336 ppc_md.calibrate_decr = mpc83xx_calibrate_decr;
338 ppc_md.early_serial_map = mpc83xx_early_serial_map;
339 #if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
340 ppc_md.progress = gen550_progress;
341 #endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
344 ppc_md.progress("mpc834x_sys_init(): exit", 0);