3 * Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
5 * (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
7 * Portions Copyright (c) 2001 Matrox Graphics Inc.
9 * Version: 1.65 2002/08/14
11 * MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
13 * Contributors: "menion?" <menion@mindless.com>
14 * Betatesting, fixes, ideas
16 * "Kurt Garloff" <garloff@suse.de>
17 * Betatesting, fixes, ideas, videomodes, videomodes timmings
19 * "Tom Rini" <trini@kernel.crashing.org>
20 * MTRR stuff, PPC cleanups, betatesting, fixes, ideas
22 * "Bibek Sahu" <scorpio@dodds.net>
23 * Access device through readb|w|l and write b|w|l
24 * Extensive debugging stuff
26 * "Daniel Haun" <haund@usa.net>
27 * Testing, hardware cursor fixes
29 * "Scott Wood" <sawst46+@pitt.edu>
32 * "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
35 * "Kelly French" <targon@hazmat.com>
36 * "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
37 * Betatesting, bug reporting
39 * "Pablo Bianucci" <pbian@pccp.com.ar>
40 * Fixes, ideas, betatesting
42 * "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
43 * Fixes, enhandcements, ideas, betatesting
45 * "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
46 * PPC betatesting, PPC support, backward compatibility
48 * "Paul Womar" <Paul@pwomar.demon.co.uk>
49 * "Owen Waller" <O.Waller@ee.qub.ac.uk>
52 * "Thomas Pornin" <pornin@bolet.ens.fr>
55 * "Pieter van Leuven" <pvl@iae.nl>
56 * "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
59 * "H. Peter Arvin" <hpa@transmeta.com>
62 * "Cort Dougan" <cort@cs.nmt.edu>
63 * CHRP fixes and PReP cleanup
65 * "Mark Vojkovich" <mvojkovi@ucsd.edu>
68 * "Samuel Hocevar" <sam@via.ecp.fr>
71 * "Anton Altaparmakov" <AntonA@bigfoot.com>
72 * G400 MAX/non-MAX distinction
74 * "Ken Aaker" <kdaaker@rchland.vnet.ibm.com>
75 * memtype extension (needed for GXT130P RS/6000 adapter)
77 * "Uns Lider" <unslider@miranda.org>
80 * "Denis Zaitsev" <zzz@cd-club.ru>
83 * "Mike Pieper" <mike@pieper-family.de>
84 * TVOut enhandcements, V4L2 control interface.
86 * "Diego Biurrun" <diego@biurrun.de>
89 * (following author is not in any relation with this code, but his code
90 * is included in this driver)
92 * Based on framebuffer driver for VBE 2.0 compliant graphic boards
93 * (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
95 * (following author is not in any relation with this code, but his ideas
96 * were used when writting this driver)
98 * FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
102 #include <linux/config.h>
103 #include <linux/version.h>
105 #include "matroxfb_base.h"
106 #include "matroxfb_misc.h"
107 #include "matroxfb_accel.h"
108 #include "matroxfb_DAC1064.h"
109 #include "matroxfb_Ti3026.h"
110 #include "matroxfb_maven.h"
111 #include "matroxfb_crtc2.h"
112 #include "matroxfb_g450.h"
113 #include <linux/matroxfb.h>
114 #include <linux/interrupt.h>
115 #include <asm/uaccess.h>
117 #ifdef CONFIG_PPC_PMAC
118 unsigned char nvram_read_byte(int);
119 static int default_vmode = VMODE_NVRAM;
120 static int default_cmode = CMODE_NVRAM;
123 static void matroxfb_unregister_device(struct matrox_fb_info* minfo);
125 /* --------------------------------------------------------------------- */
131 /* --------------------------------------------------------------------- */
133 static struct fb_var_screeninfo vesafb_defined = {
134 640,480,640,480,/* W,H, W, H (virtual) load xres,xres_virtual*/
135 0,0, /* virtual -> visible no offset */
136 8, /* depth -> load bits_per_pixel */
141 {0,0,0}, /* transparency */
142 0, /* standard pixel format */
145 FB_ACCELF_TEXT, /* accel flags */
146 39721L,48L,16L,33L,10L,
147 96L,2L,~0, /* No sync info */
148 FB_VMODE_NONINTERLACED,
154 /* --------------------------------------------------------------------- */
155 static void update_crtc2(WPMINFO unsigned int pos) {
156 struct matroxfb_dh_fb_info* info = ACCESS_FBINFO(crtc2.info);
158 /* Make sure that displays are compatible */
159 if (info && (info->fbcon.var.bits_per_pixel == ACCESS_FBINFO(fbcon).var.bits_per_pixel)
160 && (info->fbcon.var.xres_virtual == ACCESS_FBINFO(fbcon).var.xres_virtual)
161 && (info->fbcon.var.green.length == ACCESS_FBINFO(fbcon).var.green.length)
163 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
167 if (info->interlaced) {
168 mga_outl(0x3C2C, pos);
169 mga_outl(0x3C28, pos + ACCESS_FBINFO(fbcon).var.xres_virtual * ACCESS_FBINFO(fbcon).var.bits_per_pixel / 8);
171 mga_outl(0x3C28, pos);
178 static void matroxfb_crtc1_panpos(WPMINFO2) {
179 if (ACCESS_FBINFO(crtc1.panpos) >= 0) {
183 matroxfb_DAC_lock_irqsave(flags);
184 panpos = ACCESS_FBINFO(crtc1.panpos);
186 unsigned int extvga_reg;
188 ACCESS_FBINFO(crtc1.panpos) = -1; /* No update pending anymore */
189 extvga_reg = mga_inb(M_EXTVGA_INDEX);
190 mga_setr(M_EXTVGA_INDEX, 0x00, panpos);
191 if (extvga_reg != 0x00) {
192 mga_outb(M_EXTVGA_INDEX, extvga_reg);
195 matroxfb_DAC_unlock_irqrestore(flags);
199 static irqreturn_t matrox_irq(int irq, void *dev_id, struct pt_regs *fp)
206 status = mga_inl(M_STATUS);
209 mga_outl(M_ICLEAR, 0x20);
210 ACCESS_FBINFO(crtc1.vsync.cnt)++;
211 matroxfb_crtc1_panpos(PMINFO2);
212 wake_up_interruptible(&ACCESS_FBINFO(crtc1.vsync.wait));
215 if (status & 0x200) {
216 mga_outl(M_ICLEAR, 0x200);
217 ACCESS_FBINFO(crtc2.vsync.cnt)++;
218 wake_up_interruptible(&ACCESS_FBINFO(crtc2.vsync.wait));
221 return IRQ_RETVAL(handled);
224 int matroxfb_enable_irq(WPMINFO int reenable) {
227 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
232 if (!test_and_set_bit(0, &ACCESS_FBINFO(irq_flags))) {
233 if (request_irq(ACCESS_FBINFO(pcidev)->irq, matrox_irq,
234 SA_SHIRQ, "matroxfb", MINFO)) {
235 clear_bit(0, &ACCESS_FBINFO(irq_flags));
238 /* Clear any pending field interrupts */
239 mga_outl(M_ICLEAR, bm);
240 mga_outl(M_IEN, mga_inl(M_IEN) | bm);
241 } else if (reenable) {
244 ien = mga_inl(M_IEN);
245 if ((ien & bm) != bm) {
246 printk(KERN_DEBUG "matroxfb: someone disabled IRQ [%08X]\n", ien);
247 mga_outl(M_IEN, ien | bm);
253 static void matroxfb_disable_irq(WPMINFO2) {
254 if (test_and_clear_bit(0, &ACCESS_FBINFO(irq_flags))) {
255 /* Flush pending pan-at-vbl request... */
256 matroxfb_crtc1_panpos(PMINFO2);
257 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
258 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x220);
260 mga_outl(M_IEN, mga_inl(M_IEN) & ~0x20);
261 free_irq(ACCESS_FBINFO(pcidev)->irq, MINFO);
265 int matroxfb_wait_for_sync(WPMINFO u_int32_t crtc) {
266 struct matrox_vsync *vs;
272 vs = &ACCESS_FBINFO(crtc1.vsync);
275 if (ACCESS_FBINFO(devflags.accelerator) != FB_ACCEL_MATROX_MGAG400) {
278 vs = &ACCESS_FBINFO(crtc2.vsync);
283 ret = matroxfb_enable_irq(PMINFO 0);
289 ret = wait_event_interruptible_timeout(vs->wait, cnt != vs->cnt, HZ/10);
294 matroxfb_enable_irq(PMINFO 1);
300 /* --------------------------------------------------------------------- */
302 static void matrox_pan_var(WPMINFO struct fb_var_screeninfo *var) {
304 unsigned short p0, p1, p2;
305 #ifdef CONFIG_FB_MATROX_32MB
315 if (ACCESS_FBINFO(dead))
318 ACCESS_FBINFO(fbcon).var.xoffset = var->xoffset;
319 ACCESS_FBINFO(fbcon).var.yoffset = var->yoffset;
320 pos = (ACCESS_FBINFO(fbcon).var.yoffset * ACCESS_FBINFO(fbcon).var.xres_virtual + ACCESS_FBINFO(fbcon).var.xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
321 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
322 p0 = ACCESS_FBINFO(hw).CRTC[0x0D] = pos & 0xFF;
323 p1 = ACCESS_FBINFO(hw).CRTC[0x0C] = (pos & 0xFF00) >> 8;
324 p2 = ACCESS_FBINFO(hw).CRTCEXT[0] = (ACCESS_FBINFO(hw).CRTCEXT[0] & 0xB0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
325 #ifdef CONFIG_FB_MATROX_32MB
326 p3 = ACCESS_FBINFO(hw).CRTCEXT[8] = pos >> 21;
329 /* FB_ACTIVATE_VBL and we can acquire interrupts? Honor FB_ACTIVATE_VBL then... */
330 vbl = (var->activate & FB_ACTIVATE_VBL) && (matroxfb_enable_irq(PMINFO 0) == 0);
334 matroxfb_DAC_lock_irqsave(flags);
335 mga_setr(M_CRTC_INDEX, 0x0D, p0);
336 mga_setr(M_CRTC_INDEX, 0x0C, p1);
337 #ifdef CONFIG_FB_MATROX_32MB
338 if (ACCESS_FBINFO(devflags.support32MB))
339 mga_setr(M_EXTVGA_INDEX, 0x08, p3);
342 ACCESS_FBINFO(crtc1.panpos) = p2;
344 /* Abort any pending change */
345 ACCESS_FBINFO(crtc1.panpos) = -1;
346 mga_setr(M_EXTVGA_INDEX, 0x00, p2);
348 matroxfb_DAC_unlock_irqrestore(flags);
350 update_crtc2(PMINFO pos);
355 static void matroxfb_remove(WPMINFO int dummy) {
356 /* Currently we are holding big kernel lock on all dead & usecount updates.
357 * Destroy everything after all users release it. Especially do not unregister
358 * framebuffer and iounmap memory, neither fbmem nor fbcon-cfb* does not check
359 * for device unplugged when in use.
360 * In future we should point mmio.vbase & video.vbase somewhere where we can
361 * write data without causing too much damage...
364 ACCESS_FBINFO(dead) = 1;
365 if (ACCESS_FBINFO(usecount)) {
366 /* destroy it later */
369 matroxfb_unregister_device(MINFO);
370 unregister_framebuffer(&ACCESS_FBINFO(fbcon));
371 matroxfb_g450_shutdown(PMINFO2);
373 if (ACCESS_FBINFO(mtrr.vram_valid))
374 mtrr_del(ACCESS_FBINFO(mtrr.vram), ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len));
376 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
377 mga_iounmap(ACCESS_FBINFO(video.vbase));
378 release_mem_region(ACCESS_FBINFO(video.base), ACCESS_FBINFO(video.len_maximum));
379 release_mem_region(ACCESS_FBINFO(mmio.base), 16384);
380 #ifdef CONFIG_FB_MATROX_MULTIHEAD
386 * Open/Release the frame buffer device
389 static int matroxfb_open(struct fb_info *info, int user)
391 MINFO_FROM_INFO(info);
393 DBG_LOOP(__FUNCTION__)
395 if (ACCESS_FBINFO(dead)) {
398 ACCESS_FBINFO(usecount)++;
400 ACCESS_FBINFO(userusecount)++;
405 static int matroxfb_release(struct fb_info *info, int user)
407 MINFO_FROM_INFO(info);
409 DBG_LOOP(__FUNCTION__)
412 if (0 == --ACCESS_FBINFO(userusecount)) {
413 matroxfb_disable_irq(PMINFO2);
416 if (!(--ACCESS_FBINFO(usecount)) && ACCESS_FBINFO(dead)) {
417 matroxfb_remove(PMINFO 0);
422 static int matroxfb_pan_display(struct fb_var_screeninfo *var,
423 struct fb_info* info) {
424 MINFO_FROM_INFO(info);
428 matrox_pan_var(PMINFO var);
432 static int matroxfb_get_final_bppShift(CPMINFO int bpp) {
441 if (isInterleave(MINFO))
443 if (ACCESS_FBINFO(devflags.video64bits))
448 static int matroxfb_test_and_set_rounding(CPMINFO int xres, int bpp) {
456 case 4: rounding = 128;
458 case 8: rounding = 64; /* doc says 64; 32 is OK for G400 */
460 case 16: rounding = 32;
462 case 24: rounding = 64; /* doc says 64; 32 is OK for G400 */
464 default: rounding = 16;
465 /* on G400, 16 really does not work */
466 if (ACCESS_FBINFO(devflags.accelerator) == FB_ACCEL_MATROX_MGAG400)
470 if (isInterleave(MINFO)) {
473 over = xres % rounding;
475 xres += rounding-over;
479 static int matroxfb_pitch_adjust(CPMINFO int xres, int bpp) {
485 if (!bpp) return xres;
487 width = ACCESS_FBINFO(capable.vxres);
489 if (ACCESS_FBINFO(devflags.precise_width)) {
491 if ((*width >= xres) && (matroxfb_test_and_set_rounding(PMINFO *width, bpp) == *width)) {
498 xres_new = matroxfb_test_and_set_rounding(PMINFO xres, bpp);
503 static int matroxfb_get_cmap_len(struct fb_var_screeninfo *var) {
507 switch (var->bits_per_pixel) {
509 return 16; /* pseudocolor... 16 entries HW palette */
511 return 256; /* pseudocolor... 256 entries HW palette */
513 return 16; /* directcolor... 16 entries SW palette */
514 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
516 return 16; /* directcolor... 16 entries SW palette */
517 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
519 return 16; /* directcolor... 16 entries SW palette */
520 /* Mystique: truecolor, 16 entries SW palette, HW palette hardwired into 1:1 mapping */
522 return 16; /* return something reasonable... or panic()? */
525 static int matroxfb_decode_var(CPMINFO struct fb_var_screeninfo *var, int *visual, int *video_cmap_len, unsigned int* ydstorg) {
529 unsigned char offset,
537 static const struct RGBT table[]= {
538 { 8,{ 0,8},{0,8},{0,8},{ 0,0},MX_VISUAL_PSEUDOCOLOR},
539 {15,{10,5},{5,5},{0,5},{15,1},MX_VISUAL_DIRECTCOLOR},
540 {16,{11,5},{5,6},{0,5},{ 0,0},MX_VISUAL_DIRECTCOLOR},
541 {24,{16,8},{8,8},{0,8},{ 0,0},MX_VISUAL_DIRECTCOLOR},
542 {32,{16,8},{8,8},{0,8},{24,8},MX_VISUAL_DIRECTCOLOR}
544 struct RGBT const *rgbt;
545 unsigned int bpp = var->bits_per_pixel;
546 unsigned int vramlen;
552 case 4: if (!ACCESS_FBINFO(capable.cfb4)) return -EINVAL;
558 default: return -EINVAL;
561 vramlen = ACCESS_FBINFO(video.len_usable);
562 if (var->yres_virtual < var->yres)
563 var->yres_virtual = var->yres;
564 if (var->xres_virtual < var->xres)
565 var->xres_virtual = var->xres;
567 var->xres_virtual = matroxfb_pitch_adjust(PMINFO var->xres_virtual, bpp);
568 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
569 if (memlen > vramlen) {
570 var->yres_virtual = vramlen * 8 / (var->xres_virtual * bpp);
571 memlen = var->xres_virtual * bpp * var->yres_virtual / 8;
573 /* There is hardware bug that no line can cross 4MB boundary */
574 /* give up for CFB24, it is impossible to easy workaround it */
575 /* for other try to do something */
576 if (!ACCESS_FBINFO(capable.cross4MB) && (memlen > 0x400000)) {
580 unsigned int linelen;
581 unsigned int m1 = linelen = var->xres_virtual * bpp / 8;
582 unsigned int m2 = PAGE_SIZE; /* or 128 if you do not need PAGE ALIGNED address */
583 unsigned int max_yres;
588 while (m2 >= m1) m2 -= m1;
593 m2 = linelen * PAGE_SIZE / m2;
594 *ydstorg = m2 = 0x400000 % m2;
595 max_yres = (vramlen - m2) / linelen;
596 if (var->yres_virtual > max_yres)
597 var->yres_virtual = max_yres;
600 /* YDSTLEN contains only signed 16bit value */
601 if (var->yres_virtual > 32767)
602 var->yres_virtual = 32767;
603 /* we must round yres/xres down, we already rounded y/xres_virtual up
604 if it was possible. We should return -EINVAL, but I disagree */
605 if (var->yres_virtual < var->yres)
606 var->yres = var->yres_virtual;
607 if (var->xres_virtual < var->xres)
608 var->xres = var->xres_virtual;
609 if (var->xoffset + var->xres > var->xres_virtual)
610 var->xoffset = var->xres_virtual - var->xres;
611 if (var->yoffset + var->yres > var->yres_virtual)
612 var->yoffset = var->yres_virtual - var->yres;
614 if (bpp == 16 && var->green.length == 5) {
615 bpp--; /* an artifical value - 15 */
618 for (rgbt = table; rgbt->bpp < bpp; rgbt++);
620 var->clr.offset = rgbt->clr.offset;\
621 var->clr.length = rgbt->clr.length
627 *visual = rgbt->visual;
630 dprintk("matroxfb: truecolor: "
631 "size=%d:%d:%d:%d, shift=%d:%d:%d:%d\n",
632 var->transp.length, var->red.length, var->green.length, var->blue.length,
633 var->transp.offset, var->red.offset, var->green.offset, var->blue.offset);
635 *video_cmap_len = matroxfb_get_cmap_len(var);
636 dprintk(KERN_INFO "requested %d*%d/%dbpp (%d*%d)\n", var->xres, var->yres, var->bits_per_pixel,
637 var->xres_virtual, var->yres_virtual);
641 static int matroxfb_setcolreg(unsigned regno, unsigned red, unsigned green,
642 unsigned blue, unsigned transp,
643 struct fb_info *fb_info)
645 #ifdef CONFIG_FB_MATROX_MULTIHEAD
646 struct matrox_fb_info* minfo = container_of(fb_info, struct matrox_fb_info, fbcon);
652 * Set a single color register. The values supplied are
653 * already rounded down to the hardware's capabilities
654 * (according to the entries in the `var' structure). Return
655 * != 0 for invalid regno.
658 if (regno >= ACCESS_FBINFO(curr.cmap_len))
661 if (ACCESS_FBINFO(fbcon).var.grayscale) {
662 /* gray = 0.30*R + 0.59*G + 0.11*B */
663 red = green = blue = (red * 77 + green * 151 + blue * 28) >> 8;
666 red = CNVT_TOHW(red, ACCESS_FBINFO(fbcon).var.red.length);
667 green = CNVT_TOHW(green, ACCESS_FBINFO(fbcon).var.green.length);
668 blue = CNVT_TOHW(blue, ACCESS_FBINFO(fbcon).var.blue.length);
669 transp = CNVT_TOHW(transp, ACCESS_FBINFO(fbcon).var.transp.length);
671 switch (ACCESS_FBINFO(fbcon).var.bits_per_pixel) {
674 mga_outb(M_DAC_REG, regno);
675 mga_outb(M_DAC_VAL, red);
676 mga_outb(M_DAC_VAL, green);
677 mga_outb(M_DAC_VAL, blue);
682 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
683 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
684 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
685 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* for 1:5:5:5 */
686 ACCESS_FBINFO(cmap[regno]) = col | (col << 16);
691 ACCESS_FBINFO(cmap[regno]) =
692 (red << ACCESS_FBINFO(fbcon).var.red.offset) |
693 (green << ACCESS_FBINFO(fbcon).var.green.offset) |
694 (blue << ACCESS_FBINFO(fbcon).var.blue.offset) |
695 (transp << ACCESS_FBINFO(fbcon).var.transp.offset); /* 8:8:8:8 */
701 static void matroxfb_init_fix(WPMINFO2)
703 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
706 strcpy(fix->id,"MATROX");
708 fix->xpanstep = 8; /* 8 for 8bpp, 4 for 16bpp, 2 for 32bpp */
711 fix->mmio_start = ACCESS_FBINFO(mmio.base);
712 fix->mmio_len = ACCESS_FBINFO(mmio.len);
713 fix->accel = ACCESS_FBINFO(devflags.accelerator);
716 static void matroxfb_update_fix(WPMINFO2)
718 struct fb_fix_screeninfo *fix = &ACCESS_FBINFO(fbcon).fix;
721 fix->smem_start = ACCESS_FBINFO(video.base) + ACCESS_FBINFO(curr.ydstorg.bytes);
722 fix->smem_len = ACCESS_FBINFO(video.len_usable) - ACCESS_FBINFO(curr.ydstorg.bytes);
725 static int matroxfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
730 unsigned int ydstorg;
731 MINFO_FROM_INFO(info);
733 if (ACCESS_FBINFO(dead)) {
736 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
741 static int matroxfb_set_par(struct fb_info *info)
746 unsigned int ydstorg;
747 struct fb_var_screeninfo *var;
748 MINFO_FROM_INFO(info);
752 if (ACCESS_FBINFO(dead)) {
757 if ((err = matroxfb_decode_var(PMINFO var, &visual, &cmap_len, &ydstorg)) != 0)
759 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase)) + ydstorg;
760 matroxfb_update_fix(PMINFO2);
761 ACCESS_FBINFO(fbcon).fix.visual = visual;
762 ACCESS_FBINFO(fbcon).fix.type = FB_TYPE_PACKED_PIXELS;
763 ACCESS_FBINFO(fbcon).fix.type_aux = 0;
764 ACCESS_FBINFO(fbcon).fix.line_length = (var->xres_virtual * var->bits_per_pixel) >> 3;
768 ACCESS_FBINFO(curr.cmap_len) = cmap_len;
769 ydstorg += ACCESS_FBINFO(devflags.ydstorg);
770 ACCESS_FBINFO(curr.ydstorg.bytes) = ydstorg;
771 ACCESS_FBINFO(curr.ydstorg.chunks) = ydstorg >> (isInterleave(MINFO)?3:2);
772 if (var->bits_per_pixel == 4)
773 ACCESS_FBINFO(curr.ydstorg.pixels) = ydstorg;
775 ACCESS_FBINFO(curr.ydstorg.pixels) = (ydstorg * 8) / var->bits_per_pixel;
776 ACCESS_FBINFO(curr.final_bppShift) = matroxfb_get_final_bppShift(PMINFO var->bits_per_pixel);
777 { struct my_timming mt;
778 struct matrox_hw_state* hw;
781 matroxfb_var2my(var, &mt);
782 mt.crtc = MATROXFB_SRC_CRTC1;
784 switch (var->bits_per_pixel) {
785 case 0: mt.delay = 31 + 0; break;
786 case 16: mt.delay = 21 + 8; break;
787 case 24: mt.delay = 17 + 8; break;
788 case 32: mt.delay = 16 + 8; break;
789 default: mt.delay = 31 + 8; break;
792 hw = &ACCESS_FBINFO(hw);
794 down_read(&ACCESS_FBINFO(altout).lock);
795 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
796 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
797 ACCESS_FBINFO(outputs[out]).output->compute) {
798 ACCESS_FBINFO(outputs[out]).output->compute(ACCESS_FBINFO(outputs[out]).data, &mt);
801 up_read(&ACCESS_FBINFO(altout).lock);
802 ACCESS_FBINFO(crtc1).pixclock = mt.pixclock;
803 ACCESS_FBINFO(crtc1).mnp = mt.mnp;
804 ACCESS_FBINFO(hw_switch->init(PMINFO &mt));
805 pos = (var->yoffset * var->xres_virtual + var->xoffset) * ACCESS_FBINFO(curr.final_bppShift) / 32;
806 pos += ACCESS_FBINFO(curr.ydstorg.chunks);
808 hw->CRTC[0x0D] = pos & 0xFF;
809 hw->CRTC[0x0C] = (pos & 0xFF00) >> 8;
810 hw->CRTCEXT[0] = (hw->CRTCEXT[0] & 0xF0) | ((pos >> 16) & 0x0F) | ((pos >> 14) & 0x40);
811 hw->CRTCEXT[8] = pos >> 21;
812 ACCESS_FBINFO(hw_switch->restore(PMINFO2));
813 update_crtc2(PMINFO pos);
814 down_read(&ACCESS_FBINFO(altout).lock);
815 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
816 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
817 ACCESS_FBINFO(outputs[out]).output->program) {
818 ACCESS_FBINFO(outputs[out]).output->program(ACCESS_FBINFO(outputs[out]).data);
821 for (out = 0; out < MATROXFB_MAX_OUTPUTS; out++) {
822 if (ACCESS_FBINFO(outputs[out]).src == MATROXFB_SRC_CRTC1 &&
823 ACCESS_FBINFO(outputs[out]).output->start) {
824 ACCESS_FBINFO(outputs[out]).output->start(ACCESS_FBINFO(outputs[out]).data);
827 up_read(&ACCESS_FBINFO(altout).lock);
828 matrox_cfbX_init(PMINFO2);
831 ACCESS_FBINFO(initialized) = 1;
835 static int matroxfb_get_vblank(WPMINFO struct fb_vblank *vblank)
839 matroxfb_enable_irq(PMINFO 0);
840 memset(vblank, 0, sizeof(*vblank));
841 vblank->flags = FB_VBLANK_HAVE_VCOUNT | FB_VBLANK_HAVE_VSYNC |
842 FB_VBLANK_HAVE_VBLANK | FB_VBLANK_HAVE_HBLANK;
843 sts1 = mga_inb(M_INSTS1);
844 vblank->vcount = mga_inl(M_VCOUNT);
845 /* BTW, on my PIII/450 with G400, reading M_INSTS1
846 byte makes this call about 12% slower (1.70 vs. 2.05 us
849 vblank->flags |= FB_VBLANK_HBLANKING;
851 vblank->flags |= FB_VBLANK_VSYNCING;
852 if (vblank->vcount >= ACCESS_FBINFO(fbcon).var.yres)
853 vblank->flags |= FB_VBLANK_VBLANKING;
854 if (test_bit(0, &ACCESS_FBINFO(irq_flags))) {
855 vblank->flags |= FB_VBLANK_HAVE_COUNT;
856 /* Only one writer, aligned int value...
857 it should work without lock and without atomic_t */
858 vblank->count = ACCESS_FBINFO(crtc1).vsync.cnt;
863 static struct matrox_altout panellink_output = {
864 .name = "Panellink output",
867 static int matroxfb_ioctl(struct fb_info *info,
868 unsigned int cmd, unsigned long arg)
870 void __user *argp = (void __user *)arg;
871 MINFO_FROM_INFO(info);
875 if (ACCESS_FBINFO(dead)) {
882 struct fb_vblank vblank;
885 err = matroxfb_get_vblank(PMINFO &vblank);
888 if (copy_to_user(argp, &vblank, sizeof(vblank)))
892 case FBIO_WAITFORVSYNC:
896 if (get_user(crt, (u_int32_t __user *)arg))
899 return matroxfb_wait_for_sync(PMINFO crt);
901 case MATROXFB_SET_OUTPUT_MODE:
903 struct matroxioc_output_mode mom;
904 struct matrox_altout *oproc;
907 if (copy_from_user(&mom, argp, sizeof(mom)))
909 if (mom.output >= MATROXFB_MAX_OUTPUTS)
911 down_read(&ACCESS_FBINFO(altout.lock));
912 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
915 } else if (!oproc->verifymode) {
916 if (mom.mode == MATROXFB_OUTPUT_MODE_MONITOR) {
922 val = oproc->verifymode(ACCESS_FBINFO(outputs[mom.output]).data, mom.mode);
925 if (ACCESS_FBINFO(outputs[mom.output]).mode != mom.mode) {
926 ACCESS_FBINFO(outputs[mom.output]).mode = mom.mode;
930 up_read(&ACCESS_FBINFO(altout.lock));
933 switch (ACCESS_FBINFO(outputs[mom.output]).src) {
934 case MATROXFB_SRC_CRTC1:
935 matroxfb_set_par(info);
937 case MATROXFB_SRC_CRTC2:
939 struct matroxfb_dh_fb_info* crtc2;
941 down_read(&ACCESS_FBINFO(crtc2.lock));
942 crtc2 = ACCESS_FBINFO(crtc2.info);
944 crtc2->fbcon.fbops->fb_set_par(&crtc2->fbcon);
945 up_read(&ACCESS_FBINFO(crtc2.lock));
951 case MATROXFB_GET_OUTPUT_MODE:
953 struct matroxioc_output_mode mom;
954 struct matrox_altout *oproc;
957 if (copy_from_user(&mom, argp, sizeof(mom)))
959 if (mom.output >= MATROXFB_MAX_OUTPUTS)
961 down_read(&ACCESS_FBINFO(altout.lock));
962 oproc = ACCESS_FBINFO(outputs[mom.output]).output;
966 mom.mode = ACCESS_FBINFO(outputs[mom.output]).mode;
969 up_read(&ACCESS_FBINFO(altout.lock));
972 if (copy_to_user(argp, &mom, sizeof(mom)))
976 case MATROXFB_SET_OUTPUT_CONNECTION:
982 if (copy_from_user(&tmp, argp, sizeof(tmp)))
984 for (i = 0; i < 32; i++) {
985 if (tmp & (1 << i)) {
986 if (i >= MATROXFB_MAX_OUTPUTS)
988 if (!ACCESS_FBINFO(outputs[i]).output)
990 switch (ACCESS_FBINFO(outputs[i]).src) {
991 case MATROXFB_SRC_NONE:
992 case MATROXFB_SRC_CRTC1:
999 if (ACCESS_FBINFO(devflags.panellink)) {
1000 if (tmp & MATROXFB_OUTPUT_CONN_DFP) {
1001 if (tmp & MATROXFB_OUTPUT_CONN_SECONDARY)
1003 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1004 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC2) {
1011 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1012 if (tmp & (1 << i)) {
1013 if (ACCESS_FBINFO(outputs[i]).src != MATROXFB_SRC_CRTC1) {
1015 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_CRTC1;
1017 } else if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1019 ACCESS_FBINFO(outputs[i]).src = MATROXFB_SRC_NONE;
1024 matroxfb_set_par(info);
1027 case MATROXFB_GET_OUTPUT_CONNECTION:
1032 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1033 if (ACCESS_FBINFO(outputs[i]).src == MATROXFB_SRC_CRTC1) {
1037 if (put_user(conn, (u_int32_t __user *)arg))
1041 case MATROXFB_GET_AVAILABLE_OUTPUTS:
1046 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1047 if (ACCESS_FBINFO(outputs[i]).output) {
1048 switch (ACCESS_FBINFO(outputs[i]).src) {
1049 case MATROXFB_SRC_NONE:
1050 case MATROXFB_SRC_CRTC1:
1056 if (ACCESS_FBINFO(devflags.panellink)) {
1057 if (conn & MATROXFB_OUTPUT_CONN_DFP)
1058 conn &= ~MATROXFB_OUTPUT_CONN_SECONDARY;
1059 if (conn & MATROXFB_OUTPUT_CONN_SECONDARY)
1060 conn &= ~MATROXFB_OUTPUT_CONN_DFP;
1062 if (put_user(conn, (u_int32_t __user *)arg))
1066 case MATROXFB_GET_ALL_OUTPUTS:
1071 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1072 if (ACCESS_FBINFO(outputs[i]).output) {
1076 if (put_user(conn, (u_int32_t __user *)arg))
1080 case VIDIOC_QUERYCAP:
1082 struct v4l2_capability r;
1084 memset(&r, 0, sizeof(r));
1085 strcpy(r.driver, "matroxfb");
1086 strcpy(r.card, "Matrox");
1087 sprintf(r.bus_info, "PCI:%s", pci_name(ACCESS_FBINFO(pcidev)));
1088 r.version = KERNEL_VERSION(1,0,0);
1089 r.capabilities = V4L2_CAP_VIDEO_OUTPUT;
1090 if (copy_to_user(argp, &r, sizeof(r)))
1095 case VIDIOC_QUERYCTRL:
1097 struct v4l2_queryctrl qctrl;
1100 if (copy_from_user(&qctrl, argp, sizeof(qctrl)))
1103 down_read(&ACCESS_FBINFO(altout).lock);
1104 if (!ACCESS_FBINFO(outputs[1]).output) {
1106 } else if (ACCESS_FBINFO(outputs[1]).output->getqueryctrl) {
1107 err = ACCESS_FBINFO(outputs[1]).output->getqueryctrl(ACCESS_FBINFO(outputs[1]).data, &qctrl);
1111 up_read(&ACCESS_FBINFO(altout).lock);
1113 copy_to_user(argp, &qctrl, sizeof(qctrl)))
1119 struct v4l2_control ctrl;
1122 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1125 down_read(&ACCESS_FBINFO(altout).lock);
1126 if (!ACCESS_FBINFO(outputs[1]).output) {
1128 } else if (ACCESS_FBINFO(outputs[1]).output->getctrl) {
1129 err = ACCESS_FBINFO(outputs[1]).output->getctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1133 up_read(&ACCESS_FBINFO(altout).lock);
1135 copy_to_user(argp, &ctrl, sizeof(ctrl)))
1139 case VIDIOC_S_CTRL_OLD:
1142 struct v4l2_control ctrl;
1145 if (copy_from_user(&ctrl, argp, sizeof(ctrl)))
1148 down_read(&ACCESS_FBINFO(altout).lock);
1149 if (!ACCESS_FBINFO(outputs[1]).output) {
1151 } else if (ACCESS_FBINFO(outputs[1]).output->setctrl) {
1152 err = ACCESS_FBINFO(outputs[1]).output->setctrl(ACCESS_FBINFO(outputs[1]).data, &ctrl);
1156 up_read(&ACCESS_FBINFO(altout).lock);
1163 /* 0 unblank, 1 blank, 2 no vsync, 3 no hsync, 4 off */
1165 static int matroxfb_blank(int blank, struct fb_info *info)
1170 MINFO_FROM_INFO(info);
1174 if (ACCESS_FBINFO(dead))
1178 case FB_BLANK_NORMAL: seq = 0x20; crtc = 0x00; break; /* works ??? */
1179 case FB_BLANK_VSYNC_SUSPEND: seq = 0x20; crtc = 0x10; break;
1180 case FB_BLANK_HSYNC_SUSPEND: seq = 0x20; crtc = 0x20; break;
1181 case FB_BLANK_POWERDOWN: seq = 0x20; crtc = 0x30; break;
1182 default: seq = 0x00; crtc = 0x00; break;
1187 mga_outb(M_SEQ_INDEX, 1);
1188 mga_outb(M_SEQ_DATA, (mga_inb(M_SEQ_DATA) & ~0x20) | seq);
1189 mga_outb(M_EXTVGA_INDEX, 1);
1190 mga_outb(M_EXTVGA_DATA, (mga_inb(M_EXTVGA_DATA) & ~0x30) | crtc);
1196 static struct fb_ops matroxfb_ops = {
1197 .owner = THIS_MODULE,
1198 .fb_open = matroxfb_open,
1199 .fb_release = matroxfb_release,
1200 .fb_check_var = matroxfb_check_var,
1201 .fb_set_par = matroxfb_set_par,
1202 .fb_setcolreg = matroxfb_setcolreg,
1203 .fb_pan_display =matroxfb_pan_display,
1204 .fb_blank = matroxfb_blank,
1205 .fb_ioctl = matroxfb_ioctl,
1206 /* .fb_fillrect = <set by matrox_cfbX_init>, */
1207 /* .fb_copyarea = <set by matrox_cfbX_init>, */
1208 /* .fb_imageblit = <set by matrox_cfbX_init>, */
1209 /* .fb_cursor = <set by matrox_cfbX_init>, */
1212 #define RSDepth(X) (((X) >> 8) & 0x0F)
1222 static struct { struct fb_bitfield red, green, blue, transp; int bits_per_pixel; } colors[] = {
1223 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 8 },
1224 { { 10, 5, 0}, { 5, 5, 0}, { 0, 5, 0}, { 15, 1, 0}, 16 },
1225 { { 11, 5, 0}, { 5, 6, 0}, { 0, 5, 0}, { 0, 0, 0}, 16 },
1226 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 24, 8, 0}, 32 },
1227 { { 0, 8, 0}, { 0, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 4 },
1228 { { 16, 8, 0}, { 8, 8, 0}, { 0, 8, 0}, { 0, 0, 0}, 24 },
1229 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode with (default) VGA8x16 */
1230 { { 0, 6, 0}, { 0, 6, 0}, { 0, 6, 0}, { 0, 0, 0}, 0 }, /* textmode hardwired to VGA8x8 */
1233 /* initialized by setup, see explanation at end of file (search for MODULE_PARM_DESC) */
1234 static unsigned int mem; /* "matrox:mem:xxxxxM" */
1235 static int option_precise_width = 1; /* cannot be changed, option_precise_width==0 must imply noaccel */
1236 static int inv24; /* "matrox:inv24" */
1237 static int cross4MB = -1; /* "matrox:cross4MB" */
1238 static int disabled; /* "matrox:disabled" */
1239 static int noaccel; /* "matrox:noaccel" */
1240 static int nopan; /* "matrox:nopan" */
1241 static int no_pci_retry; /* "matrox:nopciretry" */
1242 static int novga; /* "matrox:novga" */
1243 static int nobios; /* "matrox:nobios" */
1244 static int noinit = 1; /* "matrox:init" */
1245 static int inverse; /* "matrox:inverse" */
1246 static int sgram; /* "matrox:sgram" */
1248 static int mtrr = 1; /* "matrox:nomtrr" */
1250 static int grayscale; /* "matrox:grayscale" */
1251 static int dev = -1; /* "matrox:dev:xxxxx" */
1252 static unsigned int vesa = ~0; /* "matrox:vesa:xxxxx" */
1253 static int depth = -1; /* "matrox:depth:xxxxx" */
1254 static unsigned int xres; /* "matrox:xres:xxxxx" */
1255 static unsigned int yres; /* "matrox:yres:xxxxx" */
1256 static unsigned int upper = ~0; /* "matrox:upper:xxxxx" */
1257 static unsigned int lower = ~0; /* "matrox:lower:xxxxx" */
1258 static unsigned int vslen; /* "matrox:vslen:xxxxx" */
1259 static unsigned int left = ~0; /* "matrox:left:xxxxx" */
1260 static unsigned int right = ~0; /* "matrox:right:xxxxx" */
1261 static unsigned int hslen; /* "matrox:hslen:xxxxx" */
1262 static unsigned int pixclock; /* "matrox:pixclock:xxxxx" */
1263 static int sync = -1; /* "matrox:sync:xxxxx" */
1264 static unsigned int fv; /* "matrox:fv:xxxxx" */
1265 static unsigned int fh; /* "matrox:fh:xxxxxk" */
1266 static unsigned int maxclk; /* "matrox:maxclk:xxxxM" */
1267 static int dfp; /* "matrox:dfp */
1268 static int dfp_type = -1; /* "matrox:dfp:xxx */
1269 static int memtype = -1; /* "matrox:memtype:xxx" */
1270 static char outputs[8]; /* "matrox:outputs:xxx" */
1273 static char videomode[64]; /* "matrox:mode:xxxxx" or "matrox:xxxxx" */
1276 static int matroxfb_getmemory(WPMINFO unsigned int maxSize, unsigned int *realSize){
1281 unsigned char bytes[32];
1286 vm = ACCESS_FBINFO(video.vbase);
1287 maxSize &= ~0x1FFFFF; /* must be X*2MB (really it must be 2 or X*4MB) */
1289 if (maxSize < 0x0200000) return 0;
1290 if (maxSize > 0x2000000) maxSize = 0x2000000;
1292 mga_outb(M_EXTVGA_INDEX, 0x03);
1293 orig = mga_inb(M_EXTVGA_DATA);
1294 mga_outb(M_EXTVGA_DATA, orig | 0x80);
1297 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1298 *tmp++ = mga_readb(vm, offs);
1299 for (offs = 0x100000; offs < maxSize; offs += 0x200000)
1300 mga_writeb(vm, offs, 0x02);
1301 mga_outb(M_CACHEFLUSH, 0x00);
1302 for (offs = 0x100000; offs < maxSize; offs += 0x200000) {
1303 if (mga_readb(vm, offs) != 0x02)
1305 mga_writeb(vm, offs, mga_readb(vm, offs) - 0x02);
1306 if (mga_readb(vm, offs))
1310 for (offs2 = 0x100000; offs2 < maxSize; offs2 += 0x200000)
1311 mga_writeb(vm, offs2, *tmp++);
1313 mga_outb(M_EXTVGA_INDEX, 0x03);
1314 mga_outb(M_EXTVGA_DATA, orig);
1316 *realSize = offs - 0x100000;
1317 #ifdef CONFIG_FB_MATROX_MILLENIUM
1318 ACCESS_FBINFO(interleave) = !(!isMillenium(MINFO) || ((offs - 0x100000) & 0x3FFFFF));
1323 struct video_board {
1327 struct matrox_switch* lowlevel;
1329 #ifdef CONFIG_FB_MATROX_MILLENIUM
1330 static struct video_board vbMillennium = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA2064W, &matrox_millennium};
1331 static struct video_board vbMillennium2 = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W, &matrox_millennium};
1332 static struct video_board vbMillennium2A = {0x1000000, 0x0800000, FB_ACCEL_MATROX_MGA2164W_AGP, &matrox_millennium};
1333 #endif /* CONFIG_FB_MATROX_MILLENIUM */
1334 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1335 static struct video_board vbMystique = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGA1064SG, &matrox_mystique};
1336 #endif /* CONFIG_FB_MATROX_MYSTIQUE */
1337 #ifdef CONFIG_FB_MATROX_G
1338 static struct video_board vbG100 = {0x0800000, 0x0800000, FB_ACCEL_MATROX_MGAG100, &matrox_G100};
1339 static struct video_board vbG200 = {0x1000000, 0x1000000, FB_ACCEL_MATROX_MGAG200, &matrox_G100};
1340 #ifdef CONFIG_FB_MATROX_32MB
1341 /* from doc it looks like that accelerator can draw only to low 16MB :-( Direct accesses & displaying are OK for
1343 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1345 static struct video_board vbG400 = {0x2000000, 0x1000000, FB_ACCEL_MATROX_MGAG400, &matrox_G100};
1349 #define DEVF_VIDEO64BIT 0x0001
1350 #define DEVF_SWAPS 0x0002
1351 #define DEVF_SRCORG 0x0004
1352 #define DEVF_DUALHEAD 0x0008
1353 #define DEVF_CROSS4MB 0x0010
1354 #define DEVF_TEXT4B 0x0020
1355 /* #define DEVF_recycled 0x0040 */
1356 /* #define DEVF_recycled 0x0080 */
1357 #define DEVF_SUPPORT32MB 0x0100
1358 #define DEVF_ANY_VXRES 0x0200
1359 #define DEVF_TEXT16B 0x0400
1360 #define DEVF_CRTC2 0x0800
1361 #define DEVF_MAVEN_CAPABLE 0x1000
1362 #define DEVF_PANELLINK_CAPABLE 0x2000
1363 #define DEVF_G450DAC 0x4000
1365 #define DEVF_GCORE (DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB)
1366 #define DEVF_G2CORE (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_MAVEN_CAPABLE | DEVF_PANELLINK_CAPABLE | DEVF_SRCORG | DEVF_DUALHEAD)
1367 #define DEVF_G100 (DEVF_GCORE) /* no doc, no vxres... */
1368 #define DEVF_G200 (DEVF_G2CORE)
1369 #define DEVF_G400 (DEVF_G2CORE | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2)
1370 /* if you'll find how to drive DFP... */
1371 #define DEVF_G450 (DEVF_GCORE | DEVF_ANY_VXRES | DEVF_SUPPORT32MB | DEVF_TEXT16B | DEVF_CRTC2 | DEVF_G450DAC | DEVF_SRCORG | DEVF_DUALHEAD)
1372 #define DEVF_G550 (DEVF_G450)
1374 static struct board {
1375 unsigned short vendor, device, rev, svid, sid;
1377 unsigned int maxclk;
1379 struct video_board* base;
1382 #ifdef CONFIG_FB_MATROX_MILLENIUM
1383 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL, 0xFF,
1389 "Millennium (PCI)"},
1390 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2, 0xFF,
1396 "Millennium II (PCI)"},
1397 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP, 0xFF,
1403 "Millennium II (AGP)"},
1405 #ifdef CONFIG_FB_MATROX_MYSTIQUE
1406 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0x02,
1408 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1413 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS, 0xFF,
1415 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1419 "Mystique 220 (PCI)"},
1420 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0x02,
1422 DEVF_VIDEO64BIT | DEVF_CROSS4MB,
1427 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS_AGP, 0xFF,
1429 DEVF_VIDEO64BIT | DEVF_SWAPS | DEVF_CROSS4MB,
1433 "Mystique 220 (AGP)"},
1435 #ifdef CONFIG_FB_MATROX_G
1436 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM, 0xFF,
1443 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP, 0xFF,
1450 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI, 0xFF,
1457 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1458 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_GENERIC,
1464 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1465 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MYSTIQUE_G200_AGP,
1470 "Mystique G200 (AGP)"},
1471 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1472 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENIUM_G200_AGP,
1477 "Millennium G200 (AGP)"},
1478 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1479 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MARVEL_G200_AGP,
1484 "Marvel G200 (AGP)"},
1485 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1486 PCI_SS_VENDOR_ID_SIEMENS_NIXDORF, PCI_SS_ID_SIEMENS_MGA_G200_AGP,
1492 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP, 0xFF,
1499 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1500 PCI_SS_VENDOR_ID_MATROX, PCI_SS_ID_MATROX_MILLENNIUM_G400_MAX_AGP,
1505 "Millennium G400 MAX (AGP)"},
1506 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0x80,
1513 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400, 0xFF,
1520 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550, 0xFF,
1537 static struct fb_videomode defaultmode = {
1538 /* 640x480 @ 60Hz, 31.5 kHz */
1539 NULL, 60, 640, 480, 39721, 40, 24, 32, 11, 96, 2,
1540 0, FB_VMODE_NONINTERLACED
1542 #endif /* !MODULE */
1544 static int hotplug = 0;
1546 static void setDefaultOutputs(WPMINFO2) {
1550 ACCESS_FBINFO(outputs[0]).default_src = MATROXFB_SRC_CRTC1;
1551 if (ACCESS_FBINFO(devflags.g450dac)) {
1552 ACCESS_FBINFO(outputs[1]).default_src = MATROXFB_SRC_CRTC1;
1553 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1555 ACCESS_FBINFO(outputs[2]).default_src = MATROXFB_SRC_CRTC1;
1558 for (i = 0; i < MATROXFB_MAX_OUTPUTS; i++) {
1565 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_NONE;
1566 } else if (c == '1') {
1567 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC1;
1568 } else if (c == '2' && ACCESS_FBINFO(devflags.crtc2)) {
1569 ACCESS_FBINFO(outputs[i]).default_src = MATROXFB_SRC_CRTC2;
1571 printk(KERN_ERR "matroxfb: Unknown outputs setting\n");
1575 /* Nullify this option for subsequent adapters */
1579 static int initMatrox2(WPMINFO struct board* b){
1580 unsigned long ctrlptr_phys = 0;
1581 unsigned long video_base_phys = 0;
1582 unsigned int memsize;
1585 static struct pci_device_id intel_82437[] = {
1586 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82437) },
1592 /* set default values... */
1593 vesafb_defined.accel_flags = FB_ACCELF_TEXT;
1595 ACCESS_FBINFO(hw_switch) = b->base->lowlevel;
1596 ACCESS_FBINFO(devflags.accelerator) = b->base->accelID;
1597 ACCESS_FBINFO(max_pixel_clock) = b->maxclk;
1599 printk(KERN_INFO "matroxfb: Matrox %s detected\n", b->name);
1600 ACCESS_FBINFO(capable.plnwt) = 1;
1601 ACCESS_FBINFO(chip) = b->chip;
1602 ACCESS_FBINFO(capable.srcorg) = b->flags & DEVF_SRCORG;
1603 ACCESS_FBINFO(devflags.video64bits) = b->flags & DEVF_VIDEO64BIT;
1604 if (b->flags & DEVF_TEXT4B) {
1605 ACCESS_FBINFO(devflags.vgastep) = 4;
1606 ACCESS_FBINFO(devflags.textmode) = 4;
1607 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1608 } else if (b->flags & DEVF_TEXT16B) {
1609 ACCESS_FBINFO(devflags.vgastep) = 16;
1610 ACCESS_FBINFO(devflags.textmode) = 1;
1611 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP16;
1613 ACCESS_FBINFO(devflags.vgastep) = 8;
1614 ACCESS_FBINFO(devflags.textmode) = 1;
1615 ACCESS_FBINFO(devflags.text_type_aux) = FB_AUX_TEXT_MGA_STEP8;
1617 #ifdef CONFIG_FB_MATROX_32MB
1618 ACCESS_FBINFO(devflags.support32MB) = (b->flags & DEVF_SUPPORT32MB) != 0;
1620 ACCESS_FBINFO(devflags.precise_width) = !(b->flags & DEVF_ANY_VXRES);
1621 ACCESS_FBINFO(devflags.crtc2) = (b->flags & DEVF_CRTC2) != 0;
1622 ACCESS_FBINFO(devflags.maven_capable) = (b->flags & DEVF_MAVEN_CAPABLE) != 0;
1623 ACCESS_FBINFO(devflags.dualhead) = (b->flags & DEVF_DUALHEAD) != 0;
1624 ACCESS_FBINFO(devflags.dfp_type) = dfp_type;
1625 ACCESS_FBINFO(devflags.g450dac) = (b->flags & DEVF_G450DAC) != 0;
1626 ACCESS_FBINFO(devflags.textstep) = ACCESS_FBINFO(devflags.vgastep) * ACCESS_FBINFO(devflags.textmode);
1627 ACCESS_FBINFO(devflags.textvram) = 65536 / ACCESS_FBINFO(devflags.textmode);
1628 setDefaultOutputs(PMINFO2);
1629 if (b->flags & DEVF_PANELLINK_CAPABLE) {
1630 ACCESS_FBINFO(outputs[2]).data = MINFO;
1631 ACCESS_FBINFO(outputs[2]).output = &panellink_output;
1632 ACCESS_FBINFO(outputs[2]).src = ACCESS_FBINFO(outputs[2]).default_src;
1633 ACCESS_FBINFO(outputs[2]).mode = MATROXFB_OUTPUT_MODE_MONITOR;
1634 ACCESS_FBINFO(devflags.panellink) = 1;
1637 if (ACCESS_FBINFO(capable.cross4MB) < 0)
1638 ACCESS_FBINFO(capable.cross4MB) = b->flags & DEVF_CROSS4MB;
1639 if (b->flags & DEVF_SWAPS) {
1640 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1641 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1642 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_0;
1644 ctrlptr_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 0);
1645 video_base_phys = pci_resource_start(ACCESS_FBINFO(pcidev), 1);
1646 ACCESS_FBINFO(devflags.fbResource) = PCI_BASE_ADDRESS_1;
1649 if (!ctrlptr_phys) {
1650 printk(KERN_ERR "matroxfb: control registers are not available, matroxfb disabled\n");
1653 if (!video_base_phys) {
1654 printk(KERN_ERR "matroxfb: video RAM is not available in PCI address space, matroxfb disabled\n");
1657 memsize = b->base->maxvram;
1658 if (!request_mem_region(ctrlptr_phys, 16384, "matroxfb MMIO")) {
1661 if (!request_mem_region(video_base_phys, memsize, "matroxfb FB")) {
1664 ACCESS_FBINFO(video.len_maximum) = memsize;
1665 /* convert mem (autodetect k, M) */
1666 if (mem < 1024) mem *= 1024;
1667 if (mem < 0x00100000) mem *= 1024;
1669 if (mem && (mem < memsize))
1672 if (mga_ioremap(ctrlptr_phys, 16384, MGA_IOREMAP_MMIO, &ACCESS_FBINFO(mmio.vbase))) {
1673 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, 16384), matroxfb disabled\n", ctrlptr_phys);
1676 ACCESS_FBINFO(mmio.base) = ctrlptr_phys;
1677 ACCESS_FBINFO(mmio.len) = 16384;
1678 ACCESS_FBINFO(video.base) = video_base_phys;
1679 if (mga_ioremap(video_base_phys, memsize, MGA_IOREMAP_FB, &ACCESS_FBINFO(video.vbase))) {
1680 printk(KERN_ERR "matroxfb: cannot ioremap(%lX, %d), matroxfb disabled\n",
1681 video_base_phys, memsize);
1686 u_int32_t mga_option;
1688 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, &mga_option);
1689 pci_read_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, &cmd);
1690 mga_option &= 0x7FFFFFFF; /* clear BIG_ENDIAN */
1691 mga_option |= MX_OPTION_BSWAP;
1692 /* disable palette snooping */
1693 cmd &= ~PCI_COMMAND_VGA_PALETTE;
1694 if (pci_dev_present(intel_82437)) {
1695 if (!(mga_option & 0x20000000) && !ACCESS_FBINFO(devflags.nopciretry)) {
1696 printk(KERN_WARNING "matroxfb: Disabling PCI retries due to i82437 present\n");
1698 mga_option |= 0x20000000;
1699 ACCESS_FBINFO(devflags.nopciretry) = 1;
1701 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_COMMAND, cmd);
1702 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_OPTION_REG, mga_option);
1703 ACCESS_FBINFO(hw).MXoptionReg = mga_option;
1705 /* select non-DMA memory for PCI_MGA_DATA, otherwise dump of PCI cfg space can lock PCI bus */
1706 /* maybe preinit() candidate, but it is same... for all devices... at this time... */
1707 pci_write_config_dword(ACCESS_FBINFO(pcidev), PCI_MGA_INDEX, 0x00003C00);
1711 matroxfb_read_pins(PMINFO2);
1712 if (ACCESS_FBINFO(hw_switch)->preinit(PMINFO2)) {
1717 if (!matroxfb_getmemory(PMINFO memsize, &ACCESS_FBINFO(video.len)) || !ACCESS_FBINFO(video.len)) {
1718 printk(KERN_ERR "matroxfb: cannot determine memory size\n");
1721 ACCESS_FBINFO(devflags.ydstorg) = 0;
1723 ACCESS_FBINFO(video.base) = video_base_phys;
1724 ACCESS_FBINFO(video.len_usable) = ACCESS_FBINFO(video.len);
1725 if (ACCESS_FBINFO(video.len_usable) > b->base->maxdisplayable)
1726 ACCESS_FBINFO(video.len_usable) = b->base->maxdisplayable;
1729 ACCESS_FBINFO(mtrr.vram) = mtrr_add(video_base_phys, ACCESS_FBINFO(video.len), MTRR_TYPE_WRCOMB, 1);
1730 ACCESS_FBINFO(mtrr.vram_valid) = 1;
1731 printk(KERN_INFO "matroxfb: MTRR's turned on\n");
1733 #endif /* CONFIG_MTRR */
1735 if (!ACCESS_FBINFO(devflags.novga))
1736 request_region(0x3C0, 32, "matrox");
1737 matroxfb_g450_connect(PMINFO2);
1738 ACCESS_FBINFO(hw_switch->reset(PMINFO2));
1740 ACCESS_FBINFO(fbcon.monspecs.hfmin) = 0;
1741 ACCESS_FBINFO(fbcon.monspecs.hfmax) = fh;
1742 ACCESS_FBINFO(fbcon.monspecs.vfmin) = 0;
1743 ACCESS_FBINFO(fbcon.monspecs.vfmax) = fv;
1744 ACCESS_FBINFO(fbcon.monspecs.dpms) = 0; /* TBD */
1746 /* static settings */
1747 vesafb_defined.red = colors[depth-1].red;
1748 vesafb_defined.green = colors[depth-1].green;
1749 vesafb_defined.blue = colors[depth-1].blue;
1750 vesafb_defined.bits_per_pixel = colors[depth-1].bits_per_pixel;
1751 vesafb_defined.grayscale = grayscale;
1752 vesafb_defined.vmode = 0;
1754 vesafb_defined.accel_flags &= ~FB_ACCELF_TEXT;
1756 ACCESS_FBINFO(fbops) = matroxfb_ops;
1757 ACCESS_FBINFO(fbcon.fbops) = &ACCESS_FBINFO(fbops);
1758 ACCESS_FBINFO(fbcon.pseudo_palette) = ACCESS_FBINFO(cmap);
1759 /* after __init time we are like module... no logo */
1760 ACCESS_FBINFO(fbcon.flags) = hotplug ? FBINFO_FLAG_MODULE : FBINFO_FLAG_DEFAULT;
1761 ACCESS_FBINFO(fbcon.flags) |= FBINFO_PARTIAL_PAN_OK | /* Prefer panning for scroll under MC viewer/edit */
1762 FBINFO_HWACCEL_COPYAREA | /* We have hw-assisted bmove */
1763 FBINFO_HWACCEL_FILLRECT | /* And fillrect */
1764 FBINFO_HWACCEL_IMAGEBLIT | /* And imageblit */
1765 FBINFO_HWACCEL_XPAN | /* And we support both horizontal */
1766 FBINFO_HWACCEL_YPAN; /* And vertical panning */
1767 ACCESS_FBINFO(video.len_usable) &= PAGE_MASK;
1768 fb_alloc_cmap(&ACCESS_FBINFO(fbcon.cmap), 256, 1);
1771 /* mode database is marked __init!!! */
1773 fb_find_mode(&vesafb_defined, &ACCESS_FBINFO(fbcon), videomode[0]?videomode:NULL,
1774 NULL, 0, &defaultmode, vesafb_defined.bits_per_pixel);
1776 #endif /* !MODULE */
1778 /* mode modifiers */
1780 vesafb_defined.hsync_len = hslen;
1782 vesafb_defined.vsync_len = vslen;
1784 vesafb_defined.left_margin = left;
1786 vesafb_defined.right_margin = right;
1788 vesafb_defined.upper_margin = upper;
1790 vesafb_defined.lower_margin = lower;
1792 vesafb_defined.xres = xres;
1794 vesafb_defined.yres = yres;
1796 vesafb_defined.sync = sync;
1797 else if (vesafb_defined.sync == ~0) {
1798 vesafb_defined.sync = 0;
1800 vesafb_defined.sync |= FB_SYNC_HOR_HIGH_ACT;
1801 else if (yres < 480)
1802 vesafb_defined.sync |= FB_SYNC_VERT_HIGH_ACT;
1805 /* fv, fh, maxclk limits was specified */
1810 tmp = fv * (vesafb_defined.upper_margin + vesafb_defined.yres
1811 + vesafb_defined.lower_margin + vesafb_defined.vsync_len);
1812 if ((tmp < fh) || (fh == 0)) fh = tmp;
1815 tmp = fh * (vesafb_defined.left_margin + vesafb_defined.xres
1816 + vesafb_defined.right_margin + vesafb_defined.hsync_len);
1817 if ((tmp < maxclk) || (maxclk == 0)) maxclk = tmp;
1819 tmp = (maxclk + 499) / 500;
1821 tmp = (2000000000 + tmp) / tmp;
1822 if (tmp > pixclock) pixclock = tmp;
1826 if (pixclock < 2000) /* > 500MHz */
1827 pixclock = 4000; /* 250MHz */
1828 if (pixclock > 1000000)
1829 pixclock = 1000000; /* 1MHz */
1830 vesafb_defined.pixclock = pixclock;
1833 /* FIXME: Where to move this?! */
1834 #if defined(CONFIG_PPC_PMAC)
1836 if (_machine == _MACH_Pmac) {
1837 struct fb_var_screeninfo var;
1838 if (default_vmode <= 0 || default_vmode > VMODE_MAX)
1839 default_vmode = VMODE_640_480_60;
1841 if (default_cmode == CMODE_NVRAM)
1842 default_cmode = nvram_read_byte(NV_CMODE);
1844 if (default_cmode < CMODE_8 || default_cmode > CMODE_32)
1845 default_cmode = CMODE_8;
1846 if (!mac_vmode_to_var(default_vmode, default_cmode, &var)) {
1847 var.accel_flags = vesafb_defined.accel_flags;
1848 var.xoffset = var.yoffset = 0;
1849 /* Note: mac_vmode_to_var() does not set all parameters */
1850 vesafb_defined = var;
1853 #endif /* !MODULE */
1854 #endif /* CONFIG_PPC_PMAC */
1855 vesafb_defined.xres_virtual = vesafb_defined.xres;
1857 vesafb_defined.yres_virtual = vesafb_defined.yres;
1859 vesafb_defined.yres_virtual = 65536; /* large enough to be INF, but small enough
1860 to yres_virtual * xres_virtual < 2^32 */
1862 matroxfb_init_fix(PMINFO2);
1863 ACCESS_FBINFO(fbcon.screen_base) = vaddr_va(ACCESS_FBINFO(video.vbase));
1864 matroxfb_update_fix(PMINFO2);
1865 /* Normalize values (namely yres_virtual) */
1866 matroxfb_check_var(&vesafb_defined, &ACCESS_FBINFO(fbcon));
1867 /* And put it into "current" var. Do NOT program hardware yet, or we'll not take over
1868 * vgacon correctly. fbcon_startup will call fb_set_par for us, WITHOUT check_var,
1869 * and unfortunately it will do it BEFORE vgacon contents is saved, so it won't work
1870 * anyway. But we at least tried... */
1871 ACCESS_FBINFO(fbcon.var) = vesafb_defined;
1874 printk(KERN_INFO "matroxfb: %dx%dx%dbpp (virtual: %dx%d)\n",
1875 vesafb_defined.xres, vesafb_defined.yres, vesafb_defined.bits_per_pixel,
1876 vesafb_defined.xres_virtual, vesafb_defined.yres_virtual);
1877 printk(KERN_INFO "matroxfb: framebuffer at 0x%lX, mapped to 0x%p, size %d\n",
1878 ACCESS_FBINFO(video.base), vaddr_va(ACCESS_FBINFO(video.vbase)), ACCESS_FBINFO(video.len));
1880 /* We do not have to set currcon to 0... register_framebuffer do it for us on first console
1881 * and we do not want currcon == 0 for subsequent framebuffers */
1883 ACCESS_FBINFO(fbcon).device = &ACCESS_FBINFO(pcidev)->dev;
1884 if (register_framebuffer(&ACCESS_FBINFO(fbcon)) < 0) {
1887 printk("fb%d: %s frame buffer device\n",
1888 ACCESS_FBINFO(fbcon.node), ACCESS_FBINFO(fbcon.fix.id));
1890 /* there is no console on this fb... but we have to initialize hardware
1891 * until someone tells me what is proper thing to do */
1892 if (!ACCESS_FBINFO(initialized)) {
1893 printk(KERN_INFO "fb%d: initializing hardware\n",
1894 ACCESS_FBINFO(fbcon.node));
1895 /* We have to use FB_ACTIVATE_FORCE, as we had to put vesafb_defined to the fbcon.var
1896 * already before, so register_framebuffer works correctly. */
1897 vesafb_defined.activate |= FB_ACTIVATE_FORCE;
1898 fb_set_var(&ACCESS_FBINFO(fbcon), &vesafb_defined);
1903 matroxfb_g450_shutdown(PMINFO2);
1904 mga_iounmap(ACCESS_FBINFO(video.vbase));
1906 mga_iounmap(ACCESS_FBINFO(mmio.vbase));
1908 release_mem_region(video_base_phys, ACCESS_FBINFO(video.len_maximum));
1910 release_mem_region(ctrlptr_phys, 16384);
1915 static LIST_HEAD(matroxfb_list);
1916 static LIST_HEAD(matroxfb_driver_list);
1918 #define matroxfb_l(x) list_entry(x, struct matrox_fb_info, next_fb)
1919 #define matroxfb_driver_l(x) list_entry(x, struct matroxfb_driver, node)
1920 int matroxfb_register_driver(struct matroxfb_driver* drv) {
1921 struct matrox_fb_info* minfo;
1923 list_add(&drv->node, &matroxfb_driver_list);
1924 for (minfo = matroxfb_l(matroxfb_list.next);
1925 minfo != matroxfb_l(&matroxfb_list);
1926 minfo = matroxfb_l(minfo->next_fb.next)) {
1929 if (minfo->drivers_count == MATROXFB_MAX_FB_DRIVERS)
1931 p = drv->probe(minfo);
1933 minfo->drivers_data[minfo->drivers_count] = p;
1934 minfo->drivers[minfo->drivers_count++] = drv;
1940 void matroxfb_unregister_driver(struct matroxfb_driver* drv) {
1941 struct matrox_fb_info* minfo;
1943 list_del(&drv->node);
1944 for (minfo = matroxfb_l(matroxfb_list.next);
1945 minfo != matroxfb_l(&matroxfb_list);
1946 minfo = matroxfb_l(minfo->next_fb.next)) {
1949 for (i = 0; i < minfo->drivers_count; ) {
1950 if (minfo->drivers[i] == drv) {
1951 if (drv && drv->remove)
1952 drv->remove(minfo, minfo->drivers_data[i]);
1953 minfo->drivers[i] = minfo->drivers[--minfo->drivers_count];
1954 minfo->drivers_data[i] = minfo->drivers_data[minfo->drivers_count];
1961 static void matroxfb_register_device(struct matrox_fb_info* minfo) {
1962 struct matroxfb_driver* drv;
1964 list_add(&ACCESS_FBINFO(next_fb), &matroxfb_list);
1965 for (drv = matroxfb_driver_l(matroxfb_driver_list.next);
1966 drv != matroxfb_driver_l(&matroxfb_driver_list);
1967 drv = matroxfb_driver_l(drv->node.next)) {
1968 if (drv && drv->probe) {
1969 void *p = drv->probe(minfo);
1971 minfo->drivers_data[i] = p;
1972 minfo->drivers[i++] = drv;
1973 if (i == MATROXFB_MAX_FB_DRIVERS)
1978 minfo->drivers_count = i;
1981 static void matroxfb_unregister_device(struct matrox_fb_info* minfo) {
1984 list_del(&ACCESS_FBINFO(next_fb));
1985 for (i = 0; i < minfo->drivers_count; i++) {
1986 struct matroxfb_driver* drv = minfo->drivers[i];
1988 if (drv && drv->remove)
1989 drv->remove(minfo, minfo->drivers_data[i]);
1993 static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dummy) {
1998 struct matrox_fb_info* minfo;
2001 #ifndef CONFIG_FB_MATROX_MULTIHEAD
2002 static int registered = 0;
2006 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
2007 svid = pdev->subsystem_vendor;
2008 sid = pdev->subsystem_device;
2009 for (b = dev_list; b->vendor; b++) {
2010 if ((b->vendor != pdev->vendor) || (b->device != pdev->device) || (b->rev < rev)) continue;
2012 if ((b->svid != svid) || (b->sid != sid)) continue;
2019 /* not requested one... */
2023 pci_read_config_dword(pdev, PCI_COMMAND, &cmd);
2024 if (pci_enable_device(pdev)) {
2028 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2029 minfo = (struct matrox_fb_info*)kmalloc(sizeof(*minfo), GFP_KERNEL);
2033 if (registered) /* singlehead driver... */
2035 minfo = &matroxfb_global_mxinfo;
2037 memset(MINFO, 0, sizeof(*MINFO));
2039 ACCESS_FBINFO(pcidev) = pdev;
2040 ACCESS_FBINFO(dead) = 0;
2041 ACCESS_FBINFO(usecount) = 0;
2042 ACCESS_FBINFO(userusecount) = 0;
2044 pci_set_drvdata(pdev, MINFO);
2046 ACCESS_FBINFO(devflags.memtype) = memtype;
2049 if (cmd & PCI_COMMAND_MEMORY) {
2050 ACCESS_FBINFO(devflags.novga) = novga;
2051 ACCESS_FBINFO(devflags.nobios) = nobios;
2052 ACCESS_FBINFO(devflags.noinit) = noinit;
2053 /* subsequent heads always needs initialization and must not enable BIOS */
2058 ACCESS_FBINFO(devflags.novga) = 1;
2059 ACCESS_FBINFO(devflags.nobios) = 1;
2060 ACCESS_FBINFO(devflags.noinit) = 0;
2063 ACCESS_FBINFO(devflags.nopciretry) = no_pci_retry;
2064 ACCESS_FBINFO(devflags.mga_24bpp_fix) = inv24;
2065 ACCESS_FBINFO(devflags.precise_width) = option_precise_width;
2066 ACCESS_FBINFO(devflags.sgram) = sgram;
2067 ACCESS_FBINFO(capable.cross4MB) = cross4MB;
2069 spin_lock_init(&ACCESS_FBINFO(lock.DAC));
2070 spin_lock_init(&ACCESS_FBINFO(lock.accel));
2071 init_rwsem(&ACCESS_FBINFO(crtc2.lock));
2072 init_rwsem(&ACCESS_FBINFO(altout.lock));
2073 ACCESS_FBINFO(irq_flags) = 0;
2074 init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait));
2075 init_waitqueue_head(&ACCESS_FBINFO(crtc2.vsync.wait));
2076 ACCESS_FBINFO(crtc1.panpos) = -1;
2078 err = initMatrox2(PMINFO b);
2080 #ifndef CONFIG_FB_MATROX_MULTIHEAD
2083 matroxfb_register_device(MINFO);
2086 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2092 static void pci_remove_matrox(struct pci_dev* pdev) {
2093 struct matrox_fb_info* minfo;
2095 minfo = pci_get_drvdata(pdev);
2096 matroxfb_remove(PMINFO 1);
2099 static struct pci_device_id matroxfb_devices[] = {
2100 #ifdef CONFIG_FB_MATROX_MILLENIUM
2101 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL,
2102 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2103 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2,
2104 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2105 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MIL_2_AGP,
2106 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2108 #ifdef CONFIG_FB_MATROX_MYSTIQUE
2109 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_MYS,
2110 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2112 #ifdef CONFIG_FB_MATROX_G
2113 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_MM,
2114 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2115 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G100_AGP,
2116 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2117 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_PCI,
2118 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2119 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G200_AGP,
2120 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2121 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G400,
2122 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2123 {PCI_VENDOR_ID_MATROX, PCI_DEVICE_ID_MATROX_G550,
2124 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
2130 MODULE_DEVICE_TABLE(pci, matroxfb_devices);
2133 static struct pci_driver matroxfb_driver = {
2135 .id_table = matroxfb_devices,
2136 .probe = matroxfb_probe,
2137 .remove = pci_remove_matrox,
2140 /* **************************** init-time only **************************** */
2142 #define RSResolution(X) ((X) & 0x0F)
2146 #define RS1024x768 4
2147 #define RS1280x1024 5
2148 #define RS1600x1200 6
2151 #define RS1152x864 9
2152 #define RS1408x1056 10
2153 #define RS640x350 11
2154 #define RS1056x344 12 /* 132 x 43 text */
2155 #define RS1056x400 13 /* 132 x 50 text */
2156 #define RS1056x480 14 /* 132 x 60 text */
2159 static struct { int xres, yres, left, right, upper, lower, hslen, vslen, vfreq; } timmings[] __initdata = {
2160 { 640, 400, 48, 16, 39, 8, 96, 2, 70 },
2161 { 640, 480, 48, 16, 33, 10, 96, 2, 60 },
2162 { 800, 600, 144, 24, 28, 8, 112, 6, 60 },
2163 { 1024, 768, 160, 32, 30, 4, 128, 4, 60 },
2164 { 1280, 1024, 224, 32, 32, 4, 136, 4, 60 },
2165 { 1600, 1200, 272, 48, 32, 5, 152, 5, 60 },
2166 { 768, 576, 144, 16, 28, 6, 112, 4, 60 },
2167 { 960, 720, 144, 24, 28, 8, 112, 4, 60 },
2168 { 1152, 864, 192, 32, 30, 4, 128, 4, 60 },
2169 { 1408, 1056, 256, 40, 32, 5, 144, 5, 60 },
2170 { 640, 350, 48, 16, 39, 8, 96, 2, 70 },
2171 { 1056, 344, 96, 24, 59, 44, 160, 2, 70 },
2172 { 1056, 400, 96, 24, 39, 8, 160, 2, 70 },
2173 { 1056, 480, 96, 24, 36, 12, 160, 3, 60 },
2174 { 0, 0, ~0, ~0, ~0, ~0, 0, 0, 0 }
2177 #define RSCreate(X,Y) ((X) | ((Y) << 8))
2178 static struct { unsigned int vesa; unsigned int info; } *RSptr, vesamap[] __initdata = {
2179 /* default must be first */
2180 { ~0, RSCreate(RSNoxNo, RS8bpp ) },
2181 { 0x101, RSCreate(RS640x480, RS8bpp ) },
2182 { 0x100, RSCreate(RS640x400, RS8bpp ) },
2183 { 0x180, RSCreate(RS768x576, RS8bpp ) },
2184 { 0x103, RSCreate(RS800x600, RS8bpp ) },
2185 { 0x188, RSCreate(RS960x720, RS8bpp ) },
2186 { 0x105, RSCreate(RS1024x768, RS8bpp ) },
2187 { 0x190, RSCreate(RS1152x864, RS8bpp ) },
2188 { 0x107, RSCreate(RS1280x1024, RS8bpp ) },
2189 { 0x198, RSCreate(RS1408x1056, RS8bpp ) },
2190 { 0x11C, RSCreate(RS1600x1200, RS8bpp ) },
2191 { 0x110, RSCreate(RS640x480, RS15bpp) },
2192 { 0x181, RSCreate(RS768x576, RS15bpp) },
2193 { 0x113, RSCreate(RS800x600, RS15bpp) },
2194 { 0x189, RSCreate(RS960x720, RS15bpp) },
2195 { 0x116, RSCreate(RS1024x768, RS15bpp) },
2196 { 0x191, RSCreate(RS1152x864, RS15bpp) },
2197 { 0x119, RSCreate(RS1280x1024, RS15bpp) },
2198 { 0x199, RSCreate(RS1408x1056, RS15bpp) },
2199 { 0x11D, RSCreate(RS1600x1200, RS15bpp) },
2200 { 0x111, RSCreate(RS640x480, RS16bpp) },
2201 { 0x182, RSCreate(RS768x576, RS16bpp) },
2202 { 0x114, RSCreate(RS800x600, RS16bpp) },
2203 { 0x18A, RSCreate(RS960x720, RS16bpp) },
2204 { 0x117, RSCreate(RS1024x768, RS16bpp) },
2205 { 0x192, RSCreate(RS1152x864, RS16bpp) },
2206 { 0x11A, RSCreate(RS1280x1024, RS16bpp) },
2207 { 0x19A, RSCreate(RS1408x1056, RS16bpp) },
2208 { 0x11E, RSCreate(RS1600x1200, RS16bpp) },
2209 { 0x1B2, RSCreate(RS640x480, RS24bpp) },
2210 { 0x184, RSCreate(RS768x576, RS24bpp) },
2211 { 0x1B5, RSCreate(RS800x600, RS24bpp) },
2212 { 0x18C, RSCreate(RS960x720, RS24bpp) },
2213 { 0x1B8, RSCreate(RS1024x768, RS24bpp) },
2214 { 0x194, RSCreate(RS1152x864, RS24bpp) },
2215 { 0x1BB, RSCreate(RS1280x1024, RS24bpp) },
2216 { 0x19C, RSCreate(RS1408x1056, RS24bpp) },
2217 { 0x1BF, RSCreate(RS1600x1200, RS24bpp) },
2218 { 0x112, RSCreate(RS640x480, RS32bpp) },
2219 { 0x183, RSCreate(RS768x576, RS32bpp) },
2220 { 0x115, RSCreate(RS800x600, RS32bpp) },
2221 { 0x18B, RSCreate(RS960x720, RS32bpp) },
2222 { 0x118, RSCreate(RS1024x768, RS32bpp) },
2223 { 0x193, RSCreate(RS1152x864, RS32bpp) },
2224 { 0x11B, RSCreate(RS1280x1024, RS32bpp) },
2225 { 0x19B, RSCreate(RS1408x1056, RS32bpp) },
2226 { 0x11F, RSCreate(RS1600x1200, RS32bpp) },
2227 { 0x010, RSCreate(RS640x350, RS4bpp ) },
2228 { 0x012, RSCreate(RS640x480, RS4bpp ) },
2229 { 0x102, RSCreate(RS800x600, RS4bpp ) },
2230 { 0x104, RSCreate(RS1024x768, RS4bpp ) },
2231 { 0x106, RSCreate(RS1280x1024, RS4bpp ) },
2234 static void __init matroxfb_init_params(void) {
2235 /* fh from kHz to Hz */
2237 fh *= 1000; /* 1kHz minimum */
2239 if (maxclk < 1000) maxclk *= 1000; /* kHz -> Hz, MHz -> kHz */
2240 if (maxclk < 1000000) maxclk *= 1000; /* kHz -> Hz, 1MHz minimum */
2241 /* fix VESA number */
2243 vesa &= 0x1DFF; /* mask out clearscreen, acceleration and so on */
2245 /* static settings */
2246 for (RSptr = vesamap; RSptr->vesa; RSptr++) {
2247 if (RSptr->vesa == vesa) break;
2250 printk(KERN_ERR "Invalid vesa mode 0x%04X\n", vesa);
2254 int res = RSResolution(RSptr->info)-1;
2256 left = timmings[res].left;
2258 xres = timmings[res].xres;
2260 right = timmings[res].right;
2262 hslen = timmings[res].hslen;
2264 upper = timmings[res].upper;
2266 yres = timmings[res].yres;
2268 lower = timmings[res].lower;
2270 vslen = timmings[res].vslen;
2271 if (!(fv||fh||maxclk||pixclock))
2272 fv = timmings[res].vfreq;
2274 depth = RSDepth(RSptr->info);
2278 static void __init matrox_init(void) {
2279 matroxfb_init_params();
2280 pci_register_driver(&matroxfb_driver);
2281 dev = -1; /* accept all new devices... */
2284 /* **************************** exit-time only **************************** */
2286 static void __exit matrox_done(void) {
2287 pci_unregister_driver(&matroxfb_driver);
2292 /* ************************* init in-kernel code ************************** */
2294 static int __init matroxfb_setup(char *options) {
2299 if (!options || !*options)
2302 while ((this_opt = strsep(&options, ",")) != NULL) {
2303 if (!*this_opt) continue;
2305 dprintk("matroxfb_setup: option %s\n", this_opt);
2307 if (!strncmp(this_opt, "dev:", 4))
2308 dev = simple_strtoul(this_opt+4, NULL, 0);
2309 else if (!strncmp(this_opt, "depth:", 6)) {
2310 switch (simple_strtoul(this_opt+6, NULL, 0)) {
2311 case 0: depth = RSText; break;
2312 case 4: depth = RS4bpp; break;
2313 case 8: depth = RS8bpp; break;
2314 case 15:depth = RS15bpp; break;
2315 case 16:depth = RS16bpp; break;
2316 case 24:depth = RS24bpp; break;
2317 case 32:depth = RS32bpp; break;
2319 printk(KERN_ERR "matroxfb: unsupported color depth\n");
2321 } else if (!strncmp(this_opt, "xres:", 5))
2322 xres = simple_strtoul(this_opt+5, NULL, 0);
2323 else if (!strncmp(this_opt, "yres:", 5))
2324 yres = simple_strtoul(this_opt+5, NULL, 0);
2325 else if (!strncmp(this_opt, "vslen:", 6))
2326 vslen = simple_strtoul(this_opt+6, NULL, 0);
2327 else if (!strncmp(this_opt, "hslen:", 6))
2328 hslen = simple_strtoul(this_opt+6, NULL, 0);
2329 else if (!strncmp(this_opt, "left:", 5))
2330 left = simple_strtoul(this_opt+5, NULL, 0);
2331 else if (!strncmp(this_opt, "right:", 6))
2332 right = simple_strtoul(this_opt+6, NULL, 0);
2333 else if (!strncmp(this_opt, "upper:", 6))
2334 upper = simple_strtoul(this_opt+6, NULL, 0);
2335 else if (!strncmp(this_opt, "lower:", 6))
2336 lower = simple_strtoul(this_opt+6, NULL, 0);
2337 else if (!strncmp(this_opt, "pixclock:", 9))
2338 pixclock = simple_strtoul(this_opt+9, NULL, 0);
2339 else if (!strncmp(this_opt, "sync:", 5))
2340 sync = simple_strtoul(this_opt+5, NULL, 0);
2341 else if (!strncmp(this_opt, "vesa:", 5))
2342 vesa = simple_strtoul(this_opt+5, NULL, 0);
2343 else if (!strncmp(this_opt, "maxclk:", 7))
2344 maxclk = simple_strtoul(this_opt+7, NULL, 0);
2345 else if (!strncmp(this_opt, "fh:", 3))
2346 fh = simple_strtoul(this_opt+3, NULL, 0);
2347 else if (!strncmp(this_opt, "fv:", 3))
2348 fv = simple_strtoul(this_opt+3, NULL, 0);
2349 else if (!strncmp(this_opt, "mem:", 4))
2350 mem = simple_strtoul(this_opt+4, NULL, 0);
2351 else if (!strncmp(this_opt, "mode:", 5))
2352 strlcpy(videomode, this_opt+5, sizeof(videomode));
2353 else if (!strncmp(this_opt, "outputs:", 8))
2354 strlcpy(outputs, this_opt+8, sizeof(outputs));
2355 else if (!strncmp(this_opt, "dfp:", 4)) {
2356 dfp_type = simple_strtoul(this_opt+4, NULL, 0);
2359 #ifdef CONFIG_PPC_PMAC
2360 else if (!strncmp(this_opt, "vmode:", 6)) {
2361 unsigned int vmode = simple_strtoul(this_opt+6, NULL, 0);
2362 if (vmode > 0 && vmode <= VMODE_MAX)
2363 default_vmode = vmode;
2364 } else if (!strncmp(this_opt, "cmode:", 6)) {
2365 unsigned int cmode = simple_strtoul(this_opt+6, NULL, 0);
2369 default_cmode = CMODE_8;
2373 default_cmode = CMODE_16;
2377 default_cmode = CMODE_32;
2382 else if (!strcmp(this_opt, "disabled")) /* nodisabled does not exist */
2384 else if (!strcmp(this_opt, "enabled")) /* noenabled does not exist */
2386 else if (!strcmp(this_opt, "sgram")) /* nosgram == sdram */
2388 else if (!strcmp(this_opt, "sdram"))
2390 else if (!strncmp(this_opt, "memtype:", 8))
2391 memtype = simple_strtoul(this_opt+8, NULL, 0);
2395 if (!strncmp(this_opt, "no", 2)) {
2399 if (! strcmp(this_opt, "inverse"))
2401 else if (!strcmp(this_opt, "accel"))
2403 else if (!strcmp(this_opt, "pan"))
2405 else if (!strcmp(this_opt, "pciretry"))
2406 no_pci_retry = !value;
2407 else if (!strcmp(this_opt, "vga"))
2409 else if (!strcmp(this_opt, "bios"))
2411 else if (!strcmp(this_opt, "init"))
2414 else if (!strcmp(this_opt, "mtrr"))
2417 else if (!strcmp(this_opt, "inv24"))
2419 else if (!strcmp(this_opt, "cross4MB"))
2421 else if (!strcmp(this_opt, "grayscale"))
2423 else if (!strcmp(this_opt, "dfp"))
2426 strlcpy(videomode, this_opt, sizeof(videomode));
2433 static int __initdata initialized = 0;
2435 static int __init matroxfb_init(void)
2437 char *option = NULL;
2441 if (fb_get_options("matroxfb", &option))
2443 matroxfb_setup(option);
2452 /* never return failure, user can hotplug matrox later... */
2456 module_init(matroxfb_init);
2460 /* *************************** init module code **************************** */
2462 MODULE_AUTHOR("(c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>");
2463 MODULE_DESCRIPTION("Accelerated FBDev driver for Matrox Millennium/Mystique/G100/G200/G400/G450/G550");
2464 MODULE_LICENSE("GPL");
2466 module_param(mem, int, 0);
2467 MODULE_PARM_DESC(mem, "Size of available memory in MB, KB or B (2,4,8,12,16MB, default=autodetect)");
2468 module_param(disabled, int, 0);
2469 MODULE_PARM_DESC(disabled, "Disabled (0 or 1=disabled) (default=0)");
2470 module_param(noaccel, int, 0);
2471 MODULE_PARM_DESC(noaccel, "Do not use accelerating engine (0 or 1=disabled) (default=0)");
2472 module_param(nopan, int, 0);
2473 MODULE_PARM_DESC(nopan, "Disable pan on startup (0 or 1=disabled) (default=0)");
2474 module_param(no_pci_retry, int, 0);
2475 MODULE_PARM_DESC(no_pci_retry, "PCI retries enabled (0 or 1=disabled) (default=0)");
2476 module_param(novga, int, 0);
2477 MODULE_PARM_DESC(novga, "VGA I/O (0x3C0-0x3DF) disabled (0 or 1=disabled) (default=0)");
2478 module_param(nobios, int, 0);
2479 MODULE_PARM_DESC(nobios, "Disables ROM BIOS (0 or 1=disabled) (default=do not change BIOS state)");
2480 module_param(noinit, int, 0);
2481 MODULE_PARM_DESC(noinit, "Disables W/SG/SD-RAM and bus interface initialization (0 or 1=do not initialize) (default=0)");
2482 module_param(memtype, int, 0);
2483 MODULE_PARM_DESC(memtype, "Memory type for G200/G400 (see Documentation/fb/matroxfb.txt for explanation) (default=3 for G200, 0 for G400)");
2485 module_param(mtrr, int, 0);
2486 MODULE_PARM_DESC(mtrr, "This speeds up video memory accesses (0=disabled or 1) (default=1)");
2488 module_param(sgram, int, 0);
2489 MODULE_PARM_DESC(sgram, "Indicates that G100/G200/G400 has SGRAM memory (0=SDRAM, 1=SGRAM) (default=0)");
2490 module_param(inv24, int, 0);
2491 MODULE_PARM_DESC(inv24, "Inverts clock polarity for 24bpp and loop frequency > 100MHz (default=do not invert polarity)");
2492 module_param(inverse, int, 0);
2493 MODULE_PARM_DESC(inverse, "Inverse (0 or 1) (default=0)");
2494 #ifdef CONFIG_FB_MATROX_MULTIHEAD
2495 module_param(dev, int, 0);
2496 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=all working)");
2498 module_param(dev, int, 0);
2499 MODULE_PARM_DESC(dev, "Multihead support, attach to device ID (0..N) (default=first working)");
2501 module_param(vesa, int, 0);
2502 MODULE_PARM_DESC(vesa, "Startup videomode (0x000-0x1FF) (default=0x101)");
2503 module_param(xres, int, 0);
2504 MODULE_PARM_DESC(xres, "Horizontal resolution (px), overrides xres from vesa (default=vesa)");
2505 module_param(yres, int, 0);
2506 MODULE_PARM_DESC(yres, "Vertical resolution (scans), overrides yres from vesa (default=vesa)");
2507 module_param(upper, int, 0);
2508 MODULE_PARM_DESC(upper, "Upper blank space (scans), overrides upper from vesa (default=vesa)");
2509 module_param(lower, int, 0);
2510 MODULE_PARM_DESC(lower, "Lower blank space (scans), overrides lower from vesa (default=vesa)");
2511 module_param(vslen, int, 0);
2512 MODULE_PARM_DESC(vslen, "Vertical sync length (scans), overrides lower from vesa (default=vesa)");
2513 module_param(left, int, 0);
2514 MODULE_PARM_DESC(left, "Left blank space (px), overrides left from vesa (default=vesa)");
2515 module_param(right, int, 0);
2516 MODULE_PARM_DESC(right, "Right blank space (px), overrides right from vesa (default=vesa)");
2517 module_param(hslen, int, 0);
2518 MODULE_PARM_DESC(hslen, "Horizontal sync length (px), overrides hslen from vesa (default=vesa)");
2519 module_param(pixclock, int, 0);
2520 MODULE_PARM_DESC(pixclock, "Pixelclock (ns), overrides pixclock from vesa (default=vesa)");
2521 module_param(sync, int, 0);
2522 MODULE_PARM_DESC(sync, "Sync polarity, overrides sync from vesa (default=vesa)");
2523 module_param(depth, int, 0);
2524 MODULE_PARM_DESC(depth, "Color depth (0=text,8,15,16,24,32) (default=vesa)");
2525 module_param(maxclk, int, 0);
2526 MODULE_PARM_DESC(maxclk, "Startup maximal clock, 0-999MHz, 1000-999999kHz, 1000000-INF Hz");
2527 module_param(fh, int, 0);
2528 MODULE_PARM_DESC(fh, "Startup horizontal frequency, 0-999kHz, 1000-INF Hz");
2529 module_param(fv, int, 0);
2530 MODULE_PARM_DESC(fv, "Startup vertical frequency, 0-INF Hz\n"
2531 "You should specify \"fv:max_monitor_vsync,fh:max_monitor_hsync,maxclk:max_monitor_dotclock\"\n");
2532 module_param(grayscale, int, 0);
2533 MODULE_PARM_DESC(grayscale, "Sets display into grayscale. Works perfectly with paletized videomode (4, 8bpp), some limitations apply to 16, 24 and 32bpp videomodes (default=nograyscale)");
2534 module_param(cross4MB, int, 0);
2535 MODULE_PARM_DESC(cross4MB, "Specifies that 4MB boundary can be in middle of line. (default=autodetected)");
2536 module_param(dfp, int, 0);
2537 MODULE_PARM_DESC(dfp, "Specifies whether to use digital flat panel interface of G200/G400 (0 or 1) (default=0)");
2538 module_param(dfp_type, int, 0);
2539 MODULE_PARM_DESC(dfp_type, "Specifies DFP interface type (0 to 255) (default=read from hardware)");
2540 module_param_string(outputs, outputs, sizeof(outputs), 0);
2541 MODULE_PARM_DESC(outputs, "Specifies which CRTC is mapped to which output (string of up to three letters, consisting of 0 (disabled), 1 (CRTC1), 2 (CRTC2)) (default=111 for Gx50, 101 for G200/G400 with DFP, and 100 for all other devices)");
2542 #ifdef CONFIG_PPC_PMAC
2543 module_param_named(vmode, default_vmode, int, 0);
2544 MODULE_PARM_DESC(vmode, "Specify the vmode mode number that should be used (640x480 default)");
2545 module_param_named(cmode, default_cmode, int, 0);
2546 MODULE_PARM_DESC(cmode, "Specify the video depth that should be used (8bit default)");
2549 int __init init_module(void){
2558 else if (depth == 4)
2560 else if (depth == 8)
2562 else if (depth == 15)
2564 else if (depth == 16)
2566 else if (depth == 24)
2568 else if (depth == 32)
2570 else if (depth != -1) {
2571 printk(KERN_ERR "matroxfb: depth %d is not supported, using default\n", depth);
2575 /* never return failure; user can hotplug matrox later... */
2580 module_exit(matrox_done);
2581 EXPORT_SYMBOL(matroxfb_register_driver);
2582 EXPORT_SYMBOL(matroxfb_unregister_driver);
2583 EXPORT_SYMBOL(matroxfb_wait_for_sync);
2584 EXPORT_SYMBOL(matroxfb_enable_irq);
2587 * Overrides for Emacs so that we follow Linus's tabbing style.
2588 * ---------------------------------------------------------------------------