Merge master.kernel.org:/pub/scm/linux/kernel/git/jejb/scsi-for-linus-2.6
[linux-2.6] / arch / arm / mm / proc-arm720.S
1 /*
2  *  linux/arch/arm/mm/proc-arm720.S: MMU functions for ARM720
3  *
4  *  Copyright (C) 2000 Steve Hill (sjhill@cotw.com)
5  *                     Rob Scott (rscott@mtrob.fdns.net)
6  *  Copyright (C) 2000 ARM Limited, Deep Blue Solutions Ltd.
7  *
8  * This program is free software; you can redistribute it and/or modify
9  * it under the terms of the GNU General Public License as published by
10  * the Free Software Foundation; either version 2 of the License, or
11  * (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
21  *
22  *
23  * These are the low level assembler for performing cache and TLB
24  * functions on the ARM720T.  The ARM720T has a writethrough IDC
25  * cache, so we don't need to clean it.
26  *
27  *  Changelog:
28  *   05-09-2000 SJH     Created by moving 720 specific functions
29  *                      out of 'proc-arm6,7.S' per RMK discussion
30  *   07-25-2000 SJH     Added idle function.
31  *   08-25-2000 DBS     Updated for integration of ARM Ltd version.
32  */
33 #include <linux/linkage.h>
34 #include <linux/init.h>
35 #include <asm/assembler.h>
36 #include <asm/asm-offsets.h>
37 #include <asm/pgtable.h>
38 #include <asm/procinfo.h>
39 #include <asm/ptrace.h>
40 #include <asm/hardware.h>
41
42 /*
43  * Function: arm720_proc_init (void)
44  *         : arm720_proc_fin (void)
45  *
46  * Notes   : This processor does not require these
47  */
48 ENTRY(cpu_arm720_dcache_clean_area)
49 ENTRY(cpu_arm720_proc_init)
50                 mov     pc, lr
51
52 ENTRY(cpu_arm720_proc_fin)
53                 stmfd   sp!, {lr}
54                 mov     ip, #PSR_F_BIT | PSR_I_BIT | SVC_MODE
55                 msr     cpsr_c, ip
56                 mrc     p15, 0, r0, c1, c0, 0
57                 bic     r0, r0, #0x1000                 @ ...i............
58                 bic     r0, r0, #0x000e                 @ ............wca.
59                 mcr     p15, 0, r0, c1, c0, 0           @ disable caches
60                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
61                 ldmfd   sp!, {pc}
62
63 /*
64  * Function: arm720_proc_do_idle(void)
65  * Params  : r0 = unused
66  * Purpose : put the processer in proper idle mode
67  */
68 ENTRY(cpu_arm720_do_idle)
69                 mov     pc, lr
70
71 /*
72  * Function: arm720_switch_mm(unsigned long pgd_phys)
73  * Params  : pgd_phys   Physical address of page table
74  * Purpose : Perform a task switch, saving the old process' state and restoring
75  *           the new.
76  */
77 ENTRY(cpu_arm720_switch_mm)
78                 mov     r1, #0
79                 mcr     p15, 0, r1, c7, c7, 0           @ invalidate cache
80                 mcr     p15, 0, r0, c2, c0, 0           @ update page table ptr
81                 mcr     p15, 0, r1, c8, c7, 0           @ flush TLB (v4)
82                 mov     pc, lr
83
84 /*
85  * Function: arm720_set_pte(pte_t *ptep, pte_t pte)
86  * Params  : r0 = Address to set
87  *         : r1 = value to set
88  * Purpose : Set a PTE and flush it out of any WB cache
89  */
90                 .align  5
91 ENTRY(cpu_arm720_set_pte)
92                 str     r1, [r0], #-2048                @ linux version
93
94                 eor     r1, r1, #L_PTE_PRESENT | L_PTE_YOUNG | L_PTE_WRITE | L_PTE_DIRTY
95
96                 bic     r2, r1, #PTE_SMALL_AP_MASK
97                 bic     r2, r2, #PTE_TYPE_MASK
98                 orr     r2, r2, #PTE_TYPE_SMALL
99
100                 tst     r1, #L_PTE_USER                 @ User?
101                 orrne   r2, r2, #PTE_SMALL_AP_URO_SRW
102
103                 tst     r1, #L_PTE_WRITE | L_PTE_DIRTY  @ Write and Dirty?
104                 orreq   r2, r2, #PTE_SMALL_AP_UNO_SRW
105
106                 tst     r1, #L_PTE_PRESENT | L_PTE_YOUNG        @ Present and Young
107                 movne   r2, #0
108
109                 str     r2, [r0]                        @ hardware version
110                 mov     pc, lr
111
112 /*
113  * Function: arm720_reset
114  * Params  : r0 = address to jump to
115  * Notes   : This sets up everything for a reset
116  */
117 ENTRY(cpu_arm720_reset)
118                 mov     ip, #0
119                 mcr     p15, 0, ip, c7, c7, 0           @ invalidate cache
120                 mcr     p15, 0, ip, c8, c7, 0           @ flush TLB (v4)
121                 mrc     p15, 0, ip, c1, c0, 0           @ get ctrl register
122                 bic     ip, ip, #0x000f                 @ ............wcam
123                 bic     ip, ip, #0x2100                 @ ..v....s........
124                 mcr     p15, 0, ip, c1, c0, 0           @ ctrl register
125                 mov     pc, r0
126
127         __INIT
128
129         .type   __arm710_setup, #function
130 __arm710_setup:
131         mov     r0, #0
132         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
133         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
134         mrc     p15, 0, r0, c1, c0              @ get control register
135         ldr     r5, arm710_cr1_clear
136         bic     r0, r0, r5
137         ldr     r5, arm710_cr1_set
138         orr     r0, r0, r5
139         mov     pc, lr                          @ __ret (head.S)
140         .size   __arm710_setup, . - __arm710_setup
141
142         /*
143          *  R
144          * .RVI ZFRS BLDP WCAM
145          * .... 0001 ..11 1101
146          * 
147          */
148         .type   arm710_cr1_clear, #object
149         .type   arm710_cr1_set, #object
150 arm710_cr1_clear:
151         .word   0x0f3f
152 arm710_cr1_set:
153         .word   0x013d
154
155         .type   __arm720_setup, #function
156 __arm720_setup:
157         mov     r0, #0
158         mcr     p15, 0, r0, c7, c7, 0           @ invalidate caches
159         mcr     p15, 0, r0, c8, c7, 0           @ flush TLB (v4)
160         mrc     p15, 0, r0, c1, c0              @ get control register
161         ldr     r5, arm720_cr1_clear
162         bic     r0, r0, r5
163         ldr     r5, arm720_cr1_set
164         orr     r0, r0, r5
165         mov     pc, lr                          @ __ret (head.S)
166         .size   __arm720_setup, . - __arm720_setup
167
168         /*
169          *  R
170          * .RVI ZFRS BLDP WCAM
171          * ..1. 1001 ..11 1101
172          * 
173          */
174         .type   arm720_cr1_clear, #object
175         .type   arm720_cr1_set, #object
176 arm720_cr1_clear:
177         .word   0x2f3f
178 arm720_cr1_set:
179         .word   0x213d
180
181                 __INITDATA
182
183 /*
184  * Purpose : Function pointers used to access above functions - all calls
185  *           come through these
186  */
187                 .type   arm720_processor_functions, #object
188 ENTRY(arm720_processor_functions)
189                 .word   v4t_late_abort
190                 .word   cpu_arm720_proc_init
191                 .word   cpu_arm720_proc_fin
192                 .word   cpu_arm720_reset
193                 .word   cpu_arm720_do_idle
194                 .word   cpu_arm720_dcache_clean_area
195                 .word   cpu_arm720_switch_mm
196                 .word   cpu_arm720_set_pte
197                 .size   arm720_processor_functions, . - arm720_processor_functions
198
199                 .section ".rodata"
200
201                 .type   cpu_arch_name, #object
202 cpu_arch_name:  .asciz  "armv4t"
203                 .size   cpu_arch_name, . - cpu_arch_name
204
205                 .type   cpu_elf_name, #object
206 cpu_elf_name:   .asciz  "v4"
207                 .size   cpu_elf_name, . - cpu_elf_name
208
209                 .type   cpu_arm710_name, #object
210 cpu_arm710_name:
211                 .asciz  "ARM710T"
212                 .size   cpu_arm710_name, . - cpu_arm710_name
213
214                 .type   cpu_arm720_name, #object
215 cpu_arm720_name:
216                 .asciz  "ARM720T"
217                 .size   cpu_arm720_name, . - cpu_arm720_name
218
219                 .align
220
221 /*
222  * See linux/include/asm-arm/procinfo.h for a definition of this structure.
223  */
224         
225                 .section ".proc.info.init", #alloc, #execinstr
226
227                 .type   __arm710_proc_info, #object
228 __arm710_proc_info:
229                 .long   0x41807100                              @ cpu_val
230                 .long   0xffffff00                              @ cpu_mask
231                 .long   PMD_TYPE_SECT | \
232                         PMD_SECT_BUFFERABLE | \
233                         PMD_SECT_CACHEABLE | \
234                         PMD_BIT4 | \
235                         PMD_SECT_AP_WRITE | \
236                         PMD_SECT_AP_READ
237                 b       __arm710_setup                          @ cpu_flush
238                 .long   cpu_arch_name                           @ arch_name
239                 .long   cpu_elf_name                            @ elf_name
240                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
241                 .long   cpu_arm710_name                         @ name
242                 .long   arm720_processor_functions
243                 .long   v4_tlb_fns
244                 .long   v4wt_user_fns
245                 .long   v4_cache_fns
246                 .size   __arm710_proc_info, . - __arm710_proc_info
247
248                 .type   __arm720_proc_info, #object
249 __arm720_proc_info:
250                 .long   0x41807200                              @ cpu_val
251                 .long   0xffffff00                              @ cpu_mask
252                 .long   PMD_TYPE_SECT | \
253                         PMD_SECT_BUFFERABLE | \
254                         PMD_SECT_CACHEABLE | \
255                         PMD_BIT4 | \
256                         PMD_SECT_AP_WRITE | \
257                         PMD_SECT_AP_READ
258                 b       __arm720_setup                          @ cpu_flush
259                 .long   cpu_arch_name                           @ arch_name
260                 .long   cpu_elf_name                            @ elf_name
261                 .long   HWCAP_SWP | HWCAP_HALF | HWCAP_THUMB    @ elf_hwcap
262                 .long   cpu_arm720_name                         @ name
263                 .long   arm720_processor_functions
264                 .long   v4_tlb_fns
265                 .long   v4wt_user_fns
266                 .long   v4_cache_fns
267                 .size   __arm720_proc_info, . - __arm720_proc_info