2 * Copyright (C) 2008 Christian Lamparter <chunkeey@web.de>
3 * Copyright 2008 Johannes Berg <johannes@sipsolutions.net>
5 * This driver is a port from stlc45xx:
6 * Copyright (C) 2008 Nokia Corporation and/or its subsidiary(-ies).
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
23 #include <linux/module.h>
24 #include <linux/platform_device.h>
25 #include <linux/interrupt.h>
26 #include <linux/firmware.h>
27 #include <linux/delay.h>
28 #include <linux/irq.h>
29 #include <linux/spi/spi.h>
30 #include <linux/etherdevice.h>
31 #include <linux/gpio.h>
34 #include "p54spi_eeprom.h"
37 #include "p54common.h"
39 MODULE_FIRMWARE("3826.arm");
40 MODULE_ALIAS("stlc45xx");
42 static void p54spi_spi_read(struct p54s_priv *priv, u8 address,
43 void *buf, size_t len)
45 struct spi_transfer t[2];
49 /* We first push the address */
50 addr = cpu_to_le16(address << 8 | SPI_ADRS_READ_BIT_15);
53 memset(t, 0, sizeof(t));
56 t[0].len = sizeof(addr);
57 spi_message_add_tail(&t[0], &m);
61 spi_message_add_tail(&t[1], &m);
63 spi_sync(priv->spi, &m);
67 static void p54spi_spi_write(struct p54s_priv *priv, u8 address,
68 const void *buf, size_t len)
70 struct spi_transfer t[3];
74 /* We first push the address */
75 addr = cpu_to_le16(address << 8);
78 memset(t, 0, sizeof(t));
81 t[0].len = sizeof(addr);
82 spi_message_add_tail(&t[0], &m);
86 spi_message_add_tail(&t[1], &m);
90 last_word = cpu_to_le16(((u8 *)buf)[len - 1]);
92 t[2].tx_buf = &last_word;
93 t[2].len = sizeof(last_word);
94 spi_message_add_tail(&t[2], &m);
97 spi_sync(priv->spi, &m);
100 static u16 p54spi_read16(struct p54s_priv *priv, u8 addr)
104 p54spi_spi_read(priv, addr, &val, sizeof(val));
106 return le16_to_cpu(val);
109 static u32 p54spi_read32(struct p54s_priv *priv, u8 addr)
113 p54spi_spi_read(priv, addr, &val, sizeof(val));
115 return le32_to_cpu(val);
118 static inline void p54spi_write16(struct p54s_priv *priv, u8 addr, __le16 val)
120 p54spi_spi_write(priv, addr, &val, sizeof(val));
123 static inline void p54spi_write32(struct p54s_priv *priv, u8 addr, __le32 val)
125 p54spi_spi_write(priv, addr, &val, sizeof(val));
128 struct p54spi_spi_reg {
129 u16 address; /* __le16 ? */
134 static const struct p54spi_spi_reg p54spi_registers_array[] =
136 { SPI_ADRS_ARM_INTERRUPTS, 32, "ARM_INT " },
137 { SPI_ADRS_ARM_INT_EN, 32, "ARM_INT_ENA " },
138 { SPI_ADRS_HOST_INTERRUPTS, 32, "HOST_INT " },
139 { SPI_ADRS_HOST_INT_EN, 32, "HOST_INT_ENA" },
140 { SPI_ADRS_HOST_INT_ACK, 32, "HOST_INT_ACK" },
141 { SPI_ADRS_GEN_PURP_1, 32, "GP1_COMM " },
142 { SPI_ADRS_GEN_PURP_2, 32, "GP2_COMM " },
143 { SPI_ADRS_DEV_CTRL_STAT, 32, "DEV_CTRL_STA" },
144 { SPI_ADRS_DMA_DATA, 16, "DMA_DATA " },
145 { SPI_ADRS_DMA_WRITE_CTRL, 16, "DMA_WR_CTRL " },
146 { SPI_ADRS_DMA_WRITE_LEN, 16, "DMA_WR_LEN " },
147 { SPI_ADRS_DMA_WRITE_BASE, 32, "DMA_WR_BASE " },
148 { SPI_ADRS_DMA_READ_CTRL, 16, "DMA_RD_CTRL " },
149 { SPI_ADRS_DMA_READ_LEN, 16, "DMA_RD_LEN " },
150 { SPI_ADRS_DMA_WRITE_BASE, 32, "DMA_RD_BASE " }
153 static int p54spi_wait_bit(struct p54s_priv *priv, u16 reg, __le32 bits)
158 for (i = 0; i < 2000; i++) {
159 p54spi_spi_read(priv, reg, &buffer, sizeof(buffer));
168 static int p54spi_request_firmware(struct ieee80211_hw *dev)
170 struct p54s_priv *priv = dev->priv;
173 /* FIXME: should driver use it's own struct device? */
174 ret = request_firmware(&priv->firmware, "3826.arm", &priv->spi->dev);
177 dev_err(&priv->spi->dev, "request_firmware() failed: %d", ret);
181 ret = p54_parse_firmware(dev, priv->firmware);
183 release_firmware(priv->firmware);
190 static int p54spi_request_eeprom(struct ieee80211_hw *dev)
192 struct p54s_priv *priv = dev->priv;
193 const struct firmware *eeprom;
197 * allow users to customize their eeprom.
200 ret = request_firmware(&eeprom, "3826.eeprom", &priv->spi->dev);
202 dev_info(&priv->spi->dev, "loading default eeprom...\n");
203 ret = p54_parse_eeprom(dev, (void *) p54spi_eeprom,
204 sizeof(p54spi_eeprom));
206 dev_info(&priv->spi->dev, "loading user eeprom...\n");
207 ret = p54_parse_eeprom(dev, (void *) eeprom->data,
209 release_firmware(eeprom);
214 static int p54spi_upload_firmware(struct ieee80211_hw *dev)
216 struct p54s_priv *priv = dev->priv;
217 unsigned long fw_len, fw_addr;
220 /* stop the device */
221 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
222 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
223 SPI_CTRL_STAT_START_HALTED));
225 msleep(TARGET_BOOT_SLEEP);
227 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
228 SPI_CTRL_STAT_HOST_OVERRIDE |
229 SPI_CTRL_STAT_START_HALTED));
231 msleep(TARGET_BOOT_SLEEP);
233 fw_addr = ISL38XX_DEV_FIRMWARE_ADDR;
234 fw_len = priv->firmware->size;
237 _fw_len = min_t(long, fw_len, SPI_MAX_PACKET_SIZE);
239 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_CTRL,
240 cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE));
242 if (p54spi_wait_bit(priv, SPI_ADRS_DMA_WRITE_CTRL,
243 cpu_to_le32(HOST_ALLOWED)) == 0) {
244 dev_err(&priv->spi->dev, "fw_upload not allowed "
249 p54spi_write16(priv, SPI_ADRS_DMA_WRITE_LEN,
250 cpu_to_le16(_fw_len));
251 p54spi_write32(priv, SPI_ADRS_DMA_WRITE_BASE,
252 cpu_to_le32(fw_addr));
254 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA,
255 &priv->firmware->data, _fw_len);
260 /* FIXME: I think this doesn't work if firmware is large,
261 * this loop goes to second round. fw->data is not
262 * increased at all! */
267 /* enable host interrupts */
268 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN,
269 cpu_to_le32(SPI_HOST_INTS_DEFAULT));
271 /* boot the device */
272 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
273 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_HOST_RESET |
274 SPI_CTRL_STAT_RAM_BOOT));
276 msleep(TARGET_BOOT_SLEEP);
278 p54spi_write16(priv, SPI_ADRS_DEV_CTRL_STAT, cpu_to_le16(
279 SPI_CTRL_STAT_HOST_OVERRIDE | SPI_CTRL_STAT_RAM_BOOT));
280 msleep(TARGET_BOOT_SLEEP);
284 static void p54spi_power_off(struct p54s_priv *priv)
286 disable_irq(gpio_to_irq(priv->config->irq_gpio));
287 gpio_set_value(priv->config->power_gpio, 0);
290 static void p54spi_power_on(struct p54s_priv *priv)
292 gpio_set_value(priv->config->power_gpio, 1);
293 enable_irq(gpio_to_irq(priv->config->irq_gpio));
296 * need to wait a while before device can be accessed, the lenght
302 static inline void p54spi_int_ack(struct p54s_priv *priv, u32 val)
304 p54spi_write32(priv, SPI_ADRS_HOST_INT_ACK, cpu_to_le32(val));
307 static void p54spi_wakeup(struct p54s_priv *priv)
309 unsigned long timeout;
313 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
314 cpu_to_le32(SPI_TARGET_INT_WAKEUP));
316 /* And wait for the READY interrupt */
317 timeout = jiffies + HZ;
319 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
320 while (!(ints & SPI_HOST_INT_READY)) {
321 if (time_after(jiffies, timeout))
323 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
326 p54spi_int_ack(priv, SPI_HOST_INT_READY);
332 static inline void p54spi_sleep(struct p54s_priv *priv)
334 p54spi_write32(priv, SPI_ADRS_ARM_INTERRUPTS,
335 cpu_to_le32(SPI_TARGET_INT_SLEEP));
338 static void p54spi_int_ready(struct p54s_priv *priv)
340 p54spi_write32(priv, SPI_ADRS_HOST_INT_EN, cpu_to_le32(
341 SPI_HOST_INT_UPDATE | SPI_HOST_INT_SW_UPDATE));
343 switch (priv->fw_state) {
344 case FW_STATE_BOOTING:
345 priv->fw_state = FW_STATE_READY;
346 complete(&priv->fw_comp);
348 case FW_STATE_RESETTING:
349 priv->fw_state = FW_STATE_READY;
350 /* TODO: reinitialize state */
357 static int p54spi_rx(struct p54s_priv *priv)
364 /* dummy read to flush SPI DMA controller bug */
365 p54spi_read16(priv, SPI_ADRS_GEN_PURP_1);
367 len = p54spi_read16(priv, SPI_ADRS_DMA_DATA);
370 dev_err(&priv->spi->dev, "rx request of zero bytes");
374 skb = dev_alloc_skb(len);
376 dev_err(&priv->spi->dev, "could not alloc skb");
380 p54spi_spi_read(priv, SPI_ADRS_DMA_DATA, skb_put(skb, len), len);
383 if (p54_rx(priv->hw, skb) == 0)
390 static irqreturn_t p54spi_interrupt(int irq, void *config)
392 struct spi_device *spi = config;
393 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
395 queue_work(priv->hw->workqueue, &priv->work);
400 static int p54spi_tx_frame(struct p54s_priv *priv, struct sk_buff *skb)
402 struct p54_hdr *hdr = (struct p54_hdr *) skb->data;
403 struct p54s_dma_regs dma_regs;
404 unsigned long timeout;
410 dma_regs.cmd = cpu_to_le16(SPI_DMA_WRITE_CTRL_ENABLE);
411 dma_regs.len = cpu_to_le16(skb->len);
412 dma_regs.addr = hdr->req_id;
414 p54spi_spi_write(priv, SPI_ADRS_DMA_WRITE_CTRL, &dma_regs,
417 p54spi_spi_write(priv, SPI_ADRS_DMA_DATA, skb->data, skb->len);
419 timeout = jiffies + 2 * HZ;
420 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
421 while (!(ints & SPI_HOST_INT_WR_READY)) {
422 if (time_after(jiffies, timeout)) {
423 dev_err(&priv->spi->dev, "WR_READY timeout");
427 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
430 p54spi_int_ack(priv, SPI_HOST_INT_WR_READY);
434 if (FREE_AFTER_TX(skb))
435 p54_free_skb(priv->hw, skb);
439 static int p54spi_wq_tx(struct p54s_priv *priv)
441 struct p54s_tx_info *entry;
443 struct ieee80211_tx_info *info;
444 struct p54_tx_info *minfo;
445 struct p54s_tx_info *dinfo;
448 spin_lock_bh(&priv->tx_lock);
450 while (!list_empty(&priv->tx_pending)) {
451 entry = list_entry(priv->tx_pending.next,
452 struct p54s_tx_info, tx_list);
454 list_del_init(&entry->tx_list);
456 spin_unlock_bh(&priv->tx_lock);
458 dinfo = container_of((void *) entry, struct p54s_tx_info,
460 minfo = container_of((void *) dinfo, struct p54_tx_info,
462 info = container_of((void *) minfo, struct ieee80211_tx_info,
464 skb = container_of((void *) info, struct sk_buff, cb);
466 ret = p54spi_tx_frame(priv, skb);
468 spin_lock_bh(&priv->tx_lock);
471 p54_free_skb(priv->hw, skb);
477 spin_unlock_bh(&priv->tx_lock);
481 static void p54spi_op_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
483 struct p54s_priv *priv = dev->priv;
484 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
485 struct p54_tx_info *mi = (struct p54_tx_info *) info->rate_driver_data;
486 struct p54s_tx_info *di = (struct p54s_tx_info *) mi->data;
488 BUILD_BUG_ON(sizeof(*di) > sizeof((mi->data)));
490 spin_lock_bh(&priv->tx_lock);
491 list_add_tail(&di->tx_list, &priv->tx_pending);
492 spin_unlock_bh(&priv->tx_lock);
494 queue_work(priv->hw->workqueue, &priv->work);
497 static void p54spi_work(struct work_struct *work)
499 struct p54s_priv *priv = container_of(work, struct p54s_priv, work);
503 mutex_lock(&priv->mutex);
505 if (priv->fw_state == FW_STATE_OFF &&
506 priv->fw_state == FW_STATE_RESET)
509 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
511 if (ints & SPI_HOST_INT_READY) {
512 p54spi_int_ready(priv);
513 p54spi_int_ack(priv, SPI_HOST_INT_READY);
516 if (priv->fw_state != FW_STATE_READY)
519 if (ints & SPI_HOST_INT_UPDATE) {
520 p54spi_int_ack(priv, SPI_HOST_INT_UPDATE);
521 ret = p54spi_rx(priv);
525 if (ints & SPI_HOST_INT_SW_UPDATE) {
526 p54spi_int_ack(priv, SPI_HOST_INT_SW_UPDATE);
527 ret = p54spi_rx(priv);
532 ret = p54spi_wq_tx(priv);
536 ints = p54spi_read32(priv, SPI_ADRS_HOST_INTERRUPTS);
539 mutex_unlock(&priv->mutex);
542 static int p54spi_op_start(struct ieee80211_hw *dev)
544 struct p54s_priv *priv = dev->priv;
545 unsigned long timeout;
548 if (mutex_lock_interruptible(&priv->mutex)) {
553 priv->fw_state = FW_STATE_BOOTING;
555 p54spi_power_on(priv);
557 ret = p54spi_upload_firmware(dev);
559 p54spi_power_off(priv);
563 mutex_unlock(&priv->mutex);
565 timeout = msecs_to_jiffies(2000);
566 timeout = wait_for_completion_interruptible_timeout(&priv->fw_comp,
569 dev_err(&priv->spi->dev, "firmware boot failed");
570 p54spi_power_off(priv);
575 if (mutex_lock_interruptible(&priv->mutex)) {
577 p54spi_power_off(priv);
581 WARN_ON(priv->fw_state != FW_STATE_READY);
584 mutex_unlock(&priv->mutex);
590 static void p54spi_op_stop(struct ieee80211_hw *dev)
592 struct p54s_priv *priv = dev->priv;
594 if (mutex_lock_interruptible(&priv->mutex)) {
595 /* FIXME: how to handle this error? */
599 WARN_ON(priv->fw_state != FW_STATE_READY);
601 cancel_work_sync(&priv->work);
603 p54spi_power_off(priv);
604 spin_lock_bh(&priv->tx_lock);
605 INIT_LIST_HEAD(&priv->tx_pending);
606 spin_unlock_bh(&priv->tx_lock);
608 priv->fw_state = FW_STATE_OFF;
609 mutex_unlock(&priv->mutex);
612 static int __devinit p54spi_probe(struct spi_device *spi)
614 struct p54s_priv *priv = NULL;
615 struct ieee80211_hw *hw;
618 hw = p54_init_common(sizeof(*priv));
620 dev_err(&priv->spi->dev, "could not alloc ieee80211_hw");
626 dev_set_drvdata(&spi->dev, priv);
629 priv->config = omap_get_config(OMAP_TAG_WLAN_CX3110X,
630 struct omap_wlan_cx3110x_config);
632 spi->bits_per_word = 16;
633 spi->max_speed_hz = 24000000;
635 ret = spi_setup(spi);
637 dev_err(&priv->spi->dev, "spi_setup failed");
638 goto err_free_common;
641 ret = gpio_request(priv->config->power_gpio, "p54spi power");
643 dev_err(&priv->spi->dev, "power GPIO request failed: %d", ret);
644 goto err_free_common;
647 ret = gpio_request(priv->config->irq_gpio, "p54spi irq");
649 dev_err(&priv->spi->dev, "irq GPIO request failed: %d", ret);
650 goto err_free_common;
653 gpio_direction_output(priv->config->power_gpio, 0);
654 gpio_direction_input(priv->config->irq_gpio);
656 ret = request_irq(OMAP_GPIO_IRQ(priv->config->irq_gpio),
657 p54spi_interrupt, IRQF_DISABLED, "p54spi",
660 dev_err(&priv->spi->dev, "request_irq() failed");
661 goto err_free_common;
664 set_irq_type(gpio_to_irq(priv->config->irq_gpio),
665 IRQ_TYPE_EDGE_RISING);
667 disable_irq(gpio_to_irq(priv->config->irq_gpio));
669 INIT_WORK(&priv->work, p54spi_work);
670 init_completion(&priv->fw_comp);
671 INIT_LIST_HEAD(&priv->tx_pending);
672 mutex_init(&priv->mutex);
673 SET_IEEE80211_DEV(hw, &spi->dev);
674 priv->common.open = p54spi_op_start;
675 priv->common.stop = p54spi_op_stop;
676 priv->common.tx = p54spi_op_tx;
678 ret = p54spi_request_firmware(hw);
680 goto err_free_common;
682 ret = p54spi_request_eeprom(hw);
684 goto err_free_common;
686 ret = ieee80211_register_hw(hw);
688 dev_err(&priv->spi->dev, "unable to register "
689 "mac80211 hw: %d", ret);
690 goto err_free_common;
693 dev_info(&priv->spi->dev, "device is bound to %s\n",
694 wiphy_name(hw->wiphy));
698 p54_free_common(priv->hw);
702 static int __devexit p54spi_remove(struct spi_device *spi)
704 struct p54s_priv *priv = dev_get_drvdata(&spi->dev);
706 ieee80211_unregister_hw(priv->hw);
708 free_irq(gpio_to_irq(priv->config->irq_gpio), spi);
710 gpio_free(priv->config->power_gpio);
711 gpio_free(priv->config->irq_gpio);
712 release_firmware(priv->firmware);
714 mutex_destroy(&priv->mutex);
716 p54_free_common(priv->hw);
717 ieee80211_free_hw(priv->hw);
723 static struct spi_driver p54spi_driver = {
725 /* use cx3110x name because board-n800.c uses that for the
728 .bus = &spi_bus_type,
729 .owner = THIS_MODULE,
732 .probe = p54spi_probe,
733 .remove = __devexit_p(p54spi_remove),
736 static int __init p54spi_init(void)
740 ret = spi_register_driver(&p54spi_driver);
742 printk(KERN_ERR "failed to register SPI driver: %d", ret);
750 static void __exit p54spi_exit(void)
752 spi_unregister_driver(&p54spi_driver);
755 module_init(p54spi_init);
756 module_exit(p54spi_exit);
758 MODULE_LICENSE("GPL");
759 MODULE_AUTHOR("Christian Lamparter <chunkeey@web.de>");