git.oblomov.eu Git - linux-2.6/blob - drivers/net/wireless/rtl8187_dev.c

   1 /*
   2  * Linux device driver for RTL8187
   3  *
   4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
   5  * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
   6  *
   7  * Based on the r8187 driver, which is:
   8  * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
   9  *
  10  * Magic delays and register offsets below are taken from the original
  11  * r8187 driver sources.  Thanks to Realtek for their support!
  12  *
  13  * This program is free software; you can redistribute it and/or modify
  14  * it under the terms of the GNU General Public License version 2 as
  15  * published by the Free Software Foundation.
  16  */
  17
  18 #include <linux/init.h>
  19 #include <linux/usb.h>
  20 #include <linux/delay.h>
  21 #include <linux/etherdevice.h>
  22 #include <linux/eeprom_93cx6.h>
  23 #include <net/mac80211.h>
  24
  25 #include "rtl8187.h"
  26 #include "rtl8187_rtl8225.h"
  27
  28 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
  29 MODULE_AUTHOR("Andrea Merello <andreamrl@tiscali.it>");
  30 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
  31 MODULE_LICENSE("GPL");
  32
  33 static struct usb_device_id rtl8187_table[] __devinitdata = {
  34         /* Asus */
  35         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
  36         /* Realtek */
  37         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
  38         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
  39         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
  40         /* Netgear */
  41         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
  42         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
  43         /* HP */
  44         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
  45         /* Sitecom */
  46         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
  47         {}
  48 };
  49
  50 MODULE_DEVICE_TABLE(usb, rtl8187_table);
  51
  52 static const struct ieee80211_rate rtl818x_rates[] = {
  53         { .bitrate = 10, .hw_value = 0, },
  54         { .bitrate = 20, .hw_value = 1, },
  55         { .bitrate = 55, .hw_value = 2, },
  56         { .bitrate = 110, .hw_value = 3, },
  57         { .bitrate = 60, .hw_value = 4, },
  58         { .bitrate = 90, .hw_value = 5, },
  59         { .bitrate = 120, .hw_value = 6, },
  60         { .bitrate = 180, .hw_value = 7, },
  61         { .bitrate = 240, .hw_value = 8, },
  62         { .bitrate = 360, .hw_value = 9, },
  63         { .bitrate = 480, .hw_value = 10, },
  64         { .bitrate = 540, .hw_value = 11, },
  65 };
  66
  67 static const struct ieee80211_channel rtl818x_channels[] = {
  68         { .center_freq = 2412 },
  69         { .center_freq = 2417 },
  70         { .center_freq = 2422 },
  71         { .center_freq = 2427 },
  72         { .center_freq = 2432 },
  73         { .center_freq = 2437 },
  74         { .center_freq = 2442 },
  75         { .center_freq = 2447 },
  76         { .center_freq = 2452 },
  77         { .center_freq = 2457 },
  78         { .center_freq = 2462 },
  79         { .center_freq = 2467 },
  80         { .center_freq = 2472 },
  81         { .center_freq = 2484 },
  82 };
  83
  84 static void rtl8187_iowrite_async_cb(struct urb *urb)
  85 {
  86         kfree(urb->context);
  87         usb_free_urb(urb);
  88 }
  89
  90 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
  91                                   void *data, u16 len)
  92 {
  93         struct usb_ctrlrequest *dr;
  94         struct urb *urb;
  95         struct rtl8187_async_write_data {
  96                 u8 data[4];
  97                 struct usb_ctrlrequest dr;
  98         } *buf;
  99         int rc;
 100
 101         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
 102         if (!buf)
 103                 return;
 104
 105         urb = usb_alloc_urb(0, GFP_ATOMIC);
 106         if (!urb) {
 107                 kfree(buf);
 108                 return;
 109         }
 110
 111         dr = &buf->dr;
 112
 113         dr->bRequestType = RTL8187_REQT_WRITE;
 114         dr->bRequest = RTL8187_REQ_SET_REG;
 115         dr->wValue = addr;
 116         dr->wIndex = 0;
 117         dr->wLength = cpu_to_le16(len);
 118
 119         memcpy(buf, data, len);
 120
 121         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
 122                              (unsigned char *)dr, buf, len,
 123                              rtl8187_iowrite_async_cb, buf);
 124         rc = usb_submit_urb(urb, GFP_ATOMIC);
 125         if (rc < 0) {
 126                 kfree(buf);
 127                 usb_free_urb(urb);
 128         }
 129 }
 130
 131 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
 132                                            __le32 *addr, u32 val)
 133 {
 134         __le32 buf = cpu_to_le32(val);
 135
 136         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
 137                               &buf, sizeof(buf));
 138 }
 139
 140 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
 141 {
 142         struct rtl8187_priv *priv = dev->priv;
 143
 144         data <<= 8;
 145         data |= addr | 0x80;
 146
 147         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
 148         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
 149         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
 150         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
 151
 152         msleep(1);
 153 }
 154
 155 static void rtl8187_tx_cb(struct urb *urb)
 156 {
 157         struct sk_buff *skb = (struct sk_buff *)urb->context;
 158         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 159         struct ieee80211_hw *hw = info->driver_data[0];
 160         struct rtl8187_priv *priv = hw->priv;
 161
 162         usb_free_urb(info->driver_data[1]);
 163         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
 164                                           sizeof(struct rtl8187_tx_hdr));
 165         memset(&info->status, 0, sizeof(info->status));
 166         info->flags |= IEEE80211_TX_STAT_ACK;
 167         ieee80211_tx_status_irqsafe(hw, skb);
 168 }
 169
 170 static int rtl8187_tx(struct ieee80211_hw *dev, struct sk_buff *skb)
 171 {
 172         struct rtl8187_priv *priv = dev->priv;
 173         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
 174         struct ieee80211_hdr *ieee80211hdr = (struct ieee80211_hdr *)skb->data;
 175         unsigned int ep;
 176         void *buf;
 177         struct urb *urb;
 178         __le16 rts_dur = 0;
 179         u32 flags;
 180         int rc;
 181
 182         urb = usb_alloc_urb(0, GFP_ATOMIC);
 183         if (!urb) {
 184                 kfree_skb(skb);
 185                 return 0;
 186         }
 187
 188         flags = skb->len;
 189         flags |= RTL8187_TX_FLAG_NO_ENCRYPT;
 190
 191         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
 192         if (ieee80211_has_morefrags(((struct ieee80211_hdr *)skb->data)->frame_control))
 193                 flags |= RTL8187_TX_FLAG_MORE_FRAG;
 194         if (info->flags & IEEE80211_TX_CTL_USE_RTS_CTS) {
 195                 flags |= RTL8187_TX_FLAG_RTS;
 196                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 197                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
 198                                                  skb->len, info);
 199         } else if (info->flags & IEEE80211_TX_CTL_USE_CTS_PROTECT) {
 200                 flags |= RTL8187_TX_FLAG_CTS;
 201                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
 202         }
 203
 204         if (!priv->is_rtl8187b) {
 205                 struct rtl8187_tx_hdr *hdr =
 206                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
 207                 hdr->flags = cpu_to_le32(flags);
 208                 hdr->len = 0;
 209                 hdr->rts_duration = rts_dur;
 210                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
 211                 buf = hdr;
 212
 213                 ep = 2;
 214         } else {
 215                 /* fc needs to be calculated before skb_push() */
 216                 unsigned int epmap[4] = { 6, 7, 5, 4 };
 217                 struct ieee80211_hdr *tx_hdr =
 218                         (struct ieee80211_hdr *)(skb->data);
 219                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
 220
 221                 struct rtl8187b_tx_hdr *hdr =
 222                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
 223                 struct ieee80211_rate *txrate =
 224                         ieee80211_get_tx_rate(dev, info);
 225                 memset(hdr, 0, sizeof(*hdr));
 226                 hdr->flags = cpu_to_le32(flags);
 227                 hdr->rts_duration = rts_dur;
 228                 hdr->retry = cpu_to_le32(info->control.retry_limit << 8);
 229                 hdr->tx_duration =
 230                         ieee80211_generic_frame_duration(dev, priv->vif,
 231                                                          skb->len, txrate);
 232                 buf = hdr;
 233
 234                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
 235                         ep = 12;
 236                 else
 237                         ep = epmap[skb_get_queue_mapping(skb)];
 238         }
 239
 240         /* FIXME: The sequence that follows is needed for this driver to
 241          * work with mac80211 since "mac80211: fix TX sequence numbers".
 242          * As with the temporary code in rt2x00, changes will be needed
 243          * to get proper sequence numbers on beacons. In addition, this
 244          * patch places the sequence number in the hardware state, which
 245          * limits us to a single virtual state.
 246          */
 247         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
 248                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
 249                         priv->seqno += 0x10;
 250                 ieee80211hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
 251                 ieee80211hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
 252         }
 253
 254         info->driver_data[0] = dev;
 255         info->driver_data[1] = urb;
 256
 257         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
 258                           buf, skb->len, rtl8187_tx_cb, skb);
 259         rc = usb_submit_urb(urb, GFP_ATOMIC);
 260         if (rc < 0) {
 261                 usb_free_urb(urb);
 262                 kfree_skb(skb);
 263         }
 264
 265         return 0;
 266 }
 267
 268 static void rtl8187_rx_cb(struct urb *urb)
 269 {
 270         struct sk_buff *skb = (struct sk_buff *)urb->context;
 271         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
 272         struct ieee80211_hw *dev = info->dev;
 273         struct rtl8187_priv *priv = dev->priv;
 274         struct ieee80211_rx_status rx_status = { 0 };
 275         int rate, signal;
 276         u32 flags;
 277         u32 quality;
 278
 279         spin_lock(&priv->rx_queue.lock);
 280         if (skb->next)
 281                 __skb_unlink(skb, &priv->rx_queue);
 282         else {
 283                 spin_unlock(&priv->rx_queue.lock);
 284                 return;
 285         }
 286         spin_unlock(&priv->rx_queue.lock);
 287
 288         if (unlikely(urb->status)) {
 289                 usb_free_urb(urb);
 290                 dev_kfree_skb_irq(skb);
 291                 return;
 292         }
 293
 294         skb_put(skb, urb->actual_length);
 295         if (!priv->is_rtl8187b) {
 296                 struct rtl8187_rx_hdr *hdr =
 297                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 298                 flags = le32_to_cpu(hdr->flags);
 299                 signal = hdr->signal & 0x7f;
 300                 rx_status.antenna = (hdr->signal >> 7) & 1;
 301                 rx_status.noise = hdr->noise;
 302                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 303                 priv->quality = signal;
 304                 rx_status.qual = priv->quality;
 305                 priv->noise = hdr->noise;
 306                 rate = (flags >> 20) & 0xF;
 307                 if (rate > 3) { /* OFDM rate */
 308                         if (signal > 90)
 309                                 signal = 90;
 310                         else if (signal < 25)
 311                                 signal = 25;
 312                         signal = 90 - signal;
 313                 } else {        /* CCK rate */
 314                         if (signal > 95)
 315                                 signal = 95;
 316                         else if (signal < 30)
 317                                 signal = 30;
 318                         signal = 95 - signal;
 319                 }
 320                 rx_status.signal = signal;
 321                 priv->signal = signal;
 322         } else {
 323                 struct rtl8187b_rx_hdr *hdr =
 324                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
 325                 /* The Realtek datasheet for the RTL8187B shows that the RX
 326                  * header contains the following quantities: signal quality,
 327                  * RSSI, AGC, the received power in dB, and the measured SNR.
 328                  * In testing, none of these quantities show qualitative
 329                  * agreement with AP signal strength, except for the AGC,
 330                  * which is inversely proportional to the strength of the
 331                  * signal. In the following, the quality and signal strength
 332                  * are derived from the AGC. The arbitrary scaling constants
 333                  * are chosen to make the results close to the values obtained
 334                  * for a BCM4312 using b43 as the driver. The noise is ignored
 335                  * for now.
 336                  */
 337                 flags = le32_to_cpu(hdr->flags);
 338                 quality = 170 - hdr->agc;
 339                 if (quality > 100)
 340                         quality = 100;
 341                 signal = 14 - hdr->agc / 2;
 342                 rx_status.qual = quality;
 343                 priv->quality = quality;
 344                 rx_status.signal = signal;
 345                 priv->signal = signal;
 346                 rx_status.antenna = (hdr->rssi >> 7) & 1;
 347                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
 348                 rate = (flags >> 20) & 0xF;
 349         }
 350
 351         skb_trim(skb, flags & 0x0FFF);
 352         rx_status.rate_idx = rate;
 353         rx_status.freq = dev->conf.channel->center_freq;
 354         rx_status.band = dev->conf.channel->band;
 355         rx_status.flag |= RX_FLAG_TSFT;
 356         if (flags & (1 << 13))
 357                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
 358         ieee80211_rx_irqsafe(dev, skb, &rx_status);
 359
 360         skb = dev_alloc_skb(RTL8187_MAX_RX);
 361         if (unlikely(!skb)) {
 362                 usb_free_urb(urb);
 363                 /* TODO check rx queue length and refill *somewhere* */
 364                 return;
 365         }
 366
 367         info = (struct rtl8187_rx_info *)skb->cb;
 368         info->urb = urb;
 369         info->dev = dev;
 370         urb->transfer_buffer = skb_tail_pointer(skb);
 371         urb->context = skb;
 372         skb_queue_tail(&priv->rx_queue, skb);
 373
 374         usb_submit_urb(urb, GFP_ATOMIC);
 375 }
 376
 377 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
 378 {
 379         struct rtl8187_priv *priv = dev->priv;
 380         struct urb *entry;
 381         struct sk_buff *skb;
 382         struct rtl8187_rx_info *info;
 383
 384         while (skb_queue_len(&priv->rx_queue) < 8) {
 385                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
 386                 if (!skb)
 387                         break;
 388                 entry = usb_alloc_urb(0, GFP_KERNEL);
 389                 if (!entry) {
 390                         kfree_skb(skb);
 391                         break;
 392                 }
 393                 usb_fill_bulk_urb(entry, priv->udev,
 394                                   usb_rcvbulkpipe(priv->udev,
 395                                   priv->is_rtl8187b ? 3 : 1),
 396                                   skb_tail_pointer(skb),
 397                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
 398                 info = (struct rtl8187_rx_info *)skb->cb;
 399                 info->urb = entry;
 400                 info->dev = dev;
 401                 skb_queue_tail(&priv->rx_queue, skb);
 402                 usb_submit_urb(entry, GFP_KERNEL);
 403         }
 404
 405         return 0;
 406 }
 407
 408 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
 409 {
 410         struct rtl8187_priv *priv = dev->priv;
 411         u8 reg;
 412         int i;
 413
 414         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 415         reg &= (1 << 1);
 416         reg |= RTL818X_CMD_RESET;
 417         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 418
 419         i = 10;
 420         do {
 421                 msleep(2);
 422                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
 423                       RTL818X_CMD_RESET))
 424                         break;
 425         } while (--i);
 426
 427         if (!i) {
 428                 printk(KERN_ERR "%s: Reset timeout!\n", wiphy_name(dev->wiphy));
 429                 return -ETIMEDOUT;
 430         }
 431
 432         /* reload registers from eeprom */
 433         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
 434
 435         i = 10;
 436         do {
 437                 msleep(4);
 438                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
 439                       RTL818X_EEPROM_CMD_CONFIG))
 440                         break;
 441         } while (--i);
 442
 443         if (!i) {
 444                 printk(KERN_ERR "%s: eeprom reset timeout!\n",
 445                        wiphy_name(dev->wiphy));
 446                 return -ETIMEDOUT;
 447         }
 448
 449         return 0;
 450 }
 451
 452 static int rtl8187_init_hw(struct ieee80211_hw *dev)
 453 {
 454         struct rtl8187_priv *priv = dev->priv;
 455         u8 reg;
 456         int res;
 457
 458         /* reset */
 459         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 460                          RTL818X_EEPROM_CMD_CONFIG);
 461         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 462         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg |
 463                          RTL818X_CONFIG3_ANAPARAM_WRITE);
 464         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 465                           RTL8187_RTL8225_ANAPARAM_ON);
 466         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 467                           RTL8187_RTL8225_ANAPARAM2_ON);
 468         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg &
 469                          ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 470         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 471                          RTL818X_EEPROM_CMD_NORMAL);
 472
 473         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 474
 475         msleep(200);
 476         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
 477         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
 478         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
 479         msleep(200);
 480
 481         res = rtl8187_cmd_reset(dev);
 482         if (res)
 483                 return res;
 484
 485         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 486         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 487         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 488                         reg | RTL818X_CONFIG3_ANAPARAM_WRITE);
 489         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 490                           RTL8187_RTL8225_ANAPARAM_ON);
 491         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 492                           RTL8187_RTL8225_ANAPARAM2_ON);
 493         rtl818x_iowrite8(priv, &priv->map->CONFIG3,
 494                         reg & ~RTL818X_CONFIG3_ANAPARAM_WRITE);
 495         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 496
 497         /* setup card */
 498         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 499         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 500
 501         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 502         rtl818x_iowrite8(priv, &priv->map->GPIO, 1);
 503         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 504
 505         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 506
 507         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
 508         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 509         reg &= 0x3F;
 510         reg |= 0x80;
 511         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
 512
 513         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 514
 515         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
 516         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 517         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0x81);
 518
 519         // TODO: set RESP_RATE and BRSR properly
 520         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
 521         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 522
 523         /* host_usb_init */
 524         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
 525         rtl818x_iowrite8(priv, &priv->map->GPIO, 0);
 526         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
 527         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
 528         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
 529         rtl818x_iowrite8(priv, &priv->map->GPIO, 0x20);
 530         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
 531         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
 532         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
 533         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
 534         msleep(100);
 535
 536         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
 537         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
 538         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
 539         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 540                          RTL818X_EEPROM_CMD_CONFIG);
 541         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
 542         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 543                          RTL818X_EEPROM_CMD_NORMAL);
 544         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
 545         msleep(100);
 546
 547         priv->rf->init(dev);
 548
 549         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
 550         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
 551         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
 552         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
 553         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
 554         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
 555         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
 556
 557         return 0;
 558 }
 559
 560 static const u8 rtl8187b_reg_table[][3] = {
 561         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
 562         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
 563         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
 564         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
 565
 566         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
 567         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
 568         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xE0, 0xFF, 1}, {0xE1, 0x0F, 1},
 569         {0xE2, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1}, {0xF2, 0x02, 1},
 570         {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1}, {0xF6, 0x06, 1},
 571         {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
 572
 573         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
 574         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
 575         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
 576         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
 577         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
 578         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
 579         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2}, {0x72, 0x56, 2},
 580         {0x73, 0x9A, 2},
 581
 582         {0x34, 0xF0, 0}, {0x35, 0x0F, 0}, {0x5B, 0x40, 0}, {0x84, 0x88, 0},
 583         {0x85, 0x24, 0}, {0x88, 0x54, 0}, {0x8B, 0xB8, 0}, {0x8C, 0x07, 0},
 584         {0x8D, 0x00, 0}, {0x94, 0x1B, 0}, {0x95, 0x12, 0}, {0x96, 0x00, 0},
 585         {0x97, 0x06, 0}, {0x9D, 0x1A, 0}, {0x9F, 0x10, 0}, {0xB4, 0x22, 0},
 586         {0xBE, 0x80, 0}, {0xDB, 0x00, 0}, {0xEE, 0x00, 0}, {0x91, 0x03, 0},
 587
 588         {0x4C, 0x00, 2}, {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0},
 589         {0x8E, 0x08, 0}, {0x8F, 0x00, 0}
 590 };
 591
 592 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
 593 {
 594         struct rtl8187_priv *priv = dev->priv;
 595         int res, i;
 596         u8 reg;
 597
 598         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 599                          RTL818X_EEPROM_CMD_CONFIG);
 600
 601         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 602         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE | RTL818X_CONFIG3_GNT_SELECT;
 603         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 604         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2,
 605                           RTL8187B_RTL8225_ANAPARAM2_ON);
 606         rtl818x_iowrite32(priv, &priv->map->ANAPARAM,
 607                           RTL8187B_RTL8225_ANAPARAM_ON);
 608         rtl818x_iowrite8(priv, &priv->map->ANAPARAM3,
 609                          RTL8187B_RTL8225_ANAPARAM3_ON);
 610
 611         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
 612         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
 613         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
 614         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
 615
 616         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 617         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
 618         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 619
 620         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 621                          RTL818X_EEPROM_CMD_NORMAL);
 622
 623         res = rtl8187_cmd_reset(dev);
 624         if (res)
 625                 return res;
 626
 627         rtl818x_iowrite16(priv, (__le16 *)0xFF2D, 0x0FFF);
 628         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 629         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 630         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 631         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 632         reg |= RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT |
 633                RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 634         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 635
 636         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
 637         reg = rtl818x_ioread8(priv, &priv->map->RATE_FALLBACK);
 638         reg |= RTL818X_RATE_FALLBACK_ENABLE;
 639         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, reg);
 640
 641         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 642         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 643         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
 644
 645         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 646                          RTL818X_EEPROM_CMD_CONFIG);
 647         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
 648         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
 649         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 650                          RTL818X_EEPROM_CMD_NORMAL);
 651
 652         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
 653         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
 654                 rtl818x_iowrite8_idx(priv,
 655                                      (u8 *)(uintptr_t)
 656                                      (rtl8187b_reg_table[i][0] | 0xFF00),
 657                                      rtl8187b_reg_table[i][1],
 658                                      rtl8187b_reg_table[i][2]);
 659         }
 660
 661         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
 662         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
 663
 664         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
 665         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
 666         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
 667
 668         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
 669
 670         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
 671
 672         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 673                          RTL818X_EEPROM_CMD_CONFIG);
 674         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
 675         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
 676         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
 677         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
 678                          RTL818X_EEPROM_CMD_NORMAL);
 679
 680         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
 681         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
 682         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
 683         msleep(1100);
 684
 685         priv->rf->init(dev);
 686
 687         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
 688         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 689         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 690
 691         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
 692         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
 693         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 694         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 695         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
 696         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
 697         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
 698
 699         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
 700         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
 701         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
 702         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
 703         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
 704         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
 705         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
 706         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
 707         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
 708         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
 709         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
 710         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
 711         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
 712
 713         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
 714
 715         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
 716
 717         return 0;
 718 }
 719
 720 static int rtl8187_start(struct ieee80211_hw *dev)
 721 {
 722         struct rtl8187_priv *priv = dev->priv;
 723         u32 reg;
 724         int ret;
 725
 726         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
 727                                      rtl8187b_init_hw(dev);
 728         if (ret)
 729                 return ret;
 730
 731         mutex_lock(&priv->conf_mutex);
 732         if (priv->is_rtl8187b) {
 733                 reg = RTL818X_RX_CONF_MGMT |
 734                       RTL818X_RX_CONF_DATA |
 735                       RTL818X_RX_CONF_BROADCAST |
 736                       RTL818X_RX_CONF_NICMAC |
 737                       RTL818X_RX_CONF_BSSID |
 738                       (7 << 13 /* RX FIFO threshold NONE */) |
 739                       (7 << 10 /* MAX RX DMA */) |
 740                       RTL818X_RX_CONF_RX_AUTORESETPHY |
 741                       RTL818X_RX_CONF_ONLYERLPKT |
 742                       RTL818X_RX_CONF_MULTICAST;
 743                 priv->rx_conf = reg;
 744                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 745
 746                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 747                                   RTL818X_TX_CONF_HW_SEQNUM |
 748                                   RTL818X_TX_CONF_DISREQQSIZE |
 749                                   (7 << 8  /* short retry limit */) |
 750                                   (7 << 0  /* long retry limit */) |
 751                                   (7 << 21 /* MAX TX DMA */));
 752                 rtl8187_init_urbs(dev);
 753                 mutex_unlock(&priv->conf_mutex);
 754                 return 0;
 755         }
 756
 757         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
 758
 759         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
 760         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
 761
 762         rtl8187_init_urbs(dev);
 763
 764         reg = RTL818X_RX_CONF_ONLYERLPKT |
 765               RTL818X_RX_CONF_RX_AUTORESETPHY |
 766               RTL818X_RX_CONF_BSSID |
 767               RTL818X_RX_CONF_MGMT |
 768               RTL818X_RX_CONF_DATA |
 769               (7 << 13 /* RX FIFO threshold NONE */) |
 770               (7 << 10 /* MAX RX DMA */) |
 771               RTL818X_RX_CONF_BROADCAST |
 772               RTL818X_RX_CONF_NICMAC;
 773
 774         priv->rx_conf = reg;
 775         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
 776
 777         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
 778         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
 779         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
 780         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
 781
 782         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
 783         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
 784         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
 785         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
 786         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
 787
 788         reg  = RTL818X_TX_CONF_CW_MIN |
 789                (7 << 21 /* MAX TX DMA */) |
 790                RTL818X_TX_CONF_NO_ICV;
 791         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 792
 793         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 794         reg |= RTL818X_CMD_TX_ENABLE;
 795         reg |= RTL818X_CMD_RX_ENABLE;
 796         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 797         mutex_unlock(&priv->conf_mutex);
 798
 799         return 0;
 800 }
 801
 802 static void rtl8187_stop(struct ieee80211_hw *dev)
 803 {
 804         struct rtl8187_priv *priv = dev->priv;
 805         struct rtl8187_rx_info *info;
 806         struct sk_buff *skb;
 807         u32 reg;
 808
 809         mutex_lock(&priv->conf_mutex);
 810         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
 811
 812         reg = rtl818x_ioread8(priv, &priv->map->CMD);
 813         reg &= ~RTL818X_CMD_TX_ENABLE;
 814         reg &= ~RTL818X_CMD_RX_ENABLE;
 815         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
 816
 817         priv->rf->stop(dev);
 818
 819         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 820         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
 821         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
 822         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 823
 824         while ((skb = skb_dequeue(&priv->rx_queue))) {
 825                 info = (struct rtl8187_rx_info *)skb->cb;
 826                 usb_kill_urb(info->urb);
 827                 kfree_skb(skb);
 828         }
 829         mutex_unlock(&priv->conf_mutex);
 830 }
 831
 832 static int rtl8187_add_interface(struct ieee80211_hw *dev,
 833                                  struct ieee80211_if_init_conf *conf)
 834 {
 835         struct rtl8187_priv *priv = dev->priv;
 836         int i;
 837
 838         if (priv->mode != IEEE80211_IF_TYPE_MNTR)
 839                 return -EOPNOTSUPP;
 840
 841         switch (conf->type) {
 842         case IEEE80211_IF_TYPE_STA:
 843                 priv->mode = conf->type;
 844                 break;
 845         default:
 846                 return -EOPNOTSUPP;
 847         }
 848
 849         mutex_lock(&priv->conf_mutex);
 850         priv->vif = conf->vif;
 851
 852         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
 853         for (i = 0; i < ETH_ALEN; i++)
 854                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
 855                                  ((u8 *)conf->mac_addr)[i]);
 856         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
 857
 858         mutex_unlock(&priv->conf_mutex);
 859         return 0;
 860 }
 861
 862 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
 863                                      struct ieee80211_if_init_conf *conf)
 864 {
 865         struct rtl8187_priv *priv = dev->priv;
 866         mutex_lock(&priv->conf_mutex);
 867         priv->mode = IEEE80211_IF_TYPE_MNTR;
 868         priv->vif = NULL;
 869         mutex_unlock(&priv->conf_mutex);
 870 }
 871
 872 static int rtl8187_config(struct ieee80211_hw *dev, struct ieee80211_conf *conf)
 873 {
 874         struct rtl8187_priv *priv = dev->priv;
 875         u32 reg;
 876
 877         mutex_lock(&priv->conf_mutex);
 878         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
 879         /* Enable TX loopback on MAC level to avoid TX during channel
 880          * changes, as this has be seen to causes problems and the
 881          * card will stop work until next reset
 882          */
 883         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
 884                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
 885         msleep(10);
 886         priv->rf->set_chan(dev, conf);
 887         msleep(10);
 888         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
 889
 890         if (!priv->is_rtl8187b) {
 891                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
 892
 893                 if (conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME) {
 894                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
 895                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
 896                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
 897                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0x73);
 898                 } else {
 899                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
 900                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
 901                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
 902                         rtl818x_iowrite8(priv, &priv->map->CW_VAL, 0xa5);
 903                 }
 904         }
 905
 906         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
 907         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
 908         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
 909         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
 910         mutex_unlock(&priv->conf_mutex);
 911         return 0;
 912 }
 913
 914 static int rtl8187_config_interface(struct ieee80211_hw *dev,
 915                                     struct ieee80211_vif *vif,
 916                                     struct ieee80211_if_conf *conf)
 917 {
 918         struct rtl8187_priv *priv = dev->priv;
 919         int i;
 920         u8 reg;
 921
 922         mutex_lock(&priv->conf_mutex);
 923         for (i = 0; i < ETH_ALEN; i++)
 924                 rtl818x_iowrite8(priv, &priv->map->BSSID[i], conf->bssid[i]);
 925
 926         if (is_valid_ether_addr(conf->bssid)) {
 927                 reg = RTL818X_MSR_INFRA;
 928                 if (priv->is_rtl8187b)
 929                         reg |= RTL818X_MSR_ENEDCA;
 930                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
 931         } else {
 932                 reg = RTL818X_MSR_NO_LINK;
 933                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
 934         }
 935
 936         mutex_unlock(&priv->conf_mutex);
 937         return 0;
 938 }
 939
 940 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
 941                                      unsigned int changed_flags,
 942                                      unsigned int *total_flags,
 943                                      int mc_count, struct dev_addr_list *mclist)
 944 {
 945         struct rtl8187_priv *priv = dev->priv;
 946
 947         if (changed_flags & FIF_FCSFAIL)
 948                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
 949         if (changed_flags & FIF_CONTROL)
 950                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
 951         if (changed_flags & FIF_OTHER_BSS)
 952                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
 953         if (*total_flags & FIF_ALLMULTI || mc_count > 0)
 954                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
 955         else
 956                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
 957
 958         *total_flags = 0;
 959
 960         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
 961                 *total_flags |= FIF_FCSFAIL;
 962         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
 963                 *total_flags |= FIF_CONTROL;
 964         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
 965                 *total_flags |= FIF_OTHER_BSS;
 966         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
 967                 *total_flags |= FIF_ALLMULTI;
 968
 969         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
 970 }
 971
 972 static const struct ieee80211_ops rtl8187_ops = {
 973         .tx                     = rtl8187_tx,
 974         .start                  = rtl8187_start,
 975         .stop                   = rtl8187_stop,
 976         .add_interface          = rtl8187_add_interface,
 977         .remove_interface       = rtl8187_remove_interface,
 978         .config                 = rtl8187_config,
 979         .config_interface       = rtl8187_config_interface,
 980         .configure_filter       = rtl8187_configure_filter,
 981 };
 982
 983 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
 984 {
 985         struct ieee80211_hw *dev = eeprom->data;
 986         struct rtl8187_priv *priv = dev->priv;
 987         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
 988
 989         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
 990         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
 991         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
 992         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
 993 }
 994
 995 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
 996 {
 997         struct ieee80211_hw *dev = eeprom->data;
 998         struct rtl8187_priv *priv = dev->priv;
 999         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1000
1001         if (eeprom->reg_data_in)
1002                 reg |= RTL818X_EEPROM_CMD_WRITE;
1003         if (eeprom->reg_data_out)
1004                 reg |= RTL818X_EEPROM_CMD_READ;
1005         if (eeprom->reg_data_clock)
1006                 reg |= RTL818X_EEPROM_CMD_CK;
1007         if (eeprom->reg_chip_select)
1008                 reg |= RTL818X_EEPROM_CMD_CS;
1009
1010         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1011         udelay(10);
1012 }
1013
1014 static int __devinit rtl8187_probe(struct usb_interface *intf,
1015                                    const struct usb_device_id *id)
1016 {
1017         struct usb_device *udev = interface_to_usbdev(intf);
1018         struct ieee80211_hw *dev;
1019         struct rtl8187_priv *priv;
1020         struct eeprom_93cx6 eeprom;
1021         struct ieee80211_channel *channel;
1022         const char *chip_name;
1023         u16 txpwr, reg;
1024         int err, i;
1025         DECLARE_MAC_BUF(mac);
1026
1027         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1028         if (!dev) {
1029                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1030                 return -ENOMEM;
1031         }
1032
1033         priv = dev->priv;
1034         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1035
1036         SET_IEEE80211_DEV(dev, &intf->dev);
1037         usb_set_intfdata(intf, dev);
1038         priv->udev = udev;
1039
1040         usb_get_dev(udev);
1041
1042         skb_queue_head_init(&priv->rx_queue);
1043
1044         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1045         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1046
1047         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1048         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1049         priv->map = (struct rtl818x_csr *)0xFF00;
1050
1051         priv->band.band = IEEE80211_BAND_2GHZ;
1052         priv->band.channels = priv->channels;
1053         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1054         priv->band.bitrates = priv->rates;
1055         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1056         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1057
1058
1059         priv->mode = IEEE80211_IF_TYPE_MNTR;
1060         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1061                      IEEE80211_HW_RX_INCLUDES_FCS;
1062
1063         eeprom.data = dev;
1064         eeprom.register_read = rtl8187_eeprom_register_read;
1065         eeprom.register_write = rtl8187_eeprom_register_write;
1066         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1067                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1068         else
1069                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1070
1071         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1072         udelay(10);
1073
1074         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1075                                (__le16 __force *)dev->wiphy->perm_addr, 3);
1076         if (!is_valid_ether_addr(dev->wiphy->perm_addr)) {
1077                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1078                        "generated MAC address\n");
1079                 random_ether_addr(dev->wiphy->perm_addr);
1080         }
1081
1082         channel = priv->channels;
1083         for (i = 0; i < 3; i++) {
1084                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1085                                   &txpwr);
1086                 (*channel++).hw_value = txpwr & 0xFF;
1087                 (*channel++).hw_value = txpwr >> 8;
1088         }
1089         for (i = 0; i < 2; i++) {
1090                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1091                                   &txpwr);
1092                 (*channel++).hw_value = txpwr & 0xFF;
1093                 (*channel++).hw_value = txpwr >> 8;
1094         }
1095
1096         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1097                           &priv->txpwr_base);
1098
1099         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1100         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1101         /* 0 means asic B-cut, we should use SW 3 wire
1102          * bit-by-bit banging for radio. 1 means we can use
1103          * USB specific request to write radio registers */
1104         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1105         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1106         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1107
1108         if (!priv->is_rtl8187b) {
1109                 u32 reg32;
1110                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1111                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1112                 switch (reg32) {
1113                 case RTL818X_TX_CONF_R8187vD_B:
1114                         /* Some RTL8187B devices have a USB ID of 0x8187
1115                          * detect them here */
1116                         chip_name = "RTL8187BvB(early)";
1117                         priv->is_rtl8187b = 1;
1118                         priv->hw_rev = RTL8187BvB;
1119                         break;
1120                 case RTL818X_TX_CONF_R8187vD:
1121                         chip_name = "RTL8187vD";
1122                         break;
1123                 default:
1124                         chip_name = "RTL8187vB (default)";
1125                 }
1126        } else {
1127                 /*
1128                  * Force USB request to write radio registers for 8187B, Realtek
1129                  * only uses it in their sources
1130                  */
1131                 /*if (priv->asic_rev == 0) {
1132                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1133                                "requests to write to radio registers\n");
1134                         priv->asic_rev = 1;
1135                 }*/
1136                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1137                 case RTL818X_R8187B_B:
1138                         chip_name = "RTL8187BvB";
1139                         priv->hw_rev = RTL8187BvB;
1140                         break;
1141                 case RTL818X_R8187B_D:
1142                         chip_name = "RTL8187BvD";
1143                         priv->hw_rev = RTL8187BvD;
1144                         break;
1145                 case RTL818X_R8187B_E:
1146                         chip_name = "RTL8187BvE";
1147                         priv->hw_rev = RTL8187BvE;
1148                         break;
1149                 default:
1150                         chip_name = "RTL8187BvB (default)";
1151                         priv->hw_rev = RTL8187BvB;
1152                 }
1153         }
1154
1155         if (!priv->is_rtl8187b) {
1156                 for (i = 0; i < 2; i++) {
1157                         eeprom_93cx6_read(&eeprom,
1158                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1159                                           &txpwr);
1160                         (*channel++).hw_value = txpwr & 0xFF;
1161                         (*channel++).hw_value = txpwr >> 8;
1162                 }
1163         } else {
1164                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1165                                   &txpwr);
1166                 (*channel++).hw_value = txpwr & 0xFF;
1167
1168                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1169                 (*channel++).hw_value = txpwr & 0xFF;
1170
1171                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1172                 (*channel++).hw_value = txpwr & 0xFF;
1173                 (*channel++).hw_value = txpwr >> 8;
1174         }
1175
1176         if (priv->is_rtl8187b) {
1177                 printk(KERN_WARNING "rtl8187: 8187B chip detected. Support "
1178                         "is EXPERIMENTAL, and could damage your\n"
1179                         "         hardware, use at your own risk\n");
1180                 dev->flags |= IEEE80211_HW_SIGNAL_DBM;
1181         } else {
1182                 dev->flags |= IEEE80211_HW_SIGNAL_UNSPEC;
1183                 dev->max_signal = 65;
1184         }
1185
1186         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1187                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1188                        " info!\n");
1189
1190         priv->rf = rtl8187_detect_rf(dev);
1191         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1192                                   sizeof(struct rtl8187_tx_hdr) :
1193                                   sizeof(struct rtl8187b_tx_hdr);
1194         if (!priv->is_rtl8187b)
1195                 dev->queues = 1;
1196         else
1197                 dev->queues = 4;
1198
1199         err = ieee80211_register_hw(dev);
1200         if (err) {
1201                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1202                 goto err_free_dev;
1203         }
1204         mutex_init(&priv->conf_mutex);
1205
1206         printk(KERN_INFO "%s: hwaddr %s, %s V%d + %s\n",
1207                wiphy_name(dev->wiphy), print_mac(mac, dev->wiphy->perm_addr),
1208                chip_name, priv->asic_rev, priv->rf->name);
1209
1210         return 0;
1211
1212  err_free_dev:
1213         ieee80211_free_hw(dev);
1214         usb_set_intfdata(intf, NULL);
1215         usb_put_dev(udev);
1216         return err;
1217 }
1218
1219 static void __devexit rtl8187_disconnect(struct usb_interface *intf)
1220 {
1221         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1222         struct rtl8187_priv *priv;
1223
1224         if (!dev)
1225                 return;
1226
1227         ieee80211_unregister_hw(dev);
1228
1229         priv = dev->priv;
1230         usb_put_dev(interface_to_usbdev(intf));
1231         ieee80211_free_hw(dev);
1232 }
1233
1234 static struct usb_driver rtl8187_driver = {
1235         .name           = KBUILD_MODNAME,
1236         .id_table       = rtl8187_table,
1237         .probe          = rtl8187_probe,
1238         .disconnect     = __devexit_p(rtl8187_disconnect),
1239 };
1240
1241 static int __init rtl8187_init(void)
1242 {
1243         return usb_register(&rtl8187_driver);
1244 }
1245
1246 static void __exit rtl8187_exit(void)
1247 {
1248         usb_deregister(&rtl8187_driver);
1249 }
1250
1251 module_init(rtl8187_init);
1252 module_exit(rtl8187_exit);