git.oblomov.eu Git - linux-2.6/blob - drivers/media/video/cx23885/cx23885-dvb.c

   1 /*
   2  *  Driver for the Conexant CX23885 PCIe bridge
   3  *
   4  *  Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
   5  *
   6  *  This program is free software; you can redistribute it and/or modify
   7  *  it under the terms of the GNU General Public License as published by
   8  *  the Free Software Foundation; either version 2 of the License, or
   9  *  (at your option) any later version.
  10  *
  11  *  This program is distributed in the hope that it will be useful,
  12  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  *
  15  *  GNU General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License
  18  *  along with this program; if not, write to the Free Software
  19  *  Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  */
  21
  22 #include <linux/module.h>
  23 #include <linux/init.h>
  24 #include <linux/device.h>
  25 #include <linux/fs.h>
  26 #include <linux/kthread.h>
  27 #include <linux/file.h>
  28 #include <linux/suspend.h>
  29
  30 #include "cx23885.h"
  31 #include <media/v4l2-common.h>
  32
  33 #include "dvb_ca_en50221.h"
  34 #include "s5h1409.h"
  35 #include "s5h1411.h"
  36 #include "mt2131.h"
  37 #include "tda8290.h"
  38 #include "tda18271.h"
  39 #include "lgdt330x.h"
  40 #include "xc5000.h"
  41 #include "tda10048.h"
  42 #include "tuner-xc2028.h"
  43 #include "tuner-simple.h"
  44 #include "dib7000p.h"
  45 #include "dibx000_common.h"
  46 #include "zl10353.h"
  47 #include "stv0900.h"
  48 #include "stv6110.h"
  49 #include "lnbh24.h"
  50 #include "cx24116.h"
  51 #include "cimax2.h"
  52 #include "lgs8gxx.h"
  53 #include "netup-eeprom.h"
  54 #include "netup-init.h"
  55 #include "lgdt3305.h"
  56
  57 static unsigned int debug;
  58
  59 #define dprintk(level, fmt, arg...)\
  60         do { if (debug >= level)\
  61                 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
  62         } while (0)
  63
  64 /* ------------------------------------------------------------------ */
  65
  66 static unsigned int alt_tuner;
  67 module_param(alt_tuner, int, 0644);
  68 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
  69
  70 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  71
  72 /* ------------------------------------------------------------------ */
  73
  74 static int dvb_buf_setup(struct videobuf_queue *q,
  75                          unsigned int *count, unsigned int *size)
  76 {
  77         struct cx23885_tsport *port = q->priv_data;
  78
  79         port->ts_packet_size  = 188 * 4;
  80         port->ts_packet_count = 32;
  81
  82         *size  = port->ts_packet_size * port->ts_packet_count;
  83         *count = 32;
  84         return 0;
  85 }
  86
  87 static int dvb_buf_prepare(struct videobuf_queue *q,
  88                            struct videobuf_buffer *vb, enum v4l2_field field)
  89 {
  90         struct cx23885_tsport *port = q->priv_data;
  91         return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
  92 }
  93
  94 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  95 {
  96         struct cx23885_tsport *port = q->priv_data;
  97         cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
  98 }
  99
 100 static void dvb_buf_release(struct videobuf_queue *q,
 101                             struct videobuf_buffer *vb)
 102 {
 103         cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
 104 }
 105
 106 static struct videobuf_queue_ops dvb_qops = {
 107         .buf_setup    = dvb_buf_setup,
 108         .buf_prepare  = dvb_buf_prepare,
 109         .buf_queue    = dvb_buf_queue,
 110         .buf_release  = dvb_buf_release,
 111 };
 112
 113 static struct s5h1409_config hauppauge_generic_config = {
 114         .demod_address = 0x32 >> 1,
 115         .output_mode   = S5H1409_SERIAL_OUTPUT,
 116         .gpio          = S5H1409_GPIO_ON,
 117         .qam_if        = 44000,
 118         .inversion     = S5H1409_INVERSION_OFF,
 119         .status_mode   = S5H1409_DEMODLOCKING,
 120         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 121 };
 122
 123 static struct tda10048_config hauppauge_hvr1200_config = {
 124         .demod_address    = 0x10 >> 1,
 125         .output_mode      = TDA10048_SERIAL_OUTPUT,
 126         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
 127         .inversion        = TDA10048_INVERSION_ON,
 128         .dtv6_if_freq_khz = TDA10048_IF_3300,
 129         .dtv7_if_freq_khz = TDA10048_IF_3800,
 130         .dtv8_if_freq_khz = TDA10048_IF_4300,
 131         .clk_freq_khz     = TDA10048_CLK_16000,
 132 };
 133
 134 static struct tda10048_config hauppauge_hvr1210_config = {
 135         .demod_address    = 0x10 >> 1,
 136         .output_mode      = TDA10048_SERIAL_OUTPUT,
 137         .fwbulkwritelen   = TDA10048_BULKWRITE_200,
 138         .inversion        = TDA10048_INVERSION_ON,
 139         .dtv6_if_freq_khz = TDA10048_IF_3300,
 140         .dtv7_if_freq_khz = TDA10048_IF_3500,
 141         .dtv8_if_freq_khz = TDA10048_IF_4000,
 142         .clk_freq_khz     = TDA10048_CLK_16000,
 143 };
 144
 145 static struct s5h1409_config hauppauge_ezqam_config = {
 146         .demod_address = 0x32 >> 1,
 147         .output_mode   = S5H1409_SERIAL_OUTPUT,
 148         .gpio          = S5H1409_GPIO_OFF,
 149         .qam_if        = 4000,
 150         .inversion     = S5H1409_INVERSION_ON,
 151         .status_mode   = S5H1409_DEMODLOCKING,
 152         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 153 };
 154
 155 static struct s5h1409_config hauppauge_hvr1800lp_config = {
 156         .demod_address = 0x32 >> 1,
 157         .output_mode   = S5H1409_SERIAL_OUTPUT,
 158         .gpio          = S5H1409_GPIO_OFF,
 159         .qam_if        = 44000,
 160         .inversion     = S5H1409_INVERSION_OFF,
 161         .status_mode   = S5H1409_DEMODLOCKING,
 162         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 163 };
 164
 165 static struct s5h1409_config hauppauge_hvr1500_config = {
 166         .demod_address = 0x32 >> 1,
 167         .output_mode   = S5H1409_SERIAL_OUTPUT,
 168         .gpio          = S5H1409_GPIO_OFF,
 169         .inversion     = S5H1409_INVERSION_OFF,
 170         .status_mode   = S5H1409_DEMODLOCKING,
 171         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 172 };
 173
 174 static struct mt2131_config hauppauge_generic_tunerconfig = {
 175         0x61
 176 };
 177
 178 static struct lgdt330x_config fusionhdtv_5_express = {
 179         .demod_address = 0x0e,
 180         .demod_chip = LGDT3303,
 181         .serial_mpeg = 0x40,
 182 };
 183
 184 static struct s5h1409_config hauppauge_hvr1500q_config = {
 185         .demod_address = 0x32 >> 1,
 186         .output_mode   = S5H1409_SERIAL_OUTPUT,
 187         .gpio          = S5H1409_GPIO_ON,
 188         .qam_if        = 44000,
 189         .inversion     = S5H1409_INVERSION_OFF,
 190         .status_mode   = S5H1409_DEMODLOCKING,
 191         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 192 };
 193
 194 static struct s5h1409_config dvico_s5h1409_config = {
 195         .demod_address = 0x32 >> 1,
 196         .output_mode   = S5H1409_SERIAL_OUTPUT,
 197         .gpio          = S5H1409_GPIO_ON,
 198         .qam_if        = 44000,
 199         .inversion     = S5H1409_INVERSION_OFF,
 200         .status_mode   = S5H1409_DEMODLOCKING,
 201         .mpeg_timing   = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 202 };
 203
 204 static struct s5h1411_config dvico_s5h1411_config = {
 205         .output_mode   = S5H1411_SERIAL_OUTPUT,
 206         .gpio          = S5H1411_GPIO_ON,
 207         .qam_if        = S5H1411_IF_44000,
 208         .vsb_if        = S5H1411_IF_44000,
 209         .inversion     = S5H1411_INVERSION_OFF,
 210         .status_mode   = S5H1411_DEMODLOCKING,
 211         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 212 };
 213
 214 static struct s5h1411_config hcw_s5h1411_config = {
 215         .output_mode   = S5H1411_SERIAL_OUTPUT,
 216         .gpio          = S5H1411_GPIO_OFF,
 217         .vsb_if        = S5H1411_IF_44000,
 218         .qam_if        = S5H1411_IF_4000,
 219         .inversion     = S5H1411_INVERSION_ON,
 220         .status_mode   = S5H1411_DEMODLOCKING,
 221         .mpeg_timing   = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
 222 };
 223
 224 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
 225         .i2c_address      = 0x61,
 226         .if_khz           = 5380,
 227 };
 228
 229 static struct xc5000_config dvico_xc5000_tunerconfig = {
 230         .i2c_address      = 0x64,
 231         .if_khz           = 5380,
 232 };
 233
 234 static struct tda829x_config tda829x_no_probe = {
 235         .probe_tuner = TDA829X_DONT_PROBE,
 236 };
 237
 238 static struct tda18271_std_map hauppauge_tda18271_std_map = {
 239         .atsc_6   = { .if_freq = 5380, .agc_mode = 3, .std = 3,
 240                       .if_lvl = 6, .rfagc_top = 0x37 },
 241         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 0,
 242                       .if_lvl = 6, .rfagc_top = 0x37 },
 243 };
 244
 245 static struct tda18271_config hauppauge_tda18271_config = {
 246         .std_map = &hauppauge_tda18271_std_map,
 247         .gate    = TDA18271_GATE_ANALOG,
 248 };
 249
 250 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
 251         .gate    = TDA18271_GATE_ANALOG,
 252 };
 253
 254 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
 255         .gate    = TDA18271_GATE_DIGITAL,
 256 };
 257
 258 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
 259         .atsc_6   = { .if_freq = 3250, .agc_mode = 3, .std = 4,
 260                       .if_lvl = 1, .rfagc_top = 0x58 },
 261         .qam_6    = { .if_freq = 4000, .agc_mode = 3, .std = 5,
 262                       .if_lvl = 1, .rfagc_top = 0x58 },
 263 };
 264
 265 static struct tda18271_config hauppauge_hvr127x_config = {
 266         .std_map = &hauppauge_hvr127x_std_map,
 267 };
 268
 269 static struct lgdt3305_config hauppauge_lgdt3305_config = {
 270         .i2c_addr           = 0x0e,
 271         .mpeg_mode          = LGDT3305_MPEG_SERIAL,
 272         .tpclk_edge         = LGDT3305_TPCLK_FALLING_EDGE,
 273         .tpvalid_polarity   = LGDT3305_TP_VALID_HIGH,
 274         .deny_i2c_rptr      = 1,
 275         .spectral_inversion = 1,
 276         .qam_if_khz         = 4000,
 277         .vsb_if_khz         = 3250,
 278 };
 279
 280 static struct dibx000_agc_config xc3028_agc_config = {
 281         BAND_VHF | BAND_UHF,    /* band_caps */
 282
 283         /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
 284          * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
 285          * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
 286          * P_agc_nb_est=2, P_agc_write=0
 287          */
 288         (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
 289                 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
 290
 291         712,    /* inv_gain */
 292         21,     /* time_stabiliz */
 293
 294         0,      /* alpha_level */
 295         118,    /* thlock */
 296
 297         0,      /* wbd_inv */
 298         2867,   /* wbd_ref */
 299         0,      /* wbd_sel */
 300         2,      /* wbd_alpha */
 301
 302         0,      /* agc1_max */
 303         0,      /* agc1_min */
 304         39718,  /* agc2_max */
 305         9930,   /* agc2_min */
 306         0,      /* agc1_pt1 */
 307         0,      /* agc1_pt2 */
 308         0,      /* agc1_pt3 */
 309         0,      /* agc1_slope1 */
 310         0,      /* agc1_slope2 */
 311         0,      /* agc2_pt1 */
 312         128,    /* agc2_pt2 */
 313         29,     /* agc2_slope1 */
 314         29,     /* agc2_slope2 */
 315
 316         17,     /* alpha_mant */
 317         27,     /* alpha_exp */
 318         23,     /* beta_mant */
 319         51,     /* beta_exp */
 320
 321         1,      /* perform_agc_softsplit */
 322 };
 323
 324 /* PLL Configuration for COFDM BW_MHz = 8.000000
 325  * With external clock = 30.000000 */
 326 static struct dibx000_bandwidth_config xc3028_bw_config = {
 327         60000,  /* internal */
 328         30000,  /* sampling */
 329         1,      /* pll_cfg: prediv */
 330         8,      /* pll_cfg: ratio */
 331         3,      /* pll_cfg: range */
 332         1,      /* pll_cfg: reset */
 333         0,      /* pll_cfg: bypass */
 334         0,      /* misc: refdiv */
 335         0,      /* misc: bypclk_div */
 336         1,      /* misc: IO_CLK_en_core */
 337         1,      /* misc: ADClkSrc */
 338         0,      /* misc: modulo */
 339         (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
 340         (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
 341         20452225, /* timf */
 342         30000000  /* xtal_hz */
 343 };
 344
 345 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
 346         .output_mpeg2_in_188_bytes = 1,
 347         .hostbus_diversity = 1,
 348         .tuner_is_baseband = 0,
 349         .update_lna  = NULL,
 350
 351         .agc_config_count = 1,
 352         .agc = &xc3028_agc_config,
 353         .bw  = &xc3028_bw_config,
 354
 355         .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
 356         .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
 357         .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
 358
 359         .pwm_freq_div = 0,
 360         .agc_control  = NULL,
 361         .spur_protect = 0,
 362
 363         .output_mode = OUTMODE_MPEG2_SERIAL,
 364 };
 365
 366 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
 367         .demod_address = 0x0f,
 368         .if2           = 45600,
 369         .no_tuner      = 1,
 370         .disable_i2c_gate_ctrl = 1,
 371 };
 372
 373 static struct stv0900_config netup_stv0900_config = {
 374         .demod_address = 0x68,
 375         .xtal = 27000000,
 376         .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
 377         .diseqc_mode = 2,/* 2/3 PWM */
 378         .path1_mode = 2,/*Serial continues clock */
 379         .path2_mode = 2,/*Serial continues clock */
 380         .tun1_maddress = 0,/* 0x60 */
 381         .tun2_maddress = 3,/* 0x63 */
 382         .tun1_adc = 1,/* 1 Vpp */
 383         .tun2_adc = 1,/* 1 Vpp */
 384 };
 385
 386 static struct stv6110_config netup_stv6110_tunerconfig_a = {
 387         .i2c_address = 0x60,
 388         .mclk = 27000000,
 389         .iq_wiring = 0,
 390 };
 391
 392 static struct stv6110_config netup_stv6110_tunerconfig_b = {
 393         .i2c_address = 0x63,
 394         .mclk = 27000000,
 395         .iq_wiring = 1,
 396 };
 397
 398 static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
 399 {
 400         struct cx23885_tsport *port = fe->dvb->priv;
 401         struct cx23885_dev *dev = port->dev;
 402
 403         if (voltage == SEC_VOLTAGE_18)
 404                 cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
 405         else if (voltage == SEC_VOLTAGE_13)
 406                 cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
 407         else
 408                 cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
 409         return 0;
 410 }
 411
 412 static struct cx24116_config tbs_cx24116_config = {
 413         .demod_address = 0x05,
 414 };
 415
 416 static struct cx24116_config tevii_cx24116_config = {
 417         .demod_address = 0x55,
 418 };
 419
 420 static struct cx24116_config dvbworld_cx24116_config = {
 421         .demod_address = 0x05,
 422 };
 423
 424 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
 425         .prod = LGS8GXX_PROD_LGS8GL5,
 426         .demod_address = 0x19,
 427         .serial_ts = 0,
 428         .ts_clk_pol = 1,
 429         .ts_clk_gated = 1,
 430         .if_clk_freq = 30400, /* 30.4 MHz */
 431         .if_freq = 5380, /* 5.38 MHz */
 432         .if_neg_center = 1,
 433         .ext_adc = 0,
 434         .adc_signed = 0,
 435         .if_neg_edge = 0,
 436 };
 437
 438 static struct xc5000_config mygica_x8506_xc5000_config = {
 439         .i2c_address = 0x61,
 440         .if_khz = 5380,
 441 };
 442
 443 static int dvb_register(struct cx23885_tsport *port)
 444 {
 445         struct cx23885_dev *dev = port->dev;
 446         struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
 447         struct videobuf_dvb_frontend *fe0;
 448         int ret;
 449
 450         /* Get the first frontend */
 451         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
 452         if (!fe0)
 453                 return -EINVAL;
 454
 455         /* init struct videobuf_dvb */
 456         fe0->dvb.name = dev->name;
 457
 458         /* init frontend */
 459         switch (dev->board) {
 460         case CX23885_BOARD_HAUPPAUGE_HVR1250:
 461                 i2c_bus = &dev->i2c_bus[0];
 462                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 463                                                 &hauppauge_generic_config,
 464                                                 &i2c_bus->i2c_adap);
 465                 if (fe0->dvb.frontend != NULL) {
 466                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
 467                                    &i2c_bus->i2c_adap,
 468                                    &hauppauge_generic_tunerconfig, 0);
 469                 }
 470                 break;
 471         case CX23885_BOARD_HAUPPAUGE_HVR1270:
 472         case CX23885_BOARD_HAUPPAUGE_HVR1275:
 473                 i2c_bus = &dev->i2c_bus[0];
 474                 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
 475                                                &hauppauge_lgdt3305_config,
 476                                                &i2c_bus->i2c_adap);
 477                 if (fe0->dvb.frontend != NULL) {
 478                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
 479                                    0x60, &dev->i2c_bus[1].i2c_adap,
 480                                    &hauppauge_hvr127x_config);
 481                 }
 482                 break;
 483         case CX23885_BOARD_HAUPPAUGE_HVR1255:
 484                 i2c_bus = &dev->i2c_bus[0];
 485                 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
 486                                                &hcw_s5h1411_config,
 487                                                &i2c_bus->i2c_adap);
 488                 if (fe0->dvb.frontend != NULL) {
 489                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
 490                                    0x60, &dev->i2c_bus[1].i2c_adap,
 491                                    &hauppauge_tda18271_config);
 492                 }
 493                 break;
 494         case CX23885_BOARD_HAUPPAUGE_HVR1800:
 495                 i2c_bus = &dev->i2c_bus[0];
 496                 switch (alt_tuner) {
 497                 case 1:
 498                         fe0->dvb.frontend =
 499                                 dvb_attach(s5h1409_attach,
 500                                            &hauppauge_ezqam_config,
 501                                            &i2c_bus->i2c_adap);
 502                         if (fe0->dvb.frontend != NULL) {
 503                                 dvb_attach(tda829x_attach, fe0->dvb.frontend,
 504                                            &dev->i2c_bus[1].i2c_adap, 0x42,
 505                                            &tda829x_no_probe);
 506                                 dvb_attach(tda18271_attach, fe0->dvb.frontend,
 507                                            0x60, &dev->i2c_bus[1].i2c_adap,
 508                                            &hauppauge_tda18271_config);
 509                         }
 510                         break;
 511                 case 0:
 512                 default:
 513                         fe0->dvb.frontend =
 514                                 dvb_attach(s5h1409_attach,
 515                                            &hauppauge_generic_config,
 516                                            &i2c_bus->i2c_adap);
 517                         if (fe0->dvb.frontend != NULL)
 518                                 dvb_attach(mt2131_attach, fe0->dvb.frontend,
 519                                            &i2c_bus->i2c_adap,
 520                                            &hauppauge_generic_tunerconfig, 0);
 521                         break;
 522                 }
 523                 break;
 524         case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
 525                 i2c_bus = &dev->i2c_bus[0];
 526                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 527                                                 &hauppauge_hvr1800lp_config,
 528                                                 &i2c_bus->i2c_adap);
 529                 if (fe0->dvb.frontend != NULL) {
 530                         dvb_attach(mt2131_attach, fe0->dvb.frontend,
 531                                    &i2c_bus->i2c_adap,
 532                                    &hauppauge_generic_tunerconfig, 0);
 533                 }
 534                 break;
 535         case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
 536                 i2c_bus = &dev->i2c_bus[0];
 537                 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
 538                                                 &fusionhdtv_5_express,
 539                                                 &i2c_bus->i2c_adap);
 540                 if (fe0->dvb.frontend != NULL) {
 541                         dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
 542                                    &i2c_bus->i2c_adap, 0x61,
 543                                    TUNER_LG_TDVS_H06XF);
 544                 }
 545                 break;
 546         case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
 547                 i2c_bus = &dev->i2c_bus[1];
 548                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 549                                                 &hauppauge_hvr1500q_config,
 550                                                 &dev->i2c_bus[0].i2c_adap);
 551                 if (fe0->dvb.frontend != NULL)
 552                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
 553                                    &i2c_bus->i2c_adap,
 554                                    &hauppauge_hvr1500q_tunerconfig);
 555                 break;
 556         case CX23885_BOARD_HAUPPAUGE_HVR1500:
 557                 i2c_bus = &dev->i2c_bus[1];
 558                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 559                                                 &hauppauge_hvr1500_config,
 560                                                 &dev->i2c_bus[0].i2c_adap);
 561                 if (fe0->dvb.frontend != NULL) {
 562                         struct dvb_frontend *fe;
 563                         struct xc2028_config cfg = {
 564                                 .i2c_adap  = &i2c_bus->i2c_adap,
 565                                 .i2c_addr  = 0x61,
 566                         };
 567                         static struct xc2028_ctrl ctl = {
 568                                 .fname       = XC2028_DEFAULT_FIRMWARE,
 569                                 .max_len     = 64,
 570                                 .demod       = XC3028_FE_OREN538,
 571                         };
 572
 573                         fe = dvb_attach(xc2028_attach,
 574                                         fe0->dvb.frontend, &cfg);
 575                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
 576                                 fe->ops.tuner_ops.set_config(fe, &ctl);
 577                 }
 578                 break;
 579         case CX23885_BOARD_HAUPPAUGE_HVR1200:
 580         case CX23885_BOARD_HAUPPAUGE_HVR1700:
 581                 i2c_bus = &dev->i2c_bus[0];
 582                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
 583                         &hauppauge_hvr1200_config,
 584                         &i2c_bus->i2c_adap);
 585                 if (fe0->dvb.frontend != NULL) {
 586                         dvb_attach(tda829x_attach, fe0->dvb.frontend,
 587                                 &dev->i2c_bus[1].i2c_adap, 0x42,
 588                                 &tda829x_no_probe);
 589                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
 590                                 0x60, &dev->i2c_bus[1].i2c_adap,
 591                                 &hauppauge_hvr1200_tuner_config);
 592                 }
 593                 break;
 594         case CX23885_BOARD_HAUPPAUGE_HVR1210:
 595                 i2c_bus = &dev->i2c_bus[0];
 596                 fe0->dvb.frontend = dvb_attach(tda10048_attach,
 597                         &hauppauge_hvr1210_config,
 598                         &i2c_bus->i2c_adap);
 599                 if (fe0->dvb.frontend != NULL) {
 600                         dvb_attach(tda18271_attach, fe0->dvb.frontend,
 601                                 0x60, &dev->i2c_bus[1].i2c_adap,
 602                                 &hauppauge_hvr1210_tuner_config);
 603                 }
 604                 break;
 605         case CX23885_BOARD_HAUPPAUGE_HVR1400:
 606                 i2c_bus = &dev->i2c_bus[0];
 607                 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
 608                         &i2c_bus->i2c_adap,
 609                         0x12, &hauppauge_hvr1400_dib7000_config);
 610                 if (fe0->dvb.frontend != NULL) {
 611                         struct dvb_frontend *fe;
 612                         struct xc2028_config cfg = {
 613                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
 614                                 .i2c_addr  = 0x64,
 615                         };
 616                         static struct xc2028_ctrl ctl = {
 617                                 .fname   = XC3028L_DEFAULT_FIRMWARE,
 618                                 .max_len = 64,
 619                                 .demod   = 5000,
 620                                 /* This is true for all demods with
 621                                         v36 firmware? */
 622                                 .type    = XC2028_D2633,
 623                         };
 624
 625                         fe = dvb_attach(xc2028_attach,
 626                                         fe0->dvb.frontend, &cfg);
 627                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
 628                                 fe->ops.tuner_ops.set_config(fe, &ctl);
 629                 }
 630                 break;
 631         case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
 632                 i2c_bus = &dev->i2c_bus[port->nr - 1];
 633
 634                 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
 635                                                 &dvico_s5h1409_config,
 636                                                 &i2c_bus->i2c_adap);
 637                 if (fe0->dvb.frontend == NULL)
 638                         fe0->dvb.frontend = dvb_attach(s5h1411_attach,
 639                                                         &dvico_s5h1411_config,
 640                                                         &i2c_bus->i2c_adap);
 641                 if (fe0->dvb.frontend != NULL)
 642                         dvb_attach(xc5000_attach, fe0->dvb.frontend,
 643                                    &i2c_bus->i2c_adap,
 644                                    &dvico_xc5000_tunerconfig);
 645                 break;
 646         case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
 647                 i2c_bus = &dev->i2c_bus[port->nr - 1];
 648
 649                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
 650                                                &dvico_fusionhdtv_xc3028,
 651                                                &i2c_bus->i2c_adap);
 652                 if (fe0->dvb.frontend != NULL) {
 653                         struct dvb_frontend      *fe;
 654                         struct xc2028_config      cfg = {
 655                                 .i2c_adap  = &i2c_bus->i2c_adap,
 656                                 .i2c_addr  = 0x61,
 657                         };
 658                         static struct xc2028_ctrl ctl = {
 659                                 .fname       = XC2028_DEFAULT_FIRMWARE,
 660                                 .max_len     = 64,
 661                                 .demod       = XC3028_FE_ZARLINK456,
 662                         };
 663
 664                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
 665                                         &cfg);
 666                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
 667                                 fe->ops.tuner_ops.set_config(fe, &ctl);
 668                 }
 669                 break;
 670         }
 671         case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
 672         case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
 673                 i2c_bus = &dev->i2c_bus[0];
 674
 675                 fe0->dvb.frontend = dvb_attach(zl10353_attach,
 676                         &dvico_fusionhdtv_xc3028,
 677                         &i2c_bus->i2c_adap);
 678                 if (fe0->dvb.frontend != NULL) {
 679                         struct dvb_frontend      *fe;
 680                         struct xc2028_config      cfg = {
 681                                 .i2c_adap  = &dev->i2c_bus[1].i2c_adap,
 682                                 .i2c_addr  = 0x61,
 683                         };
 684                         static struct xc2028_ctrl ctl = {
 685                                 .fname       = XC2028_DEFAULT_FIRMWARE,
 686                                 .max_len     = 64,
 687                                 .demod       = XC3028_FE_ZARLINK456,
 688                         };
 689
 690                         fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
 691                                 &cfg);
 692                         if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
 693                                 fe->ops.tuner_ops.set_config(fe, &ctl);
 694                 }
 695                 break;
 696         case CX23885_BOARD_TBS_6920:
 697                 i2c_bus = &dev->i2c_bus[0];
 698
 699                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
 700                         &tbs_cx24116_config,
 701                         &i2c_bus->i2c_adap);
 702                 if (fe0->dvb.frontend != NULL)
 703                         fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
 704
 705                 break;
 706         case CX23885_BOARD_TEVII_S470:
 707                 i2c_bus = &dev->i2c_bus[1];
 708
 709                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
 710                         &tevii_cx24116_config,
 711                         &i2c_bus->i2c_adap);
 712                 if (fe0->dvb.frontend != NULL)
 713                         fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
 714
 715                 break;
 716         case CX23885_BOARD_DVBWORLD_2005:
 717                 i2c_bus = &dev->i2c_bus[1];
 718
 719                 fe0->dvb.frontend = dvb_attach(cx24116_attach,
 720                         &dvbworld_cx24116_config,
 721                         &i2c_bus->i2c_adap);
 722                 break;
 723         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
 724                 i2c_bus = &dev->i2c_bus[0];
 725                 switch (port->nr) {
 726                 /* port B */
 727                 case 1:
 728                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
 729                                                         &netup_stv0900_config,
 730                                                         &i2c_bus->i2c_adap, 0);
 731                         if (fe0->dvb.frontend != NULL) {
 732                                 if (dvb_attach(stv6110_attach,
 733                                                 fe0->dvb.frontend,
 734                                                 &netup_stv6110_tunerconfig_a,
 735                                                 &i2c_bus->i2c_adap)) {
 736                                         if (!dvb_attach(lnbh24_attach,
 737                                                         fe0->dvb.frontend,
 738                                                         &i2c_bus->i2c_adap,
 739                                                         LNBH24_PCL, 0, 0x09))
 740                                                 printk(KERN_ERR
 741                                                         "No LNBH24 found!\n");
 742
 743                                 }
 744                         }
 745                         break;
 746                 /* port C */
 747                 case 2:
 748                         fe0->dvb.frontend = dvb_attach(stv0900_attach,
 749                                                         &netup_stv0900_config,
 750                                                         &i2c_bus->i2c_adap, 1);
 751                         if (fe0->dvb.frontend != NULL) {
 752                                 if (dvb_attach(stv6110_attach,
 753                                                 fe0->dvb.frontend,
 754                                                 &netup_stv6110_tunerconfig_b,
 755                                                 &i2c_bus->i2c_adap)) {
 756                                         if (!dvb_attach(lnbh24_attach,
 757                                                         fe0->dvb.frontend,
 758                                                         &i2c_bus->i2c_adap,
 759                                                         LNBH24_PCL, 0, 0x0a))
 760                                                 printk(KERN_ERR
 761                                                         "No LNBH24 found!\n");
 762
 763                                 }
 764                         }
 765                         break;
 766                 }
 767                 break;
 768         case CX23885_BOARD_MYGICA_X8506:
 769                 i2c_bus = &dev->i2c_bus[0];
 770                 i2c_bus2 = &dev->i2c_bus[1];
 771                 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
 772                         &mygica_x8506_lgs8gl5_config,
 773                         &i2c_bus->i2c_adap);
 774                 if (fe0->dvb.frontend != NULL) {
 775                         dvb_attach(xc5000_attach,
 776                                 fe0->dvb.frontend,
 777                                 &i2c_bus2->i2c_adap,
 778                                 &mygica_x8506_xc5000_config);
 779                 }
 780                 break;
 781         default:
 782                 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
 783                         " isn't supported yet\n",
 784                        dev->name);
 785                 break;
 786         }
 787         if (NULL == fe0->dvb.frontend) {
 788                 printk(KERN_ERR "%s: frontend initialization failed\n",
 789                         dev->name);
 790                 return -1;
 791         }
 792         /* define general-purpose callback pointer */
 793         fe0->dvb.frontend->callback = cx23885_tuner_callback;
 794
 795         /* Put the analog decoder in standby to keep it quiet */
 796         call_all(dev, tuner, s_standby);
 797
 798         if (fe0->dvb.frontend->ops.analog_ops.standby)
 799                 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
 800
 801         /* register everything */
 802         ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
 803                 &dev->pci->dev, adapter_nr, 0);
 804
 805         /* init CI & MAC */
 806         switch (dev->board) {
 807         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
 808                 static struct netup_card_info cinfo;
 809
 810                 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
 811                 memcpy(port->frontends.adapter.proposed_mac,
 812                                 cinfo.port[port->nr - 1].mac, 6);
 813                 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC="
 814                         "%02X:%02X:%02X:%02X:%02X:%02X\n",
 815                         port->nr,
 816                         port->frontends.adapter.proposed_mac[0],
 817                         port->frontends.adapter.proposed_mac[1],
 818                         port->frontends.adapter.proposed_mac[2],
 819                         port->frontends.adapter.proposed_mac[3],
 820                         port->frontends.adapter.proposed_mac[4],
 821                         port->frontends.adapter.proposed_mac[5]);
 822
 823                 netup_ci_init(port);
 824                 break;
 825                 }
 826         }
 827
 828         return ret;
 829 }
 830
 831 int cx23885_dvb_register(struct cx23885_tsport *port)
 832 {
 833
 834         struct videobuf_dvb_frontend *fe0;
 835         struct cx23885_dev *dev = port->dev;
 836         int err, i;
 837
 838         /* Here we need to allocate the correct number of frontends,
 839          * as reflected in the cards struct. The reality is that currrently
 840          * no cx23885 boards support this - yet. But, if we don't modify this
 841          * code then the second frontend would never be allocated (later)
 842          * and fail with error before the attach in dvb_register().
 843          * Without these changes we risk an OOPS later. The changes here
 844          * are for safety, and should provide a good foundation for the
 845          * future addition of any multi-frontend cx23885 based boards.
 846          */
 847         printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
 848                 port->num_frontends);
 849
 850         for (i = 1; i <= port->num_frontends; i++) {
 851                 if (videobuf_dvb_alloc_frontend(
 852                         &port->frontends, i) == NULL) {
 853                         printk(KERN_ERR "%s() failed to alloc\n", __func__);
 854                         return -ENOMEM;
 855                 }
 856
 857                 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
 858                 if (!fe0)
 859                         err = -EINVAL;
 860
 861                 dprintk(1, "%s\n", __func__);
 862                 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
 863                         dev->board,
 864                         dev->name,
 865                         dev->pci_bus,
 866                         dev->pci_slot);
 867
 868                 err = -ENODEV;
 869
 870                 /* dvb stuff */
 871                 /* We have to init the queue for each frontend on a port. */
 872                 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
 873                 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
 874                             &dev->pci->dev, &port->slock,
 875                             V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
 876                             sizeof(struct cx23885_buffer), port);
 877         }
 878         err = dvb_register(port);
 879         if (err != 0)
 880                 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
 881                         __func__, err);
 882
 883         return err;
 884 }
 885
 886 int cx23885_dvb_unregister(struct cx23885_tsport *port)
 887 {
 888         struct videobuf_dvb_frontend *fe0;
 889
 890         /* FIXME: in an error condition where the we have
 891          * an expected number of frontends (attach problem)
 892          * then this might not clean up correctly, if 1
 893          * is invalid.
 894          * This comment only applies to future boards IF they
 895          * implement MFE support.
 896          */
 897         fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
 898         if (fe0->dvb.frontend)
 899                 videobuf_dvb_unregister_bus(&port->frontends);
 900
 901         switch (port->dev->board) {
 902         case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
 903                 netup_ci_exit(port);
 904                 break;
 905         }
 906
 907         return 0;
 908 }
 909