Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux...
[linux-2.6] / arch / powerpc / boot / dts / stx_gp3_8560.dts
1 /*
2  * STX GP3 - 8560 ADS Device Tree Source
3  *
4  * Copyright 2008 Freescale Semiconductor Inc.
5  *
6  * This program is free software; you can redistribute  it and/or modify it
7  * under  the terms of  the GNU General  Public License as published by the
8  * Free Software Foundation;  either version 2 of the  License, or (at your
9  * option) any later version.
10  */
11
12 /dts-v1/;
13
14 / {
15         model = "stx,gp3";
16         compatible = "stx,gp3-8560", "stx,gp3";
17         #address-cells = <1>;
18         #size-cells = <1>;
19
20         aliases {
21                 ethernet0 = &enet0;
22                 ethernet1 = &enet1;
23                 serial0 = &serial0;
24                 pci0 = &pci0;
25         };
26
27         cpus {
28                 #address-cells = <1>;
29                 #size-cells = <0>;
30
31                 PowerPC,8560@0 {
32                         device_type = "cpu";
33                         reg = <0>;
34                         d-cache-line-size = <32>;
35                         i-cache-line-size = <32>;
36                         d-cache-size = <32768>;
37                         i-cache-size = <32768>;
38                         timebase-frequency = <0>;
39                         bus-frequency = <0>;
40                         clock-frequency = <0>;
41                         next-level-cache = <&L2>;
42                 };
43         };
44
45         memory {
46                 device_type = "memory";
47                 reg = <0x00000000 0x10000000>;
48         };
49
50         soc@fdf00000 {
51                 #address-cells = <1>;
52                 #size-cells = <1>;
53                 device_type = "soc";
54                 ranges = <0 0xfdf00000 0x100000>;
55                 reg = <0xfdf00000 0x1000>;
56                 bus-frequency = <0>;
57                 compatible = "fsl,mpc8560-immr", "simple-bus";
58
59                 memory-controller@2000 {
60                         compatible = "fsl,8540-memory-controller";
61                         reg = <0x2000 0x1000>;
62                         interrupt-parent = <&mpic>;
63                         interrupts = <18 2>;
64                 };
65
66                 L2: l2-cache-controller@20000 {
67                         compatible = "fsl,8540-l2-cache-controller";
68                         reg = <0x20000 0x1000>;
69                         cache-line-size = <32>;
70                         cache-size = <0x40000>; // L2, 256K
71                         interrupt-parent = <&mpic>;
72                         interrupts = <16 2>;
73                 };
74
75                 i2c@3000 {
76                         #address-cells = <1>;
77                         #size-cells = <0>;
78                         cell-index = <0>;
79                         compatible = "fsl-i2c";
80                         reg = <0x3000 0x100>;
81                         interrupts = <43 2>;
82                         interrupt-parent = <&mpic>;
83                         dfsrr;
84                 };
85
86                 dma@21300 {
87                         #address-cells = <1>;
88                         #size-cells = <1>;
89                         compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
90                         reg = <0x21300 0x4>;
91                         ranges = <0x0 0x21100 0x200>;
92                         cell-index = <0>;
93                         dma-channel@0 {
94                                 compatible = "fsl,mpc8560-dma-channel",
95                                                 "fsl,eloplus-dma-channel";
96                                 reg = <0x0 0x80>;
97                                 cell-index = <0>;
98                                 interrupt-parent = <&mpic>;
99                                 interrupts = <20 2>;
100                         };
101                         dma-channel@80 {
102                                 compatible = "fsl,mpc8560-dma-channel",
103                                                 "fsl,eloplus-dma-channel";
104                                 reg = <0x80 0x80>;
105                                 cell-index = <1>;
106                                 interrupt-parent = <&mpic>;
107                                 interrupts = <21 2>;
108                         };
109                         dma-channel@100 {
110                                 compatible = "fsl,mpc8560-dma-channel",
111                                                 "fsl,eloplus-dma-channel";
112                                 reg = <0x100 0x80>;
113                                 cell-index = <2>;
114                                 interrupt-parent = <&mpic>;
115                                 interrupts = <22 2>;
116                         };
117                         dma-channel@180 {
118                                 compatible = "fsl,mpc8560-dma-channel",
119                                                 "fsl,eloplus-dma-channel";
120                                 reg = <0x180 0x80>;
121                                 cell-index = <3>;
122                                 interrupt-parent = <&mpic>;
123                                 interrupts = <23 2>;
124                         };
125                 };
126
127                 mdio@24520 {
128                         #address-cells = <1>;
129                         #size-cells = <0>;
130                         compatible = "fsl,gianfar-mdio";
131                         reg = <0x24520 0x20>;
132
133                         phy2: ethernet-phy@2 {
134                                 interrupt-parent = <&mpic>;
135                                 interrupts = <5 4>;
136                                 reg = <2>;
137                                 device_type = "ethernet-phy";
138                         };
139                         phy4: ethernet-phy@4 {
140                                 interrupt-parent = <&mpic>;
141                                 interrupts = <5 4>;
142                                 reg = <4>;
143                                 device_type = "ethernet-phy";
144                         };
145                         tbi0: tbi-phy@11 {
146                                 reg = <0x11>;
147                                 device_type = "tbi-phy";
148                         };
149                 };
150
151                 mdio@25520 {
152                         #address-cells = <1>;
153                         #size-cells = <0>;
154                         compatible = "fsl,gianfar-tbi";
155                         reg = <0x25520 0x20>;
156
157                         tbi1: tbi-phy@11 {
158                                 reg = <0x11>;
159                                 device_type = "tbi-phy";
160                         };
161                 };
162
163                 enet0: ethernet@24000 {
164                         cell-index = <0>;
165                         device_type = "network";
166                         model = "TSEC";
167                         compatible = "gianfar";
168                         reg = <0x24000 0x1000>;
169                         local-mac-address = [ 00 00 00 00 00 00 ];
170                         interrupts = <29 2 30 2 34 2>;
171                         interrupt-parent = <&mpic>;
172                         tbi-handle = <&tbi0>;
173                         phy-handle = <&phy2>;
174                 };
175
176                 enet1: ethernet@25000 {
177                         cell-index = <1>;
178                         device_type = "network";
179                         model = "TSEC";
180                         compatible = "gianfar";
181                         reg = <0x25000 0x1000>;
182                         local-mac-address = [ 00 00 00 00 00 00 ];
183                         interrupts = <35 2 36 2 40 2>;
184                         interrupt-parent = <&mpic>;
185                         tbi-handle = <&tbi1>;
186                         phy-handle = <&phy4>;
187                 };
188
189                 mpic: pic@40000 {
190                         interrupt-controller;
191                         #address-cells = <0>;
192                         #interrupt-cells = <2>;
193                         reg = <0x40000 0x40000>;
194                         compatible = "chrp,open-pic";
195                         device_type = "open-pic";
196                 };
197
198                 cpm@919c0 {
199                         #address-cells = <1>;
200                         #size-cells = <1>;
201                         compatible = "fsl,mpc8560-cpm", "fsl,cpm2", "simple-bus";
202                         reg = <0x919c0 0x30>;
203                         ranges;
204
205                         muram@80000 {
206                                 #address-cells = <1>;
207                                 #size-cells = <1>;
208                                 ranges = <0 0x80000 0x10000>;
209
210                                 data@0 {
211                                         compatible = "fsl,cpm-muram-data";
212                                         reg = <0 0x4000 0x9000 0x2000>;
213                                 };
214                         };
215
216                         brg@919f0 {
217                                 compatible = "fsl,mpc8560-brg",
218                                              "fsl,cpm2-brg",
219                                              "fsl,cpm-brg";
220                                 reg = <0x919f0 0x10 0x915f0 0x10>;
221                                 clock-frequency = <0>;
222                         };
223
224                         cpmpic: pic@90c00 {
225                                 interrupt-controller;
226                                 #address-cells = <0>;
227                                 #interrupt-cells = <2>;
228                                 interrupts = <46 2>;
229                                 interrupt-parent = <&mpic>;
230                                 reg = <0x90c00 0x80>;
231                                 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
232                         };
233
234                         serial0: serial@91a20 {
235                                 device_type = "serial";
236                                 compatible = "fsl,mpc8560-scc-uart",
237                                              "fsl,cpm2-scc-uart";
238                                 reg = <0x91a20 0x20 0x88100 0x100>;
239                                 fsl,cpm-brg = <2>;
240                                 fsl,cpm-command = <0x4a00000>;
241                                 interrupts = <41 8>;
242                                 interrupt-parent = <&cpmpic>;
243                         };
244                 };
245         };
246
247         pci0: pci@fdf08000 {
248                 cell-index = <0>;
249                 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
250                 interrupt-map = <
251
252                         /* IDSEL 0x0c */
253                         0x6000 0 0 1 &mpic 1 1
254                         0x6000 0 0 2 &mpic 2 1
255                         0x6000 0 0 3 &mpic 3 1
256                         0x6000 0 0 4 &mpic 4 1
257
258                         /* IDSEL 0x0d */
259                         0x6800 0 0 1 &mpic 4 1
260                         0x6800 0 0 2 &mpic 1 1
261                         0x6800 0 0 3 &mpic 2 1
262                         0x6800 0 0 4 &mpic 3 1
263
264                         /* IDSEL 0x0e */
265                         0x7000 0 0 1 &mpic 3 1
266                         0x7000 0 0 2 &mpic 4 1
267                         0x7000 0 0 3 &mpic 1 1
268                         0x7000 0 0 4 &mpic 2 1
269
270                         /* IDSEL 0x0f */
271                         0x7800 0 0 1 &mpic 2 1
272                         0x7800 0 0 2 &mpic 3 1
273                         0x7800 0 0 3 &mpic 4 1
274                         0x7800 0 0 4 &mpic 1 1>;
275
276                 interrupt-parent = <&mpic>;
277                 interrupts = <24 2>;
278                 bus-range = <0 0>;
279                 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
280                           0x01000000 0 0x00000000 0xe2000000 0 0x00100000>;
281                 clock-frequency = <66666666>;
282                 #interrupt-cells = <1>;
283                 #size-cells = <2>;
284                 #address-cells = <3>;
285                 reg = <0xfdf08000 0x1000>;
286                 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
287                 device_type = "pci";
288         };
289 };