4 * Extracted from init.c
6 #include <linux/percpu.h>
7 #include <linux/init.h>
8 #include <linux/string.h>
9 #include <linux/slab.h>
10 #include <linux/cache.h>
13 #include <asm/tlbflush.h>
14 #include <asm/mmu_context.h>
17 DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
19 void __init paging_init(void)
21 memset(swapper_pg_dir, 0, PAGE_SIZE);
25 * Flush the mmu and reset associated register to default values.
27 void __init init_mmu(void)
29 /* Writing zeros to the <t>TLBCFG special registers ensure
30 * that valid values exist in the register. For existing
31 * PGSZID<w> fields, zero selects the first element of the
32 * page-size array. For nonexistent PGSZID<w> fields, zero is
33 * the best value to write. Also, when changing PGSZID<w>
34 * fields, the corresponding TLB must be flushed.
36 set_itlbcfg_register(0);
37 set_dtlbcfg_register(0);
40 /* Set rasid register to a known value. */
42 set_rasid_register(ASID_USER_FIRST);
44 /* Set PTEVADDR special register to the start of the page
45 * table, which is in kernel mappable space (ie. not
46 * statically mapped). This register's value is undefined on
49 set_ptevaddr_register(PGTABLE_START);
52 struct kmem_cache *pgtable_cache __read_mostly;
54 static void pgd_ctor(void *addr)
56 pte_t *ptep = (pte_t *)addr;
59 for (i = 0; i < 1024; i++, ptep++)
60 pte_clear(NULL, 0, ptep);
64 void __init pgtable_cache_init(void)
66 pgtable_cache = kmem_cache_create("pgd",