Merge master.kernel.org:/pub/scm/linux/kernel/git/wim/linux-2.6-watchdog
[linux-2.6] / drivers / serial / 8250_au1x00.c
1 /*
2  * Serial Device Initialisation for Au1x00
3  *
4  * (C) Copyright Embedded Alley Solutions, Inc 2005
5  * Author: Pantelis Antoniou <pantelis@embeddedalley.com>
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  */
12
13 #include <linux/errno.h>
14 #include <linux/init.h>
15 #include <linux/interrupt.h>
16 #include <linux/ioport.h>
17 #include <linux/module.h>
18 #include <linux/serial_core.h>
19 #include <linux/signal.h>
20 #include <linux/slab.h>
21 #include <linux/types.h>
22
23 #include <linux/serial_8250.h>
24
25 #include <asm/mach-au1x00/au1000.h>
26
27 #include "8250.h"
28
29 #define PORT(_base, _irq)                               \
30         {                                               \
31                 .iobase         = _base,                \
32                 .membase        = (void __iomem *)_base,\
33                 .mapbase        = _base,                \
34                 .irq            = _irq,                 \
35                 .uartclk        = 0,    /* filled */    \
36                 .regshift       = 2,                    \
37                 .iotype         = UPIO_AU,              \
38                 .flags          = UPF_SKIP_TEST |       \
39                                   UPF_IOREMAP,          \
40         }
41
42 static struct plat_serial8250_port au1x00_data[] = {
43 #if defined(CONFIG_SOC_AU1000)
44         PORT(UART0_ADDR, AU1000_UART0_INT),
45         PORT(UART1_ADDR, AU1000_UART1_INT),
46         PORT(UART2_ADDR, AU1000_UART2_INT),
47         PORT(UART3_ADDR, AU1000_UART3_INT),
48 #elif defined(CONFIG_SOC_AU1500)
49         PORT(UART0_ADDR, AU1500_UART0_INT),
50         PORT(UART3_ADDR, AU1500_UART3_INT),
51 #elif defined(CONFIG_SOC_AU1100)
52         PORT(UART0_ADDR, AU1100_UART0_INT),
53         PORT(UART1_ADDR, AU1100_UART1_INT),
54         /* The internal UART2 does not exist on the AU1100 processor. */
55         PORT(UART3_ADDR, AU1100_UART3_INT),
56 #elif defined(CONFIG_SOC_AU1550)
57         PORT(UART0_ADDR, AU1550_UART0_INT),
58         PORT(UART1_ADDR, AU1550_UART1_INT),
59         PORT(UART3_ADDR, AU1550_UART3_INT),
60 #elif defined(CONFIG_SOC_AU1200)
61         PORT(UART0_ADDR, AU1200_UART0_INT),
62         PORT(UART1_ADDR, AU1200_UART1_INT),
63 #endif
64         { },
65 };
66
67 static struct platform_device au1x00_device = {
68         .name                   = "serial8250",
69         .id                     = PLAT8250_DEV_AU1X00,
70         .dev                    = {
71                 .platform_data  = au1x00_data,
72         },
73 };
74
75 static int __init au1x00_init(void)
76 {
77         int i;
78         unsigned int uartclk;
79
80         /* get uart clock */
81         uartclk = get_au1x00_uart_baud_base() * 16;
82
83         /* fill up uartclk */
84         for (i = 0; au1x00_data[i].flags ; i++)
85                 au1x00_data[i].uartclk = uartclk;
86
87         return platform_device_register(&au1x00_device);
88 }
89
90 /* XXX: Yes, I know this doesn't yet work. */
91 static void __exit au1x00_exit(void)
92 {
93         platform_device_unregister(&au1x00_device);
94 }
95
96 module_init(au1x00_init);
97 module_exit(au1x00_exit);
98
99 MODULE_AUTHOR("Pantelis Antoniou <pantelis@embeddedalley.com>");
100 MODULE_DESCRIPTION("8250 serial probe module for Au1x000 cards");
101 MODULE_LICENSE("GPL");