2 * linux/arch/arm/mach-pxa/generic.c
4 * Author: Nicolas Pitre
5 * Created: Jun 15, 2001
6 * Copyright: MontaVista Software Inc.
8 * Code common to all PXA machines.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
14 * Since this file should be linked before any other machine specific file,
15 * the __initcall() here will be executed first. This serves as default
16 * initialization stuff for PXA machines which can be overridden later if
19 #include <linux/module.h>
20 #include <linux/kernel.h>
21 #include <linux/init.h>
22 #include <linux/delay.h>
23 #include <linux/platform_device.h>
24 #include <linux/ioport.h>
26 #include <linux/string.h>
28 #include <linux/sched.h>
29 #include <asm/cnt32_to_63.h>
30 #include <asm/div64.h>
32 #include <asm/hardware.h>
34 #include <asm/system.h>
35 #include <asm/pgtable.h>
36 #include <asm/mach/map.h>
38 #include <asm/arch/pxa-regs.h>
39 #include <asm/arch/udc.h>
40 #include <asm/arch/pxafb.h>
41 #include <asm/arch/mmc.h>
42 #include <asm/arch/irda.h>
43 #include <asm/arch/i2c.h>
48 * This is the PXA2xx sched_clock implementation. This has a resolution
49 * of at least 308ns and a maximum value that depends on the value of
52 * The return value is guaranteed to be monotonic in that range as
53 * long as there is always less than 582 seconds between successive
54 * calls to this function.
56 unsigned long long sched_clock(void)
58 unsigned long long v = cnt32_to_63(OSCR);
59 /* Note: top bit ov v needs cleared unless multiplier is even. */
61 #if CLOCK_TICK_RATE == 3686400
62 /* 1E9 / 3686400 => 78125 / 288, max value = 32025597s (370 days). */
63 /* The <<1 is used to get rid of tick.hi top bit */
66 #elif CLOCK_TICK_RATE == 3250000
67 /* 1E9 / 3250000 => 4000 / 13, max value = 709490156s (8211 days) */
70 #elif CLOCK_TICK_RATE == 3249600
71 /* 1E9 / 3249600 => 625000 / 2031, max value = 4541295s (52 days) */
75 #warning "consider fixing sched_clock for your value of CLOCK_TICK_RATE"
77 * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
78 * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
79 * years range and truncation to unsigned long long limits it to
80 * sched_clock's max range of ~584 years. This is nice but with
81 * higher computation cost.
85 unsigned long long val;
86 struct { unsigned long lo, hi; };
92 y = (unsigned long long)x.lo * NSEC_PER_SEC;
94 y = (y >> 32) + (unsigned long long)x.hi * NSEC_PER_SEC;
95 x.hi = do_div(y, CLOCK_TICK_RATE);
96 do_div(x.val, CLOCK_TICK_RATE);
106 * Handy function to set GPIO alternate functions
109 void pxa_gpio_mode(int gpio_mode)
112 int gpio = gpio_mode & GPIO_MD_MASK_NR;
113 int fn = (gpio_mode & GPIO_MD_MASK_FN) >> 8;
116 local_irq_save(flags);
117 if (gpio_mode & GPIO_DFLT_LOW)
118 GPCR(gpio) = GPIO_bit(gpio);
119 else if (gpio_mode & GPIO_DFLT_HIGH)
120 GPSR(gpio) = GPIO_bit(gpio);
121 if (gpio_mode & GPIO_MD_MASK_DIR)
122 GPDR(gpio) |= GPIO_bit(gpio);
124 GPDR(gpio) &= ~GPIO_bit(gpio);
125 gafr = GAFR(gpio) & ~(0x3 << (((gpio) & 0xf)*2));
126 GAFR(gpio) = gafr | (fn << (((gpio) & 0xf)*2));
127 local_irq_restore(flags);
130 EXPORT_SYMBOL(pxa_gpio_mode);
133 * Routine to safely enable or disable a clock in the CKEN
135 void pxa_set_cken(int clock, int enable)
138 local_irq_save(flags);
145 local_irq_restore(flags);
148 EXPORT_SYMBOL(pxa_set_cken);
151 * Intel PXA2xx internal register mapping.
153 * Note 1: not all PXA2xx variants implement all those addresses.
155 * Note 2: virtual 0xfffe0000-0xffffffff is reserved for the vector table
156 * and cache flush area.
158 static struct map_desc standard_io_desc[] __initdata = {
160 .virtual = 0xf2000000,
161 .pfn = __phys_to_pfn(0x40000000),
162 .length = 0x02000000,
165 .virtual = 0xf4000000,
166 .pfn = __phys_to_pfn(0x44000000),
167 .length = 0x00100000,
170 .virtual = 0xf6000000,
171 .pfn = __phys_to_pfn(0x48000000),
172 .length = 0x00100000,
175 .virtual = 0xf8000000,
176 .pfn = __phys_to_pfn(0x4c000000),
177 .length = 0x00100000,
180 .virtual = 0xfa000000,
181 .pfn = __phys_to_pfn(0x50000000),
182 .length = 0x00100000,
185 .virtual = 0xfe000000,
186 .pfn = __phys_to_pfn(0x58000000),
187 .length = 0x00100000,
189 }, { /* UNCACHED_PHYS_0 */
190 .virtual = 0xff000000,
191 .pfn = __phys_to_pfn(0x00000000),
192 .length = 0x00100000,
197 void __init pxa_map_io(void)
199 iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
200 get_clk_frequency_khz(1);
204 static struct resource pxamci_resources[] = {
208 .flags = IORESOURCE_MEM,
213 .flags = IORESOURCE_IRQ,
217 static u64 pxamci_dmamask = 0xffffffffUL;
219 static struct platform_device pxamci_device = {
220 .name = "pxa2xx-mci",
223 .dma_mask = &pxamci_dmamask,
224 .coherent_dma_mask = 0xffffffff,
226 .num_resources = ARRAY_SIZE(pxamci_resources),
227 .resource = pxamci_resources,
230 void __init pxa_set_mci_info(struct pxamci_platform_data *info)
232 pxamci_device.dev.platform_data = info;
236 static struct pxa2xx_udc_mach_info pxa_udc_info;
238 void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
240 memcpy(&pxa_udc_info, info, sizeof *info);
243 static struct resource pxa2xx_udc_resources[] = {
247 .flags = IORESOURCE_MEM,
252 .flags = IORESOURCE_IRQ,
256 static u64 udc_dma_mask = ~(u32)0;
258 static struct platform_device udc_device = {
259 .name = "pxa2xx-udc",
261 .resource = pxa2xx_udc_resources,
262 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
264 .platform_data = &pxa_udc_info,
265 .dma_mask = &udc_dma_mask,
269 static struct resource pxafb_resources[] = {
273 .flags = IORESOURCE_MEM,
278 .flags = IORESOURCE_IRQ,
282 static u64 fb_dma_mask = ~(u64)0;
284 static struct platform_device pxafb_device = {
288 .dma_mask = &fb_dma_mask,
289 .coherent_dma_mask = 0xffffffff,
291 .num_resources = ARRAY_SIZE(pxafb_resources),
292 .resource = pxafb_resources,
295 void __init set_pxa_fb_info(struct pxafb_mach_info *info)
297 pxafb_device.dev.platform_data = info;
300 void __init set_pxa_fb_parent(struct device *parent_dev)
302 pxafb_device.dev.parent = parent_dev;
305 static struct platform_device ffuart_device = {
306 .name = "pxa2xx-uart",
309 static struct platform_device btuart_device = {
310 .name = "pxa2xx-uart",
313 static struct platform_device stuart_device = {
314 .name = "pxa2xx-uart",
317 static struct platform_device hwuart_device = {
318 .name = "pxa2xx-uart",
322 static struct resource i2c_resources[] = {
326 .flags = IORESOURCE_MEM,
330 .flags = IORESOURCE_IRQ,
334 static struct platform_device i2c_device = {
335 .name = "pxa2xx-i2c",
337 .resource = i2c_resources,
338 .num_resources = ARRAY_SIZE(i2c_resources),
342 static struct resource i2c_power_resources[] = {
346 .flags = IORESOURCE_MEM,
350 .flags = IORESOURCE_IRQ,
354 static struct platform_device i2c_power_device = {
355 .name = "pxa2xx-i2c",
357 .resource = i2c_power_resources,
358 .num_resources = ARRAY_SIZE(i2c_resources),
362 void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
364 i2c_device.dev.platform_data = info;
367 static struct resource i2s_resources[] = {
371 .flags = IORESOURCE_MEM,
375 .flags = IORESOURCE_IRQ,
379 static struct platform_device i2s_device = {
380 .name = "pxa2xx-i2s",
382 .resource = i2s_resources,
383 .num_resources = ARRAY_SIZE(i2s_resources),
386 static u64 pxaficp_dmamask = ~(u32)0;
388 static struct platform_device pxaficp_device = {
392 .dma_mask = &pxaficp_dmamask,
393 .coherent_dma_mask = 0xffffffff,
397 void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
399 pxaficp_device.dev.platform_data = info;
402 static struct platform_device pxartc_device = {
403 .name = "sa1100-rtc",
407 static struct platform_device *devices[] __initdata = {
423 static int __init pxa_init(void)
427 ret = platform_add_devices(devices, ARRAY_SIZE(devices));
431 /* Only add HWUART for PXA255/26x; PXA210/250/27x do not have it. */
432 cpuid = read_cpuid(CPUID_ID);
433 if (((cpuid >> 4) & 0xfff) == 0x2d0 ||
434 ((cpuid >> 4) & 0xfff) == 0x290)
435 ret = platform_device_register(&hwuart_device);
440 subsys_initcall(pxa_init);