2 * Kernel-based Virtual Machine driver for Linux
4 * derived from drivers/kvm/kvm_main.c
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
21 #include <linux/kvm_host.h>
26 #include "kvm_cache_regs.h"
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
41 #include <asm/uaccess.h>
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "irq_exits", VCPU_STAT(irq_exits) },
95 { "host_state_reload", VCPU_STAT(host_state_reload) },
96 { "efer_reload", VCPU_STAT(efer_reload) },
97 { "fpu_reload", VCPU_STAT(fpu_reload) },
98 { "insn_emulation", VCPU_STAT(insn_emulation) },
99 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
100 { "irq_injections", VCPU_STAT(irq_injections) },
101 { "nmi_injections", VCPU_STAT(nmi_injections) },
102 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
103 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
104 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
105 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
106 { "mmu_flooded", VM_STAT(mmu_flooded) },
107 { "mmu_recycled", VM_STAT(mmu_recycled) },
108 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
109 { "mmu_unsync", VM_STAT(mmu_unsync) },
110 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
111 { "largepages", VM_STAT(lpages) },
115 unsigned long segment_base(u16 selector)
117 struct descriptor_table gdt;
118 struct desc_struct *d;
119 unsigned long table_base;
125 asm("sgdt %0" : "=m"(gdt));
126 table_base = gdt.base;
128 if (selector & 4) { /* from ldt */
131 asm("sldt %0" : "=g"(ldt_selector));
132 table_base = segment_base(ldt_selector);
134 d = (struct desc_struct *)(table_base + (selector & ~7));
135 v = d->base0 | ((unsigned long)d->base1 << 16) |
136 ((unsigned long)d->base2 << 24);
138 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
139 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
143 EXPORT_SYMBOL_GPL(segment_base);
145 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
147 if (irqchip_in_kernel(vcpu->kvm))
148 return vcpu->arch.apic_base;
150 return vcpu->arch.apic_base;
152 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
154 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
156 /* TODO: reserve bits check */
157 if (irqchip_in_kernel(vcpu->kvm))
158 kvm_lapic_set_base(vcpu, data);
160 vcpu->arch.apic_base = data;
162 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
164 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
166 WARN_ON(vcpu->arch.exception.pending);
167 vcpu->arch.exception.pending = true;
168 vcpu->arch.exception.has_error_code = false;
169 vcpu->arch.exception.nr = nr;
171 EXPORT_SYMBOL_GPL(kvm_queue_exception);
173 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
176 ++vcpu->stat.pf_guest;
178 if (vcpu->arch.exception.pending) {
179 if (vcpu->arch.exception.nr == PF_VECTOR) {
180 printk(KERN_DEBUG "kvm: inject_page_fault:"
181 " double fault 0x%lx\n", addr);
182 vcpu->arch.exception.nr = DF_VECTOR;
183 vcpu->arch.exception.error_code = 0;
184 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
185 /* triple fault -> shutdown */
186 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
190 vcpu->arch.cr2 = addr;
191 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
194 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
196 vcpu->arch.nmi_pending = 1;
198 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
200 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
202 WARN_ON(vcpu->arch.exception.pending);
203 vcpu->arch.exception.pending = true;
204 vcpu->arch.exception.has_error_code = true;
205 vcpu->arch.exception.nr = nr;
206 vcpu->arch.exception.error_code = error_code;
208 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
210 static void __queue_exception(struct kvm_vcpu *vcpu)
212 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
213 vcpu->arch.exception.has_error_code,
214 vcpu->arch.exception.error_code);
218 * Load the pae pdptrs. Return true is they are all valid.
220 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
222 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
223 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
226 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
228 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
229 offset * sizeof(u64), sizeof(pdpte));
234 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
235 if (is_present_pte(pdpte[i]) &&
236 (pdpte[i] & vcpu->arch.mmu.rsvd_bits_mask[0][2])) {
243 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
248 EXPORT_SYMBOL_GPL(load_pdptrs);
250 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
252 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
256 if (is_long_mode(vcpu) || !is_pae(vcpu))
259 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
262 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
268 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
270 if (cr0 & CR0_RESERVED_BITS) {
271 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
272 cr0, vcpu->arch.cr0);
273 kvm_inject_gp(vcpu, 0);
277 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
278 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
279 kvm_inject_gp(vcpu, 0);
283 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
284 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
285 "and a clear PE flag\n");
286 kvm_inject_gp(vcpu, 0);
290 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
292 if ((vcpu->arch.shadow_efer & EFER_LME)) {
296 printk(KERN_DEBUG "set_cr0: #GP, start paging "
297 "in long mode while PAE is disabled\n");
298 kvm_inject_gp(vcpu, 0);
301 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
303 printk(KERN_DEBUG "set_cr0: #GP, start paging "
304 "in long mode while CS.L == 1\n");
305 kvm_inject_gp(vcpu, 0);
311 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
312 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
314 kvm_inject_gp(vcpu, 0);
320 kvm_x86_ops->set_cr0(vcpu, cr0);
321 vcpu->arch.cr0 = cr0;
323 kvm_mmu_reset_context(vcpu);
326 EXPORT_SYMBOL_GPL(kvm_set_cr0);
328 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
330 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
331 KVMTRACE_1D(LMSW, vcpu,
332 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
335 EXPORT_SYMBOL_GPL(kvm_lmsw);
337 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
339 unsigned long old_cr4 = vcpu->arch.cr4;
340 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
342 if (cr4 & CR4_RESERVED_BITS) {
343 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
344 kvm_inject_gp(vcpu, 0);
348 if (is_long_mode(vcpu)) {
349 if (!(cr4 & X86_CR4_PAE)) {
350 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
352 kvm_inject_gp(vcpu, 0);
355 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
356 && ((cr4 ^ old_cr4) & pdptr_bits)
357 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
358 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
359 kvm_inject_gp(vcpu, 0);
363 if (cr4 & X86_CR4_VMXE) {
364 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
365 kvm_inject_gp(vcpu, 0);
368 kvm_x86_ops->set_cr4(vcpu, cr4);
369 vcpu->arch.cr4 = cr4;
370 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
371 kvm_mmu_reset_context(vcpu);
373 EXPORT_SYMBOL_GPL(kvm_set_cr4);
375 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
377 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
378 kvm_mmu_sync_roots(vcpu);
379 kvm_mmu_flush_tlb(vcpu);
383 if (is_long_mode(vcpu)) {
384 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
385 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
386 kvm_inject_gp(vcpu, 0);
391 if (cr3 & CR3_PAE_RESERVED_BITS) {
393 "set_cr3: #GP, reserved bits\n");
394 kvm_inject_gp(vcpu, 0);
397 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
398 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
400 kvm_inject_gp(vcpu, 0);
405 * We don't check reserved bits in nonpae mode, because
406 * this isn't enforced, and VMware depends on this.
411 * Does the new cr3 value map to physical memory? (Note, we
412 * catch an invalid cr3 even in real-mode, because it would
413 * cause trouble later on when we turn on paging anyway.)
415 * A real CPU would silently accept an invalid cr3 and would
416 * attempt to use it - with largely undefined (and often hard
417 * to debug) behavior on the guest side.
419 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
420 kvm_inject_gp(vcpu, 0);
422 vcpu->arch.cr3 = cr3;
423 vcpu->arch.mmu.new_cr3(vcpu);
426 EXPORT_SYMBOL_GPL(kvm_set_cr3);
428 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
430 if (cr8 & CR8_RESERVED_BITS) {
431 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
432 kvm_inject_gp(vcpu, 0);
435 if (irqchip_in_kernel(vcpu->kvm))
436 kvm_lapic_set_tpr(vcpu, cr8);
438 vcpu->arch.cr8 = cr8;
440 EXPORT_SYMBOL_GPL(kvm_set_cr8);
442 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
444 if (irqchip_in_kernel(vcpu->kvm))
445 return kvm_lapic_get_cr8(vcpu);
447 return vcpu->arch.cr8;
449 EXPORT_SYMBOL_GPL(kvm_get_cr8);
451 static inline u32 bit(int bitno)
453 return 1 << (bitno & 31);
457 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
458 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
460 * This list is modified at module load time to reflect the
461 * capabilities of the host cpu.
463 static u32 msrs_to_save[] = {
464 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
467 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
469 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
470 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
473 static unsigned num_msrs_to_save;
475 static u32 emulated_msrs[] = {
476 MSR_IA32_MISC_ENABLE,
479 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
481 if (efer & efer_reserved_bits) {
482 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
484 kvm_inject_gp(vcpu, 0);
489 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
490 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
491 kvm_inject_gp(vcpu, 0);
495 if (efer & EFER_FFXSR) {
496 struct kvm_cpuid_entry2 *feat;
498 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
499 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
500 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
501 kvm_inject_gp(vcpu, 0);
506 if (efer & EFER_SVME) {
507 struct kvm_cpuid_entry2 *feat;
509 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
510 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
511 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
512 kvm_inject_gp(vcpu, 0);
517 kvm_x86_ops->set_efer(vcpu, efer);
520 efer |= vcpu->arch.shadow_efer & EFER_LMA;
522 vcpu->arch.shadow_efer = efer;
524 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
525 kvm_mmu_reset_context(vcpu);
528 void kvm_enable_efer_bits(u64 mask)
530 efer_reserved_bits &= ~mask;
532 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
536 * Writes msr value into into the appropriate "register".
537 * Returns 0 on success, non-0 otherwise.
538 * Assumes vcpu_load() was already called.
540 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
542 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
546 * Adapt set_msr() to msr_io()'s calling convention
548 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
550 return kvm_set_msr(vcpu, index, *data);
553 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
556 struct pvclock_wall_clock wc;
557 struct timespec now, sys, boot;
564 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
567 * The guest calculates current wall clock time by adding
568 * system time (updated by kvm_write_guest_time below) to the
569 * wall clock specified here. guest system time equals host
570 * system time for us, thus we must fill in host boot time here.
572 now = current_kernel_time();
574 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
576 wc.sec = boot.tv_sec;
577 wc.nsec = boot.tv_nsec;
578 wc.version = version;
580 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
583 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
586 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
588 uint32_t quotient, remainder;
590 /* Don't try to replace with do_div(), this one calculates
591 * "(dividend << 32) / divisor" */
593 : "=a" (quotient), "=d" (remainder)
594 : "0" (0), "1" (dividend), "r" (divisor) );
598 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
600 uint64_t nsecs = 1000000000LL;
605 tps64 = tsc_khz * 1000LL;
606 while (tps64 > nsecs*2) {
611 tps32 = (uint32_t)tps64;
612 while (tps32 <= (uint32_t)nsecs) {
617 hv_clock->tsc_shift = shift;
618 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
620 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
621 __func__, tsc_khz, hv_clock->tsc_shift,
622 hv_clock->tsc_to_system_mul);
625 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
627 static void kvm_write_guest_time(struct kvm_vcpu *v)
631 struct kvm_vcpu_arch *vcpu = &v->arch;
633 unsigned long this_tsc_khz;
635 if ((!vcpu->time_page))
638 this_tsc_khz = get_cpu_var(cpu_tsc_khz);
639 if (unlikely(vcpu->hv_clock_tsc_khz != this_tsc_khz)) {
640 kvm_set_time_scale(this_tsc_khz, &vcpu->hv_clock);
641 vcpu->hv_clock_tsc_khz = this_tsc_khz;
643 put_cpu_var(cpu_tsc_khz);
645 /* Keep irq disabled to prevent changes to the clock */
646 local_irq_save(flags);
647 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
648 &vcpu->hv_clock.tsc_timestamp);
650 local_irq_restore(flags);
652 /* With all the info we got, fill in the values */
654 vcpu->hv_clock.system_time = ts.tv_nsec +
655 (NSEC_PER_SEC * (u64)ts.tv_sec);
657 * The interface expects us to write an even number signaling that the
658 * update is finished. Since the guest won't see the intermediate
659 * state, we just increase by 2 at the end.
661 vcpu->hv_clock.version += 2;
663 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
665 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
666 sizeof(vcpu->hv_clock));
668 kunmap_atomic(shared_kaddr, KM_USER0);
670 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
673 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
675 struct kvm_vcpu_arch *vcpu = &v->arch;
677 if (!vcpu->time_page)
679 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
683 static bool msr_mtrr_valid(unsigned msr)
686 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
687 case MSR_MTRRfix64K_00000:
688 case MSR_MTRRfix16K_80000:
689 case MSR_MTRRfix16K_A0000:
690 case MSR_MTRRfix4K_C0000:
691 case MSR_MTRRfix4K_C8000:
692 case MSR_MTRRfix4K_D0000:
693 case MSR_MTRRfix4K_D8000:
694 case MSR_MTRRfix4K_E0000:
695 case MSR_MTRRfix4K_E8000:
696 case MSR_MTRRfix4K_F0000:
697 case MSR_MTRRfix4K_F8000:
698 case MSR_MTRRdefType:
699 case MSR_IA32_CR_PAT:
707 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
709 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
711 if (!msr_mtrr_valid(msr))
714 if (msr == MSR_MTRRdefType) {
715 vcpu->arch.mtrr_state.def_type = data;
716 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
717 } else if (msr == MSR_MTRRfix64K_00000)
719 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
720 p[1 + msr - MSR_MTRRfix16K_80000] = data;
721 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
722 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
723 else if (msr == MSR_IA32_CR_PAT)
724 vcpu->arch.pat = data;
725 else { /* Variable MTRRs */
726 int idx, is_mtrr_mask;
729 idx = (msr - 0x200) / 2;
730 is_mtrr_mask = msr - 0x200 - 2 * idx;
733 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
736 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
740 kvm_mmu_reset_context(vcpu);
744 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
748 set_efer(vcpu, data);
750 case MSR_IA32_MC0_STATUS:
751 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
754 case MSR_IA32_MCG_STATUS:
755 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
758 case MSR_IA32_MCG_CTL:
759 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
762 case MSR_IA32_DEBUGCTLMSR:
764 /* We support the non-activated case already */
766 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
767 /* Values other than LBR and BTF are vendor-specific,
768 thus reserved and should throw a #GP */
771 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
774 case MSR_IA32_UCODE_REV:
775 case MSR_IA32_UCODE_WRITE:
776 case MSR_VM_HSAVE_PA:
778 case 0x200 ... 0x2ff:
779 return set_msr_mtrr(vcpu, msr, data);
780 case MSR_IA32_APICBASE:
781 kvm_set_apic_base(vcpu, data);
783 case MSR_IA32_MISC_ENABLE:
784 vcpu->arch.ia32_misc_enable_msr = data;
786 case MSR_KVM_WALL_CLOCK:
787 vcpu->kvm->arch.wall_clock = data;
788 kvm_write_wall_clock(vcpu->kvm, data);
790 case MSR_KVM_SYSTEM_TIME: {
791 if (vcpu->arch.time_page) {
792 kvm_release_page_dirty(vcpu->arch.time_page);
793 vcpu->arch.time_page = NULL;
796 vcpu->arch.time = data;
798 /* we verify if the enable bit is set... */
802 /* ...but clean it before doing the actual write */
803 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
805 vcpu->arch.time_page =
806 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
808 if (is_error_page(vcpu->arch.time_page)) {
809 kvm_release_page_clean(vcpu->arch.time_page);
810 vcpu->arch.time_page = NULL;
813 kvm_request_guest_time_update(vcpu);
817 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
822 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
826 * Reads an msr value (of 'msr_index') into 'pdata'.
827 * Returns 0 on success, non-0 otherwise.
828 * Assumes vcpu_load() was already called.
830 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
832 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
835 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
837 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
839 if (!msr_mtrr_valid(msr))
842 if (msr == MSR_MTRRdefType)
843 *pdata = vcpu->arch.mtrr_state.def_type +
844 (vcpu->arch.mtrr_state.enabled << 10);
845 else if (msr == MSR_MTRRfix64K_00000)
847 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
848 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
849 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
850 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
851 else if (msr == MSR_IA32_CR_PAT)
852 *pdata = vcpu->arch.pat;
853 else { /* Variable MTRRs */
854 int idx, is_mtrr_mask;
857 idx = (msr - 0x200) / 2;
858 is_mtrr_mask = msr - 0x200 - 2 * idx;
861 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
864 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
871 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
876 case 0xc0010010: /* SYSCFG */
877 case 0xc0010015: /* HWCR */
878 case MSR_IA32_PLATFORM_ID:
879 case MSR_IA32_P5_MC_ADDR:
880 case MSR_IA32_P5_MC_TYPE:
881 case MSR_IA32_MC0_CTL:
882 case MSR_IA32_MCG_STATUS:
883 case MSR_IA32_MCG_CAP:
884 case MSR_IA32_MCG_CTL:
885 case MSR_IA32_MC0_MISC:
886 case MSR_IA32_MC0_MISC+4:
887 case MSR_IA32_MC0_MISC+8:
888 case MSR_IA32_MC0_MISC+12:
889 case MSR_IA32_MC0_MISC+16:
890 case MSR_IA32_MC0_MISC+20:
891 case MSR_IA32_UCODE_REV:
892 case MSR_IA32_EBL_CR_POWERON:
893 case MSR_IA32_DEBUGCTLMSR:
894 case MSR_IA32_LASTBRANCHFROMIP:
895 case MSR_IA32_LASTBRANCHTOIP:
896 case MSR_IA32_LASTINTFROMIP:
897 case MSR_IA32_LASTINTTOIP:
898 case MSR_VM_HSAVE_PA:
899 case MSR_P6_EVNTSEL0:
900 case MSR_P6_EVNTSEL1:
904 data = 0x500 | KVM_NR_VAR_MTRR;
906 case 0x200 ... 0x2ff:
907 return get_msr_mtrr(vcpu, msr, pdata);
908 case 0xcd: /* fsb frequency */
911 case MSR_IA32_APICBASE:
912 data = kvm_get_apic_base(vcpu);
914 case MSR_IA32_MISC_ENABLE:
915 data = vcpu->arch.ia32_misc_enable_msr;
917 case MSR_IA32_PERF_STATUS:
918 /* TSC increment by tick */
921 data |= (((uint64_t)4ULL) << 40);
924 data = vcpu->arch.shadow_efer;
926 case MSR_KVM_WALL_CLOCK:
927 data = vcpu->kvm->arch.wall_clock;
929 case MSR_KVM_SYSTEM_TIME:
930 data = vcpu->arch.time;
933 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
939 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
942 * Read or write a bunch of msrs. All parameters are kernel addresses.
944 * @return number of msrs set successfully.
946 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
947 struct kvm_msr_entry *entries,
948 int (*do_msr)(struct kvm_vcpu *vcpu,
949 unsigned index, u64 *data))
955 down_read(&vcpu->kvm->slots_lock);
956 for (i = 0; i < msrs->nmsrs; ++i)
957 if (do_msr(vcpu, entries[i].index, &entries[i].data))
959 up_read(&vcpu->kvm->slots_lock);
967 * Read or write a bunch of msrs. Parameters are user addresses.
969 * @return number of msrs set successfully.
971 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
972 int (*do_msr)(struct kvm_vcpu *vcpu,
973 unsigned index, u64 *data),
976 struct kvm_msrs msrs;
977 struct kvm_msr_entry *entries;
982 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
986 if (msrs.nmsrs >= MAX_IO_MSRS)
990 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
991 entries = vmalloc(size);
996 if (copy_from_user(entries, user_msrs->entries, size))
999 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1004 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1015 int kvm_dev_ioctl_check_extension(long ext)
1020 case KVM_CAP_IRQCHIP:
1022 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1023 case KVM_CAP_SET_TSS_ADDR:
1024 case KVM_CAP_EXT_CPUID:
1025 case KVM_CAP_CLOCKSOURCE:
1027 case KVM_CAP_NOP_IO_DELAY:
1028 case KVM_CAP_MP_STATE:
1029 case KVM_CAP_SYNC_MMU:
1030 case KVM_CAP_REINJECT_CONTROL:
1031 case KVM_CAP_IRQ_INJECT_STATUS:
1032 case KVM_CAP_ASSIGN_DEV_IRQ:
1035 case KVM_CAP_COALESCED_MMIO:
1036 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1039 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1041 case KVM_CAP_NR_VCPUS:
1044 case KVM_CAP_NR_MEMSLOTS:
1045 r = KVM_MEMORY_SLOTS;
1047 case KVM_CAP_PV_MMU:
1061 long kvm_arch_dev_ioctl(struct file *filp,
1062 unsigned int ioctl, unsigned long arg)
1064 void __user *argp = (void __user *)arg;
1068 case KVM_GET_MSR_INDEX_LIST: {
1069 struct kvm_msr_list __user *user_msr_list = argp;
1070 struct kvm_msr_list msr_list;
1074 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1077 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1078 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1081 if (n < num_msrs_to_save)
1084 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1085 num_msrs_to_save * sizeof(u32)))
1087 if (copy_to_user(user_msr_list->indices
1088 + num_msrs_to_save * sizeof(u32),
1090 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1095 case KVM_GET_SUPPORTED_CPUID: {
1096 struct kvm_cpuid2 __user *cpuid_arg = argp;
1097 struct kvm_cpuid2 cpuid;
1100 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1102 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1103 cpuid_arg->entries);
1108 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1120 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1122 kvm_x86_ops->vcpu_load(vcpu, cpu);
1123 kvm_request_guest_time_update(vcpu);
1126 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1128 kvm_x86_ops->vcpu_put(vcpu);
1129 kvm_put_guest_fpu(vcpu);
1132 static int is_efer_nx(void)
1134 unsigned long long efer = 0;
1136 rdmsrl_safe(MSR_EFER, &efer);
1137 return efer & EFER_NX;
1140 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1143 struct kvm_cpuid_entry2 *e, *entry;
1146 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1147 e = &vcpu->arch.cpuid_entries[i];
1148 if (e->function == 0x80000001) {
1153 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1154 entry->edx &= ~(1 << 20);
1155 printk(KERN_INFO "kvm: guest NX capability removed\n");
1159 /* when an old userspace process fills a new kernel module */
1160 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1161 struct kvm_cpuid *cpuid,
1162 struct kvm_cpuid_entry __user *entries)
1165 struct kvm_cpuid_entry *cpuid_entries;
1168 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1171 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1175 if (copy_from_user(cpuid_entries, entries,
1176 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1178 for (i = 0; i < cpuid->nent; i++) {
1179 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1180 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1181 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1182 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1183 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1184 vcpu->arch.cpuid_entries[i].index = 0;
1185 vcpu->arch.cpuid_entries[i].flags = 0;
1186 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1187 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1188 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1190 vcpu->arch.cpuid_nent = cpuid->nent;
1191 cpuid_fix_nx_cap(vcpu);
1195 vfree(cpuid_entries);
1200 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1201 struct kvm_cpuid2 *cpuid,
1202 struct kvm_cpuid_entry2 __user *entries)
1207 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1210 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1211 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1213 vcpu->arch.cpuid_nent = cpuid->nent;
1220 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1221 struct kvm_cpuid2 *cpuid,
1222 struct kvm_cpuid_entry2 __user *entries)
1227 if (cpuid->nent < vcpu->arch.cpuid_nent)
1230 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1231 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1236 cpuid->nent = vcpu->arch.cpuid_nent;
1240 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1243 entry->function = function;
1244 entry->index = index;
1245 cpuid_count(entry->function, entry->index,
1246 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1250 #define F(x) bit(X86_FEATURE_##x)
1252 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1253 u32 index, int *nent, int maxnent)
1255 unsigned f_nx = is_efer_nx() ? F(NX) : 0;
1256 #ifdef CONFIG_X86_64
1257 unsigned f_lm = F(LM);
1263 const u32 kvm_supported_word0_x86_features =
1264 F(FPU) | F(VME) | F(DE) | F(PSE) |
1265 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1266 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SEP) |
1267 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1268 F(PAT) | F(PSE36) | 0 /* PSN */ | F(CLFLSH) |
1269 0 /* Reserved, DS, ACPI */ | F(MMX) |
1270 F(FXSR) | F(XMM) | F(XMM2) | F(SELFSNOOP) |
1271 0 /* HTT, TM, Reserved, PBE */;
1272 /* cpuid 0x80000001.edx */
1273 const u32 kvm_supported_word1_x86_features =
1274 F(FPU) | F(VME) | F(DE) | F(PSE) |
1275 F(TSC) | F(MSR) | F(PAE) | F(MCE) |
1276 F(CX8) | F(APIC) | 0 /* Reserved */ | F(SYSCALL) |
1277 F(MTRR) | F(PGE) | F(MCA) | F(CMOV) |
1278 F(PAT) | F(PSE36) | 0 /* Reserved */ |
1279 f_nx | 0 /* Reserved */ | F(MMXEXT) | F(MMX) |
1280 F(FXSR) | F(FXSR_OPT) | 0 /* GBPAGES */ | 0 /* RDTSCP */ |
1281 0 /* Reserved */ | f_lm | F(3DNOWEXT) | F(3DNOW);
1283 const u32 kvm_supported_word4_x86_features =
1285 /* cpuid 0x80000001.ecx */
1286 const u32 kvm_supported_word6_x86_features =
1287 F(LAHF_LM) | F(CMP_LEGACY) | F(SVM) | 0 /* ExtApicSpace */ |
1288 F(CR8_LEGACY) | F(ABM) | F(SSE4A) | F(MISALIGNSSE) |
1289 F(3DNOWPREFETCH) | 0 /* OSVW */ | 0 /* IBS */ | F(SSE5) |
1290 0 /* SKINIT */ | 0 /* WDT */;
1292 /* all calls to cpuid_count() should be made on the same cpu */
1294 do_cpuid_1_ent(entry, function, index);
1299 entry->eax = min(entry->eax, (u32)0xb);
1302 entry->edx &= kvm_supported_word0_x86_features;
1303 entry->ecx &= kvm_supported_word4_x86_features;
1305 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1306 * may return different values. This forces us to get_cpu() before
1307 * issuing the first command, and also to emulate this annoying behavior
1308 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1310 int t, times = entry->eax & 0xff;
1312 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1313 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1314 for (t = 1; t < times && *nent < maxnent; ++t) {
1315 do_cpuid_1_ent(&entry[t], function, 0);
1316 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1321 /* function 4 and 0xb have additional index. */
1325 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1326 /* read more entries until cache_type is zero */
1327 for (i = 1; *nent < maxnent; ++i) {
1328 cache_type = entry[i - 1].eax & 0x1f;
1331 do_cpuid_1_ent(&entry[i], function, i);
1333 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1341 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1342 /* read more entries until level_type is zero */
1343 for (i = 1; *nent < maxnent; ++i) {
1344 level_type = entry[i - 1].ecx & 0xff00;
1347 do_cpuid_1_ent(&entry[i], function, i);
1349 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1355 entry->eax = min(entry->eax, 0x8000001a);
1358 entry->edx &= kvm_supported_word1_x86_features;
1359 entry->ecx &= kvm_supported_word6_x86_features;
1367 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1368 struct kvm_cpuid_entry2 __user *entries)
1370 struct kvm_cpuid_entry2 *cpuid_entries;
1371 int limit, nent = 0, r = -E2BIG;
1374 if (cpuid->nent < 1)
1377 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1381 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1382 limit = cpuid_entries[0].eax;
1383 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1384 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1385 &nent, cpuid->nent);
1387 if (nent >= cpuid->nent)
1390 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1391 limit = cpuid_entries[nent - 1].eax;
1392 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1393 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1394 &nent, cpuid->nent);
1396 if (copy_to_user(entries, cpuid_entries,
1397 nent * sizeof(struct kvm_cpuid_entry2)))
1403 vfree(cpuid_entries);
1408 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1409 struct kvm_lapic_state *s)
1412 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1418 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1419 struct kvm_lapic_state *s)
1422 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1423 kvm_apic_post_state_restore(vcpu);
1429 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1430 struct kvm_interrupt *irq)
1432 if (irq->irq < 0 || irq->irq >= 256)
1434 if (irqchip_in_kernel(vcpu->kvm))
1438 set_bit(irq->irq, vcpu->arch.irq_pending);
1439 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1446 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1449 kvm_inject_nmi(vcpu);
1455 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1456 struct kvm_tpr_access_ctl *tac)
1460 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1464 long kvm_arch_vcpu_ioctl(struct file *filp,
1465 unsigned int ioctl, unsigned long arg)
1467 struct kvm_vcpu *vcpu = filp->private_data;
1468 void __user *argp = (void __user *)arg;
1470 struct kvm_lapic_state *lapic = NULL;
1473 case KVM_GET_LAPIC: {
1474 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1479 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1483 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1488 case KVM_SET_LAPIC: {
1489 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1494 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1496 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1502 case KVM_INTERRUPT: {
1503 struct kvm_interrupt irq;
1506 if (copy_from_user(&irq, argp, sizeof irq))
1508 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1515 r = kvm_vcpu_ioctl_nmi(vcpu);
1521 case KVM_SET_CPUID: {
1522 struct kvm_cpuid __user *cpuid_arg = argp;
1523 struct kvm_cpuid cpuid;
1526 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1528 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1533 case KVM_SET_CPUID2: {
1534 struct kvm_cpuid2 __user *cpuid_arg = argp;
1535 struct kvm_cpuid2 cpuid;
1538 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1540 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1541 cpuid_arg->entries);
1546 case KVM_GET_CPUID2: {
1547 struct kvm_cpuid2 __user *cpuid_arg = argp;
1548 struct kvm_cpuid2 cpuid;
1551 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1553 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1554 cpuid_arg->entries);
1558 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1564 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1567 r = msr_io(vcpu, argp, do_set_msr, 0);
1569 case KVM_TPR_ACCESS_REPORTING: {
1570 struct kvm_tpr_access_ctl tac;
1573 if (copy_from_user(&tac, argp, sizeof tac))
1575 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1579 if (copy_to_user(argp, &tac, sizeof tac))
1584 case KVM_SET_VAPIC_ADDR: {
1585 struct kvm_vapic_addr va;
1588 if (!irqchip_in_kernel(vcpu->kvm))
1591 if (copy_from_user(&va, argp, sizeof va))
1594 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1605 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1609 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1611 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1615 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1616 u32 kvm_nr_mmu_pages)
1618 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1621 down_write(&kvm->slots_lock);
1623 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1624 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1626 up_write(&kvm->slots_lock);
1630 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1632 return kvm->arch.n_alloc_mmu_pages;
1635 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1638 struct kvm_mem_alias *alias;
1640 for (i = 0; i < kvm->arch.naliases; ++i) {
1641 alias = &kvm->arch.aliases[i];
1642 if (gfn >= alias->base_gfn
1643 && gfn < alias->base_gfn + alias->npages)
1644 return alias->target_gfn + gfn - alias->base_gfn;
1650 * Set a new alias region. Aliases map a portion of physical memory into
1651 * another portion. This is useful for memory windows, for example the PC
1654 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1655 struct kvm_memory_alias *alias)
1658 struct kvm_mem_alias *p;
1661 /* General sanity checks */
1662 if (alias->memory_size & (PAGE_SIZE - 1))
1664 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1666 if (alias->slot >= KVM_ALIAS_SLOTS)
1668 if (alias->guest_phys_addr + alias->memory_size
1669 < alias->guest_phys_addr)
1671 if (alias->target_phys_addr + alias->memory_size
1672 < alias->target_phys_addr)
1675 down_write(&kvm->slots_lock);
1676 spin_lock(&kvm->mmu_lock);
1678 p = &kvm->arch.aliases[alias->slot];
1679 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1680 p->npages = alias->memory_size >> PAGE_SHIFT;
1681 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1683 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1684 if (kvm->arch.aliases[n - 1].npages)
1686 kvm->arch.naliases = n;
1688 spin_unlock(&kvm->mmu_lock);
1689 kvm_mmu_zap_all(kvm);
1691 up_write(&kvm->slots_lock);
1699 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1704 switch (chip->chip_id) {
1705 case KVM_IRQCHIP_PIC_MASTER:
1706 memcpy(&chip->chip.pic,
1707 &pic_irqchip(kvm)->pics[0],
1708 sizeof(struct kvm_pic_state));
1710 case KVM_IRQCHIP_PIC_SLAVE:
1711 memcpy(&chip->chip.pic,
1712 &pic_irqchip(kvm)->pics[1],
1713 sizeof(struct kvm_pic_state));
1715 case KVM_IRQCHIP_IOAPIC:
1716 memcpy(&chip->chip.ioapic,
1717 ioapic_irqchip(kvm),
1718 sizeof(struct kvm_ioapic_state));
1727 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1732 switch (chip->chip_id) {
1733 case KVM_IRQCHIP_PIC_MASTER:
1734 memcpy(&pic_irqchip(kvm)->pics[0],
1736 sizeof(struct kvm_pic_state));
1738 case KVM_IRQCHIP_PIC_SLAVE:
1739 memcpy(&pic_irqchip(kvm)->pics[1],
1741 sizeof(struct kvm_pic_state));
1743 case KVM_IRQCHIP_IOAPIC:
1744 memcpy(ioapic_irqchip(kvm),
1746 sizeof(struct kvm_ioapic_state));
1752 kvm_pic_update_irq(pic_irqchip(kvm));
1756 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1760 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1764 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1768 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1769 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1773 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1774 struct kvm_reinject_control *control)
1776 if (!kvm->arch.vpit)
1778 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1783 * Get (and clear) the dirty memory log for a memory slot.
1785 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1786 struct kvm_dirty_log *log)
1790 struct kvm_memory_slot *memslot;
1793 down_write(&kvm->slots_lock);
1795 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1799 /* If nothing is dirty, don't bother messing with page tables. */
1801 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1802 kvm_flush_remote_tlbs(kvm);
1803 memslot = &kvm->memslots[log->slot];
1804 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1805 memset(memslot->dirty_bitmap, 0, n);
1809 up_write(&kvm->slots_lock);
1813 long kvm_arch_vm_ioctl(struct file *filp,
1814 unsigned int ioctl, unsigned long arg)
1816 struct kvm *kvm = filp->private_data;
1817 void __user *argp = (void __user *)arg;
1820 * This union makes it completely explicit to gcc-3.x
1821 * that these two variables' stack usage should be
1822 * combined, not added together.
1825 struct kvm_pit_state ps;
1826 struct kvm_memory_alias alias;
1830 case KVM_SET_TSS_ADDR:
1831 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1835 case KVM_SET_MEMORY_REGION: {
1836 struct kvm_memory_region kvm_mem;
1837 struct kvm_userspace_memory_region kvm_userspace_mem;
1840 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1842 kvm_userspace_mem.slot = kvm_mem.slot;
1843 kvm_userspace_mem.flags = kvm_mem.flags;
1844 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1845 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1846 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1851 case KVM_SET_NR_MMU_PAGES:
1852 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1856 case KVM_GET_NR_MMU_PAGES:
1857 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1859 case KVM_SET_MEMORY_ALIAS:
1861 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1863 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1867 case KVM_CREATE_IRQCHIP:
1869 kvm->arch.vpic = kvm_create_pic(kvm);
1870 if (kvm->arch.vpic) {
1871 r = kvm_ioapic_init(kvm);
1873 kfree(kvm->arch.vpic);
1874 kvm->arch.vpic = NULL;
1879 r = kvm_setup_default_irq_routing(kvm);
1881 kfree(kvm->arch.vpic);
1882 kfree(kvm->arch.vioapic);
1886 case KVM_CREATE_PIT:
1887 mutex_lock(&kvm->lock);
1890 goto create_pit_unlock;
1892 kvm->arch.vpit = kvm_create_pit(kvm);
1896 mutex_unlock(&kvm->lock);
1898 case KVM_IRQ_LINE_STATUS:
1899 case KVM_IRQ_LINE: {
1900 struct kvm_irq_level irq_event;
1903 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1905 if (irqchip_in_kernel(kvm)) {
1907 mutex_lock(&kvm->lock);
1908 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1909 irq_event.irq, irq_event.level);
1910 mutex_unlock(&kvm->lock);
1911 if (ioctl == KVM_IRQ_LINE_STATUS) {
1912 irq_event.status = status;
1913 if (copy_to_user(argp, &irq_event,
1921 case KVM_GET_IRQCHIP: {
1922 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1923 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1929 if (copy_from_user(chip, argp, sizeof *chip))
1930 goto get_irqchip_out;
1932 if (!irqchip_in_kernel(kvm))
1933 goto get_irqchip_out;
1934 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1936 goto get_irqchip_out;
1938 if (copy_to_user(argp, chip, sizeof *chip))
1939 goto get_irqchip_out;
1947 case KVM_SET_IRQCHIP: {
1948 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1949 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1955 if (copy_from_user(chip, argp, sizeof *chip))
1956 goto set_irqchip_out;
1958 if (!irqchip_in_kernel(kvm))
1959 goto set_irqchip_out;
1960 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1962 goto set_irqchip_out;
1972 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1975 if (!kvm->arch.vpit)
1977 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1981 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1988 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1991 if (!kvm->arch.vpit)
1993 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1999 case KVM_REINJECT_CONTROL: {
2000 struct kvm_reinject_control control;
2002 if (copy_from_user(&control, argp, sizeof(control)))
2004 r = kvm_vm_ioctl_reinject(kvm, &control);
2017 static void kvm_init_msr_list(void)
2022 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2023 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2026 msrs_to_save[j] = msrs_to_save[i];
2029 num_msrs_to_save = j;
2033 * Only apic need an MMIO device hook, so shortcut now..
2035 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2036 gpa_t addr, int len,
2039 struct kvm_io_device *dev;
2041 if (vcpu->arch.apic) {
2042 dev = &vcpu->arch.apic->dev;
2043 if (dev->in_range(dev, addr, len, is_write))
2050 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2051 gpa_t addr, int len,
2054 struct kvm_io_device *dev;
2056 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2058 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2063 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2064 struct kvm_vcpu *vcpu)
2067 int r = X86EMUL_CONTINUE;
2070 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2071 unsigned offset = addr & (PAGE_SIZE-1);
2072 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2075 if (gpa == UNMAPPED_GVA) {
2076 r = X86EMUL_PROPAGATE_FAULT;
2079 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2081 r = X86EMUL_UNHANDLEABLE;
2093 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2094 struct kvm_vcpu *vcpu)
2097 int r = X86EMUL_CONTINUE;
2100 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2101 unsigned offset = addr & (PAGE_SIZE-1);
2102 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2105 if (gpa == UNMAPPED_GVA) {
2106 r = X86EMUL_PROPAGATE_FAULT;
2109 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2111 r = X86EMUL_UNHANDLEABLE;
2124 static int emulator_read_emulated(unsigned long addr,
2127 struct kvm_vcpu *vcpu)
2129 struct kvm_io_device *mmio_dev;
2132 if (vcpu->mmio_read_completed) {
2133 memcpy(val, vcpu->mmio_data, bytes);
2134 vcpu->mmio_read_completed = 0;
2135 return X86EMUL_CONTINUE;
2138 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2140 /* For APIC access vmexit */
2141 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2144 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2145 == X86EMUL_CONTINUE)
2146 return X86EMUL_CONTINUE;
2147 if (gpa == UNMAPPED_GVA)
2148 return X86EMUL_PROPAGATE_FAULT;
2152 * Is this MMIO handled locally?
2154 mutex_lock(&vcpu->kvm->lock);
2155 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2157 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2158 mutex_unlock(&vcpu->kvm->lock);
2159 return X86EMUL_CONTINUE;
2161 mutex_unlock(&vcpu->kvm->lock);
2163 vcpu->mmio_needed = 1;
2164 vcpu->mmio_phys_addr = gpa;
2165 vcpu->mmio_size = bytes;
2166 vcpu->mmio_is_write = 0;
2168 return X86EMUL_UNHANDLEABLE;
2171 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2172 const void *val, int bytes)
2176 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2179 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2183 static int emulator_write_emulated_onepage(unsigned long addr,
2186 struct kvm_vcpu *vcpu)
2188 struct kvm_io_device *mmio_dev;
2191 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2193 if (gpa == UNMAPPED_GVA) {
2194 kvm_inject_page_fault(vcpu, addr, 2);
2195 return X86EMUL_PROPAGATE_FAULT;
2198 /* For APIC access vmexit */
2199 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2202 if (emulator_write_phys(vcpu, gpa, val, bytes))
2203 return X86EMUL_CONTINUE;
2207 * Is this MMIO handled locally?
2209 mutex_lock(&vcpu->kvm->lock);
2210 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2212 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2213 mutex_unlock(&vcpu->kvm->lock);
2214 return X86EMUL_CONTINUE;
2216 mutex_unlock(&vcpu->kvm->lock);
2218 vcpu->mmio_needed = 1;
2219 vcpu->mmio_phys_addr = gpa;
2220 vcpu->mmio_size = bytes;
2221 vcpu->mmio_is_write = 1;
2222 memcpy(vcpu->mmio_data, val, bytes);
2224 return X86EMUL_CONTINUE;
2227 int emulator_write_emulated(unsigned long addr,
2230 struct kvm_vcpu *vcpu)
2232 /* Crossing a page boundary? */
2233 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2236 now = -addr & ~PAGE_MASK;
2237 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2238 if (rc != X86EMUL_CONTINUE)
2244 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2246 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2248 static int emulator_cmpxchg_emulated(unsigned long addr,
2252 struct kvm_vcpu *vcpu)
2254 static int reported;
2258 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2260 #ifndef CONFIG_X86_64
2261 /* guests cmpxchg8b have to be emulated atomically */
2268 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2270 if (gpa == UNMAPPED_GVA ||
2271 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2274 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2279 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2281 kaddr = kmap_atomic(page, KM_USER0);
2282 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2283 kunmap_atomic(kaddr, KM_USER0);
2284 kvm_release_page_dirty(page);
2289 return emulator_write_emulated(addr, new, bytes, vcpu);
2292 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2294 return kvm_x86_ops->get_segment_base(vcpu, seg);
2297 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2299 kvm_mmu_invlpg(vcpu, address);
2300 return X86EMUL_CONTINUE;
2303 int emulate_clts(struct kvm_vcpu *vcpu)
2305 KVMTRACE_0D(CLTS, vcpu, handler);
2306 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2307 return X86EMUL_CONTINUE;
2310 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2312 struct kvm_vcpu *vcpu = ctxt->vcpu;
2316 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2317 return X86EMUL_CONTINUE;
2319 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2320 return X86EMUL_UNHANDLEABLE;
2324 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2326 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2329 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2331 /* FIXME: better handling */
2332 return X86EMUL_UNHANDLEABLE;
2334 return X86EMUL_CONTINUE;
2337 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2340 unsigned long rip = kvm_rip_read(vcpu);
2341 unsigned long rip_linear;
2343 if (!printk_ratelimit())
2346 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2348 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2350 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2351 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2353 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2355 static struct x86_emulate_ops emulate_ops = {
2356 .read_std = kvm_read_guest_virt,
2357 .read_emulated = emulator_read_emulated,
2358 .write_emulated = emulator_write_emulated,
2359 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2362 static void cache_all_regs(struct kvm_vcpu *vcpu)
2364 kvm_register_read(vcpu, VCPU_REGS_RAX);
2365 kvm_register_read(vcpu, VCPU_REGS_RSP);
2366 kvm_register_read(vcpu, VCPU_REGS_RIP);
2367 vcpu->arch.regs_dirty = ~0;
2370 int emulate_instruction(struct kvm_vcpu *vcpu,
2371 struct kvm_run *run,
2377 struct decode_cache *c;
2379 kvm_clear_exception_queue(vcpu);
2380 vcpu->arch.mmio_fault_cr2 = cr2;
2382 * TODO: fix x86_emulate.c to use guest_read/write_register
2383 * instead of direct ->regs accesses, can save hundred cycles
2384 * on Intel for instructions that don't read/change RSP, for
2387 cache_all_regs(vcpu);
2389 vcpu->mmio_is_write = 0;
2390 vcpu->arch.pio.string = 0;
2392 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2394 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2396 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2397 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2398 vcpu->arch.emulate_ctxt.mode =
2399 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2400 ? X86EMUL_MODE_REAL : cs_l
2401 ? X86EMUL_MODE_PROT64 : cs_db
2402 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2404 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2406 /* Reject the instructions other than VMCALL/VMMCALL when
2407 * try to emulate invalid opcode */
2408 c = &vcpu->arch.emulate_ctxt.decode;
2409 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2410 (!(c->twobyte && c->b == 0x01 &&
2411 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2412 c->modrm_mod == 3 && c->modrm_rm == 1)))
2413 return EMULATE_FAIL;
2415 ++vcpu->stat.insn_emulation;
2417 ++vcpu->stat.insn_emulation_fail;
2418 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2419 return EMULATE_DONE;
2420 return EMULATE_FAIL;
2424 if (emulation_type & EMULTYPE_SKIP) {
2425 kvm_rip_write(vcpu, vcpu->arch.emulate_ctxt.decode.eip);
2426 return EMULATE_DONE;
2429 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2431 if (vcpu->arch.pio.string)
2432 return EMULATE_DO_MMIO;
2434 if ((r || vcpu->mmio_is_write) && run) {
2435 run->exit_reason = KVM_EXIT_MMIO;
2436 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2437 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2438 run->mmio.len = vcpu->mmio_size;
2439 run->mmio.is_write = vcpu->mmio_is_write;
2443 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2444 return EMULATE_DONE;
2445 if (!vcpu->mmio_needed) {
2446 kvm_report_emulation_failure(vcpu, "mmio");
2447 return EMULATE_FAIL;
2449 return EMULATE_DO_MMIO;
2452 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2454 if (vcpu->mmio_is_write) {
2455 vcpu->mmio_needed = 0;
2456 return EMULATE_DO_MMIO;
2459 return EMULATE_DONE;
2461 EXPORT_SYMBOL_GPL(emulate_instruction);
2463 static int pio_copy_data(struct kvm_vcpu *vcpu)
2465 void *p = vcpu->arch.pio_data;
2466 gva_t q = vcpu->arch.pio.guest_gva;
2470 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2471 if (vcpu->arch.pio.in)
2472 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2474 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2478 int complete_pio(struct kvm_vcpu *vcpu)
2480 struct kvm_pio_request *io = &vcpu->arch.pio;
2487 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2488 memcpy(&val, vcpu->arch.pio_data, io->size);
2489 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2493 r = pio_copy_data(vcpu);
2500 delta *= io->cur_count;
2502 * The size of the register should really depend on
2503 * current address size.
2505 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2507 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2513 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2515 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2517 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2519 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2523 io->count -= io->cur_count;
2529 static void kernel_pio(struct kvm_io_device *pio_dev,
2530 struct kvm_vcpu *vcpu,
2533 /* TODO: String I/O for in kernel device */
2535 mutex_lock(&vcpu->kvm->lock);
2536 if (vcpu->arch.pio.in)
2537 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2538 vcpu->arch.pio.size,
2541 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2542 vcpu->arch.pio.size,
2544 mutex_unlock(&vcpu->kvm->lock);
2547 static void pio_string_write(struct kvm_io_device *pio_dev,
2548 struct kvm_vcpu *vcpu)
2550 struct kvm_pio_request *io = &vcpu->arch.pio;
2551 void *pd = vcpu->arch.pio_data;
2554 mutex_lock(&vcpu->kvm->lock);
2555 for (i = 0; i < io->cur_count; i++) {
2556 kvm_iodevice_write(pio_dev, io->port,
2561 mutex_unlock(&vcpu->kvm->lock);
2564 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2565 gpa_t addr, int len,
2568 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2571 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2572 int size, unsigned port)
2574 struct kvm_io_device *pio_dev;
2577 vcpu->run->exit_reason = KVM_EXIT_IO;
2578 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2579 vcpu->run->io.size = vcpu->arch.pio.size = size;
2580 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2581 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2582 vcpu->run->io.port = vcpu->arch.pio.port = port;
2583 vcpu->arch.pio.in = in;
2584 vcpu->arch.pio.string = 0;
2585 vcpu->arch.pio.down = 0;
2586 vcpu->arch.pio.rep = 0;
2588 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2589 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2592 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2595 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2596 memcpy(vcpu->arch.pio_data, &val, 4);
2598 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2600 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2606 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2608 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2609 int size, unsigned long count, int down,
2610 gva_t address, int rep, unsigned port)
2612 unsigned now, in_page;
2614 struct kvm_io_device *pio_dev;
2616 vcpu->run->exit_reason = KVM_EXIT_IO;
2617 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2618 vcpu->run->io.size = vcpu->arch.pio.size = size;
2619 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2620 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2621 vcpu->run->io.port = vcpu->arch.pio.port = port;
2622 vcpu->arch.pio.in = in;
2623 vcpu->arch.pio.string = 1;
2624 vcpu->arch.pio.down = down;
2625 vcpu->arch.pio.rep = rep;
2627 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2628 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2631 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2635 kvm_x86_ops->skip_emulated_instruction(vcpu);
2640 in_page = PAGE_SIZE - offset_in_page(address);
2642 in_page = offset_in_page(address) + size;
2643 now = min(count, (unsigned long)in_page / size);
2648 * String I/O in reverse. Yuck. Kill the guest, fix later.
2650 pr_unimpl(vcpu, "guest string pio down\n");
2651 kvm_inject_gp(vcpu, 0);
2654 vcpu->run->io.count = now;
2655 vcpu->arch.pio.cur_count = now;
2657 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2658 kvm_x86_ops->skip_emulated_instruction(vcpu);
2660 vcpu->arch.pio.guest_gva = address;
2662 pio_dev = vcpu_find_pio_dev(vcpu, port,
2663 vcpu->arch.pio.cur_count,
2664 !vcpu->arch.pio.in);
2665 if (!vcpu->arch.pio.in) {
2666 /* string PIO write */
2667 ret = pio_copy_data(vcpu);
2668 if (ret == X86EMUL_PROPAGATE_FAULT) {
2669 kvm_inject_gp(vcpu, 0);
2672 if (ret == 0 && pio_dev) {
2673 pio_string_write(pio_dev, vcpu);
2675 if (vcpu->arch.pio.count == 0)
2679 pr_unimpl(vcpu, "no string pio read support yet, "
2680 "port %x size %d count %ld\n",
2685 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2687 static void bounce_off(void *info)
2692 static unsigned int ref_freq;
2693 static unsigned long tsc_khz_ref;
2695 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2698 struct cpufreq_freqs *freq = data;
2700 struct kvm_vcpu *vcpu;
2701 int i, send_ipi = 0;
2704 ref_freq = freq->old;
2706 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2708 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2710 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2712 spin_lock(&kvm_lock);
2713 list_for_each_entry(kvm, &vm_list, vm_list) {
2714 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2715 vcpu = kvm->vcpus[i];
2718 if (vcpu->cpu != freq->cpu)
2720 if (!kvm_request_guest_time_update(vcpu))
2722 if (vcpu->cpu != smp_processor_id())
2726 spin_unlock(&kvm_lock);
2728 if (freq->old < freq->new && send_ipi) {
2730 * We upscale the frequency. Must make the guest
2731 * doesn't see old kvmclock values while running with
2732 * the new frequency, otherwise we risk the guest sees
2733 * time go backwards.
2735 * In case we update the frequency for another cpu
2736 * (which might be in guest context) send an interrupt
2737 * to kick the cpu out of guest context. Next time
2738 * guest context is entered kvmclock will be updated,
2739 * so the guest will not see stale values.
2741 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2746 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2747 .notifier_call = kvmclock_cpufreq_notifier
2750 int kvm_arch_init(void *opaque)
2753 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2756 printk(KERN_ERR "kvm: already loaded the other module\n");
2761 if (!ops->cpu_has_kvm_support()) {
2762 printk(KERN_ERR "kvm: no hardware support\n");
2766 if (ops->disabled_by_bios()) {
2767 printk(KERN_ERR "kvm: disabled by bios\n");
2772 r = kvm_mmu_module_init();
2776 kvm_init_msr_list();
2779 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2780 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2781 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2782 PT_DIRTY_MASK, PT64_NX_MASK, 0);
2784 for_each_possible_cpu(cpu)
2785 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2786 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2787 tsc_khz_ref = tsc_khz;
2788 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2789 CPUFREQ_TRANSITION_NOTIFIER);
2798 void kvm_arch_exit(void)
2800 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2801 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2802 CPUFREQ_TRANSITION_NOTIFIER);
2804 kvm_mmu_module_exit();
2807 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2809 ++vcpu->stat.halt_exits;
2810 KVMTRACE_0D(HLT, vcpu, handler);
2811 if (irqchip_in_kernel(vcpu->kvm)) {
2812 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2815 vcpu->run->exit_reason = KVM_EXIT_HLT;
2819 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2821 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2824 if (is_long_mode(vcpu))
2827 return a0 | ((gpa_t)a1 << 32);
2830 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2832 unsigned long nr, a0, a1, a2, a3, ret;
2835 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2836 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2837 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2838 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2839 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2841 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2843 if (!is_long_mode(vcpu)) {
2852 case KVM_HC_VAPIC_POLL_IRQ:
2856 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2862 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2863 ++vcpu->stat.hypercalls;
2866 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2868 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2870 char instruction[3];
2872 unsigned long rip = kvm_rip_read(vcpu);
2876 * Blow out the MMU to ensure that no other VCPU has an active mapping
2877 * to ensure that the updated hypercall appears atomically across all
2880 kvm_mmu_zap_all(vcpu->kvm);
2882 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2883 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2884 != X86EMUL_CONTINUE)
2890 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2892 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2895 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2897 struct descriptor_table dt = { limit, base };
2899 kvm_x86_ops->set_gdt(vcpu, &dt);
2902 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2904 struct descriptor_table dt = { limit, base };
2906 kvm_x86_ops->set_idt(vcpu, &dt);
2909 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2910 unsigned long *rflags)
2912 kvm_lmsw(vcpu, msw);
2913 *rflags = kvm_x86_ops->get_rflags(vcpu);
2916 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2918 unsigned long value;
2920 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2923 value = vcpu->arch.cr0;
2926 value = vcpu->arch.cr2;
2929 value = vcpu->arch.cr3;
2932 value = vcpu->arch.cr4;
2935 value = kvm_get_cr8(vcpu);
2938 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2941 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2942 (u32)((u64)value >> 32), handler);
2947 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2948 unsigned long *rflags)
2950 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2951 (u32)((u64)val >> 32), handler);
2955 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2956 *rflags = kvm_x86_ops->get_rflags(vcpu);
2959 vcpu->arch.cr2 = val;
2962 kvm_set_cr3(vcpu, val);
2965 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2968 kvm_set_cr8(vcpu, val & 0xfUL);
2971 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2975 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2977 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2978 int j, nent = vcpu->arch.cpuid_nent;
2980 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2981 /* when no next entry is found, the current entry[i] is reselected */
2982 for (j = i + 1; ; j = (j + 1) % nent) {
2983 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2984 if (ej->function == e->function) {
2985 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2989 return 0; /* silence gcc, even though control never reaches here */
2992 /* find an entry with matching function, matching index (if needed), and that
2993 * should be read next (if it's stateful) */
2994 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2995 u32 function, u32 index)
2997 if (e->function != function)
2999 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
3001 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
3002 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
3007 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3008 u32 function, u32 index)
3011 struct kvm_cpuid_entry2 *best = NULL;
3013 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3014 struct kvm_cpuid_entry2 *e;
3016 e = &vcpu->arch.cpuid_entries[i];
3017 if (is_matching_cpuid_entry(e, function, index)) {
3018 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3019 move_to_next_stateful_cpuid_entry(vcpu, i);
3024 * Both basic or both extended?
3026 if (((e->function ^ function) & 0x80000000) == 0)
3027 if (!best || e->function > best->function)
3033 int cpuid_maxphyaddr(struct kvm_vcpu *vcpu)
3035 struct kvm_cpuid_entry2 *best;
3037 best = kvm_find_cpuid_entry(vcpu, 0x80000008, 0);
3039 return best->eax & 0xff;
3043 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3045 u32 function, index;
3046 struct kvm_cpuid_entry2 *best;
3048 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3049 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3050 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3051 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3052 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3053 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3054 best = kvm_find_cpuid_entry(vcpu, function, index);
3056 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3057 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3058 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3059 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3061 kvm_x86_ops->skip_emulated_instruction(vcpu);
3062 KVMTRACE_5D(CPUID, vcpu, function,
3063 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3064 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3065 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3066 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3068 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3071 * Check if userspace requested an interrupt window, and that the
3072 * interrupt window is open.
3074 * No need to exit to userspace if we already have an interrupt queued.
3076 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3077 struct kvm_run *kvm_run)
3079 return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
3080 kvm_run->request_interrupt_window &&
3081 kvm_arch_interrupt_allowed(vcpu));
3084 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3085 struct kvm_run *kvm_run)
3087 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3088 kvm_run->cr8 = kvm_get_cr8(vcpu);
3089 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3090 if (irqchip_in_kernel(vcpu->kvm))
3091 kvm_run->ready_for_interrupt_injection = 1;
3093 kvm_run->ready_for_interrupt_injection =
3094 (kvm_arch_interrupt_allowed(vcpu) &&
3095 !kvm_cpu_has_interrupt(vcpu));
3098 static void vapic_enter(struct kvm_vcpu *vcpu)
3100 struct kvm_lapic *apic = vcpu->arch.apic;
3103 if (!apic || !apic->vapic_addr)
3106 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3108 vcpu->arch.apic->vapic_page = page;
3111 static void vapic_exit(struct kvm_vcpu *vcpu)
3113 struct kvm_lapic *apic = vcpu->arch.apic;
3115 if (!apic || !apic->vapic_addr)
3118 down_read(&vcpu->kvm->slots_lock);
3119 kvm_release_page_dirty(apic->vapic_page);
3120 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3121 up_read(&vcpu->kvm->slots_lock);
3124 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
3128 if (!kvm_x86_ops->update_cr8_intercept)
3131 max_irr = kvm_lapic_find_highest_irr(vcpu);
3136 tpr = kvm_lapic_get_cr8(vcpu);
3138 kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
3141 static void inject_irq(struct kvm_vcpu *vcpu)
3143 /* try to reinject previous events if any */
3144 if (vcpu->arch.nmi_injected) {
3145 kvm_x86_ops->set_nmi(vcpu);
3149 if (vcpu->arch.interrupt.pending) {
3150 kvm_x86_ops->set_irq(vcpu, vcpu->arch.interrupt.nr);
3154 /* try to inject new event if pending */
3155 if (vcpu->arch.nmi_pending) {
3156 if (kvm_x86_ops->nmi_allowed(vcpu)) {
3157 vcpu->arch.nmi_pending = false;
3158 vcpu->arch.nmi_injected = true;
3159 kvm_x86_ops->set_nmi(vcpu);
3161 } else if (kvm_cpu_has_interrupt(vcpu)) {
3162 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
3163 kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu));
3164 kvm_x86_ops->set_irq(vcpu, vcpu->arch.interrupt.nr);
3169 static void inject_pending_irq(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3171 bool req_int_win = !irqchip_in_kernel(vcpu->kvm) &&
3172 kvm_run->request_interrupt_window;
3174 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3175 kvm_x86_ops->drop_interrupt_shadow(vcpu);
3179 /* enable NMI/IRQ window open exits if needed */
3180 if (vcpu->arch.nmi_pending)
3181 kvm_x86_ops->enable_nmi_window(vcpu);
3182 else if (kvm_cpu_has_interrupt(vcpu) || req_int_win)
3183 kvm_x86_ops->enable_irq_window(vcpu);
3186 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3191 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3192 kvm_mmu_unload(vcpu);
3194 r = kvm_mmu_reload(vcpu);
3198 if (vcpu->requests) {
3199 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3200 __kvm_migrate_timers(vcpu);
3201 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3202 kvm_write_guest_time(vcpu);
3203 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3204 kvm_mmu_sync_roots(vcpu);
3205 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3206 kvm_x86_ops->tlb_flush(vcpu);
3207 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3209 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3213 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3214 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3222 kvm_x86_ops->prepare_guest_switch(vcpu);
3223 kvm_load_guest_fpu(vcpu);
3225 local_irq_disable();
3227 if (vcpu->requests || need_resched() || signal_pending(current)) {
3234 vcpu->guest_mode = 1;
3236 * Make sure that guest_mode assignment won't happen after
3237 * testing the pending IRQ vector bitmap.
3241 if (vcpu->arch.exception.pending)
3242 __queue_exception(vcpu);
3244 inject_pending_irq(vcpu, kvm_run);
3246 if (kvm_lapic_enabled(vcpu)) {
3247 if (!vcpu->arch.apic->vapic_addr)
3248 update_cr8_intercept(vcpu);
3250 kvm_lapic_sync_to_vapic(vcpu);
3253 up_read(&vcpu->kvm->slots_lock);
3257 get_debugreg(vcpu->arch.host_dr6, 6);
3258 get_debugreg(vcpu->arch.host_dr7, 7);
3259 if (unlikely(vcpu->arch.switch_db_regs)) {
3260 get_debugreg(vcpu->arch.host_db[0], 0);
3261 get_debugreg(vcpu->arch.host_db[1], 1);
3262 get_debugreg(vcpu->arch.host_db[2], 2);
3263 get_debugreg(vcpu->arch.host_db[3], 3);
3266 set_debugreg(vcpu->arch.eff_db[0], 0);
3267 set_debugreg(vcpu->arch.eff_db[1], 1);
3268 set_debugreg(vcpu->arch.eff_db[2], 2);
3269 set_debugreg(vcpu->arch.eff_db[3], 3);
3272 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3273 kvm_x86_ops->run(vcpu, kvm_run);
3275 if (unlikely(vcpu->arch.switch_db_regs)) {
3277 set_debugreg(vcpu->arch.host_db[0], 0);
3278 set_debugreg(vcpu->arch.host_db[1], 1);
3279 set_debugreg(vcpu->arch.host_db[2], 2);
3280 set_debugreg(vcpu->arch.host_db[3], 3);
3282 set_debugreg(vcpu->arch.host_dr6, 6);
3283 set_debugreg(vcpu->arch.host_dr7, 7);
3285 vcpu->guest_mode = 0;
3291 * We must have an instruction between local_irq_enable() and
3292 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3293 * the interrupt shadow. The stat.exits increment will do nicely.
3294 * But we need to prevent reordering, hence this barrier():
3302 down_read(&vcpu->kvm->slots_lock);
3305 * Profile KVM exit RIPs:
3307 if (unlikely(prof_on == KVM_PROFILING)) {
3308 unsigned long rip = kvm_rip_read(vcpu);
3309 profile_hit(KVM_PROFILING, (void *)rip);
3313 kvm_lapic_sync_from_vapic(vcpu);
3315 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3321 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3325 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3326 pr_debug("vcpu %d received sipi with vector # %x\n",
3327 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3328 kvm_lapic_reset(vcpu);
3329 r = kvm_arch_vcpu_reset(vcpu);
3332 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3335 down_read(&vcpu->kvm->slots_lock);
3340 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3341 r = vcpu_enter_guest(vcpu, kvm_run);
3343 up_read(&vcpu->kvm->slots_lock);
3344 kvm_vcpu_block(vcpu);
3345 down_read(&vcpu->kvm->slots_lock);
3346 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3348 switch(vcpu->arch.mp_state) {
3349 case KVM_MP_STATE_HALTED:
3350 vcpu->arch.mp_state =
3351 KVM_MP_STATE_RUNNABLE;
3352 case KVM_MP_STATE_RUNNABLE:
3354 case KVM_MP_STATE_SIPI_RECEIVED:
3365 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3366 if (kvm_cpu_has_pending_timer(vcpu))
3367 kvm_inject_pending_timer_irqs(vcpu);
3369 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3371 kvm_run->exit_reason = KVM_EXIT_INTR;
3372 ++vcpu->stat.request_irq_exits;
3374 if (signal_pending(current)) {
3376 kvm_run->exit_reason = KVM_EXIT_INTR;
3377 ++vcpu->stat.signal_exits;
3379 if (need_resched()) {
3380 up_read(&vcpu->kvm->slots_lock);
3382 down_read(&vcpu->kvm->slots_lock);
3386 up_read(&vcpu->kvm->slots_lock);
3387 post_kvm_run_save(vcpu, kvm_run);
3394 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3401 if (vcpu->sigset_active)
3402 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3404 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3405 kvm_vcpu_block(vcpu);
3406 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3411 /* re-sync apic's tpr */
3412 if (!irqchip_in_kernel(vcpu->kvm))
3413 kvm_set_cr8(vcpu, kvm_run->cr8);
3415 if (vcpu->arch.pio.cur_count) {
3416 r = complete_pio(vcpu);
3420 #if CONFIG_HAS_IOMEM
3421 if (vcpu->mmio_needed) {
3422 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3423 vcpu->mmio_read_completed = 1;
3424 vcpu->mmio_needed = 0;
3426 down_read(&vcpu->kvm->slots_lock);
3427 r = emulate_instruction(vcpu, kvm_run,
3428 vcpu->arch.mmio_fault_cr2, 0,
3429 EMULTYPE_NO_DECODE);
3430 up_read(&vcpu->kvm->slots_lock);
3431 if (r == EMULATE_DO_MMIO) {
3433 * Read-modify-write. Back to userspace.
3440 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3441 kvm_register_write(vcpu, VCPU_REGS_RAX,
3442 kvm_run->hypercall.ret);
3444 r = __vcpu_run(vcpu, kvm_run);
3447 if (vcpu->sigset_active)
3448 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3454 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3458 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3459 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3460 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3461 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3462 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3463 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3464 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3465 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3466 #ifdef CONFIG_X86_64
3467 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3468 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3469 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3470 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3471 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3472 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3473 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3474 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3477 regs->rip = kvm_rip_read(vcpu);
3478 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3481 * Don't leak debug flags in case they were set for guest debugging
3483 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3484 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3491 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3495 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3496 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3497 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3498 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3499 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3500 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3501 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3502 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3503 #ifdef CONFIG_X86_64
3504 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3505 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3506 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3507 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3508 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3509 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3510 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3511 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3515 kvm_rip_write(vcpu, regs->rip);
3516 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3519 vcpu->arch.exception.pending = false;
3526 void kvm_get_segment(struct kvm_vcpu *vcpu,
3527 struct kvm_segment *var, int seg)
3529 kvm_x86_ops->get_segment(vcpu, var, seg);
3532 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3534 struct kvm_segment cs;
3536 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3540 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3542 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3543 struct kvm_sregs *sregs)
3545 struct descriptor_table dt;
3549 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3550 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3551 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3552 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3553 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3554 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3556 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3557 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3559 kvm_x86_ops->get_idt(vcpu, &dt);
3560 sregs->idt.limit = dt.limit;
3561 sregs->idt.base = dt.base;
3562 kvm_x86_ops->get_gdt(vcpu, &dt);
3563 sregs->gdt.limit = dt.limit;
3564 sregs->gdt.base = dt.base;
3566 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3567 sregs->cr0 = vcpu->arch.cr0;
3568 sregs->cr2 = vcpu->arch.cr2;
3569 sregs->cr3 = vcpu->arch.cr3;
3570 sregs->cr4 = vcpu->arch.cr4;
3571 sregs->cr8 = kvm_get_cr8(vcpu);
3572 sregs->efer = vcpu->arch.shadow_efer;
3573 sregs->apic_base = kvm_get_apic_base(vcpu);
3575 if (irqchip_in_kernel(vcpu->kvm))
3576 memset(sregs->interrupt_bitmap, 0,
3577 sizeof sregs->interrupt_bitmap);
3579 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3580 sizeof sregs->interrupt_bitmap);
3582 if (vcpu->arch.interrupt.pending)
3583 set_bit(vcpu->arch.interrupt.nr,
3584 (unsigned long *)sregs->interrupt_bitmap);
3591 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3592 struct kvm_mp_state *mp_state)
3595 mp_state->mp_state = vcpu->arch.mp_state;
3600 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3601 struct kvm_mp_state *mp_state)
3604 vcpu->arch.mp_state = mp_state->mp_state;
3609 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3610 struct kvm_segment *var, int seg)
3612 kvm_x86_ops->set_segment(vcpu, var, seg);
3615 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3616 struct kvm_segment *kvm_desct)
3618 kvm_desct->base = seg_desc->base0;
3619 kvm_desct->base |= seg_desc->base1 << 16;
3620 kvm_desct->base |= seg_desc->base2 << 24;
3621 kvm_desct->limit = seg_desc->limit0;
3622 kvm_desct->limit |= seg_desc->limit << 16;
3624 kvm_desct->limit <<= 12;
3625 kvm_desct->limit |= 0xfff;
3627 kvm_desct->selector = selector;
3628 kvm_desct->type = seg_desc->type;
3629 kvm_desct->present = seg_desc->p;
3630 kvm_desct->dpl = seg_desc->dpl;
3631 kvm_desct->db = seg_desc->d;
3632 kvm_desct->s = seg_desc->s;
3633 kvm_desct->l = seg_desc->l;
3634 kvm_desct->g = seg_desc->g;
3635 kvm_desct->avl = seg_desc->avl;
3637 kvm_desct->unusable = 1;
3639 kvm_desct->unusable = 0;
3640 kvm_desct->padding = 0;
3643 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3645 struct descriptor_table *dtable)
3647 if (selector & 1 << 2) {
3648 struct kvm_segment kvm_seg;
3650 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3652 if (kvm_seg.unusable)
3655 dtable->limit = kvm_seg.limit;
3656 dtable->base = kvm_seg.base;
3659 kvm_x86_ops->get_gdt(vcpu, dtable);
3662 /* allowed just for 8 bytes segments */
3663 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3664 struct desc_struct *seg_desc)
3667 struct descriptor_table dtable;
3668 u16 index = selector >> 3;
3670 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3672 if (dtable.limit < index * 8 + 7) {
3673 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3676 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3678 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3681 /* allowed just for 8 bytes segments */
3682 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3683 struct desc_struct *seg_desc)
3686 struct descriptor_table dtable;
3687 u16 index = selector >> 3;
3689 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3691 if (dtable.limit < index * 8 + 7)
3693 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3695 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3698 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3699 struct desc_struct *seg_desc)
3703 base_addr = seg_desc->base0;
3704 base_addr |= (seg_desc->base1 << 16);
3705 base_addr |= (seg_desc->base2 << 24);
3707 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3710 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3712 struct kvm_segment kvm_seg;
3714 kvm_get_segment(vcpu, &kvm_seg, seg);
3715 return kvm_seg.selector;
3718 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3720 struct kvm_segment *kvm_seg)
3722 struct desc_struct seg_desc;
3724 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3726 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3730 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3732 struct kvm_segment segvar = {
3733 .base = selector << 4,
3735 .selector = selector,
3746 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3750 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3751 int type_bits, int seg)
3753 struct kvm_segment kvm_seg;
3755 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3756 return kvm_load_realmode_segment(vcpu, selector, seg);
3757 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3759 kvm_seg.type |= type_bits;
3761 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3762 seg != VCPU_SREG_LDTR)
3764 kvm_seg.unusable = 1;
3766 kvm_set_segment(vcpu, &kvm_seg, seg);
3770 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3771 struct tss_segment_32 *tss)
3773 tss->cr3 = vcpu->arch.cr3;
3774 tss->eip = kvm_rip_read(vcpu);
3775 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3776 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3777 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3778 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3779 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3780 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3781 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3782 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3783 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3784 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3785 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3786 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3787 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3788 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3789 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3790 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3793 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3794 struct tss_segment_32 *tss)
3796 kvm_set_cr3(vcpu, tss->cr3);
3798 kvm_rip_write(vcpu, tss->eip);
3799 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3801 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3802 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3803 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3804 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3805 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3806 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3807 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3808 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3810 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3813 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3816 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3819 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3822 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3825 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3828 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3833 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3834 struct tss_segment_16 *tss)
3836 tss->ip = kvm_rip_read(vcpu);
3837 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3838 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3839 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3840 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3841 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3842 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3843 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3844 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3845 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3847 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3848 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3849 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3850 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3851 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3852 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3855 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3856 struct tss_segment_16 *tss)
3858 kvm_rip_write(vcpu, tss->ip);
3859 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3860 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3861 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3862 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3863 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3864 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3865 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3866 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3867 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3869 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3872 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3875 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3878 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3881 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3886 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3887 u16 old_tss_sel, u32 old_tss_base,
3888 struct desc_struct *nseg_desc)
3890 struct tss_segment_16 tss_segment_16;
3893 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3894 sizeof tss_segment_16))
3897 save_state_to_tss16(vcpu, &tss_segment_16);
3899 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3900 sizeof tss_segment_16))
3903 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3904 &tss_segment_16, sizeof tss_segment_16))
3907 if (old_tss_sel != 0xffff) {
3908 tss_segment_16.prev_task_link = old_tss_sel;
3910 if (kvm_write_guest(vcpu->kvm,
3911 get_tss_base_addr(vcpu, nseg_desc),
3912 &tss_segment_16.prev_task_link,
3913 sizeof tss_segment_16.prev_task_link))
3917 if (load_state_from_tss16(vcpu, &tss_segment_16))
3925 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3926 u16 old_tss_sel, u32 old_tss_base,
3927 struct desc_struct *nseg_desc)
3929 struct tss_segment_32 tss_segment_32;
3932 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3933 sizeof tss_segment_32))
3936 save_state_to_tss32(vcpu, &tss_segment_32);
3938 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3939 sizeof tss_segment_32))
3942 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3943 &tss_segment_32, sizeof tss_segment_32))
3946 if (old_tss_sel != 0xffff) {
3947 tss_segment_32.prev_task_link = old_tss_sel;
3949 if (kvm_write_guest(vcpu->kvm,
3950 get_tss_base_addr(vcpu, nseg_desc),
3951 &tss_segment_32.prev_task_link,
3952 sizeof tss_segment_32.prev_task_link))
3956 if (load_state_from_tss32(vcpu, &tss_segment_32))
3964 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3966 struct kvm_segment tr_seg;
3967 struct desc_struct cseg_desc;
3968 struct desc_struct nseg_desc;
3970 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3971 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3973 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3975 /* FIXME: Handle errors. Failure to read either TSS or their
3976 * descriptors should generate a pagefault.
3978 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3981 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3984 if (reason != TASK_SWITCH_IRET) {
3987 cpl = kvm_x86_ops->get_cpl(vcpu);
3988 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3989 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3994 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3995 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3999 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
4000 cseg_desc.type &= ~(1 << 1); //clear the B flag
4001 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
4004 if (reason == TASK_SWITCH_IRET) {
4005 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4006 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
4009 /* set back link to prev task only if NT bit is set in eflags
4010 note that old_tss_sel is not used afetr this point */
4011 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4012 old_tss_sel = 0xffff;
4014 /* set back link to prev task only if NT bit is set in eflags
4015 note that old_tss_sel is not used afetr this point */
4016 if (reason != TASK_SWITCH_CALL && reason != TASK_SWITCH_GATE)
4017 old_tss_sel = 0xffff;
4019 if (nseg_desc.type & 8)
4020 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_sel,
4021 old_tss_base, &nseg_desc);
4023 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_sel,
4024 old_tss_base, &nseg_desc);
4026 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
4027 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
4028 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
4031 if (reason != TASK_SWITCH_IRET) {
4032 nseg_desc.type |= (1 << 1);
4033 save_guest_segment_descriptor(vcpu, tss_selector,
4037 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
4038 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
4040 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
4044 EXPORT_SYMBOL_GPL(kvm_task_switch);
4046 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
4047 struct kvm_sregs *sregs)
4049 int mmu_reset_needed = 0;
4050 int i, pending_vec, max_bits;
4051 struct descriptor_table dt;
4055 dt.limit = sregs->idt.limit;
4056 dt.base = sregs->idt.base;
4057 kvm_x86_ops->set_idt(vcpu, &dt);
4058 dt.limit = sregs->gdt.limit;
4059 dt.base = sregs->gdt.base;
4060 kvm_x86_ops->set_gdt(vcpu, &dt);
4062 vcpu->arch.cr2 = sregs->cr2;
4063 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
4065 down_read(&vcpu->kvm->slots_lock);
4066 if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
4067 vcpu->arch.cr3 = sregs->cr3;
4069 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
4070 up_read(&vcpu->kvm->slots_lock);
4072 kvm_set_cr8(vcpu, sregs->cr8);
4074 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
4075 kvm_x86_ops->set_efer(vcpu, sregs->efer);
4076 kvm_set_apic_base(vcpu, sregs->apic_base);
4078 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
4080 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
4081 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
4082 vcpu->arch.cr0 = sregs->cr0;
4084 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
4085 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
4086 if (!is_long_mode(vcpu) && is_pae(vcpu))
4087 load_pdptrs(vcpu, vcpu->arch.cr3);
4089 if (mmu_reset_needed)
4090 kvm_mmu_reset_context(vcpu);
4092 if (!irqchip_in_kernel(vcpu->kvm)) {
4093 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
4094 sizeof vcpu->arch.irq_pending);
4095 vcpu->arch.irq_summary = 0;
4096 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
4097 if (vcpu->arch.irq_pending[i])
4098 __set_bit(i, &vcpu->arch.irq_summary);
4100 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
4101 pending_vec = find_first_bit(
4102 (const unsigned long *)sregs->interrupt_bitmap,
4104 /* Only pending external irq is handled here */
4105 if (pending_vec < max_bits) {
4106 kvm_queue_interrupt(vcpu, pending_vec);
4107 pr_debug("Set back pending irq %d\n", pending_vec);
4109 kvm_pic_clear_isr_ack(vcpu->kvm);
4112 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4113 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4114 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4115 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4116 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4117 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4119 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4120 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4122 /* Older userspace won't unhalt the vcpu on reset. */
4123 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4124 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4125 !(vcpu->arch.cr0 & X86_CR0_PE))
4126 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4133 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4134 struct kvm_guest_debug *dbg)
4140 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4141 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4142 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4143 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4144 vcpu->arch.switch_db_regs =
4145 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4147 for (i = 0; i < KVM_NR_DB_REGS; i++)
4148 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4149 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4152 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4154 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4155 kvm_queue_exception(vcpu, DB_VECTOR);
4156 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4157 kvm_queue_exception(vcpu, BP_VECTOR);
4165 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4166 * we have asm/x86/processor.h
4177 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4178 #ifdef CONFIG_X86_64
4179 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4181 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4186 * Translate a guest virtual address to a guest physical address.
4188 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4189 struct kvm_translation *tr)
4191 unsigned long vaddr = tr->linear_address;
4195 down_read(&vcpu->kvm->slots_lock);
4196 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4197 up_read(&vcpu->kvm->slots_lock);
4198 tr->physical_address = gpa;
4199 tr->valid = gpa != UNMAPPED_GVA;
4207 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4209 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4213 memcpy(fpu->fpr, fxsave->st_space, 128);
4214 fpu->fcw = fxsave->cwd;
4215 fpu->fsw = fxsave->swd;
4216 fpu->ftwx = fxsave->twd;
4217 fpu->last_opcode = fxsave->fop;
4218 fpu->last_ip = fxsave->rip;
4219 fpu->last_dp = fxsave->rdp;
4220 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4227 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4229 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4233 memcpy(fxsave->st_space, fpu->fpr, 128);
4234 fxsave->cwd = fpu->fcw;
4235 fxsave->swd = fpu->fsw;
4236 fxsave->twd = fpu->ftwx;
4237 fxsave->fop = fpu->last_opcode;
4238 fxsave->rip = fpu->last_ip;
4239 fxsave->rdp = fpu->last_dp;
4240 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4247 void fx_init(struct kvm_vcpu *vcpu)
4249 unsigned after_mxcsr_mask;
4252 * Touch the fpu the first time in non atomic context as if
4253 * this is the first fpu instruction the exception handler
4254 * will fire before the instruction returns and it'll have to
4255 * allocate ram with GFP_KERNEL.
4258 kvm_fx_save(&vcpu->arch.host_fx_image);
4260 /* Initialize guest FPU by resetting ours and saving into guest's */
4262 kvm_fx_save(&vcpu->arch.host_fx_image);
4264 kvm_fx_save(&vcpu->arch.guest_fx_image);
4265 kvm_fx_restore(&vcpu->arch.host_fx_image);
4268 vcpu->arch.cr0 |= X86_CR0_ET;
4269 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4270 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4271 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4272 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4274 EXPORT_SYMBOL_GPL(fx_init);
4276 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4278 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4281 vcpu->guest_fpu_loaded = 1;
4282 kvm_fx_save(&vcpu->arch.host_fx_image);
4283 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4285 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4287 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4289 if (!vcpu->guest_fpu_loaded)
4292 vcpu->guest_fpu_loaded = 0;
4293 kvm_fx_save(&vcpu->arch.guest_fx_image);
4294 kvm_fx_restore(&vcpu->arch.host_fx_image);
4295 ++vcpu->stat.fpu_reload;
4297 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4299 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4301 if (vcpu->arch.time_page) {
4302 kvm_release_page_dirty(vcpu->arch.time_page);
4303 vcpu->arch.time_page = NULL;
4306 kvm_x86_ops->vcpu_free(vcpu);
4309 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4312 return kvm_x86_ops->vcpu_create(kvm, id);
4315 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4319 /* We do fxsave: this must be aligned. */
4320 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4322 vcpu->arch.mtrr_state.have_fixed = 1;
4324 r = kvm_arch_vcpu_reset(vcpu);
4326 r = kvm_mmu_setup(vcpu);
4333 kvm_x86_ops->vcpu_free(vcpu);
4337 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4340 kvm_mmu_unload(vcpu);
4343 kvm_x86_ops->vcpu_free(vcpu);
4346 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4348 vcpu->arch.nmi_pending = false;
4349 vcpu->arch.nmi_injected = false;
4351 vcpu->arch.switch_db_regs = 0;
4352 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4353 vcpu->arch.dr6 = DR6_FIXED_1;
4354 vcpu->arch.dr7 = DR7_FIXED_1;
4356 return kvm_x86_ops->vcpu_reset(vcpu);
4359 void kvm_arch_hardware_enable(void *garbage)
4361 kvm_x86_ops->hardware_enable(garbage);
4364 void kvm_arch_hardware_disable(void *garbage)
4366 kvm_x86_ops->hardware_disable(garbage);
4369 int kvm_arch_hardware_setup(void)
4371 return kvm_x86_ops->hardware_setup();
4374 void kvm_arch_hardware_unsetup(void)
4376 kvm_x86_ops->hardware_unsetup();
4379 void kvm_arch_check_processor_compat(void *rtn)
4381 kvm_x86_ops->check_processor_compatibility(rtn);
4384 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4390 BUG_ON(vcpu->kvm == NULL);
4393 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4394 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4395 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4397 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4399 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4404 vcpu->arch.pio_data = page_address(page);
4406 r = kvm_mmu_create(vcpu);
4408 goto fail_free_pio_data;
4410 if (irqchip_in_kernel(kvm)) {
4411 r = kvm_create_lapic(vcpu);
4413 goto fail_mmu_destroy;
4419 kvm_mmu_destroy(vcpu);
4421 free_page((unsigned long)vcpu->arch.pio_data);
4426 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4428 kvm_free_lapic(vcpu);
4429 down_read(&vcpu->kvm->slots_lock);
4430 kvm_mmu_destroy(vcpu);
4431 up_read(&vcpu->kvm->slots_lock);
4432 free_page((unsigned long)vcpu->arch.pio_data);
4435 struct kvm *kvm_arch_create_vm(void)
4437 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4440 return ERR_PTR(-ENOMEM);
4442 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4443 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4445 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4446 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4448 rdtscll(kvm->arch.vm_init_tsc);
4453 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4456 kvm_mmu_unload(vcpu);
4460 static void kvm_free_vcpus(struct kvm *kvm)
4465 * Unpin any mmu pages first.
4467 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4469 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4470 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4471 if (kvm->vcpus[i]) {
4472 kvm_arch_vcpu_free(kvm->vcpus[i]);
4473 kvm->vcpus[i] = NULL;
4479 void kvm_arch_sync_events(struct kvm *kvm)
4481 kvm_free_all_assigned_devices(kvm);
4484 void kvm_arch_destroy_vm(struct kvm *kvm)
4486 kvm_iommu_unmap_guest(kvm);
4488 kfree(kvm->arch.vpic);
4489 kfree(kvm->arch.vioapic);
4490 kvm_free_vcpus(kvm);
4491 kvm_free_physmem(kvm);
4492 if (kvm->arch.apic_access_page)
4493 put_page(kvm->arch.apic_access_page);
4494 if (kvm->arch.ept_identity_pagetable)
4495 put_page(kvm->arch.ept_identity_pagetable);
4499 int kvm_arch_set_memory_region(struct kvm *kvm,
4500 struct kvm_userspace_memory_region *mem,
4501 struct kvm_memory_slot old,
4504 int npages = mem->memory_size >> PAGE_SHIFT;
4505 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4507 /*To keep backward compatibility with older userspace,
4508 *x86 needs to hanlde !user_alloc case.
4511 if (npages && !old.rmap) {
4512 unsigned long userspace_addr;
4514 down_write(¤t->mm->mmap_sem);
4515 userspace_addr = do_mmap(NULL, 0,
4517 PROT_READ | PROT_WRITE,
4518 MAP_PRIVATE | MAP_ANONYMOUS,
4520 up_write(¤t->mm->mmap_sem);
4522 if (IS_ERR((void *)userspace_addr))
4523 return PTR_ERR((void *)userspace_addr);
4525 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4526 spin_lock(&kvm->mmu_lock);
4527 memslot->userspace_addr = userspace_addr;
4528 spin_unlock(&kvm->mmu_lock);
4530 if (!old.user_alloc && old.rmap) {
4533 down_write(¤t->mm->mmap_sem);
4534 ret = do_munmap(current->mm, old.userspace_addr,
4535 old.npages * PAGE_SIZE);
4536 up_write(¤t->mm->mmap_sem);
4539 "kvm_vm_ioctl_set_memory_region: "
4540 "failed to munmap memory\n");
4545 if (!kvm->arch.n_requested_mmu_pages) {
4546 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4547 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4550 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4551 kvm_flush_remote_tlbs(kvm);
4556 void kvm_arch_flush_shadow(struct kvm *kvm)
4558 kvm_mmu_zap_all(kvm);
4561 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4563 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4564 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4565 || vcpu->arch.nmi_pending;
4568 static void vcpu_kick_intr(void *info)
4571 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4572 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4576 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4578 int ipi_pcpu = vcpu->cpu;
4581 if (waitqueue_active(&vcpu->wq)) {
4582 wake_up_interruptible(&vcpu->wq);
4583 ++vcpu->stat.halt_wakeup;
4586 * We may be called synchronously with irqs disabled in guest mode,
4587 * So need not to call smp_call_function_single() in that case.
4590 if (vcpu->guest_mode && vcpu->cpu != cpu)
4591 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4595 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
4597 return kvm_x86_ops->interrupt_allowed(vcpu);