1 /* linux/arch/arm/mach-s3c2410/pm.c
3 * Copyright (c) 2006 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C2410 (and compatible) Power Manager (Suspend-To-RAM) support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #include <linux/init.h>
24 #include <linux/suspend.h>
25 #include <linux/errno.h>
26 #include <linux/time.h>
27 #include <linux/sysdev.h>
30 #include <mach/hardware.h>
32 #include <asm/mach-types.h>
34 #include <mach/regs-gpio.h>
35 #include <mach/h1940.h>
40 #ifdef CONFIG_S3C2410_PM_DEBUG
41 extern void pm_dbg(const char *fmt, ...);
42 #define DBG(fmt...) pm_dbg(fmt)
44 #define DBG(fmt...) printk(KERN_DEBUG fmt)
47 static void s3c2410_pm_prepare(void)
49 /* ensure at least GSTATUS3 has the resume address */
51 __raw_writel(virt_to_phys(s3c2410_cpu_resume), S3C2410_GSTATUS3);
53 DBG("GSTATUS3 0x%08x\n", __raw_readl(S3C2410_GSTATUS3));
54 DBG("GSTATUS4 0x%08x\n", __raw_readl(S3C2410_GSTATUS4));
56 if (machine_is_h1940()) {
57 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
59 unsigned long calc = 0;
61 /* generate check for the bootloader to check on resume */
63 for (ptr = 0; ptr < 0x40000; ptr += 0x400)
64 calc += __raw_readl(base+ptr);
66 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
69 /* the RX3715 uses similar code and the same H1940 and the
70 * same offsets for resume and checksum pointers */
72 if (machine_is_rx3715()) {
73 void *base = phys_to_virt(H1940_SUSPEND_CHECK);
75 unsigned long calc = 0;
77 /* generate check for the bootloader to check on resume */
79 for (ptr = 0; ptr < 0x40000; ptr += 0x4)
80 calc += __raw_readl(base+ptr);
82 __raw_writel(calc, phys_to_virt(H1940_SUSPEND_CHECKSUM));
85 if ( machine_is_aml_m5900() )
86 s3c2410_gpio_setpin(S3C2410_GPF2, 1);
90 static int s3c2410_pm_resume(struct sys_device *dev)
94 /* unset the return-from-sleep flag, to ensure reset */
96 tmp = __raw_readl(S3C2410_GSTATUS2);
97 tmp &= S3C2410_GSTATUS2_OFFRESET;
98 __raw_writel(tmp, S3C2410_GSTATUS2);
100 if ( machine_is_aml_m5900() )
101 s3c2410_gpio_setpin(S3C2410_GPF2, 0);
106 static int s3c2410_pm_add(struct sys_device *dev)
108 pm_cpu_prep = s3c2410_pm_prepare;
109 pm_cpu_sleep = s3c2410_cpu_suspend;
114 #if defined(CONFIG_CPU_S3C2410)
115 static struct sysdev_driver s3c2410_pm_driver = {
116 .add = s3c2410_pm_add,
117 .resume = s3c2410_pm_resume,
120 /* register ourselves */
122 static int __init s3c2410_pm_drvinit(void)
124 return sysdev_driver_register(&s3c2410_sysclass, &s3c2410_pm_driver);
127 arch_initcall(s3c2410_pm_drvinit);
130 #if defined(CONFIG_CPU_S3C2440)
131 static struct sysdev_driver s3c2440_pm_driver = {
132 .add = s3c2410_pm_add,
133 .resume = s3c2410_pm_resume,
136 static int __init s3c2440_pm_drvinit(void)
138 return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_pm_driver);
141 arch_initcall(s3c2440_pm_drvinit);
144 #if defined(CONFIG_CPU_S3C2442)
145 static struct sysdev_driver s3c2442_pm_driver = {
146 .add = s3c2410_pm_add,
147 .resume = s3c2410_pm_resume,
150 static int __init s3c2442_pm_drvinit(void)
152 return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_pm_driver);
155 arch_initcall(s3c2442_pm_drvinit);