2 * saa7114 - Philips SAA7114H video decoder driver version 0.0.1
4 * Copyright (C) 2002 Maxim Yevtyushkin <max@linuxmedialabs.com>
6 * Based on saa7111 driver by Dave Perks
8 * Copyright (C) 1998 Dave Perks <dperks@ibm.net>
10 * Slight changes for video timing and attachment output by
11 * Wolfgang Scherr <scherr@net4you.net>
13 * Changes by Ronald Bultje <rbultje@ronald.bitfreak.net>
14 * - moved over to linux>=2.4.x i2c protocol (1/1/2003)
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License as published by
18 * the Free Software Foundation; either version 2 of the License, or
19 * (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31 #include <linux/module.h>
32 #include <linux/init.h>
33 #include <linux/delay.h>
34 #include <linux/errno.h>
36 #include <linux/kernel.h>
37 #include <linux/major.h>
39 #include <linux/slab.h>
42 #include <linux/pci.h>
43 #include <linux/signal.h>
45 #include <asm/pgtable.h>
47 #include <linux/sched.h>
48 #include <asm/segment.h>
49 #include <linux/types.h>
51 #include <linux/videodev.h>
52 #include <asm/uaccess.h>
54 MODULE_DESCRIPTION("Philips SAA7114H video decoder driver");
55 MODULE_AUTHOR("Maxim Yevtyushkin");
56 MODULE_LICENSE("GPL");
58 #include <linux/i2c.h>
59 #include <linux/i2c-dev.h>
61 #define I2C_NAME(x) (x)->name
63 #include <linux/video_decoder.h>
66 module_param(debug, int, 0);
67 MODULE_PARM_DESC(debug, "Debug level (0-1)");
69 #define dprintk(num, format, args...) \
72 printk(format, ##args); \
75 /* ----------------------------------------------------------------------- */
78 unsigned char reg[0xf0 * 2];
90 #define I2C_SAA7114 0x42
91 #define I2C_SAA7114A 0x40
96 //#define SAA_7114_NTSC_HSYNC_START (-3)
97 //#define SAA_7114_NTSC_HSYNC_STOP (-18)
99 #define SAA_7114_NTSC_HSYNC_START (-17)
100 #define SAA_7114_NTSC_HSYNC_STOP (-32)
102 //#define SAA_7114_NTSC_HOFFSET (5)
103 #define SAA_7114_NTSC_HOFFSET (6)
104 #define SAA_7114_NTSC_VOFFSET (10)
105 #define SAA_7114_NTSC_WIDTH (720)
106 #define SAA_7114_NTSC_HEIGHT (250)
108 #define SAA_7114_SECAM_HSYNC_START (-17)
109 #define SAA_7114_SECAM_HSYNC_STOP (-32)
111 #define SAA_7114_SECAM_HOFFSET (2)
112 #define SAA_7114_SECAM_VOFFSET (10)
113 #define SAA_7114_SECAM_WIDTH (720)
114 #define SAA_7114_SECAM_HEIGHT (300)
116 #define SAA_7114_PAL_HSYNC_START (-17)
117 #define SAA_7114_PAL_HSYNC_STOP (-32)
119 #define SAA_7114_PAL_HOFFSET (2)
120 #define SAA_7114_PAL_VOFFSET (10)
121 #define SAA_7114_PAL_WIDTH (720)
122 #define SAA_7114_PAL_HEIGHT (300)
126 #define SAA_7114_VERTICAL_CHROMA_OFFSET 0 //0x50504040
127 #define SAA_7114_VERTICAL_LUMA_OFFSET 0
129 #define REG_ADDR(x) (((x) << 1) + 1)
130 #define LOBYTE(x) ((unsigned char)((x) & 0xff))
131 #define HIBYTE(x) ((unsigned char)(((x) >> 8) & 0xff))
132 #define LOWORD(x) ((unsigned short int)((x) & 0xffff))
133 #define HIWORD(x) ((unsigned short int)(((x) >> 16) & 0xffff))
136 /* ----------------------------------------------------------------------- */
139 saa7114_write (struct i2c_client *client,
143 /*struct saa7114 *decoder = i2c_get_clientdata(client);*/
145 /*decoder->reg[reg] = value;*/
146 return i2c_smbus_write_byte_data(client, reg, value);
150 saa7114_write_block (struct i2c_client *client,
157 /* the saa7114 has an autoincrement function, use it if
158 * the adapter understands raw I2C */
159 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
160 /* do raw I2C, not smbus compatible */
161 /*struct saa7114 *decoder = i2c_get_clientdata(client);*/
165 msg.addr = client->addr;
168 msg.buf = (char *) block_data;
170 block_data[msg.len++] = reg = data[0];
172 block_data[msg.len++] =
173 /*decoder->reg[reg++] =*/ data[1];
176 } while (len >= 2 && data[0] == reg &&
178 if ((ret = i2c_transfer(client->adapter,
183 /* do some slow I2C emulation kind of thing */
186 if ((ret = saa7114_write(client, reg,
197 saa7114_read (struct i2c_client *client,
200 return i2c_smbus_read_byte_data(client, reg);
203 /* ----------------------------------------------------------------------- */
205 // initially set NTSC, composite
208 static const unsigned char init[] = {
209 0x00, 0x00, /* 00 - ID byte , chip version,
211 0x01, 0x08, /* 01 - X,X,X,X, IDEL3 to IDEL0 -
212 * horizontal increment delay,
213 * recommended position */
214 0x02, 0x00, /* 02 - FUSE=3, GUDL=2, MODE=0 ;
216 0x03, 0x10, /* 03 - HLNRS=0, VBSL=1, WPOFF=0,
217 * HOLDG=0, GAFIX=0, GAI1=256, GAI2=256 */
218 0x04, 0x90, /* 04 - GAI1=256 */
219 0x05, 0x90, /* 05 - GAI2=256 */
220 0x06, SAA_7114_NTSC_HSYNC_START, /* 06 - HSB: hsync start,
221 * depends on the video standard */
222 0x07, SAA_7114_NTSC_HSYNC_STOP, /* 07 - HSS: hsync stop, depends
223 *on the video standard */
224 0x08, 0xb8, /* 08 - AUFD=1, FSEL=1, EXFIL=0, VTRC=1,
225 * HPLL: free running in playback, locked
226 * in capture, VNOI=0 */
227 0x09, 0x80, /* 09 - BYPS=0, PREF=0, BPSS=0, VBLB=0,
228 * UPTCV=0, APER=1; depends from input */
229 0x0a, 0x80, /* 0a - BRIG=128 */
230 0x0b, 0x44, /* 0b - CONT=1.109 */
231 0x0c, 0x40, /* 0c - SATN=1.0 */
232 0x0d, 0x00, /* 0d - HUE=0 */
233 0x0e, 0x84, /* 0e - CDTO, CSTD2 to 0, DCVF, FCTC,
234 * CCOMB; depends from video standard */
235 0x0f, 0x24, /* 0f - ACGC,CGAIN6 to CGAIN0; depends
236 * from video standard */
237 0x10, 0x03, /* 10 - OFFU1 to 0, OFFV1 to 0, CHBW,
239 0x11, 0x59, /* 11 - COLO, RTP1, HEDL1 to 0, RTP0,
241 0x12, 0xc9, /* 12 - RT signal control RTSE13 to 10
243 0x13, 0x80, /* 13 - RT/X port output control */
244 0x14, 0x00, /* 14 - analog, ADC, compatibility control */
245 0x15, 0x00, /* 15 - VGATE start FID change */
246 0x16, 0xfe, /* 16 - VGATE stop */
247 0x17, 0x00, /* 17 - Misc., VGATE MSBs */
248 0x18, 0x40, /* RAWG */
249 0x19, 0x80, /* RAWO */
255 0x1f, 0x00, /* status byte, read only */
256 0x20, 0x00, /* video decoder reserved part */
272 0x30, 0xbc, /* audio clock generator */
288 0x40, 0x00, /* VBI data slicer */
312 0x58, 0x40, // framing code
313 0x59, 0x47, // horizontal offset
314 0x5a, 0x06, // vertical offset
315 0x5b, 0x83, // field offset
316 0x5c, 0x00, // reserved
317 0x5d, 0x3e, // header and data
318 0x5e, 0x00, // sliced data
319 0x5f, 0x00, // reserved
320 0x60, 0x00, /* video decoder reserved part */
336 0x70, 0x00, /* video decoder reserved part */
352 0x80, 0x00, /* X-port, I-port and scaler */
357 0x85, 0x0d, // hsync and vsync ?
368 0x90, 0x03, /* Task A definition */
372 0x94, 0x00, // window settings
384 0xa0, 0x01, /* horizontal integer prescaling ratio */
385 0xa1, 0x00, /* horizontal prescaler accumulation
387 0xa2, 0x00, /* UV FIR filter, Y FIR filter, prescaler
390 0xa4, 0x80, // luminance brightness
391 0xa5, 0x40, // luminance gain
392 0xa6, 0x40, // chrominance saturation
394 0xa8, 0x00, // horizontal luminance scaling increment
396 0xaa, 0x00, // horizontal luminance phase offset
398 0xac, 0x00, // horizontal chrominance scaling increment
400 0xae, 0x00, // horizontal chrominance phase offset
402 0xb0, 0x00, // vertical luminance scaling increment
404 0xb2, 0x00, // vertical chrominance scaling increment
418 0xc0, 0x02, // Task B definition
422 0xc4, 0x00, // window settings
434 0xd0, 0x01, // horizontal integer prescaling ratio
435 0xd1, 0x00, // horizontal prescaler accumulation sequence length
436 0xd2, 0x00, // UV FIR filter, Y FIR filter, prescaler DC gain
438 0xd4, 0x80, // luminance brightness
439 0xd5, 0x40, // luminance gain
440 0xd6, 0x40, // chrominance saturation
442 0xd8, 0x00, // horizontal luminance scaling increment
444 0xda, 0x00, // horizontal luminance phase offset
446 0xdc, 0x00, // horizontal chrominance scaling increment
448 0xde, 0x00, // horizontal chrominance phase offset
450 0xe0, 0x00, // vertical luminance scaling increment
452 0xe2, 0x00, // vertical chrominance scaling increment
469 saa7114_command (struct i2c_client *client,
473 struct saa7114 *decoder = i2c_get_clientdata(client);
478 //dprintk(1, KERN_INFO "%s: writing init\n", I2C_NAME(client));
479 //saa7114_write_block(client, init, sizeof(init));
486 dprintk(1, KERN_INFO "%s: decoder dump\n", I2C_NAME(client));
488 for (i = 0; i < 32; i += 16) {
491 printk(KERN_DEBUG "%s: %03x", I2C_NAME(client), i);
492 for (j = 0; j < 16; ++j) {
494 saa7114_read(client, i + j));
501 case DECODER_GET_CAPABILITIES:
503 struct video_decoder_capability *cap = arg;
505 dprintk(1, KERN_DEBUG "%s: decoder get capabilities\n",
508 cap->flags = VIDEO_DECODER_PAL |
517 case DECODER_GET_STATUS:
523 status = saa7114_read(client, 0x1f);
525 dprintk(1, KERN_DEBUG "%s status: 0x%02x\n", I2C_NAME(client),
528 if ((status & (1 << 6)) == 0) {
529 res |= DECODER_STATUS_GOOD;
531 switch (decoder->norm) {
532 case VIDEO_MODE_NTSC:
533 res |= DECODER_STATUS_NTSC;
536 res |= DECODER_STATUS_PAL;
538 case VIDEO_MODE_SECAM:
539 res |= DECODER_STATUS_SECAM;
542 case VIDEO_MODE_AUTO:
543 if ((status & (1 << 5)) != 0) {
544 res |= DECODER_STATUS_NTSC;
546 res |= DECODER_STATUS_PAL;
550 if ((status & (1 << 0)) != 0) {
551 res |= DECODER_STATUS_COLOR;
557 case DECODER_SET_NORM:
561 short int hoff = 0, voff = 0, w = 0, h = 0;
563 dprintk(1, KERN_DEBUG "%s: decoder set norm ",
567 case VIDEO_MODE_NTSC:
568 dprintk(1, "NTSC\n");
569 decoder->reg[REG_ADDR(0x06)] =
570 SAA_7114_NTSC_HSYNC_START;
571 decoder->reg[REG_ADDR(0x07)] =
572 SAA_7114_NTSC_HSYNC_STOP;
574 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
576 decoder->reg[REG_ADDR(0x0e)] = 0x85;
577 decoder->reg[REG_ADDR(0x0f)] = 0x24;
579 hoff = SAA_7114_NTSC_HOFFSET;
580 voff = SAA_7114_NTSC_VOFFSET;
581 w = SAA_7114_NTSC_WIDTH;
582 h = SAA_7114_NTSC_HEIGHT;
588 decoder->reg[REG_ADDR(0x06)] =
589 SAA_7114_PAL_HSYNC_START;
590 decoder->reg[REG_ADDR(0x07)] =
591 SAA_7114_PAL_HSYNC_STOP;
593 decoder->reg[REG_ADDR(0x08)] = decoder->playback ? 0x7c : 0xb8; // PLL free when playback, PLL close when capture
595 decoder->reg[REG_ADDR(0x0e)] = 0x81;
596 decoder->reg[REG_ADDR(0x0f)] = 0x24;
598 hoff = SAA_7114_PAL_HOFFSET;
599 voff = SAA_7114_PAL_VOFFSET;
600 w = SAA_7114_PAL_WIDTH;
601 h = SAA_7114_PAL_HEIGHT;
606 dprintk(1, " Unknown video mode!!!\n");
612 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
613 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
614 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
615 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
616 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
617 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
618 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
619 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
620 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
621 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
622 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
623 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
625 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
626 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
627 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
628 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
629 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
630 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
631 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
632 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
633 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
634 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
635 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
636 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
639 saa7114_write(client, 0x80, 0x06); // i-port and scaler back end clock selection, task A&B off
640 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
641 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
643 saa7114_write_block(client, decoder->reg + (0x06 << 1),
645 saa7114_write_block(client, decoder->reg + (0x0e << 1),
647 saa7114_write_block(client, decoder->reg + (0x5a << 1),
650 saa7114_write_block(client, decoder->reg + (0x94 << 1),
651 (0x9f + 1 - 0x94) << 1);
652 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
653 (0xcf + 1 - 0xc4) << 1);
655 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
656 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
657 saa7114_write(client, 0x80, 0x36); // i-port and scaler back end clock selection
659 decoder->norm = *iarg;
663 case DECODER_SET_INPUT:
667 dprintk(1, KERN_DEBUG "%s: decoder set input (%d)\n",
668 I2C_NAME(client), *iarg);
669 if (*iarg < 0 || *iarg > 7) {
673 if (decoder->input != *iarg) {
674 dprintk(1, KERN_DEBUG "%s: now setting %s input\n",
676 *iarg >= 6 ? "S-Video" : "Composite");
677 decoder->input = *iarg;
680 decoder->reg[REG_ADDR(0x02)] =
682 reg[REG_ADDR(0x02)] & 0xf0) | (decoder->
685 saa7114_write(client, 0x02,
686 decoder->reg[REG_ADDR(0x02)]);
688 /* bypass chrominance trap for modes 6..9 */
689 decoder->reg[REG_ADDR(0x09)] =
691 reg[REG_ADDR(0x09)] & 0x7f) | (decoder->
695 saa7114_write(client, 0x09,
696 decoder->reg[REG_ADDR(0x09)]);
698 decoder->reg[REG_ADDR(0x0e)] =
701 reg[REG_ADDR(0x0e)] | 1 : decoder->
702 reg[REG_ADDR(0x0e)] & ~1;
703 saa7114_write(client, 0x0e,
704 decoder->reg[REG_ADDR(0x0e)]);
709 case DECODER_SET_OUTPUT:
713 dprintk(1, KERN_DEBUG "%s: decoder set output\n",
716 /* not much choice of outputs */
723 case DECODER_ENABLE_OUTPUT:
726 int enable = (*iarg != 0);
728 dprintk(1, KERN_DEBUG "%s: decoder %s output\n",
729 I2C_NAME(client), enable ? "enable" : "disable");
731 decoder->playback = !enable;
733 if (decoder->enable != enable) {
734 decoder->enable = enable;
736 /* RJ: If output should be disabled (for
737 * playing videos), we also need a open PLL.
738 * The input is set to 0 (where no input
739 * source is connected), although this
742 * If output should be enabled, we have to
746 if (decoder->enable) {
747 decoder->reg[REG_ADDR(0x08)] = 0xb8;
748 decoder->reg[REG_ADDR(0x12)] = 0xc9;
749 decoder->reg[REG_ADDR(0x13)] = 0x80;
750 decoder->reg[REG_ADDR(0x87)] = 0x01;
752 decoder->reg[REG_ADDR(0x08)] = 0x7c;
753 decoder->reg[REG_ADDR(0x12)] = 0x00;
754 decoder->reg[REG_ADDR(0x13)] = 0x00;
755 decoder->reg[REG_ADDR(0x87)] = 0x00;
758 saa7114_write_block(client,
759 decoder->reg + (0x12 << 1),
761 saa7114_write(client, 0x08,
762 decoder->reg[REG_ADDR(0x08)]);
763 saa7114_write(client, 0x87,
764 decoder->reg[REG_ADDR(0x87)]);
765 saa7114_write(client, 0x88, 0xd8); // sw reset scaler
766 saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
767 saa7114_write(client, 0x80, 0x36);
773 case DECODER_SET_PICTURE:
775 struct video_picture *pic = arg;
779 "%s: decoder set picture bright=%d contrast=%d saturation=%d hue=%d\n",
780 I2C_NAME(client), pic->brightness, pic->contrast,
781 pic->colour, pic->hue);
783 if (decoder->bright != pic->brightness) {
784 /* We want 0 to 255 we get 0-65535 */
785 decoder->bright = pic->brightness;
786 saa7114_write(client, 0x0a, decoder->bright >> 8);
788 if (decoder->contrast != pic->contrast) {
789 /* We want 0 to 127 we get 0-65535 */
790 decoder->contrast = pic->contrast;
791 saa7114_write(client, 0x0b,
792 decoder->contrast >> 9);
794 if (decoder->sat != pic->colour) {
795 /* We want 0 to 127 we get 0-65535 */
796 decoder->sat = pic->colour;
797 saa7114_write(client, 0x0c, decoder->sat >> 9);
799 if (decoder->hue != pic->hue) {
800 /* We want -128 to 127 we get 0-65535 */
801 decoder->hue = pic->hue;
802 saa7114_write(client, 0x0d,
803 (decoder->hue - 32768) >> 8);
815 /* ----------------------------------------------------------------------- */
819 * concerning the addresses: i2c wants 7 bit (without the r/w bit), so '>>1'
821 static unsigned short normal_i2c[] =
822 { I2C_SAA7114 >> 1, I2C_SAA7114A >> 1, I2C_CLIENT_END };
824 static unsigned short ignore = I2C_CLIENT_END;
826 static struct i2c_client_address_data addr_data = {
827 .normal_i2c = normal_i2c,
833 static struct i2c_driver i2c_driver_saa7114;
836 saa7114_detect_client (struct i2c_adapter *adapter,
841 short int hoff = SAA_7114_NTSC_HOFFSET;
842 short int voff = SAA_7114_NTSC_VOFFSET;
843 short int w = SAA_7114_NTSC_WIDTH;
844 short int h = SAA_7114_NTSC_HEIGHT;
845 struct i2c_client *client;
846 struct saa7114 *decoder;
850 "saa7114.c: detecting saa7114 client on address 0x%x\n",
853 /* Check if the adapter supports the needed features */
854 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
857 client = kmalloc(sizeof(struct i2c_client), GFP_KERNEL);
860 memset(client, 0, sizeof(struct i2c_client));
861 client->addr = address;
862 client->adapter = adapter;
863 client->driver = &i2c_driver_saa7114;
864 client->flags = I2C_CLIENT_ALLOW_USE;
865 strlcpy(I2C_NAME(client), "saa7114", sizeof(I2C_NAME(client)));
867 decoder = kmalloc(sizeof(struct saa7114), GFP_KERNEL);
868 if (decoder == NULL) {
872 memset(decoder, 0, sizeof(struct saa7114));
873 decoder->norm = VIDEO_MODE_NTSC;
876 decoder->bright = 32768;
877 decoder->contrast = 32768;
878 decoder->hue = 32768;
879 decoder->sat = 32768;
880 decoder->playback = 0; // initially capture mode useda
881 i2c_set_clientdata(client, decoder);
883 memcpy(decoder->reg, init, sizeof(init));
885 decoder->reg[REG_ADDR(0x94)] = LOBYTE(hoff); // hoffset low
886 decoder->reg[REG_ADDR(0x95)] = HIBYTE(hoff) & 0x0f; // hoffset high
887 decoder->reg[REG_ADDR(0x96)] = LOBYTE(w); // width low
888 decoder->reg[REG_ADDR(0x97)] = HIBYTE(w) & 0x0f; // width high
889 decoder->reg[REG_ADDR(0x98)] = LOBYTE(voff); // voffset low
890 decoder->reg[REG_ADDR(0x99)] = HIBYTE(voff) & 0x0f; // voffset high
891 decoder->reg[REG_ADDR(0x9a)] = LOBYTE(h + 2); // height low
892 decoder->reg[REG_ADDR(0x9b)] = HIBYTE(h + 2) & 0x0f; // height high
893 decoder->reg[REG_ADDR(0x9c)] = LOBYTE(w); // out width low
894 decoder->reg[REG_ADDR(0x9d)] = HIBYTE(w) & 0x0f; // out width high
895 decoder->reg[REG_ADDR(0x9e)] = LOBYTE(h); // out height low
896 decoder->reg[REG_ADDR(0x9f)] = HIBYTE(h) & 0x0f; // out height high
898 decoder->reg[REG_ADDR(0xc4)] = LOBYTE(hoff); // hoffset low
899 decoder->reg[REG_ADDR(0xc5)] = HIBYTE(hoff) & 0x0f; // hoffset high
900 decoder->reg[REG_ADDR(0xc6)] = LOBYTE(w); // width low
901 decoder->reg[REG_ADDR(0xc7)] = HIBYTE(w) & 0x0f; // width high
902 decoder->reg[REG_ADDR(0xc8)] = LOBYTE(voff); // voffset low
903 decoder->reg[REG_ADDR(0xc9)] = HIBYTE(voff) & 0x0f; // voffset high
904 decoder->reg[REG_ADDR(0xca)] = LOBYTE(h + 2); // height low
905 decoder->reg[REG_ADDR(0xcb)] = HIBYTE(h + 2) & 0x0f; // height high
906 decoder->reg[REG_ADDR(0xcc)] = LOBYTE(w); // out width low
907 decoder->reg[REG_ADDR(0xcd)] = HIBYTE(w) & 0x0f; // out width high
908 decoder->reg[REG_ADDR(0xce)] = LOBYTE(h); // out height low
909 decoder->reg[REG_ADDR(0xcf)] = HIBYTE(h) & 0x0f; // out height high
911 decoder->reg[REG_ADDR(0xb8)] =
912 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
913 decoder->reg[REG_ADDR(0xb9)] =
914 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
915 decoder->reg[REG_ADDR(0xba)] =
916 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
917 decoder->reg[REG_ADDR(0xbb)] =
918 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
920 decoder->reg[REG_ADDR(0xbc)] =
921 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
922 decoder->reg[REG_ADDR(0xbd)] =
923 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
924 decoder->reg[REG_ADDR(0xbe)] =
925 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
926 decoder->reg[REG_ADDR(0xbf)] =
927 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
929 decoder->reg[REG_ADDR(0xe8)] =
930 LOBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
931 decoder->reg[REG_ADDR(0xe9)] =
932 HIBYTE(LOWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
933 decoder->reg[REG_ADDR(0xea)] =
934 LOBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
935 decoder->reg[REG_ADDR(0xeb)] =
936 HIBYTE(HIWORD(SAA_7114_VERTICAL_CHROMA_OFFSET));
938 decoder->reg[REG_ADDR(0xec)] =
939 LOBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
940 decoder->reg[REG_ADDR(0xed)] =
941 HIBYTE(LOWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
942 decoder->reg[REG_ADDR(0xee)] =
943 LOBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
944 decoder->reg[REG_ADDR(0xef)] =
945 HIBYTE(HIWORD(SAA_7114_VERTICAL_LUMA_OFFSET));
948 decoder->reg[REG_ADDR(0x13)] = 0x80; // RTC0 on
949 decoder->reg[REG_ADDR(0x87)] = 0x01; // I-Port
950 decoder->reg[REG_ADDR(0x12)] = 0xc9; // RTS0
952 decoder->reg[REG_ADDR(0x02)] = 0xc0; // set composite1 input, aveasy
953 decoder->reg[REG_ADDR(0x09)] = 0x00; // chrominance trap
954 decoder->reg[REG_ADDR(0x0e)] |= 1; // combfilter on
957 dprintk(1, KERN_DEBUG "%s_attach: starting decoder init\n",
961 saa7114_write_block(client, decoder->reg + (0x20 << 1),
964 saa7114_write_block(client, decoder->reg + (0x30 << 1),
967 saa7114_write_block(client, decoder->reg + (0x63 << 1),
968 (0x7f + 1 - 0x63) << 1);
970 saa7114_write_block(client, decoder->reg + (0x89 << 1),
973 saa7114_write_block(client, decoder->reg + (0xb8 << 1),
976 saa7114_write_block(client, decoder->reg + (0xe8 << 1),
980 for (i = 0; i <= 5; i++) {
984 "%s_attach: init error %d at stage %d, leaving attach.\n",
985 I2C_NAME(client), i, err[i]);
992 for (i = 6; i < 8; i++) {
995 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
996 I2C_NAME(client), i, saa7114_read(client, i),
997 decoder->reg[REG_ADDR(i)]);
1002 "%s_attach: performing decoder reset sequence\n",
1005 err[6] = saa7114_write(client, 0x80, 0x06); // i-port and scaler backend clock selection, task A&B off
1006 err[7] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1007 err[8] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1009 for (i = 6; i <= 8; i++) {
1013 "%s_attach: init error %d at stage %d, leaving attach.\n",
1014 I2C_NAME(client), i, err[i]);
1021 dprintk(1, KERN_INFO "%s_attach: performing the rest of init\n",
1025 err[9] = saa7114_write(client, 0x01, decoder->reg[REG_ADDR(0x01)]);
1026 err[10] = saa7114_write_block(client, decoder->reg + (0x03 << 1), (0x1e + 1 - 0x03) << 1); // big seq
1027 err[11] = saa7114_write_block(client, decoder->reg + (0x40 << 1), (0x5f + 1 - 0x40) << 1); // slicer
1028 err[12] = saa7114_write_block(client, decoder->reg + (0x81 << 1), 2 << 1); // ?
1029 err[13] = saa7114_write_block(client, decoder->reg + (0x83 << 1), 5 << 1); // ?
1030 err[14] = saa7114_write_block(client, decoder->reg + (0x90 << 1), 4 << 1); // Task A
1032 saa7114_write_block(client, decoder->reg + (0x94 << 1),
1035 saa7114_write_block(client, decoder->reg + (0xa0 << 1),
1038 saa7114_write_block(client, decoder->reg + (0xa8 << 1),
1041 saa7114_write_block(client, decoder->reg + (0xb0 << 1),
1043 err[19] = saa7114_write_block(client, decoder->reg + (0xc0 << 1), 4 << 1); // Task B
1045 saa7114_write_block(client, decoder->reg + (0xc4 << 1),
1048 saa7114_write_block(client, decoder->reg + (0xd0 << 1),
1051 saa7114_write_block(client, decoder->reg + (0xd8 << 1),
1054 saa7114_write_block(client, decoder->reg + (0xe0 << 1),
1057 for (i = 9; i <= 18; i++) {
1061 "%s_attach: init error %d at stage %d, leaving attach.\n",
1062 I2C_NAME(client), i, err[i]);
1070 for (i = 6; i < 8; i++) {
1073 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1074 I2C_NAME(client), i, saa7114_read(client, i),
1075 decoder->reg[REG_ADDR(i)]);
1079 for (i = 0x11; i <= 0x13; i++) {
1082 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1083 I2C_NAME(client), i, saa7114_read(client, i),
1084 decoder->reg[REG_ADDR(i)]);
1088 dprintk(1, KERN_DEBUG "%s_attach: setting video input\n",
1092 saa7114_write(client, 0x02, decoder->reg[REG_ADDR(0x02)]);
1094 saa7114_write(client, 0x09, decoder->reg[REG_ADDR(0x09)]);
1096 saa7114_write(client, 0x0e, decoder->reg[REG_ADDR(0x0e)]);
1098 for (i = 19; i <= 21; i++) {
1102 "%s_attach: init error %d at stage %d, leaving attach.\n",
1103 I2C_NAME(client), i, err[i]);
1112 "%s_attach: performing decoder reset sequence\n",
1115 err[22] = saa7114_write(client, 0x88, 0xd8); // sw reset scaler
1116 err[23] = saa7114_write(client, 0x88, 0xf8); // sw reset scaler release
1117 err[24] = saa7114_write(client, 0x80, 0x36); // i-port and scaler backend clock selection, task A&B off
1120 for (i = 22; i <= 24; i++) {
1124 "%s_attach: init error %d at stage %d, leaving attach.\n",
1125 I2C_NAME(client), i, err[i]);
1132 err[25] = saa7114_write(client, 0x06, init[REG_ADDR(0x06)]);
1133 err[26] = saa7114_write(client, 0x07, init[REG_ADDR(0x07)]);
1134 err[27] = saa7114_write(client, 0x10, init[REG_ADDR(0x10)]);
1138 "%s_attach: chip version %x, decoder status 0x%02x\n",
1139 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1140 saa7114_read(client, 0x1f));
1143 "%s_attach: power save control: 0x%02x, scaler status: 0x%02x\n",
1144 I2C_NAME(client), saa7114_read(client, 0x88),
1145 saa7114_read(client, 0x8f));
1148 for (i = 0x94; i < 0x96; i++) {
1151 "%s_attach: reg[0x%02x] = 0x%02x (0x%02x)\n",
1152 I2C_NAME(client), i, saa7114_read(client, i),
1153 decoder->reg[REG_ADDR(i)]);
1156 i = i2c_attach_client(client);
1163 //i = saa7114_write_block(client, init, sizeof(init));
1166 dprintk(1, KERN_ERR "%s_attach error: init status %d\n",
1167 I2C_NAME(client), i);
1171 "%s_attach: chip version %x at address 0x%x\n",
1172 I2C_NAME(client), saa7114_read(client, 0x00) >> 4,
1180 saa7114_attach_adapter (struct i2c_adapter *adapter)
1184 "saa7114.c: starting probe for adapter %s (0x%x)\n",
1185 I2C_NAME(adapter), adapter->id);
1186 return i2c_probe(adapter, &addr_data, &saa7114_detect_client);
1190 saa7114_detach_client (struct i2c_client *client)
1192 struct saa7114 *decoder = i2c_get_clientdata(client);
1195 err = i2c_detach_client(client);
1206 /* ----------------------------------------------------------------------- */
1208 static struct i2c_driver i2c_driver_saa7114 = {
1209 .owner = THIS_MODULE,
1212 .id = I2C_DRIVERID_SAA7114,
1213 .flags = I2C_DF_NOTIFY,
1215 .attach_adapter = saa7114_attach_adapter,
1216 .detach_client = saa7114_detach_client,
1217 .command = saa7114_command,
1223 return i2c_add_driver(&i2c_driver_saa7114);
1229 i2c_del_driver(&i2c_driver_saa7114);
1232 module_init(saa7114_init);
1233 module_exit(saa7114_exit);