2 * linux/arch/x86-64/kernel/time.c
4 * "High Precision Event Timer" based timekeeping.
6 * Copyright (c) 1991,1992,1995 Linus Torvalds
7 * Copyright (c) 1994 Alan Modra
8 * Copyright (c) 1995 Markus Kuhn
9 * Copyright (c) 1996 Ingo Molnar
10 * Copyright (c) 1998 Andrea Arcangeli
11 * Copyright (c) 2002 Vojtech Pavlik
12 * Copyright (c) 2003 Andi Kleen
13 * RTC support code taken from arch/i386/kernel/timers/time_hpet.c
16 #include <linux/kernel.h>
17 #include <linux/sched.h>
18 #include <linux/interrupt.h>
19 #include <linux/init.h>
20 #include <linux/mc146818rtc.h>
21 #include <linux/time.h>
22 #include <linux/ioport.h>
23 #include <linux/module.h>
24 #include <linux/device.h>
25 #include <linux/sysdev.h>
26 #include <linux/bcd.h>
27 #include <linux/kallsyms.h>
28 #include <linux/acpi.h>
30 #include <acpi/achware.h> /* for PM timer frequency */
32 #include <asm/8253pit.h>
33 #include <asm/pgtable.h>
34 #include <asm/vsyscall.h>
35 #include <asm/timex.h>
36 #include <asm/proto.h>
38 #include <asm/sections.h>
39 #include <linux/cpufreq.h>
40 #include <linux/hpet.h>
41 #ifdef CONFIG_X86_LOCAL_APIC
45 #ifdef CONFIG_CPU_FREQ
46 static void cpufreq_delayed_get(void);
48 extern void i8254_timer_resume(void);
49 extern int using_apic_timer;
51 DEFINE_SPINLOCK(rtc_lock);
52 DEFINE_SPINLOCK(i8253_lock);
54 int nohpet __initdata = 0;
55 static int notsc __initdata = 0;
57 #undef HPET_HACK_ENABLE_DANGEROUS
59 unsigned int cpu_khz; /* TSC clocks / usec, not used here */
60 static unsigned long hpet_period; /* fsecs / HPET clock */
61 unsigned long hpet_tick; /* HPET clocks / interrupt */
62 int hpet_use_timer; /* Use counter of hpet for time keeping, otherwise PIT */
63 unsigned long vxtime_hz = PIT_TICK_RATE;
64 int report_lost_ticks; /* command line option */
65 unsigned long long monotonic_base;
67 struct vxtime_data __vxtime __section_vxtime; /* for vsyscalls */
69 volatile unsigned long __jiffies __section_jiffies = INITIAL_JIFFIES;
70 unsigned long __wall_jiffies __section_wall_jiffies = INITIAL_JIFFIES;
71 struct timespec __xtime __section_xtime;
72 struct timezone __sys_tz __section_sys_tz;
75 * do_gettimeoffset() returns microseconds since last timer interrupt was
76 * triggered by hardware. A memory read of HPET is slower than a register read
77 * of TSC, but much more reliable. It's also synchronized to the timer
78 * interrupt. Note that do_gettimeoffset() may return more than hpet_tick, if a
79 * timer interrupt has happened already, but vxtime.trigger wasn't updated yet.
80 * This is not a problem, because jiffies hasn't updated either. They are bound
81 * together by xtime_lock.
84 static inline unsigned int do_gettimeoffset_tsc(void)
88 t = get_cycles_sync();
89 if (t < vxtime.last_tsc) t = vxtime.last_tsc; /* hack */
90 x = ((t - vxtime.last_tsc) * vxtime.tsc_quot) >> 32;
94 static inline unsigned int do_gettimeoffset_hpet(void)
96 /* cap counter read to one tick to avoid inconsistencies */
97 unsigned long counter = hpet_readl(HPET_COUNTER) - vxtime.last;
98 return (min(counter,hpet_tick) * vxtime.quot) >> 32;
101 unsigned int (*do_gettimeoffset)(void) = do_gettimeoffset_tsc;
104 * This version of gettimeofday() has microsecond resolution and better than
105 * microsecond precision, as we're using at least a 10 MHz (usually 14.31818
109 void do_gettimeofday(struct timeval *tv)
111 unsigned long seq, t;
112 unsigned int sec, usec;
115 seq = read_seqbegin(&xtime_lock);
118 usec = xtime.tv_nsec / 1000;
120 /* i386 does some correction here to keep the clock
121 monotonous even when ntpd is fixing drift.
122 But they didn't work for me, there is a non monotonic
123 clock anyways with ntp.
124 I dropped all corrections now until a real solution can
125 be found. Note when you fix it here you need to do the same
126 in arch/x86_64/kernel/vsyscall.c and export all needed
127 variables in vmlinux.lds. -AK */
129 t = (jiffies - wall_jiffies) * (1000000L / HZ) +
133 } while (read_seqretry(&xtime_lock, seq));
135 tv->tv_sec = sec + usec / 1000000;
136 tv->tv_usec = usec % 1000000;
139 EXPORT_SYMBOL(do_gettimeofday);
142 * settimeofday() first undoes the correction that gettimeofday would do
143 * on the time, and then saves it. This is ugly, but has been like this for
147 int do_settimeofday(struct timespec *tv)
149 time_t wtm_sec, sec = tv->tv_sec;
150 long wtm_nsec, nsec = tv->tv_nsec;
152 if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
155 write_seqlock_irq(&xtime_lock);
157 nsec -= do_gettimeoffset() * 1000 +
158 (jiffies - wall_jiffies) * (NSEC_PER_SEC/HZ);
160 wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
161 wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
163 set_normalized_timespec(&xtime, sec, nsec);
164 set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
168 write_sequnlock_irq(&xtime_lock);
173 EXPORT_SYMBOL(do_settimeofday);
175 unsigned long profile_pc(struct pt_regs *regs)
177 unsigned long pc = instruction_pointer(regs);
179 /* Assume the lock function has either no stack frame or only a single word.
180 This checks if the address on the stack looks like a kernel text address.
181 There is a small window for false hits, but in that case the tick
182 is just accounted to the spinlock function.
183 Better would be to write these functions in assembler again
184 and check exactly. */
185 if (in_lock_functions(pc)) {
186 char *v = *(char **)regs->rsp;
187 if ((v >= _stext && v <= _etext) ||
188 (v >= _sinittext && v <= _einittext) ||
189 (v >= (char *)MODULES_VADDR && v <= (char *)MODULES_END))
190 return (unsigned long)v;
191 return ((unsigned long *)regs->rsp)[1];
195 EXPORT_SYMBOL(profile_pc);
198 * In order to set the CMOS clock precisely, set_rtc_mmss has to be called 500
199 * ms after the second nowtime has started, because when nowtime is written
200 * into the registers of the CMOS clock, it will jump to the next second
201 * precisely 500 ms later. Check the Motorola MC146818A or Dallas DS12887 data
205 static void set_rtc_mmss(unsigned long nowtime)
207 int real_seconds, real_minutes, cmos_minutes;
208 unsigned char control, freq_select;
211 * IRQs are disabled when we're called from the timer interrupt,
212 * no need for spin_lock_irqsave()
215 spin_lock(&rtc_lock);
218 * Tell the clock it's being set and stop it.
221 control = CMOS_READ(RTC_CONTROL);
222 CMOS_WRITE(control | RTC_SET, RTC_CONTROL);
224 freq_select = CMOS_READ(RTC_FREQ_SELECT);
225 CMOS_WRITE(freq_select | RTC_DIV_RESET2, RTC_FREQ_SELECT);
227 cmos_minutes = CMOS_READ(RTC_MINUTES);
228 BCD_TO_BIN(cmos_minutes);
231 * since we're only adjusting minutes and seconds, don't interfere with hour
232 * overflow. This avoids messing with unknown time zones but requires your RTC
233 * not to be off by more than 15 minutes. Since we're calling it only when
234 * our clock is externally synchronized using NTP, this shouldn't be a problem.
237 real_seconds = nowtime % 60;
238 real_minutes = nowtime / 60;
239 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
240 real_minutes += 30; /* correct for half hour time zone */
244 /* AMD 8111 is a really bad time keeper and hits this regularly.
245 It probably was an attempt to avoid screwing up DST, but ignore
247 if (abs(real_minutes - cmos_minutes) >= 30) {
248 printk(KERN_WARNING "time.c: can't update CMOS clock "
249 "from %d to %d\n", cmos_minutes, real_minutes);
254 BIN_TO_BCD(real_seconds);
255 BIN_TO_BCD(real_minutes);
256 CMOS_WRITE(real_seconds, RTC_SECONDS);
257 CMOS_WRITE(real_minutes, RTC_MINUTES);
261 * The following flags have to be released exactly in this order, otherwise the
262 * DS12887 (popular MC146818A clone with integrated battery and quartz) will
263 * not reset the oscillator and will not update precisely 500 ms later. You
264 * won't find this mentioned in the Dallas Semiconductor data sheets, but who
265 * believes data sheets anyway ... -- Markus Kuhn
268 CMOS_WRITE(control, RTC_CONTROL);
269 CMOS_WRITE(freq_select, RTC_FREQ_SELECT);
271 spin_unlock(&rtc_lock);
275 /* monotonic_clock(): returns # of nanoseconds passed since time_init()
276 * Note: This function is required to return accurate
277 * time even in the absence of multiple timer ticks.
279 unsigned long long monotonic_clock(void)
282 u32 last_offset, this_offset, offset;
283 unsigned long long base;
285 if (vxtime.mode == VXTIME_HPET) {
287 seq = read_seqbegin(&xtime_lock);
289 last_offset = vxtime.last;
290 base = monotonic_base;
291 this_offset = hpet_readl(HPET_COUNTER);
292 } while (read_seqretry(&xtime_lock, seq));
293 offset = (this_offset - last_offset);
294 offset *=(NSEC_PER_SEC/HZ)/hpet_tick;
295 return base + offset;
298 seq = read_seqbegin(&xtime_lock);
300 last_offset = vxtime.last_tsc;
301 base = monotonic_base;
302 } while (read_seqretry(&xtime_lock, seq));
303 this_offset = get_cycles_sync();
304 offset = (this_offset - last_offset)*1000/cpu_khz;
305 return base + offset;
308 EXPORT_SYMBOL(monotonic_clock);
310 static noinline void handle_lost_ticks(int lost, struct pt_regs *regs)
312 static long lost_count;
315 if (report_lost_ticks) {
316 printk(KERN_WARNING "time.c: Lost %d timer "
318 print_symbol("rip %s)\n", regs->rip);
321 if (lost_count == 1000 && !warned) {
323 "warning: many lost ticks.\n"
324 KERN_WARNING "Your time source seems to be instable or "
325 "some driver is hogging interupts\n");
326 print_symbol("rip %s\n", regs->rip);
327 if (vxtime.mode == VXTIME_TSC && vxtime.hpet_address) {
328 printk(KERN_WARNING "Falling back to HPET\n");
330 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
332 vxtime.last = hpet_readl(HPET_COUNTER);
333 vxtime.mode = VXTIME_HPET;
334 do_gettimeoffset = do_gettimeoffset_hpet;
336 /* else should fall back to PIT, but code missing. */
341 #ifdef CONFIG_CPU_FREQ
342 /* In some cases the CPU can change frequency without us noticing
343 (like going into thermal throttle)
344 Give cpufreq a change to catch up. */
345 if ((lost_count+1) % 25 == 0) {
346 cpufreq_delayed_get();
351 void main_timer_handler(struct pt_regs *regs)
353 static unsigned long rtc_update = 0;
355 int delay, offset = 0, lost = 0;
358 * Here we are in the timer irq handler. We have irqs locally disabled (so we
359 * don't need spin_lock_irqsave()) but we don't know if the timer_bh is running
360 * on the other CPU, so we need a lock. We also need to lock the vsyscall
361 * variables, because both do_timer() and us change them -arca+vojtech
364 write_seqlock(&xtime_lock);
366 if (vxtime.hpet_address)
367 offset = hpet_readl(HPET_COUNTER);
369 if (hpet_use_timer) {
370 /* if we're using the hpet timer functionality,
371 * we can more accurately know the counter value
372 * when the timer interrupt occured.
374 offset = hpet_readl(HPET_T0_CMP) - hpet_tick;
375 delay = hpet_readl(HPET_COUNTER) - offset;
377 spin_lock(&i8253_lock);
380 delay |= inb(0x40) << 8;
381 spin_unlock(&i8253_lock);
382 delay = LATCH - 1 - delay;
385 tsc = get_cycles_sync();
387 if (vxtime.mode == VXTIME_HPET) {
388 if (offset - vxtime.last > hpet_tick) {
389 lost = (offset - vxtime.last) / hpet_tick - 1;
393 (offset - vxtime.last)*(NSEC_PER_SEC/HZ) / hpet_tick;
395 vxtime.last = offset;
396 #ifdef CONFIG_X86_PM_TIMER
397 } else if (vxtime.mode == VXTIME_PMTMR) {
398 lost = pmtimer_mark_offset();
401 offset = (((tsc - vxtime.last_tsc) *
402 vxtime.tsc_quot) >> 32) - (USEC_PER_SEC / HZ);
407 if (offset > (USEC_PER_SEC / HZ)) {
408 lost = offset / (USEC_PER_SEC / HZ);
409 offset %= (USEC_PER_SEC / HZ);
412 monotonic_base += (tsc - vxtime.last_tsc)*1000000/cpu_khz ;
414 vxtime.last_tsc = tsc - vxtime.quot * delay / vxtime.tsc_quot;
416 if ((((tsc - vxtime.last_tsc) *
417 vxtime.tsc_quot) >> 32) < offset)
418 vxtime.last_tsc = tsc -
419 (((long) offset << 32) / vxtime.tsc_quot) - 1;
423 handle_lost_ticks(lost, regs);
428 * Do the timer stuff.
433 update_process_times(user_mode(regs));
437 * In the SMP case we use the local APIC timer interrupt to do the profiling,
438 * except when we simulate SMP mode on a uniprocessor system, in that case we
439 * have to call the local interrupt handler.
442 #ifndef CONFIG_X86_LOCAL_APIC
443 profile_tick(CPU_PROFILING, regs);
445 if (!using_apic_timer)
446 smp_local_timer_interrupt(regs);
450 * If we have an externally synchronized Linux clock, then update CMOS clock
451 * accordingly every ~11 minutes. set_rtc_mmss() will be called in the jiffy
452 * closest to exactly 500 ms before the next second. If the update fails, we
453 * don't care, as it'll be updated on the next turn, and the problem (time way
454 * off) isn't likely to go away much sooner anyway.
457 if (ntp_synced() && xtime.tv_sec > rtc_update &&
458 abs(xtime.tv_nsec - 500000000) <= tick_nsec / 2) {
459 set_rtc_mmss(xtime.tv_sec);
460 rtc_update = xtime.tv_sec + 660;
463 write_sequnlock(&xtime_lock);
466 static irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
468 if (apic_runs_main_timer > 1)
470 main_timer_handler(regs);
471 #ifdef CONFIG_X86_LOCAL_APIC
472 if (using_apic_timer)
473 smp_send_timer_broadcast_ipi();
478 static unsigned int cyc2ns_scale;
479 #define CYC2NS_SCALE_FACTOR 10 /* 2^10, carefully chosen */
481 static inline void set_cyc2ns_scale(unsigned long cpu_khz)
483 cyc2ns_scale = (1000000 << CYC2NS_SCALE_FACTOR)/cpu_khz;
486 static inline unsigned long long cycles_2_ns(unsigned long long cyc)
488 return (cyc * cyc2ns_scale) >> CYC2NS_SCALE_FACTOR;
491 unsigned long long sched_clock(void)
496 /* Don't do a HPET read here. Using TSC always is much faster
497 and HPET may not be mapped yet when the scheduler first runs.
498 Disadvantage is a small drift between CPUs in some configurations,
499 but that should be tolerable. */
500 if (__vxtime.mode == VXTIME_HPET)
501 return (hpet_readl(HPET_COUNTER) * vxtime.quot) >> 32;
504 /* Could do CPU core sync here. Opteron can execute rdtsc speculatively,
505 which means it is not completely exact and may not be monotonous between
506 CPUs. But the errors should be too small to matter for scheduling
510 return cycles_2_ns(a);
513 static unsigned long get_cmos_time(void)
515 unsigned int timeout = 1000000, year, mon, day, hour, min, sec;
516 unsigned char uip = 0, this = 0;
520 * The Linux interpretation of the CMOS clock register contents: When the
521 * Update-In-Progress (UIP) flag goes from 1 to 0, the RTC registers show the
522 * second which has precisely just started. Waiting for this can take up to 1
523 * second, we timeout approximately after 2.4 seconds on a machine with
524 * standard 8.3 MHz ISA bus.
527 spin_lock_irqsave(&rtc_lock, flags);
529 while (timeout && (!uip || this)) {
531 this = CMOS_READ(RTC_FREQ_SELECT) & RTC_UIP;
536 * Here we are safe to assume the registers won't change for a whole
537 * second, so we just go ahead and read them.
539 sec = CMOS_READ(RTC_SECONDS);
540 min = CMOS_READ(RTC_MINUTES);
541 hour = CMOS_READ(RTC_HOURS);
542 day = CMOS_READ(RTC_DAY_OF_MONTH);
543 mon = CMOS_READ(RTC_MONTH);
544 year = CMOS_READ(RTC_YEAR);
546 spin_unlock_irqrestore(&rtc_lock, flags);
549 * We know that x86-64 always uses BCD format, no need to check the
561 * x86-64 systems only exists since 2002.
562 * This will work up to Dec 31, 2100
566 return mktime(year, mon, day, hour, min, sec);
569 #ifdef CONFIG_CPU_FREQ
571 /* Frequency scaling support. Adjust the TSC based timer when the cpu frequency
574 RED-PEN: On SMP we assume all CPUs run with the same frequency. It's
575 not that important because current Opteron setups do not support
576 scaling on SMP anyroads.
578 Should fix up last_tsc too. Currently gettimeofday in the
579 first tick after the change will be slightly wrong. */
581 #include <linux/workqueue.h>
583 static unsigned int cpufreq_delayed_issched = 0;
584 static unsigned int cpufreq_init = 0;
585 static struct work_struct cpufreq_delayed_get_work;
587 static void handle_cpufreq_delayed_get(void *v)
590 for_each_online_cpu(cpu) {
593 cpufreq_delayed_issched = 0;
596 /* if we notice lost ticks, schedule a call to cpufreq_get() as it tries
597 * to verify the CPU frequency the timing core thinks the CPU is running
598 * at is still correct.
600 static void cpufreq_delayed_get(void)
603 if (cpufreq_init && !cpufreq_delayed_issched) {
604 cpufreq_delayed_issched = 1;
607 printk(KERN_DEBUG "Losing some ticks... checking if CPU frequency changed.\n");
609 schedule_work(&cpufreq_delayed_get_work);
613 static unsigned int ref_freq = 0;
614 static unsigned long loops_per_jiffy_ref = 0;
616 static unsigned long cpu_khz_ref = 0;
618 static int time_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
621 struct cpufreq_freqs *freq = data;
622 unsigned long *lpj, dummy;
624 if (cpu_has(&cpu_data[freq->cpu], X86_FEATURE_CONSTANT_TSC))
628 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
630 lpj = &cpu_data[freq->cpu].loops_per_jiffy;
632 lpj = &boot_cpu_data.loops_per_jiffy;
636 ref_freq = freq->old;
637 loops_per_jiffy_ref = *lpj;
638 cpu_khz_ref = cpu_khz;
640 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
641 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
642 (val == CPUFREQ_RESUMECHANGE)) {
644 cpufreq_scale(loops_per_jiffy_ref, ref_freq, freq->new);
646 cpu_khz = cpufreq_scale(cpu_khz_ref, ref_freq, freq->new);
647 if (!(freq->flags & CPUFREQ_CONST_LOOPS))
648 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
651 set_cyc2ns_scale(cpu_khz_ref);
656 static struct notifier_block time_cpufreq_notifier_block = {
657 .notifier_call = time_cpufreq_notifier
660 static int __init cpufreq_tsc(void)
662 INIT_WORK(&cpufreq_delayed_get_work, handle_cpufreq_delayed_get, NULL);
663 if (!cpufreq_register_notifier(&time_cpufreq_notifier_block,
664 CPUFREQ_TRANSITION_NOTIFIER))
669 core_initcall(cpufreq_tsc);
674 * calibrate_tsc() calibrates the processor TSC in a very simple way, comparing
675 * it to the HPET timer of known frequency.
678 #define TICK_COUNT 100000000
680 static unsigned int __init hpet_calibrate_tsc(void)
682 int tsc_start, hpet_start;
683 int tsc_now, hpet_now;
686 local_irq_save(flags);
689 hpet_start = hpet_readl(HPET_COUNTER);
694 hpet_now = hpet_readl(HPET_COUNTER);
695 tsc_now = get_cycles_sync();
696 local_irq_restore(flags);
697 } while ((tsc_now - tsc_start) < TICK_COUNT &&
698 (hpet_now - hpet_start) < TICK_COUNT);
700 return (tsc_now - tsc_start) * 1000000000L
701 / ((hpet_now - hpet_start) * hpet_period / 1000);
706 * pit_calibrate_tsc() uses the speaker output (channel 2) of
707 * the PIT. This is better than using the timer interrupt output,
708 * because we can read the value of the speaker with just one inb(),
709 * where we need three i/o operations for the interrupt channel.
710 * We count how many ticks the TSC does in 50 ms.
713 static unsigned int __init pit_calibrate_tsc(void)
715 unsigned long start, end;
718 spin_lock_irqsave(&i8253_lock, flags);
720 outb((inb(0x61) & ~0x02) | 0x01, 0x61);
723 outb((PIT_TICK_RATE / (1000 / 50)) & 0xff, 0x42);
724 outb((PIT_TICK_RATE / (1000 / 50)) >> 8, 0x42);
725 start = get_cycles_sync();
726 while ((inb(0x61) & 0x20) == 0);
727 end = get_cycles_sync();
729 spin_unlock_irqrestore(&i8253_lock, flags);
731 return (end - start) / 50;
735 static __init int late_hpet_init(void)
740 if (!vxtime.hpet_address)
743 memset(&hd, 0, sizeof (hd));
745 ntimer = hpet_readl(HPET_ID);
746 ntimer = (ntimer & HPET_ID_NUMBER) >> HPET_ID_NUMBER_SHIFT;
750 * Register with driver.
751 * Timer0 and Timer1 is used by platform.
753 hd.hd_phys_address = vxtime.hpet_address;
754 hd.hd_address = (void __iomem *)fix_to_virt(FIX_HPET_BASE);
755 hd.hd_nirqs = ntimer;
756 hd.hd_flags = HPET_DATA_PLATFORM;
757 hpet_reserve_timer(&hd, 0);
758 #ifdef CONFIG_HPET_EMULATE_RTC
759 hpet_reserve_timer(&hd, 1);
761 hd.hd_irq[0] = HPET_LEGACY_8254;
762 hd.hd_irq[1] = HPET_LEGACY_RTC;
765 struct hpet_timer *timer;
768 hpet = (struct hpet *) fix_to_virt(FIX_HPET_BASE);
770 for (i = 2, timer = &hpet->hpet_timers[2]; i < ntimer;
772 hd.hd_irq[i] = (timer->hpet_config &
773 Tn_INT_ROUTE_CNF_MASK) >>
774 Tn_INT_ROUTE_CNF_SHIFT;
781 fs_initcall(late_hpet_init);
784 static int hpet_timer_stop_set_go(unsigned long tick)
789 * Stop the timers and reset the main counter.
792 cfg = hpet_readl(HPET_CFG);
793 cfg &= ~(HPET_CFG_ENABLE | HPET_CFG_LEGACY);
794 hpet_writel(cfg, HPET_CFG);
795 hpet_writel(0, HPET_COUNTER);
796 hpet_writel(0, HPET_COUNTER + 4);
799 * Set up timer 0, as periodic with first interrupt to happen at hpet_tick,
800 * and period also hpet_tick.
802 if (hpet_use_timer) {
803 hpet_writel(HPET_TN_ENABLE | HPET_TN_PERIODIC | HPET_TN_SETVAL |
804 HPET_TN_32BIT, HPET_T0_CFG);
805 hpet_writel(hpet_tick, HPET_T0_CMP);
806 hpet_writel(hpet_tick, HPET_T0_CMP); /* AK: why twice? */
807 cfg |= HPET_CFG_LEGACY;
813 cfg |= HPET_CFG_ENABLE;
814 hpet_writel(cfg, HPET_CFG);
819 static int hpet_init(void)
823 if (!vxtime.hpet_address)
825 set_fixmap_nocache(FIX_HPET_BASE, vxtime.hpet_address);
826 __set_fixmap(VSYSCALL_HPET, vxtime.hpet_address, PAGE_KERNEL_VSYSCALL_NOCACHE);
829 * Read the period, compute tick and quotient.
832 id = hpet_readl(HPET_ID);
834 if (!(id & HPET_ID_VENDOR) || !(id & HPET_ID_NUMBER))
837 hpet_period = hpet_readl(HPET_PERIOD);
838 if (hpet_period < 100000 || hpet_period > 100000000)
841 hpet_tick = (1000000000L * (USEC_PER_SEC / HZ) + hpet_period / 2) /
844 hpet_use_timer = (id & HPET_ID_LEGSUP);
846 return hpet_timer_stop_set_go(hpet_tick);
849 static int hpet_reenable(void)
851 return hpet_timer_stop_set_go(hpet_tick);
854 #define PIT_MODE 0x43
857 static void __init __pit_init(int val, u8 mode)
861 spin_lock_irqsave(&i8253_lock, flags);
862 outb_p(mode, PIT_MODE);
863 outb_p(val & 0xff, PIT_CH0); /* LSB */
864 outb_p(val >> 8, PIT_CH0); /* MSB */
865 spin_unlock_irqrestore(&i8253_lock, flags);
868 void __init pit_init(void)
870 __pit_init(LATCH, 0x34); /* binary, mode 2, LSB/MSB, ch 0 */
873 void __init pit_stop_interrupt(void)
875 __pit_init(0, 0x30); /* mode 0 */
878 void __init stop_timer_interrupt(void)
881 if (vxtime.hpet_address) {
883 hpet_timer_stop_set_go(0);
886 pit_stop_interrupt();
888 printk(KERN_INFO "timer: %s interrupt stopped.\n", name);
891 int __init time_setup(char *str)
893 report_lost_ticks = 1;
897 static struct irqaction irq0 = {
898 timer_interrupt, SA_INTERRUPT, CPU_MASK_NONE, "timer", NULL, NULL
901 void __init time_init(void)
905 #ifdef HPET_HACK_ENABLE_DANGEROUS
906 if (!vxtime.hpet_address) {
907 printk(KERN_WARNING "time.c: WARNING: Enabling HPET base "
909 outl(0x800038a0, 0xcf8);
910 outl(0xff000001, 0xcfc);
911 outl(0x800038a0, 0xcf8);
912 vxtime.hpet_address = inl(0xcfc) & 0xfffffffe;
913 printk(KERN_WARNING "time.c: WARNING: Enabled HPET "
914 "at %#lx.\n", vxtime.hpet_address);
918 vxtime.hpet_address = 0;
920 xtime.tv_sec = get_cmos_time();
923 set_normalized_timespec(&wall_to_monotonic,
924 -xtime.tv_sec, -xtime.tv_nsec);
927 vxtime_hz = (1000000000000000L + hpet_period / 2) /
930 vxtime.hpet_address = 0;
932 if (hpet_use_timer) {
933 cpu_khz = hpet_calibrate_tsc();
935 #ifdef CONFIG_X86_PM_TIMER
936 } else if (pmtmr_ioport && !vxtime.hpet_address) {
937 vxtime_hz = PM_TIMER_FREQUENCY;
940 cpu_khz = pit_calibrate_tsc();
944 cpu_khz = pit_calibrate_tsc();
948 printk(KERN_INFO "time.c: Using %ld.%06ld MHz %s timer.\n",
949 vxtime_hz / 1000000, vxtime_hz % 1000000, timename);
950 printk(KERN_INFO "time.c: Detected %d.%03d MHz processor.\n",
951 cpu_khz / 1000, cpu_khz % 1000);
952 vxtime.mode = VXTIME_TSC;
953 vxtime.quot = (1000000L << 32) / vxtime_hz;
954 vxtime.tsc_quot = (1000L << 32) / cpu_khz;
955 vxtime.last_tsc = get_cycles_sync();
958 set_cyc2ns_scale(cpu_khz);
966 * Make an educated guess if the TSC is trustworthy and synchronized
969 __cpuinit int unsynchronized_tsc(void)
972 if (oem_force_hpet_timer())
974 /* Intel systems are normally all synchronized. Exceptions
975 are handled in the OEM check above. */
976 if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
979 /* Assume multi socket systems are not synchronized */
980 return num_present_cpus() > 1;
984 * Decide after all CPUs are booted what mode gettimeofday should use.
986 void __init time_init_gtod(void)
990 if (unsynchronized_tsc())
992 if (vxtime.hpet_address && notsc) {
993 timetype = hpet_use_timer ? "HPET" : "PIT/HPET";
995 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
997 vxtime.last = hpet_readl(HPET_COUNTER);
998 vxtime.mode = VXTIME_HPET;
999 do_gettimeoffset = do_gettimeoffset_hpet;
1000 #ifdef CONFIG_X86_PM_TIMER
1001 /* Using PM for gettimeofday is quite slow, but we have no other
1002 choice because the TSC is too unreliable on some systems. */
1003 } else if (pmtmr_ioport && !vxtime.hpet_address && notsc) {
1005 do_gettimeoffset = do_gettimeoffset_pm;
1006 vxtime.mode = VXTIME_PMTMR;
1007 sysctl_vsyscall = 0;
1008 printk(KERN_INFO "Disabling vsyscall due to use of PM timer\n");
1011 timetype = hpet_use_timer ? "HPET/TSC" : "PIT/TSC";
1012 vxtime.mode = VXTIME_TSC;
1015 printk(KERN_INFO "time.c: Using %s based timekeeping.\n", timetype);
1018 __setup("report_lost_ticks", time_setup);
1020 static long clock_cmos_diff;
1021 static unsigned long sleep_start;
1024 * sysfs support for the timer.
1027 static int timer_suspend(struct sys_device *dev, pm_message_t state)
1030 * Estimate time zone so that set_time can update the clock
1032 long cmos_time = get_cmos_time();
1034 clock_cmos_diff = -cmos_time;
1035 clock_cmos_diff += get_seconds();
1036 sleep_start = cmos_time;
1040 static int timer_resume(struct sys_device *dev)
1042 unsigned long flags;
1044 unsigned long ctime = get_cmos_time();
1045 unsigned long sleep_length = (ctime - sleep_start) * HZ;
1047 if (vxtime.hpet_address)
1050 i8254_timer_resume();
1052 sec = ctime + clock_cmos_diff;
1053 write_seqlock_irqsave(&xtime_lock,flags);
1056 if (vxtime.mode == VXTIME_HPET) {
1058 vxtime.last = hpet_readl(HPET_T0_CMP) - hpet_tick;
1060 vxtime.last = hpet_readl(HPET_COUNTER);
1061 #ifdef CONFIG_X86_PM_TIMER
1062 } else if (vxtime.mode == VXTIME_PMTMR) {
1066 vxtime.last_tsc = get_cycles_sync();
1067 write_sequnlock_irqrestore(&xtime_lock,flags);
1068 jiffies += sleep_length;
1069 wall_jiffies += sleep_length;
1070 monotonic_base += sleep_length * (NSEC_PER_SEC/HZ);
1071 touch_softlockup_watchdog();
1075 static struct sysdev_class timer_sysclass = {
1076 .resume = timer_resume,
1077 .suspend = timer_suspend,
1078 set_kset_name("timer"),
1081 /* XXX this driverfs stuff should probably go elsewhere later -john */
1082 static struct sys_device device_timer = {
1084 .cls = &timer_sysclass,
1087 static int time_init_device(void)
1089 int error = sysdev_class_register(&timer_sysclass);
1091 error = sysdev_register(&device_timer);
1095 device_initcall(time_init_device);
1097 #ifdef CONFIG_HPET_EMULATE_RTC
1098 /* HPET in LegacyReplacement Mode eats up RTC interrupt line. When, HPET
1099 * is enabled, we support RTC interrupt functionality in software.
1100 * RTC has 3 kinds of interrupts:
1101 * 1) Update Interrupt - generate an interrupt, every sec, when RTC clock
1103 * 2) Alarm Interrupt - generate an interrupt at a specific time of day
1104 * 3) Periodic Interrupt - generate periodic interrupt, with frequencies
1105 * 2Hz-8192Hz (2Hz-64Hz for non-root user) (all freqs in powers of 2)
1106 * (1) and (2) above are implemented using polling at a frequency of
1107 * 64 Hz. The exact frequency is a tradeoff between accuracy and interrupt
1108 * overhead. (DEFAULT_RTC_INT_FREQ)
1109 * For (3), we use interrupts at 64Hz or user specified periodic
1110 * frequency, whichever is higher.
1112 #include <linux/rtc.h>
1114 #define DEFAULT_RTC_INT_FREQ 64
1115 #define RTC_NUM_INTS 1
1117 static unsigned long UIE_on;
1118 static unsigned long prev_update_sec;
1120 static unsigned long AIE_on;
1121 static struct rtc_time alarm_time;
1123 static unsigned long PIE_on;
1124 static unsigned long PIE_freq = DEFAULT_RTC_INT_FREQ;
1125 static unsigned long PIE_count;
1127 static unsigned long hpet_rtc_int_freq; /* RTC interrupt frequency */
1128 static unsigned int hpet_t1_cmp; /* cached comparator register */
1130 int is_hpet_enabled(void)
1132 return vxtime.hpet_address != 0;
1136 * Timer 1 for RTC, we do not use periodic interrupt feature,
1137 * even if HPET supports periodic interrupts on Timer 1.
1138 * The reason being, to set up a periodic interrupt in HPET, we need to
1139 * stop the main counter. And if we do that everytime someone diables/enables
1140 * RTC, we will have adverse effect on main kernel timer running on Timer 0.
1141 * So, for the time being, simulate the periodic interrupt in software.
1143 * hpet_rtc_timer_init() is called for the first time and during subsequent
1144 * interuppts reinit happens through hpet_rtc_timer_reinit().
1146 int hpet_rtc_timer_init(void)
1148 unsigned int cfg, cnt;
1149 unsigned long flags;
1151 if (!is_hpet_enabled())
1154 * Set the counter 1 and enable the interrupts.
1156 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1157 hpet_rtc_int_freq = PIE_freq;
1159 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1161 local_irq_save(flags);
1162 cnt = hpet_readl(HPET_COUNTER);
1163 cnt += ((hpet_tick*HZ)/hpet_rtc_int_freq);
1164 hpet_writel(cnt, HPET_T1_CMP);
1166 local_irq_restore(flags);
1168 cfg = hpet_readl(HPET_T1_CFG);
1169 cfg &= ~HPET_TN_PERIODIC;
1170 cfg |= HPET_TN_ENABLE | HPET_TN_32BIT;
1171 hpet_writel(cfg, HPET_T1_CFG);
1176 static void hpet_rtc_timer_reinit(void)
1178 unsigned int cfg, cnt;
1180 if (unlikely(!(PIE_on | AIE_on | UIE_on))) {
1181 cfg = hpet_readl(HPET_T1_CFG);
1182 cfg &= ~HPET_TN_ENABLE;
1183 hpet_writel(cfg, HPET_T1_CFG);
1187 if (PIE_on && (PIE_freq > DEFAULT_RTC_INT_FREQ))
1188 hpet_rtc_int_freq = PIE_freq;
1190 hpet_rtc_int_freq = DEFAULT_RTC_INT_FREQ;
1192 /* It is more accurate to use the comparator value than current count.*/
1194 cnt += hpet_tick*HZ/hpet_rtc_int_freq;
1195 hpet_writel(cnt, HPET_T1_CMP);
1200 * The functions below are called from rtc driver.
1201 * Return 0 if HPET is not being used.
1202 * Otherwise do the necessary changes and return 1.
1204 int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
1206 if (!is_hpet_enabled())
1209 if (bit_mask & RTC_UIE)
1211 if (bit_mask & RTC_PIE)
1213 if (bit_mask & RTC_AIE)
1219 int hpet_set_rtc_irq_bit(unsigned long bit_mask)
1221 int timer_init_reqd = 0;
1223 if (!is_hpet_enabled())
1226 if (!(PIE_on | AIE_on | UIE_on))
1227 timer_init_reqd = 1;
1229 if (bit_mask & RTC_UIE) {
1232 if (bit_mask & RTC_PIE) {
1236 if (bit_mask & RTC_AIE) {
1240 if (timer_init_reqd)
1241 hpet_rtc_timer_init();
1246 int hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
1248 if (!is_hpet_enabled())
1251 alarm_time.tm_hour = hrs;
1252 alarm_time.tm_min = min;
1253 alarm_time.tm_sec = sec;
1258 int hpet_set_periodic_freq(unsigned long freq)
1260 if (!is_hpet_enabled())
1269 int hpet_rtc_dropped_irq(void)
1271 if (!is_hpet_enabled())
1277 irqreturn_t hpet_rtc_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1279 struct rtc_time curr_time;
1280 unsigned long rtc_int_flag = 0;
1281 int call_rtc_interrupt = 0;
1283 hpet_rtc_timer_reinit();
1285 if (UIE_on | AIE_on) {
1286 rtc_get_rtc_time(&curr_time);
1289 if (curr_time.tm_sec != prev_update_sec) {
1290 /* Set update int info, call real rtc int routine */
1291 call_rtc_interrupt = 1;
1292 rtc_int_flag = RTC_UF;
1293 prev_update_sec = curr_time.tm_sec;
1298 if (PIE_count >= hpet_rtc_int_freq/PIE_freq) {
1299 /* Set periodic int info, call real rtc int routine */
1300 call_rtc_interrupt = 1;
1301 rtc_int_flag |= RTC_PF;
1306 if ((curr_time.tm_sec == alarm_time.tm_sec) &&
1307 (curr_time.tm_min == alarm_time.tm_min) &&
1308 (curr_time.tm_hour == alarm_time.tm_hour)) {
1309 /* Set alarm int info, call real rtc int routine */
1310 call_rtc_interrupt = 1;
1311 rtc_int_flag |= RTC_AF;
1314 if (call_rtc_interrupt) {
1315 rtc_int_flag |= (RTC_IRQF | (RTC_NUM_INTS << 8));
1316 rtc_interrupt(rtc_int_flag, dev_id, regs);
1322 static int __init nohpet_setup(char *s)
1328 __setup("nohpet", nohpet_setup);
1330 int __init notsc_setup(char *s)
1336 __setup("notsc", notsc_setup);