git.oblomov.eu Git - linux-2.6/blob - drivers/mmc/host/sdhci.c

   1 /*
   2  *  linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
   3  *
   4  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or (at
   9  * your option) any later version.
  10  *
  11  * Thanks to the following companies for their support:
  12  *
  13  *     - JMicron (hardware and technical support)
  14  */
  15
  16 #include <linux/delay.h>
  17 #include <linux/highmem.h>
  18 #include <linux/io.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/scatterlist.h>
  21
  22 #include <linux/leds.h>
  23
  24 #include <linux/mmc/host.h>
  25
  26 #include "sdhci.h"
  27
  28 #define DRIVER_NAME "sdhci"
  29
  30 #define DBG(f, x...) \
  31         pr_debug(DRIVER_NAME " [%s()]: " f, __func__,## x)
  32
  33 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
  34         defined(CONFIG_MMC_SDHCI_MODULE))
  35 #define SDHCI_USE_LEDS_CLASS
  36 #endif
  37
  38 static unsigned int debug_quirks = 0;
  39
  40 static void sdhci_prepare_data(struct sdhci_host *, struct mmc_data *);
  41 static void sdhci_finish_data(struct sdhci_host *);
  42
  43 static void sdhci_send_command(struct sdhci_host *, struct mmc_command *);
  44 static void sdhci_finish_command(struct sdhci_host *);
  45
  46 static void sdhci_dumpregs(struct sdhci_host *host)
  47 {
  48         printk(KERN_DEBUG DRIVER_NAME ": ============== REGISTER DUMP ==============\n");
  49
  50         printk(KERN_DEBUG DRIVER_NAME ": Sys addr: 0x%08x | Version:  0x%08x\n",
  51                 sdhci_readl(host, SDHCI_DMA_ADDRESS),
  52                 sdhci_readw(host, SDHCI_HOST_VERSION));
  53         printk(KERN_DEBUG DRIVER_NAME ": Blk size: 0x%08x | Blk cnt:  0x%08x\n",
  54                 sdhci_readw(host, SDHCI_BLOCK_SIZE),
  55                 sdhci_readw(host, SDHCI_BLOCK_COUNT));
  56         printk(KERN_DEBUG DRIVER_NAME ": Argument: 0x%08x | Trn mode: 0x%08x\n",
  57                 sdhci_readl(host, SDHCI_ARGUMENT),
  58                 sdhci_readw(host, SDHCI_TRANSFER_MODE));
  59         printk(KERN_DEBUG DRIVER_NAME ": Present:  0x%08x | Host ctl: 0x%08x\n",
  60                 sdhci_readl(host, SDHCI_PRESENT_STATE),
  61                 sdhci_readb(host, SDHCI_HOST_CONTROL));
  62         printk(KERN_DEBUG DRIVER_NAME ": Power:    0x%08x | Blk gap:  0x%08x\n",
  63                 sdhci_readb(host, SDHCI_POWER_CONTROL),
  64                 sdhci_readb(host, SDHCI_BLOCK_GAP_CONTROL));
  65         printk(KERN_DEBUG DRIVER_NAME ": Wake-up:  0x%08x | Clock:    0x%08x\n",
  66                 sdhci_readb(host, SDHCI_WAKE_UP_CONTROL),
  67                 sdhci_readw(host, SDHCI_CLOCK_CONTROL));
  68         printk(KERN_DEBUG DRIVER_NAME ": Timeout:  0x%08x | Int stat: 0x%08x\n",
  69                 sdhci_readb(host, SDHCI_TIMEOUT_CONTROL),
  70                 sdhci_readl(host, SDHCI_INT_STATUS));
  71         printk(KERN_DEBUG DRIVER_NAME ": Int enab: 0x%08x | Sig enab: 0x%08x\n",
  72                 sdhci_readl(host, SDHCI_INT_ENABLE),
  73                 sdhci_readl(host, SDHCI_SIGNAL_ENABLE));
  74         printk(KERN_DEBUG DRIVER_NAME ": AC12 err: 0x%08x | Slot int: 0x%08x\n",
  75                 sdhci_readw(host, SDHCI_ACMD12_ERR),
  76                 sdhci_readw(host, SDHCI_SLOT_INT_STATUS));
  77         printk(KERN_DEBUG DRIVER_NAME ": Caps:     0x%08x | Max curr: 0x%08x\n",
  78                 sdhci_readl(host, SDHCI_CAPABILITIES),
  79                 sdhci_readl(host, SDHCI_MAX_CURRENT));
  80
  81         printk(KERN_DEBUG DRIVER_NAME ": ===========================================\n");
  82 }
  83
  84 /*****************************************************************************\
  85  *                                                                           *
  86  * Low level functions                                                       *
  87  *                                                                           *
  88 \*****************************************************************************/
  89
  90 static void sdhci_clear_set_irqs(struct sdhci_host *host, u32 clear, u32 set)
  91 {
  92         u32 ier;
  93
  94         ier = sdhci_readl(host, SDHCI_INT_ENABLE);
  95         ier &= ~clear;
  96         ier |= set;
  97         sdhci_writel(host, ier, SDHCI_INT_ENABLE);
  98         sdhci_writel(host, ier, SDHCI_SIGNAL_ENABLE);
  99 }
 100
 101 static void sdhci_unmask_irqs(struct sdhci_host *host, u32 irqs)
 102 {
 103         sdhci_clear_set_irqs(host, 0, irqs);
 104 }
 105
 106 static void sdhci_mask_irqs(struct sdhci_host *host, u32 irqs)
 107 {
 108         sdhci_clear_set_irqs(host, irqs, 0);
 109 }
 110
 111 static void sdhci_set_card_detection(struct sdhci_host *host, bool enable)
 112 {
 113         u32 irqs = SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT;
 114
 115         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
 116                 return;
 117
 118         if (enable)
 119                 sdhci_unmask_irqs(host, irqs);
 120         else
 121                 sdhci_mask_irqs(host, irqs);
 122 }
 123
 124 static void sdhci_enable_card_detection(struct sdhci_host *host)
 125 {
 126         sdhci_set_card_detection(host, true);
 127 }
 128
 129 static void sdhci_disable_card_detection(struct sdhci_host *host)
 130 {
 131         sdhci_set_card_detection(host, false);
 132 }
 133
 134 static void sdhci_reset(struct sdhci_host *host, u8 mask)
 135 {
 136         unsigned long timeout;
 137
 138         if (host->quirks & SDHCI_QUIRK_NO_CARD_NO_RESET) {
 139                 if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) &
 140                         SDHCI_CARD_PRESENT))
 141                         return;
 142         }
 143
 144         sdhci_writeb(host, mask, SDHCI_SOFTWARE_RESET);
 145
 146         if (mask & SDHCI_RESET_ALL)
 147                 host->clock = 0;
 148
 149         /* Wait max 100 ms */
 150         timeout = 100;
 151
 152         /* hw clears the bit when it's done */
 153         while (sdhci_readb(host, SDHCI_SOFTWARE_RESET) & mask) {
 154                 if (timeout == 0) {
 155                         printk(KERN_ERR "%s: Reset 0x%x never completed.\n",
 156                                 mmc_hostname(host->mmc), (int)mask);
 157                         sdhci_dumpregs(host);
 158                         return;
 159                 }
 160                 timeout--;
 161                 mdelay(1);
 162         }
 163 }
 164
 165 static void sdhci_init(struct sdhci_host *host)
 166 {
 167         sdhci_reset(host, SDHCI_RESET_ALL);
 168
 169         sdhci_clear_set_irqs(host, SDHCI_INT_ALL_MASK,
 170                 SDHCI_INT_BUS_POWER | SDHCI_INT_DATA_END_BIT |
 171                 SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_TIMEOUT | SDHCI_INT_INDEX |
 172                 SDHCI_INT_END_BIT | SDHCI_INT_CRC | SDHCI_INT_TIMEOUT |
 173                 SDHCI_INT_DATA_END | SDHCI_INT_RESPONSE);
 174 }
 175
 176 static void sdhci_reinit(struct sdhci_host *host)
 177 {
 178         sdhci_init(host);
 179         sdhci_enable_card_detection(host);
 180 }
 181
 182 static void sdhci_activate_led(struct sdhci_host *host)
 183 {
 184         u8 ctrl;
 185
 186         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 187         ctrl |= SDHCI_CTRL_LED;
 188         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 189 }
 190
 191 static void sdhci_deactivate_led(struct sdhci_host *host)
 192 {
 193         u8 ctrl;
 194
 195         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 196         ctrl &= ~SDHCI_CTRL_LED;
 197         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 198 }
 199
 200 #ifdef SDHCI_USE_LEDS_CLASS
 201 static void sdhci_led_control(struct led_classdev *led,
 202         enum led_brightness brightness)
 203 {
 204         struct sdhci_host *host = container_of(led, struct sdhci_host, led);
 205         unsigned long flags;
 206
 207         spin_lock_irqsave(&host->lock, flags);
 208
 209         if (brightness == LED_OFF)
 210                 sdhci_deactivate_led(host);
 211         else
 212                 sdhci_activate_led(host);
 213
 214         spin_unlock_irqrestore(&host->lock, flags);
 215 }
 216 #endif
 217
 218 /*****************************************************************************\
 219  *                                                                           *
 220  * Core functions                                                            *
 221  *                                                                           *
 222 \*****************************************************************************/
 223
 224 static void sdhci_read_block_pio(struct sdhci_host *host)
 225 {
 226         unsigned long flags;
 227         size_t blksize, len, chunk;
 228         u32 uninitialized_var(scratch);
 229         u8 *buf;
 230
 231         DBG("PIO reading\n");
 232
 233         blksize = host->data->blksz;
 234         chunk = 0;
 235
 236         local_irq_save(flags);
 237
 238         while (blksize) {
 239                 if (!sg_miter_next(&host->sg_miter))
 240                         BUG();
 241
 242                 len = min(host->sg_miter.length, blksize);
 243
 244                 blksize -= len;
 245                 host->sg_miter.consumed = len;
 246
 247                 buf = host->sg_miter.addr;
 248
 249                 while (len) {
 250                         if (chunk == 0) {
 251                                 scratch = sdhci_readl(host, SDHCI_BUFFER);
 252                                 chunk = 4;
 253                         }
 254
 255                         *buf = scratch & 0xFF;
 256
 257                         buf++;
 258                         scratch >>= 8;
 259                         chunk--;
 260                         len--;
 261                 }
 262         }
 263
 264         sg_miter_stop(&host->sg_miter);
 265
 266         local_irq_restore(flags);
 267 }
 268
 269 static void sdhci_write_block_pio(struct sdhci_host *host)
 270 {
 271         unsigned long flags;
 272         size_t blksize, len, chunk;
 273         u32 scratch;
 274         u8 *buf;
 275
 276         DBG("PIO writing\n");
 277
 278         blksize = host->data->blksz;
 279         chunk = 0;
 280         scratch = 0;
 281
 282         local_irq_save(flags);
 283
 284         while (blksize) {
 285                 if (!sg_miter_next(&host->sg_miter))
 286                         BUG();
 287
 288                 len = min(host->sg_miter.length, blksize);
 289
 290                 blksize -= len;
 291                 host->sg_miter.consumed = len;
 292
 293                 buf = host->sg_miter.addr;
 294
 295                 while (len) {
 296                         scratch |= (u32)*buf << (chunk * 8);
 297
 298                         buf++;
 299                         chunk++;
 300                         len--;
 301
 302                         if ((chunk == 4) || ((len == 0) && (blksize == 0))) {
 303                                 sdhci_writel(host, scratch, SDHCI_BUFFER);
 304                                 chunk = 0;
 305                                 scratch = 0;
 306                         }
 307                 }
 308         }
 309
 310         sg_miter_stop(&host->sg_miter);
 311
 312         local_irq_restore(flags);
 313 }
 314
 315 static void sdhci_transfer_pio(struct sdhci_host *host)
 316 {
 317         u32 mask;
 318
 319         BUG_ON(!host->data);
 320
 321         if (host->blocks == 0)
 322                 return;
 323
 324         if (host->data->flags & MMC_DATA_READ)
 325                 mask = SDHCI_DATA_AVAILABLE;
 326         else
 327                 mask = SDHCI_SPACE_AVAILABLE;
 328
 329         /*
 330          * Some controllers (JMicron JMB38x) mess up the buffer bits
 331          * for transfers < 4 bytes. As long as it is just one block,
 332          * we can ignore the bits.
 333          */
 334         if ((host->quirks & SDHCI_QUIRK_BROKEN_SMALL_PIO) &&
 335                 (host->data->blocks == 1))
 336                 mask = ~0;
 337
 338         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 339                 if (host->data->flags & MMC_DATA_READ)
 340                         sdhci_read_block_pio(host);
 341                 else
 342                         sdhci_write_block_pio(host);
 343
 344                 host->blocks--;
 345                 if (host->blocks == 0)
 346                         break;
 347         }
 348
 349         DBG("PIO transfer complete.\n");
 350 }
 351
 352 static char *sdhci_kmap_atomic(struct scatterlist *sg, unsigned long *flags)
 353 {
 354         local_irq_save(*flags);
 355         return kmap_atomic(sg_page(sg), KM_BIO_SRC_IRQ) + sg->offset;
 356 }
 357
 358 static void sdhci_kunmap_atomic(void *buffer, unsigned long *flags)
 359 {
 360         kunmap_atomic(buffer, KM_BIO_SRC_IRQ);
 361         local_irq_restore(*flags);
 362 }
 363
 364 static int sdhci_adma_table_pre(struct sdhci_host *host,
 365         struct mmc_data *data)
 366 {
 367         int direction;
 368
 369         u8 *desc;
 370         u8 *align;
 371         dma_addr_t addr;
 372         dma_addr_t align_addr;
 373         int len, offset;
 374
 375         struct scatterlist *sg;
 376         int i;
 377         char *buffer;
 378         unsigned long flags;
 379
 380         /*
 381          * The spec does not specify endianness of descriptor table.
 382          * We currently guess that it is LE.
 383          */
 384
 385         if (data->flags & MMC_DATA_READ)
 386                 direction = DMA_FROM_DEVICE;
 387         else
 388                 direction = DMA_TO_DEVICE;
 389
 390         /*
 391          * The ADMA descriptor table is mapped further down as we
 392          * need to fill it with data first.
 393          */
 394
 395         host->align_addr = dma_map_single(mmc_dev(host->mmc),
 396                 host->align_buffer, 128 * 4, direction);
 397         if (dma_mapping_error(mmc_dev(host->mmc), host->align_addr))
 398                 goto fail;
 399         BUG_ON(host->align_addr & 0x3);
 400
 401         host->sg_count = dma_map_sg(mmc_dev(host->mmc),
 402                 data->sg, data->sg_len, direction);
 403         if (host->sg_count == 0)
 404                 goto unmap_align;
 405
 406         desc = host->adma_desc;
 407         align = host->align_buffer;
 408
 409         align_addr = host->align_addr;
 410
 411         for_each_sg(data->sg, sg, host->sg_count, i) {
 412                 addr = sg_dma_address(sg);
 413                 len = sg_dma_len(sg);
 414
 415                 /*
 416                  * The SDHCI specification states that ADMA
 417                  * addresses must be 32-bit aligned. If they
 418                  * aren't, then we use a bounce buffer for
 419                  * the (up to three) bytes that screw up the
 420                  * alignment.
 421                  */
 422                 offset = (4 - (addr & 0x3)) & 0x3;
 423                 if (offset) {
 424                         if (data->flags & MMC_DATA_WRITE) {
 425                                 buffer = sdhci_kmap_atomic(sg, &flags);
 426                                 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
 427                                 memcpy(align, buffer, offset);
 428                                 sdhci_kunmap_atomic(buffer, &flags);
 429                         }
 430
 431                         desc[7] = (align_addr >> 24) & 0xff;
 432                         desc[6] = (align_addr >> 16) & 0xff;
 433                         desc[5] = (align_addr >> 8) & 0xff;
 434                         desc[4] = (align_addr >> 0) & 0xff;
 435
 436                         BUG_ON(offset > 65536);
 437
 438                         desc[3] = (offset >> 8) & 0xff;
 439                         desc[2] = (offset >> 0) & 0xff;
 440
 441                         desc[1] = 0x00;
 442                         desc[0] = 0x21; /* tran, valid */
 443
 444                         align += 4;
 445                         align_addr += 4;
 446
 447                         desc += 8;
 448
 449                         addr += offset;
 450                         len -= offset;
 451                 }
 452
 453                 desc[7] = (addr >> 24) & 0xff;
 454                 desc[6] = (addr >> 16) & 0xff;
 455                 desc[5] = (addr >> 8) & 0xff;
 456                 desc[4] = (addr >> 0) & 0xff;
 457
 458                 BUG_ON(len > 65536);
 459
 460                 desc[3] = (len >> 8) & 0xff;
 461                 desc[2] = (len >> 0) & 0xff;
 462
 463                 desc[1] = 0x00;
 464                 desc[0] = 0x21; /* tran, valid */
 465
 466                 desc += 8;
 467
 468                 /*
 469                  * If this triggers then we have a calculation bug
 470                  * somewhere. :/
 471                  */
 472                 WARN_ON((desc - host->adma_desc) > (128 * 2 + 1) * 4);
 473         }
 474
 475         /*
 476          * Add a terminating entry.
 477          */
 478         desc[7] = 0;
 479         desc[6] = 0;
 480         desc[5] = 0;
 481         desc[4] = 0;
 482
 483         desc[3] = 0;
 484         desc[2] = 0;
 485
 486         desc[1] = 0x00;
 487         desc[0] = 0x03; /* nop, end, valid */
 488
 489         /*
 490          * Resync align buffer as we might have changed it.
 491          */
 492         if (data->flags & MMC_DATA_WRITE) {
 493                 dma_sync_single_for_device(mmc_dev(host->mmc),
 494                         host->align_addr, 128 * 4, direction);
 495         }
 496
 497         host->adma_addr = dma_map_single(mmc_dev(host->mmc),
 498                 host->adma_desc, (128 * 2 + 1) * 4, DMA_TO_DEVICE);
 499         if (dma_mapping_error(mmc_dev(host->mmc), host->adma_addr))
 500                 goto unmap_entries;
 501         BUG_ON(host->adma_addr & 0x3);
 502
 503         return 0;
 504
 505 unmap_entries:
 506         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 507                 data->sg_len, direction);
 508 unmap_align:
 509         dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
 510                 128 * 4, direction);
 511 fail:
 512         return -EINVAL;
 513 }
 514
 515 static void sdhci_adma_table_post(struct sdhci_host *host,
 516         struct mmc_data *data)
 517 {
 518         int direction;
 519
 520         struct scatterlist *sg;
 521         int i, size;
 522         u8 *align;
 523         char *buffer;
 524         unsigned long flags;
 525
 526         if (data->flags & MMC_DATA_READ)
 527                 direction = DMA_FROM_DEVICE;
 528         else
 529                 direction = DMA_TO_DEVICE;
 530
 531         dma_unmap_single(mmc_dev(host->mmc), host->adma_addr,
 532                 (128 * 2 + 1) * 4, DMA_TO_DEVICE);
 533
 534         dma_unmap_single(mmc_dev(host->mmc), host->align_addr,
 535                 128 * 4, direction);
 536
 537         if (data->flags & MMC_DATA_READ) {
 538                 dma_sync_sg_for_cpu(mmc_dev(host->mmc), data->sg,
 539                         data->sg_len, direction);
 540
 541                 align = host->align_buffer;
 542
 543                 for_each_sg(data->sg, sg, host->sg_count, i) {
 544                         if (sg_dma_address(sg) & 0x3) {
 545                                 size = 4 - (sg_dma_address(sg) & 0x3);
 546
 547                                 buffer = sdhci_kmap_atomic(sg, &flags);
 548                                 WARN_ON(((long)buffer & PAGE_MASK) > (PAGE_SIZE - 3));
 549                                 memcpy(buffer, align, size);
 550                                 sdhci_kunmap_atomic(buffer, &flags);
 551
 552                                 align += 4;
 553                         }
 554                 }
 555         }
 556
 557         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 558                 data->sg_len, direction);
 559 }
 560
 561 static u8 sdhci_calc_timeout(struct sdhci_host *host, struct mmc_data *data)
 562 {
 563         u8 count;
 564         unsigned target_timeout, current_timeout;
 565
 566         /*
 567          * If the host controller provides us with an incorrect timeout
 568          * value, just skip the check and use 0xE.  The hardware may take
 569          * longer to time out, but that's much better than having a too-short
 570          * timeout value.
 571          */
 572         if ((host->quirks & SDHCI_QUIRK_BROKEN_TIMEOUT_VAL))
 573                 return 0xE;
 574
 575         /* timeout in us */
 576         target_timeout = data->timeout_ns / 1000 +
 577                 data->timeout_clks / host->clock;
 578
 579         /*
 580          * Figure out needed cycles.
 581          * We do this in steps in order to fit inside a 32 bit int.
 582          * The first step is the minimum timeout, which will have a
 583          * minimum resolution of 6 bits:
 584          * (1) 2^13*1000 > 2^22,
 585          * (2) host->timeout_clk < 2^16
 586          *     =>
 587          *     (1) / (2) > 2^6
 588          */
 589         count = 0;
 590         current_timeout = (1 << 13) * 1000 / host->timeout_clk;
 591         while (current_timeout < target_timeout) {
 592                 count++;
 593                 current_timeout <<= 1;
 594                 if (count >= 0xF)
 595                         break;
 596         }
 597
 598         if (count >= 0xF) {
 599                 printk(KERN_WARNING "%s: Too large timeout requested!\n",
 600                         mmc_hostname(host->mmc));
 601                 count = 0xE;
 602         }
 603
 604         return count;
 605 }
 606
 607 static void sdhci_set_transfer_irqs(struct sdhci_host *host)
 608 {
 609         u32 pio_irqs = SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL;
 610         u32 dma_irqs = SDHCI_INT_DMA_END | SDHCI_INT_ADMA_ERROR;
 611
 612         if (host->flags & SDHCI_REQ_USE_DMA)
 613                 sdhci_clear_set_irqs(host, pio_irqs, dma_irqs);
 614         else
 615                 sdhci_clear_set_irqs(host, dma_irqs, pio_irqs);
 616 }
 617
 618 static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_data *data)
 619 {
 620         u8 count;
 621         u8 ctrl;
 622         int ret;
 623
 624         WARN_ON(host->data);
 625
 626         if (data == NULL)
 627                 return;
 628
 629         /* Sanity checks */
 630         BUG_ON(data->blksz * data->blocks > 524288);
 631         BUG_ON(data->blksz > host->mmc->max_blk_size);
 632         BUG_ON(data->blocks > 65535);
 633
 634         host->data = data;
 635         host->data_early = 0;
 636
 637         count = sdhci_calc_timeout(host, data);
 638         sdhci_writeb(host, count, SDHCI_TIMEOUT_CONTROL);
 639
 640         if (host->flags & SDHCI_USE_DMA)
 641                 host->flags |= SDHCI_REQ_USE_DMA;
 642
 643         /*
 644          * FIXME: This doesn't account for merging when mapping the
 645          * scatterlist.
 646          */
 647         if (host->flags & SDHCI_REQ_USE_DMA) {
 648                 int broken, i;
 649                 struct scatterlist *sg;
 650
 651                 broken = 0;
 652                 if (host->flags & SDHCI_USE_ADMA) {
 653                         if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
 654                                 broken = 1;
 655                 } else {
 656                         if (host->quirks & SDHCI_QUIRK_32BIT_DMA_SIZE)
 657                                 broken = 1;
 658                 }
 659
 660                 if (unlikely(broken)) {
 661                         for_each_sg(data->sg, sg, data->sg_len, i) {
 662                                 if (sg->length & 0x3) {
 663                                         DBG("Reverting to PIO because of "
 664                                                 "transfer size (%d)\n",
 665                                                 sg->length);
 666                                         host->flags &= ~SDHCI_REQ_USE_DMA;
 667                                         break;
 668                                 }
 669                         }
 670                 }
 671         }
 672
 673         /*
 674          * The assumption here being that alignment is the same after
 675          * translation to device address space.
 676          */
 677         if (host->flags & SDHCI_REQ_USE_DMA) {
 678                 int broken, i;
 679                 struct scatterlist *sg;
 680
 681                 broken = 0;
 682                 if (host->flags & SDHCI_USE_ADMA) {
 683                         /*
 684                          * As we use 3 byte chunks to work around
 685                          * alignment problems, we need to check this
 686                          * quirk.
 687                          */
 688                         if (host->quirks & SDHCI_QUIRK_32BIT_ADMA_SIZE)
 689                                 broken = 1;
 690                 } else {
 691                         if (host->quirks & SDHCI_QUIRK_32BIT_DMA_ADDR)
 692                                 broken = 1;
 693                 }
 694
 695                 if (unlikely(broken)) {
 696                         for_each_sg(data->sg, sg, data->sg_len, i) {
 697                                 if (sg->offset & 0x3) {
 698                                         DBG("Reverting to PIO because of "
 699                                                 "bad alignment\n");
 700                                         host->flags &= ~SDHCI_REQ_USE_DMA;
 701                                         break;
 702                                 }
 703                         }
 704                 }
 705         }
 706
 707         if (host->flags & SDHCI_REQ_USE_DMA) {
 708                 if (host->flags & SDHCI_USE_ADMA) {
 709                         ret = sdhci_adma_table_pre(host, data);
 710                         if (ret) {
 711                                 /*
 712                                  * This only happens when someone fed
 713                                  * us an invalid request.
 714                                  */
 715                                 WARN_ON(1);
 716                                 host->flags &= ~SDHCI_REQ_USE_DMA;
 717                         } else {
 718                                 sdhci_writel(host, host->adma_addr,
 719                                         SDHCI_ADMA_ADDRESS);
 720                         }
 721                 } else {
 722                         int sg_cnt;
 723
 724                         sg_cnt = dma_map_sg(mmc_dev(host->mmc),
 725                                         data->sg, data->sg_len,
 726                                         (data->flags & MMC_DATA_READ) ?
 727                                                 DMA_FROM_DEVICE :
 728                                                 DMA_TO_DEVICE);
 729                         if (sg_cnt == 0) {
 730                                 /*
 731                                  * This only happens when someone fed
 732                                  * us an invalid request.
 733                                  */
 734                                 WARN_ON(1);
 735                                 host->flags &= ~SDHCI_REQ_USE_DMA;
 736                         } else {
 737                                 WARN_ON(sg_cnt != 1);
 738                                 sdhci_writel(host, sg_dma_address(data->sg),
 739                                         SDHCI_DMA_ADDRESS);
 740                         }
 741                 }
 742         }
 743
 744         /*
 745          * Always adjust the DMA selection as some controllers
 746          * (e.g. JMicron) can't do PIO properly when the selection
 747          * is ADMA.
 748          */
 749         if (host->version >= SDHCI_SPEC_200) {
 750                 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
 751                 ctrl &= ~SDHCI_CTRL_DMA_MASK;
 752                 if ((host->flags & SDHCI_REQ_USE_DMA) &&
 753                         (host->flags & SDHCI_USE_ADMA))
 754                         ctrl |= SDHCI_CTRL_ADMA32;
 755                 else
 756                         ctrl |= SDHCI_CTRL_SDMA;
 757                 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
 758         }
 759
 760         if (!(host->flags & SDHCI_REQ_USE_DMA)) {
 761                 sg_miter_start(&host->sg_miter,
 762                         data->sg, data->sg_len, SG_MITER_ATOMIC);
 763                 host->blocks = data->blocks;
 764         }
 765
 766         sdhci_set_transfer_irqs(host);
 767
 768         /* We do not handle DMA boundaries, so set it to max (512 KiB) */
 769         sdhci_writew(host, SDHCI_MAKE_BLKSZ(7, data->blksz), SDHCI_BLOCK_SIZE);
 770         sdhci_writew(host, data->blocks, SDHCI_BLOCK_COUNT);
 771 }
 772
 773 static void sdhci_set_transfer_mode(struct sdhci_host *host,
 774         struct mmc_data *data)
 775 {
 776         u16 mode;
 777
 778         if (data == NULL)
 779                 return;
 780
 781         WARN_ON(!host->data);
 782
 783         mode = SDHCI_TRNS_BLK_CNT_EN;
 784         if (data->blocks > 1)
 785                 mode |= SDHCI_TRNS_MULTI;
 786         if (data->flags & MMC_DATA_READ)
 787                 mode |= SDHCI_TRNS_READ;
 788         if (host->flags & SDHCI_REQ_USE_DMA)
 789                 mode |= SDHCI_TRNS_DMA;
 790
 791         sdhci_writew(host, mode, SDHCI_TRANSFER_MODE);
 792 }
 793
 794 static void sdhci_finish_data(struct sdhci_host *host)
 795 {
 796         struct mmc_data *data;
 797
 798         BUG_ON(!host->data);
 799
 800         data = host->data;
 801         host->data = NULL;
 802
 803         if (host->flags & SDHCI_REQ_USE_DMA) {
 804                 if (host->flags & SDHCI_USE_ADMA)
 805                         sdhci_adma_table_post(host, data);
 806                 else {
 807                         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
 808                                 data->sg_len, (data->flags & MMC_DATA_READ) ?
 809                                         DMA_FROM_DEVICE : DMA_TO_DEVICE);
 810                 }
 811         }
 812
 813         /*
 814          * The specification states that the block count register must
 815          * be updated, but it does not specify at what point in the
 816          * data flow. That makes the register entirely useless to read
 817          * back so we have to assume that nothing made it to the card
 818          * in the event of an error.
 819          */
 820         if (data->error)
 821                 data->bytes_xfered = 0;
 822         else
 823                 data->bytes_xfered = data->blksz * data->blocks;
 824
 825         if (data->stop) {
 826                 /*
 827                  * The controller needs a reset of internal state machines
 828                  * upon error conditions.
 829                  */
 830                 if (data->error) {
 831                         sdhci_reset(host, SDHCI_RESET_CMD);
 832                         sdhci_reset(host, SDHCI_RESET_DATA);
 833                 }
 834
 835                 sdhci_send_command(host, data->stop);
 836         } else
 837                 tasklet_schedule(&host->finish_tasklet);
 838 }
 839
 840 static void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd)
 841 {
 842         int flags;
 843         u32 mask;
 844         unsigned long timeout;
 845
 846         WARN_ON(host->cmd);
 847
 848         /* Wait max 10 ms */
 849         timeout = 10;
 850
 851         mask = SDHCI_CMD_INHIBIT;
 852         if ((cmd->data != NULL) || (cmd->flags & MMC_RSP_BUSY))
 853                 mask |= SDHCI_DATA_INHIBIT;
 854
 855         /* We shouldn't wait for data inihibit for stop commands, even
 856            though they might use busy signaling */
 857         if (host->mrq->data && (cmd == host->mrq->data->stop))
 858                 mask &= ~SDHCI_DATA_INHIBIT;
 859
 860         while (sdhci_readl(host, SDHCI_PRESENT_STATE) & mask) {
 861                 if (timeout == 0) {
 862                         printk(KERN_ERR "%s: Controller never released "
 863                                 "inhibit bit(s).\n", mmc_hostname(host->mmc));
 864                         sdhci_dumpregs(host);
 865                         cmd->error = -EIO;
 866                         tasklet_schedule(&host->finish_tasklet);
 867                         return;
 868                 }
 869                 timeout--;
 870                 mdelay(1);
 871         }
 872
 873         mod_timer(&host->timer, jiffies + 10 * HZ);
 874
 875         host->cmd = cmd;
 876
 877         sdhci_prepare_data(host, cmd->data);
 878
 879         sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT);
 880
 881         sdhci_set_transfer_mode(host, cmd->data);
 882
 883         if ((cmd->flags & MMC_RSP_136) && (cmd->flags & MMC_RSP_BUSY)) {
 884                 printk(KERN_ERR "%s: Unsupported response type!\n",
 885                         mmc_hostname(host->mmc));
 886                 cmd->error = -EINVAL;
 887                 tasklet_schedule(&host->finish_tasklet);
 888                 return;
 889         }
 890
 891         if (!(cmd->flags & MMC_RSP_PRESENT))
 892                 flags = SDHCI_CMD_RESP_NONE;
 893         else if (cmd->flags & MMC_RSP_136)
 894                 flags = SDHCI_CMD_RESP_LONG;
 895         else if (cmd->flags & MMC_RSP_BUSY)
 896                 flags = SDHCI_CMD_RESP_SHORT_BUSY;
 897         else
 898                 flags = SDHCI_CMD_RESP_SHORT;
 899
 900         if (cmd->flags & MMC_RSP_CRC)
 901                 flags |= SDHCI_CMD_CRC;
 902         if (cmd->flags & MMC_RSP_OPCODE)
 903                 flags |= SDHCI_CMD_INDEX;
 904         if (cmd->data)
 905                 flags |= SDHCI_CMD_DATA;
 906
 907         sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND);
 908 }
 909
 910 static void sdhci_finish_command(struct sdhci_host *host)
 911 {
 912         int i;
 913
 914         BUG_ON(host->cmd == NULL);
 915
 916         if (host->cmd->flags & MMC_RSP_PRESENT) {
 917                 if (host->cmd->flags & MMC_RSP_136) {
 918                         /* CRC is stripped so we need to do some shifting. */
 919                         for (i = 0;i < 4;i++) {
 920                                 host->cmd->resp[i] = sdhci_readl(host,
 921                                         SDHCI_RESPONSE + (3-i)*4) << 8;
 922                                 if (i != 3)
 923                                         host->cmd->resp[i] |=
 924                                                 sdhci_readb(host,
 925                                                 SDHCI_RESPONSE + (3-i)*4-1);
 926                         }
 927                 } else {
 928                         host->cmd->resp[0] = sdhci_readl(host, SDHCI_RESPONSE);
 929                 }
 930         }
 931
 932         host->cmd->error = 0;
 933
 934         if (host->data && host->data_early)
 935                 sdhci_finish_data(host);
 936
 937         if (!host->cmd->data)
 938                 tasklet_schedule(&host->finish_tasklet);
 939
 940         host->cmd = NULL;
 941 }
 942
 943 static void sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
 944 {
 945         int div;
 946         u16 clk;
 947         unsigned long timeout;
 948
 949         if (clock == host->clock)
 950                 return;
 951
 952         if (host->ops->set_clock) {
 953                 host->ops->set_clock(host, clock);
 954                 if (host->quirks & SDHCI_QUIRK_NONSTANDARD_CLOCK)
 955                         return;
 956         }
 957
 958         sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
 959
 960         if (clock == 0)
 961                 goto out;
 962
 963         for (div = 1;div < 256;div *= 2) {
 964                 if ((host->max_clk / div) <= clock)
 965                         break;
 966         }
 967         div >>= 1;
 968
 969         clk = div << SDHCI_DIVIDER_SHIFT;
 970         clk |= SDHCI_CLOCK_INT_EN;
 971         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 972
 973         /* Wait max 10 ms */
 974         timeout = 10;
 975         while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
 976                 & SDHCI_CLOCK_INT_STABLE)) {
 977                 if (timeout == 0) {
 978                         printk(KERN_ERR "%s: Internal clock never "
 979                                 "stabilised.\n", mmc_hostname(host->mmc));
 980                         sdhci_dumpregs(host);
 981                         return;
 982                 }
 983                 timeout--;
 984                 mdelay(1);
 985         }
 986
 987         clk |= SDHCI_CLOCK_CARD_EN;
 988         sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
 989
 990 out:
 991         host->clock = clock;
 992 }
 993
 994 static void sdhci_set_power(struct sdhci_host *host, unsigned short power)
 995 {
 996         u8 pwr;
 997
 998         if (host->power == power)
 999                 return;
1000
1001         if (power == (unsigned short)-1) {
1002                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1003                 goto out;
1004         }
1005
1006         /*
1007          * Spec says that we should clear the power reg before setting
1008          * a new value. Some controllers don't seem to like this though.
1009          */
1010         if (!(host->quirks & SDHCI_QUIRK_SINGLE_POWER_WRITE))
1011                 sdhci_writeb(host, 0, SDHCI_POWER_CONTROL);
1012
1013         pwr = SDHCI_POWER_ON;
1014
1015         switch (1 << power) {
1016         case MMC_VDD_165_195:
1017                 pwr |= SDHCI_POWER_180;
1018                 break;
1019         case MMC_VDD_29_30:
1020         case MMC_VDD_30_31:
1021                 pwr |= SDHCI_POWER_300;
1022                 break;
1023         case MMC_VDD_32_33:
1024         case MMC_VDD_33_34:
1025                 pwr |= SDHCI_POWER_330;
1026                 break;
1027         default:
1028                 BUG();
1029         }
1030
1031         /*
1032          * At least the Marvell CaFe chip gets confused if we set the voltage
1033          * and set turn on power at the same time, so set the voltage first.
1034          */
1035         if ((host->quirks & SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER))
1036                 sdhci_writeb(host, pwr & ~SDHCI_POWER_ON, SDHCI_POWER_CONTROL);
1037
1038         sdhci_writeb(host, pwr, SDHCI_POWER_CONTROL);
1039
1040 out:
1041         host->power = power;
1042 }
1043
1044 /*****************************************************************************\
1045  *                                                                           *
1046  * MMC callbacks                                                             *
1047  *                                                                           *
1048 \*****************************************************************************/
1049
1050 static void sdhci_request(struct mmc_host *mmc, struct mmc_request *mrq)
1051 {
1052         struct sdhci_host *host;
1053         bool present;
1054         unsigned long flags;
1055
1056         host = mmc_priv(mmc);
1057
1058         spin_lock_irqsave(&host->lock, flags);
1059
1060         WARN_ON(host->mrq != NULL);
1061
1062 #ifndef SDHCI_USE_LEDS_CLASS
1063         sdhci_activate_led(host);
1064 #endif
1065
1066         host->mrq = mrq;
1067
1068         /* If polling, assume that the card is always present. */
1069         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
1070                 present = true;
1071         else
1072                 present = sdhci_readl(host, SDHCI_PRESENT_STATE) &
1073                                 SDHCI_CARD_PRESENT;
1074
1075         if (!present || host->flags & SDHCI_DEVICE_DEAD) {
1076                 host->mrq->cmd->error = -ENOMEDIUM;
1077                 tasklet_schedule(&host->finish_tasklet);
1078         } else
1079                 sdhci_send_command(host, mrq->cmd);
1080
1081         mmiowb();
1082         spin_unlock_irqrestore(&host->lock, flags);
1083 }
1084
1085 static void sdhci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1086 {
1087         struct sdhci_host *host;
1088         unsigned long flags;
1089         u8 ctrl;
1090
1091         host = mmc_priv(mmc);
1092
1093         spin_lock_irqsave(&host->lock, flags);
1094
1095         if (host->flags & SDHCI_DEVICE_DEAD)
1096                 goto out;
1097
1098         /*
1099          * Reset the chip on each power off.
1100          * Should clear out any weird states.
1101          */
1102         if (ios->power_mode == MMC_POWER_OFF) {
1103                 sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
1104                 sdhci_reinit(host);
1105         }
1106
1107         sdhci_set_clock(host, ios->clock);
1108
1109         if (ios->power_mode == MMC_POWER_OFF)
1110                 sdhci_set_power(host, -1);
1111         else
1112                 sdhci_set_power(host, ios->vdd);
1113
1114         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1115
1116         if (ios->bus_width == MMC_BUS_WIDTH_4)
1117                 ctrl |= SDHCI_CTRL_4BITBUS;
1118         else
1119                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1120
1121         if (ios->timing == MMC_TIMING_SD_HS)
1122                 ctrl |= SDHCI_CTRL_HISPD;
1123         else
1124                 ctrl &= ~SDHCI_CTRL_HISPD;
1125
1126         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1127
1128         /*
1129          * Some (ENE) controllers go apeshit on some ios operation,
1130          * signalling timeout and CRC errors even on CMD0. Resetting
1131          * it on each ios seems to solve the problem.
1132          */
1133         if(host->quirks & SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS)
1134                 sdhci_reset(host, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
1135
1136 out:
1137         mmiowb();
1138         spin_unlock_irqrestore(&host->lock, flags);
1139 }
1140
1141 static int sdhci_get_ro(struct mmc_host *mmc)
1142 {
1143         struct sdhci_host *host;
1144         unsigned long flags;
1145         int present;
1146
1147         host = mmc_priv(mmc);
1148
1149         spin_lock_irqsave(&host->lock, flags);
1150
1151         if (host->flags & SDHCI_DEVICE_DEAD)
1152                 present = 0;
1153         else
1154                 present = sdhci_readl(host, SDHCI_PRESENT_STATE);
1155
1156         spin_unlock_irqrestore(&host->lock, flags);
1157
1158         if (host->quirks & SDHCI_QUIRK_INVERTED_WRITE_PROTECT)
1159                 return !!(present & SDHCI_WRITE_PROTECT);
1160         return !(present & SDHCI_WRITE_PROTECT);
1161 }
1162
1163 static void sdhci_enable_sdio_irq(struct mmc_host *mmc, int enable)
1164 {
1165         struct sdhci_host *host;
1166         unsigned long flags;
1167
1168         host = mmc_priv(mmc);
1169
1170         spin_lock_irqsave(&host->lock, flags);
1171
1172         if (host->flags & SDHCI_DEVICE_DEAD)
1173                 goto out;
1174
1175         if (enable)
1176                 sdhci_unmask_irqs(host, SDHCI_INT_CARD_INT);
1177         else
1178                 sdhci_mask_irqs(host, SDHCI_INT_CARD_INT);
1179 out:
1180         mmiowb();
1181
1182         spin_unlock_irqrestore(&host->lock, flags);
1183 }
1184
1185 static const struct mmc_host_ops sdhci_ops = {
1186         .request        = sdhci_request,
1187         .set_ios        = sdhci_set_ios,
1188         .get_ro         = sdhci_get_ro,
1189         .enable_sdio_irq = sdhci_enable_sdio_irq,
1190 };
1191
1192 /*****************************************************************************\
1193  *                                                                           *
1194  * Tasklets                                                                  *
1195  *                                                                           *
1196 \*****************************************************************************/
1197
1198 static void sdhci_tasklet_card(unsigned long param)
1199 {
1200         struct sdhci_host *host;
1201         unsigned long flags;
1202
1203         host = (struct sdhci_host*)param;
1204
1205         spin_lock_irqsave(&host->lock, flags);
1206
1207         if (!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT)) {
1208                 if (host->mrq) {
1209                         printk(KERN_ERR "%s: Card removed during transfer!\n",
1210                                 mmc_hostname(host->mmc));
1211                         printk(KERN_ERR "%s: Resetting controller.\n",
1212                                 mmc_hostname(host->mmc));
1213
1214                         sdhci_reset(host, SDHCI_RESET_CMD);
1215                         sdhci_reset(host, SDHCI_RESET_DATA);
1216
1217                         host->mrq->cmd->error = -ENOMEDIUM;
1218                         tasklet_schedule(&host->finish_tasklet);
1219                 }
1220         }
1221
1222         spin_unlock_irqrestore(&host->lock, flags);
1223
1224         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
1225 }
1226
1227 static void sdhci_tasklet_finish(unsigned long param)
1228 {
1229         struct sdhci_host *host;
1230         unsigned long flags;
1231         struct mmc_request *mrq;
1232
1233         host = (struct sdhci_host*)param;
1234
1235         spin_lock_irqsave(&host->lock, flags);
1236
1237         del_timer(&host->timer);
1238
1239         mrq = host->mrq;
1240
1241         /*
1242          * The controller needs a reset of internal state machines
1243          * upon error conditions.
1244          */
1245         if (!(host->flags & SDHCI_DEVICE_DEAD) &&
1246                 (mrq->cmd->error ||
1247                  (mrq->data && (mrq->data->error ||
1248                   (mrq->data->stop && mrq->data->stop->error))) ||
1249                    (host->quirks & SDHCI_QUIRK_RESET_AFTER_REQUEST))) {
1250
1251                 /* Some controllers need this kick or reset won't work here */
1252                 if (host->quirks & SDHCI_QUIRK_CLOCK_BEFORE_RESET) {
1253                         unsigned int clock;
1254
1255                         /* This is to force an update */
1256                         clock = host->clock;
1257                         host->clock = 0;
1258                         sdhci_set_clock(host, clock);
1259                 }
1260
1261                 /* Spec says we should do both at the same time, but Ricoh
1262                    controllers do not like that. */
1263                 sdhci_reset(host, SDHCI_RESET_CMD);
1264                 sdhci_reset(host, SDHCI_RESET_DATA);
1265         }
1266
1267         host->mrq = NULL;
1268         host->cmd = NULL;
1269         host->data = NULL;
1270
1271 #ifndef SDHCI_USE_LEDS_CLASS
1272         sdhci_deactivate_led(host);
1273 #endif
1274
1275         mmiowb();
1276         spin_unlock_irqrestore(&host->lock, flags);
1277
1278         mmc_request_done(host->mmc, mrq);
1279 }
1280
1281 static void sdhci_timeout_timer(unsigned long data)
1282 {
1283         struct sdhci_host *host;
1284         unsigned long flags;
1285
1286         host = (struct sdhci_host*)data;
1287
1288         spin_lock_irqsave(&host->lock, flags);
1289
1290         if (host->mrq) {
1291                 printk(KERN_ERR "%s: Timeout waiting for hardware "
1292                         "interrupt.\n", mmc_hostname(host->mmc));
1293                 sdhci_dumpregs(host);
1294
1295                 if (host->data) {
1296                         host->data->error = -ETIMEDOUT;
1297                         sdhci_finish_data(host);
1298                 } else {
1299                         if (host->cmd)
1300                                 host->cmd->error = -ETIMEDOUT;
1301                         else
1302                                 host->mrq->cmd->error = -ETIMEDOUT;
1303
1304                         tasklet_schedule(&host->finish_tasklet);
1305                 }
1306         }
1307
1308         mmiowb();
1309         spin_unlock_irqrestore(&host->lock, flags);
1310 }
1311
1312 /*****************************************************************************\
1313  *                                                                           *
1314  * Interrupt handling                                                        *
1315  *                                                                           *
1316 \*****************************************************************************/
1317
1318 static void sdhci_cmd_irq(struct sdhci_host *host, u32 intmask)
1319 {
1320         BUG_ON(intmask == 0);
1321
1322         if (!host->cmd) {
1323                 printk(KERN_ERR "%s: Got command interrupt 0x%08x even "
1324                         "though no command operation was in progress.\n",
1325                         mmc_hostname(host->mmc), (unsigned)intmask);
1326                 sdhci_dumpregs(host);
1327                 return;
1328         }
1329
1330         if (intmask & SDHCI_INT_TIMEOUT)
1331                 host->cmd->error = -ETIMEDOUT;
1332         else if (intmask & (SDHCI_INT_CRC | SDHCI_INT_END_BIT |
1333                         SDHCI_INT_INDEX))
1334                 host->cmd->error = -EILSEQ;
1335
1336         if (host->cmd->error) {
1337                 tasklet_schedule(&host->finish_tasklet);
1338                 return;
1339         }
1340
1341         /*
1342          * The host can send and interrupt when the busy state has
1343          * ended, allowing us to wait without wasting CPU cycles.
1344          * Unfortunately this is overloaded on the "data complete"
1345          * interrupt, so we need to take some care when handling
1346          * it.
1347          *
1348          * Note: The 1.0 specification is a bit ambiguous about this
1349          *       feature so there might be some problems with older
1350          *       controllers.
1351          */
1352         if (host->cmd->flags & MMC_RSP_BUSY) {
1353                 if (host->cmd->data)
1354                         DBG("Cannot wait for busy signal when also "
1355                                 "doing a data transfer");
1356                 else if (!(host->quirks & SDHCI_QUIRK_NO_BUSY_IRQ))
1357                         return;
1358
1359                 /* The controller does not support the end-of-busy IRQ,
1360                  * fall through and take the SDHCI_INT_RESPONSE */
1361         }
1362
1363         if (intmask & SDHCI_INT_RESPONSE)
1364                 sdhci_finish_command(host);
1365 }
1366
1367 static void sdhci_data_irq(struct sdhci_host *host, u32 intmask)
1368 {
1369         BUG_ON(intmask == 0);
1370
1371         if (!host->data) {
1372                 /*
1373                  * The "data complete" interrupt is also used to
1374                  * indicate that a busy state has ended. See comment
1375                  * above in sdhci_cmd_irq().
1376                  */
1377                 if (host->cmd && (host->cmd->flags & MMC_RSP_BUSY)) {
1378                         if (intmask & SDHCI_INT_DATA_END) {
1379                                 sdhci_finish_command(host);
1380                                 return;
1381                         }
1382                 }
1383
1384                 printk(KERN_ERR "%s: Got data interrupt 0x%08x even "
1385                         "though no data operation was in progress.\n",
1386                         mmc_hostname(host->mmc), (unsigned)intmask);
1387                 sdhci_dumpregs(host);
1388
1389                 return;
1390         }
1391
1392         if (intmask & SDHCI_INT_DATA_TIMEOUT)
1393                 host->data->error = -ETIMEDOUT;
1394         else if (intmask & (SDHCI_INT_DATA_CRC | SDHCI_INT_DATA_END_BIT))
1395                 host->data->error = -EILSEQ;
1396         else if (intmask & SDHCI_INT_ADMA_ERROR)
1397                 host->data->error = -EIO;
1398
1399         if (host->data->error)
1400                 sdhci_finish_data(host);
1401         else {
1402                 if (intmask & (SDHCI_INT_DATA_AVAIL | SDHCI_INT_SPACE_AVAIL))
1403                         sdhci_transfer_pio(host);
1404
1405                 /*
1406                  * We currently don't do anything fancy with DMA
1407                  * boundaries, but as we can't disable the feature
1408                  * we need to at least restart the transfer.
1409                  */
1410                 if (intmask & SDHCI_INT_DMA_END)
1411                         sdhci_writel(host, sdhci_readl(host, SDHCI_DMA_ADDRESS),
1412                                 SDHCI_DMA_ADDRESS);
1413
1414                 if (intmask & SDHCI_INT_DATA_END) {
1415                         if (host->cmd) {
1416                                 /*
1417                                  * Data managed to finish before the
1418                                  * command completed. Make sure we do
1419                                  * things in the proper order.
1420                                  */
1421                                 host->data_early = 1;
1422                         } else {
1423                                 sdhci_finish_data(host);
1424                         }
1425                 }
1426         }
1427 }
1428
1429 static irqreturn_t sdhci_irq(int irq, void *dev_id)
1430 {
1431         irqreturn_t result;
1432         struct sdhci_host* host = dev_id;
1433         u32 intmask;
1434         int cardint = 0;
1435
1436         spin_lock(&host->lock);
1437
1438         intmask = sdhci_readl(host, SDHCI_INT_STATUS);
1439
1440         if (!intmask || intmask == 0xffffffff) {
1441                 result = IRQ_NONE;
1442                 goto out;
1443         }
1444
1445         DBG("*** %s got interrupt: 0x%08x\n",
1446                 mmc_hostname(host->mmc), intmask);
1447
1448         if (intmask & (SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE)) {
1449                 sdhci_writel(host, intmask & (SDHCI_INT_CARD_INSERT |
1450                         SDHCI_INT_CARD_REMOVE), SDHCI_INT_STATUS);
1451                 tasklet_schedule(&host->card_tasklet);
1452         }
1453
1454         intmask &= ~(SDHCI_INT_CARD_INSERT | SDHCI_INT_CARD_REMOVE);
1455
1456         if (intmask & SDHCI_INT_CMD_MASK) {
1457                 sdhci_writel(host, intmask & SDHCI_INT_CMD_MASK,
1458                         SDHCI_INT_STATUS);
1459                 sdhci_cmd_irq(host, intmask & SDHCI_INT_CMD_MASK);
1460         }
1461
1462         if (intmask & SDHCI_INT_DATA_MASK) {
1463                 sdhci_writel(host, intmask & SDHCI_INT_DATA_MASK,
1464                         SDHCI_INT_STATUS);
1465                 sdhci_data_irq(host, intmask & SDHCI_INT_DATA_MASK);
1466         }
1467
1468         intmask &= ~(SDHCI_INT_CMD_MASK | SDHCI_INT_DATA_MASK);
1469
1470         intmask &= ~SDHCI_INT_ERROR;
1471
1472         if (intmask & SDHCI_INT_BUS_POWER) {
1473                 printk(KERN_ERR "%s: Card is consuming too much power!\n",
1474                         mmc_hostname(host->mmc));
1475                 sdhci_writel(host, SDHCI_INT_BUS_POWER, SDHCI_INT_STATUS);
1476         }
1477
1478         intmask &= ~SDHCI_INT_BUS_POWER;
1479
1480         if (intmask & SDHCI_INT_CARD_INT)
1481                 cardint = 1;
1482
1483         intmask &= ~SDHCI_INT_CARD_INT;
1484
1485         if (intmask) {
1486                 printk(KERN_ERR "%s: Unexpected interrupt 0x%08x.\n",
1487                         mmc_hostname(host->mmc), intmask);
1488                 sdhci_dumpregs(host);
1489
1490                 sdhci_writel(host, intmask, SDHCI_INT_STATUS);
1491         }
1492
1493         result = IRQ_HANDLED;
1494
1495         mmiowb();
1496 out:
1497         spin_unlock(&host->lock);
1498
1499         /*
1500          * We have to delay this as it calls back into the driver.
1501          */
1502         if (cardint)
1503                 mmc_signal_sdio_irq(host->mmc);
1504
1505         return result;
1506 }
1507
1508 /*****************************************************************************\
1509  *                                                                           *
1510  * Suspend/resume                                                            *
1511  *                                                                           *
1512 \*****************************************************************************/
1513
1514 #ifdef CONFIG_PM
1515
1516 int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state)
1517 {
1518         int ret;
1519
1520         sdhci_disable_card_detection(host);
1521
1522         ret = mmc_suspend_host(host->mmc, state);
1523         if (ret)
1524                 return ret;
1525
1526         free_irq(host->irq, host);
1527
1528         return 0;
1529 }
1530
1531 EXPORT_SYMBOL_GPL(sdhci_suspend_host);
1532
1533 int sdhci_resume_host(struct sdhci_host *host)
1534 {
1535         int ret;
1536
1537         if (host->flags & SDHCI_USE_DMA) {
1538                 if (host->ops->enable_dma)
1539                         host->ops->enable_dma(host);
1540         }
1541
1542         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1543                           mmc_hostname(host->mmc), host);
1544         if (ret)
1545                 return ret;
1546
1547         sdhci_init(host);
1548         mmiowb();
1549
1550         ret = mmc_resume_host(host->mmc);
1551         if (ret)
1552                 return ret;
1553
1554         sdhci_enable_card_detection(host);
1555
1556         return 0;
1557 }
1558
1559 EXPORT_SYMBOL_GPL(sdhci_resume_host);
1560
1561 #endif /* CONFIG_PM */
1562
1563 /*****************************************************************************\
1564  *                                                                           *
1565  * Device allocation/registration                                            *
1566  *                                                                           *
1567 \*****************************************************************************/
1568
1569 struct sdhci_host *sdhci_alloc_host(struct device *dev,
1570         size_t priv_size)
1571 {
1572         struct mmc_host *mmc;
1573         struct sdhci_host *host;
1574
1575         WARN_ON(dev == NULL);
1576
1577         mmc = mmc_alloc_host(sizeof(struct sdhci_host) + priv_size, dev);
1578         if (!mmc)
1579                 return ERR_PTR(-ENOMEM);
1580
1581         host = mmc_priv(mmc);
1582         host->mmc = mmc;
1583
1584         return host;
1585 }
1586
1587 EXPORT_SYMBOL_GPL(sdhci_alloc_host);
1588
1589 int sdhci_add_host(struct sdhci_host *host)
1590 {
1591         struct mmc_host *mmc;
1592         unsigned int caps;
1593         int ret;
1594
1595         WARN_ON(host == NULL);
1596         if (host == NULL)
1597                 return -EINVAL;
1598
1599         mmc = host->mmc;
1600
1601         if (debug_quirks)
1602                 host->quirks = debug_quirks;
1603
1604         sdhci_reset(host, SDHCI_RESET_ALL);
1605
1606         host->version = sdhci_readw(host, SDHCI_HOST_VERSION);
1607         host->version = (host->version & SDHCI_SPEC_VER_MASK)
1608                                 >> SDHCI_SPEC_VER_SHIFT;
1609         if (host->version > SDHCI_SPEC_200) {
1610                 printk(KERN_ERR "%s: Unknown controller version (%d). "
1611                         "You may experience problems.\n", mmc_hostname(mmc),
1612                         host->version);
1613         }
1614
1615         caps = sdhci_readl(host, SDHCI_CAPABILITIES);
1616
1617         if (host->quirks & SDHCI_QUIRK_FORCE_DMA)
1618                 host->flags |= SDHCI_USE_DMA;
1619         else if (!(caps & SDHCI_CAN_DO_DMA))
1620                 DBG("Controller doesn't have DMA capability\n");
1621         else
1622                 host->flags |= SDHCI_USE_DMA;
1623
1624         if ((host->quirks & SDHCI_QUIRK_BROKEN_DMA) &&
1625                 (host->flags & SDHCI_USE_DMA)) {
1626                 DBG("Disabling DMA as it is marked broken\n");
1627                 host->flags &= ~SDHCI_USE_DMA;
1628         }
1629
1630         if (host->flags & SDHCI_USE_DMA) {
1631                 if ((host->version >= SDHCI_SPEC_200) &&
1632                                 (caps & SDHCI_CAN_DO_ADMA2))
1633                         host->flags |= SDHCI_USE_ADMA;
1634         }
1635
1636         if ((host->quirks & SDHCI_QUIRK_BROKEN_ADMA) &&
1637                 (host->flags & SDHCI_USE_ADMA)) {
1638                 DBG("Disabling ADMA as it is marked broken\n");
1639                 host->flags &= ~SDHCI_USE_ADMA;
1640         }
1641
1642         if (host->flags & SDHCI_USE_DMA) {
1643                 if (host->ops->enable_dma) {
1644                         if (host->ops->enable_dma(host)) {
1645                                 printk(KERN_WARNING "%s: No suitable DMA "
1646                                         "available. Falling back to PIO.\n",
1647                                         mmc_hostname(mmc));
1648                                 host->flags &= ~(SDHCI_USE_DMA | SDHCI_USE_ADMA);
1649                         }
1650                 }
1651         }
1652
1653         if (host->flags & SDHCI_USE_ADMA) {
1654                 /*
1655                  * We need to allocate descriptors for all sg entries
1656                  * (128) and potentially one alignment transfer for
1657                  * each of those entries.
1658                  */
1659                 host->adma_desc = kmalloc((128 * 2 + 1) * 4, GFP_KERNEL);
1660                 host->align_buffer = kmalloc(128 * 4, GFP_KERNEL);
1661                 if (!host->adma_desc || !host->align_buffer) {
1662                         kfree(host->adma_desc);
1663                         kfree(host->align_buffer);
1664                         printk(KERN_WARNING "%s: Unable to allocate ADMA "
1665                                 "buffers. Falling back to standard DMA.\n",
1666                                 mmc_hostname(mmc));
1667                         host->flags &= ~SDHCI_USE_ADMA;
1668                 }
1669         }
1670
1671         /*
1672          * If we use DMA, then it's up to the caller to set the DMA
1673          * mask, but PIO does not need the hw shim so we set a new
1674          * mask here in that case.
1675          */
1676         if (!(host->flags & SDHCI_USE_DMA)) {
1677                 host->dma_mask = DMA_BIT_MASK(64);
1678                 mmc_dev(host->mmc)->dma_mask = &host->dma_mask;
1679         }
1680
1681         host->max_clk =
1682                 (caps & SDHCI_CLOCK_BASE_MASK) >> SDHCI_CLOCK_BASE_SHIFT;
1683         host->max_clk *= 1000000;
1684         if (host->max_clk == 0) {
1685                 if (!host->ops->get_max_clock) {
1686                         printk(KERN_ERR
1687                                "%s: Hardware doesn't specify base clock "
1688                                "frequency.\n", mmc_hostname(mmc));
1689                         return -ENODEV;
1690                 }
1691                 host->max_clk = host->ops->get_max_clock(host);
1692         }
1693
1694         host->timeout_clk =
1695                 (caps & SDHCI_TIMEOUT_CLK_MASK) >> SDHCI_TIMEOUT_CLK_SHIFT;
1696         if (host->timeout_clk == 0) {
1697                 if (!host->ops->get_timeout_clock) {
1698                         printk(KERN_ERR
1699                                "%s: Hardware doesn't specify timeout clock "
1700                                "frequency.\n", mmc_hostname(mmc));
1701                         return -ENODEV;
1702                 }
1703                 host->timeout_clk = host->ops->get_timeout_clock(host);
1704         }
1705         if (caps & SDHCI_TIMEOUT_CLK_UNIT)
1706                 host->timeout_clk *= 1000;
1707
1708         /*
1709          * Set host parameters.
1710          */
1711         mmc->ops = &sdhci_ops;
1712         mmc->f_min = host->max_clk / 256;
1713         mmc->f_max = host->max_clk;
1714         mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ;
1715
1716         if (caps & SDHCI_CAN_DO_HISPD)
1717                 mmc->caps |= MMC_CAP_SD_HIGHSPEED;
1718
1719         if (host->quirks & SDHCI_QUIRK_BROKEN_CARD_DETECTION)
1720                 mmc->caps |= MMC_CAP_NEEDS_POLL;
1721
1722         mmc->ocr_avail = 0;
1723         if (caps & SDHCI_CAN_VDD_330)
1724                 mmc->ocr_avail |= MMC_VDD_32_33|MMC_VDD_33_34;
1725         if (caps & SDHCI_CAN_VDD_300)
1726                 mmc->ocr_avail |= MMC_VDD_29_30|MMC_VDD_30_31;
1727         if (caps & SDHCI_CAN_VDD_180)
1728                 mmc->ocr_avail |= MMC_VDD_165_195;
1729
1730         if (mmc->ocr_avail == 0) {
1731                 printk(KERN_ERR "%s: Hardware doesn't report any "
1732                         "support voltages.\n", mmc_hostname(mmc));
1733                 return -ENODEV;
1734         }
1735
1736         spin_lock_init(&host->lock);
1737
1738         /*
1739          * Maximum number of segments. Depends on if the hardware
1740          * can do scatter/gather or not.
1741          */
1742         if (host->flags & SDHCI_USE_ADMA)
1743                 mmc->max_hw_segs = 128;
1744         else if (host->flags & SDHCI_USE_DMA)
1745                 mmc->max_hw_segs = 1;
1746         else /* PIO */
1747                 mmc->max_hw_segs = 128;
1748         mmc->max_phys_segs = 128;
1749
1750         /*
1751          * Maximum number of sectors in one transfer. Limited by DMA boundary
1752          * size (512KiB).
1753          */
1754         mmc->max_req_size = 524288;
1755
1756         /*
1757          * Maximum segment size. Could be one segment with the maximum number
1758          * of bytes. When doing hardware scatter/gather, each entry cannot
1759          * be larger than 64 KiB though.
1760          */
1761         if (host->flags & SDHCI_USE_ADMA)
1762                 mmc->max_seg_size = 65536;
1763         else
1764                 mmc->max_seg_size = mmc->max_req_size;
1765
1766         /*
1767          * Maximum block size. This varies from controller to controller and
1768          * is specified in the capabilities register.
1769          */
1770         mmc->max_blk_size = (caps & SDHCI_MAX_BLOCK_MASK) >> SDHCI_MAX_BLOCK_SHIFT;
1771         if (mmc->max_blk_size >= 3) {
1772                 printk(KERN_WARNING "%s: Invalid maximum block size, "
1773                         "assuming 512 bytes\n", mmc_hostname(mmc));
1774                 mmc->max_blk_size = 512;
1775         } else
1776                 mmc->max_blk_size = 512 << mmc->max_blk_size;
1777
1778         /*
1779          * Maximum block count.
1780          */
1781         mmc->max_blk_count = 65535;
1782
1783         /*
1784          * Init tasklets.
1785          */
1786         tasklet_init(&host->card_tasklet,
1787                 sdhci_tasklet_card, (unsigned long)host);
1788         tasklet_init(&host->finish_tasklet,
1789                 sdhci_tasklet_finish, (unsigned long)host);
1790
1791         setup_timer(&host->timer, sdhci_timeout_timer, (unsigned long)host);
1792
1793         ret = request_irq(host->irq, sdhci_irq, IRQF_SHARED,
1794                 mmc_hostname(mmc), host);
1795         if (ret)
1796                 goto untasklet;
1797
1798         sdhci_init(host);
1799
1800 #ifdef CONFIG_MMC_DEBUG
1801         sdhci_dumpregs(host);
1802 #endif
1803
1804 #ifdef SDHCI_USE_LEDS_CLASS
1805         snprintf(host->led_name, sizeof(host->led_name),
1806                 "%s::", mmc_hostname(mmc));
1807         host->led.name = host->led_name;
1808         host->led.brightness = LED_OFF;
1809         host->led.default_trigger = mmc_hostname(mmc);
1810         host->led.brightness_set = sdhci_led_control;
1811
1812         ret = led_classdev_register(mmc_dev(mmc), &host->led);
1813         if (ret)
1814                 goto reset;
1815 #endif
1816
1817         mmiowb();
1818
1819         mmc_add_host(mmc);
1820
1821         printk(KERN_INFO "%s: SDHCI controller on %s [%s] using %s%s\n",
1822                 mmc_hostname(mmc), host->hw_name, dev_name(mmc_dev(mmc)),
1823                 (host->flags & SDHCI_USE_ADMA)?"A":"",
1824                 (host->flags & SDHCI_USE_DMA)?"DMA":"PIO");
1825
1826         sdhci_enable_card_detection(host);
1827
1828         return 0;
1829
1830 #ifdef SDHCI_USE_LEDS_CLASS
1831 reset:
1832         sdhci_reset(host, SDHCI_RESET_ALL);
1833         free_irq(host->irq, host);
1834 #endif
1835 untasklet:
1836         tasklet_kill(&host->card_tasklet);
1837         tasklet_kill(&host->finish_tasklet);
1838
1839         return ret;
1840 }
1841
1842 EXPORT_SYMBOL_GPL(sdhci_add_host);
1843
1844 void sdhci_remove_host(struct sdhci_host *host, int dead)
1845 {
1846         unsigned long flags;
1847
1848         if (dead) {
1849                 spin_lock_irqsave(&host->lock, flags);
1850
1851                 host->flags |= SDHCI_DEVICE_DEAD;
1852
1853                 if (host->mrq) {
1854                         printk(KERN_ERR "%s: Controller removed during "
1855                                 " transfer!\n", mmc_hostname(host->mmc));
1856
1857                         host->mrq->cmd->error = -ENOMEDIUM;
1858                         tasklet_schedule(&host->finish_tasklet);
1859                 }
1860
1861                 spin_unlock_irqrestore(&host->lock, flags);
1862         }
1863
1864         sdhci_disable_card_detection(host);
1865
1866         mmc_remove_host(host->mmc);
1867
1868 #ifdef SDHCI_USE_LEDS_CLASS
1869         led_classdev_unregister(&host->led);
1870 #endif
1871
1872         if (!dead)
1873                 sdhci_reset(host, SDHCI_RESET_ALL);
1874
1875         free_irq(host->irq, host);
1876
1877         del_timer_sync(&host->timer);
1878
1879         tasklet_kill(&host->card_tasklet);
1880         tasklet_kill(&host->finish_tasklet);
1881
1882         kfree(host->adma_desc);
1883         kfree(host->align_buffer);
1884
1885         host->adma_desc = NULL;
1886         host->align_buffer = NULL;
1887 }
1888
1889 EXPORT_SYMBOL_GPL(sdhci_remove_host);
1890
1891 void sdhci_free_host(struct sdhci_host *host)
1892 {
1893         mmc_free_host(host->mmc);
1894 }
1895
1896 EXPORT_SYMBOL_GPL(sdhci_free_host);
1897
1898 /*****************************************************************************\
1899  *                                                                           *
1900  * Driver init/exit                                                          *
1901  *                                                                           *
1902 \*****************************************************************************/
1903
1904 static int __init sdhci_drv_init(void)
1905 {
1906         printk(KERN_INFO DRIVER_NAME
1907                 ": Secure Digital Host Controller Interface driver\n");
1908         printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1909
1910         return 0;
1911 }
1912
1913 static void __exit sdhci_drv_exit(void)
1914 {
1915 }
1916
1917 module_init(sdhci_drv_init);
1918 module_exit(sdhci_drv_exit);
1919
1920 module_param(debug_quirks, uint, 0444);
1921
1922 MODULE_AUTHOR("Pierre Ossman <drzeus@drzeus.cx>");
1923 MODULE_DESCRIPTION("Secure Digital Host Controller Interface core driver");
1924 MODULE_LICENSE("GPL");
1925
1926 MODULE_PARM_DESC(debug_quirks, "Force certain quirks.");