2 * Platform dependent support for SGI SN
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
8 * Copyright (c) 2000-2006 Silicon Graphics, Inc. All Rights Reserved.
11 #include <linux/irq.h>
12 #include <linux/spinlock.h>
13 #include <linux/init.h>
14 #include <asm/sn/addrs.h>
15 #include <asm/sn/arch.h>
16 #include <asm/sn/intr.h>
17 #include <asm/sn/pcibr_provider.h>
18 #include <asm/sn/pcibus_provider_defs.h>
19 #include <asm/sn/pcidev.h>
20 #include <asm/sn/shub_mmr.h>
21 #include <asm/sn/sn_sal.h>
23 static void force_interrupt(int irq);
24 static void register_intr_pda(struct sn_irq_info *sn_irq_info);
25 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info);
27 int sn_force_interrupt_flag = 1;
28 extern int sn_ioif_inited;
29 struct list_head **sn_irq_lh;
30 static spinlock_t sn_irq_info_lock = SPIN_LOCK_UNLOCKED; /* non-IRQ lock */
32 u64 sn_intr_alloc(nasid_t local_nasid, int local_widget,
33 struct sn_irq_info *sn_irq_info,
34 int req_irq, nasid_t req_nasid,
37 struct ia64_sal_retval ret_stuff;
41 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
42 (u64) SAL_INTR_ALLOC, (u64) local_nasid,
43 (u64) local_widget, __pa(sn_irq_info), (u64) req_irq,
44 (u64) req_nasid, (u64) req_slice);
46 return ret_stuff.status;
49 void sn_intr_free(nasid_t local_nasid, int local_widget,
50 struct sn_irq_info *sn_irq_info)
52 struct ia64_sal_retval ret_stuff;
56 SAL_CALL_NOLOCK(ret_stuff, (u64) SN_SAL_IOIF_INTERRUPT,
57 (u64) SAL_INTR_FREE, (u64) local_nasid,
58 (u64) local_widget, (u64) sn_irq_info->irq_irq,
59 (u64) sn_irq_info->irq_cookie, 0, 0);
62 static unsigned int sn_startup_irq(unsigned int irq)
67 static void sn_shutdown_irq(unsigned int irq)
71 static void sn_disable_irq(unsigned int irq)
75 static void sn_enable_irq(unsigned int irq)
79 static void sn_ack_irq(unsigned int irq)
81 u64 event_occurred, mask;
84 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED));
85 mask = event_occurred & SH_ALL_INT_MASK;
86 HUB_S((u64*)LOCAL_MMR_ADDR(SH_EVENT_OCCURRED_ALIAS), mask);
87 __set_bit(irq, (volatile void *)pda->sn_in_service_ivecs);
92 static void sn_end_irq(unsigned int irq)
98 if (ivec == SGI_UART_VECTOR) {
99 event_occurred = HUB_L((u64*)LOCAL_MMR_ADDR (SH_EVENT_OCCURRED));
100 /* If the UART bit is set here, we may have received an
101 * interrupt from the UART that the driver missed. To
102 * make sure, we IPI ourselves to force us to look again.
104 if (event_occurred & SH_EVENT_OCCURRED_UART_INT_MASK) {
105 platform_send_ipi(smp_processor_id(), SGI_UART_VECTOR,
109 __clear_bit(ivec, (volatile void *)pda->sn_in_service_ivecs);
110 if (sn_force_interrupt_flag)
111 force_interrupt(irq);
114 static void sn_irq_info_free(struct rcu_head *head);
116 struct sn_irq_info *sn_retarget_vector(struct sn_irq_info *sn_irq_info,
117 nasid_t nasid, int slice)
122 int local_widget, status;
124 struct sn_irq_info *new_irq_info;
125 struct sn_pcibus_provider *pci_provider;
127 new_irq_info = kmalloc(sizeof(struct sn_irq_info), GFP_ATOMIC);
128 if (new_irq_info == NULL)
131 memcpy(new_irq_info, sn_irq_info, sizeof(struct sn_irq_info));
133 bridge = (u64) new_irq_info->irq_bridge;
136 return NULL; /* irq is not a device interrupt */
139 local_nasid = NASID_GET(bridge);
142 local_widget = TIO_SWIN_WIDGETNUM(bridge);
144 local_widget = SWIN_WIDGETNUM(bridge);
146 vector = sn_irq_info->irq_irq;
147 /* Free the old PROM new_irq_info structure */
148 sn_intr_free(local_nasid, local_widget, new_irq_info);
149 /* Update kernels new_irq_info with new target info */
150 unregister_intr_pda(new_irq_info);
152 /* allocate a new PROM new_irq_info struct */
153 status = sn_intr_alloc(local_nasid, local_widget,
154 new_irq_info, vector,
157 /* SAL call failed */
163 cpuphys = nasid_slice_to_cpuid(nasid, slice);
164 new_irq_info->irq_cpuid = cpuphys;
165 register_intr_pda(new_irq_info);
167 pci_provider = sn_pci_provider[new_irq_info->irq_bridge_type];
170 * If this represents a line interrupt, target it. If it's
171 * an msi (irq_int_bit < 0), it's already targeted.
173 if (new_irq_info->irq_int_bit >= 0 &&
174 pci_provider && pci_provider->target_interrupt)
175 (pci_provider->target_interrupt)(new_irq_info);
177 spin_lock(&sn_irq_info_lock);
178 list_replace_rcu(&sn_irq_info->list, &new_irq_info->list);
179 spin_unlock(&sn_irq_info_lock);
180 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
183 set_irq_affinity_info((vector & 0xff), cpuphys, 0);
189 static void sn_set_affinity_irq(unsigned int irq, cpumask_t mask)
191 struct sn_irq_info *sn_irq_info, *sn_irq_info_safe;
195 nasid = cpuid_to_nasid(first_cpu(mask));
196 slice = cpuid_to_slice(first_cpu(mask));
198 list_for_each_entry_safe(sn_irq_info, sn_irq_info_safe,
199 sn_irq_lh[irq], list)
200 (void)sn_retarget_vector(sn_irq_info, nasid, slice);
203 struct hw_interrupt_type irq_type_sn = {
204 .typename = "SN hub",
205 .startup = sn_startup_irq,
206 .shutdown = sn_shutdown_irq,
207 .enable = sn_enable_irq,
208 .disable = sn_disable_irq,
211 .set_affinity = sn_set_affinity_irq
214 unsigned int sn_local_vector_to_irq(u8 vector)
216 return (CPU_VECTOR_TO_IRQ(smp_processor_id(), vector));
219 void sn_irq_init(void)
222 irq_desc_t *base_desc = irq_desc;
224 ia64_first_device_vector = IA64_SN2_FIRST_DEVICE_VECTOR;
225 ia64_last_device_vector = IA64_SN2_LAST_DEVICE_VECTOR;
227 for (i = 0; i < NR_IRQS; i++) {
228 if (base_desc[i].handler == &no_irq_type) {
229 base_desc[i].handler = &irq_type_sn;
234 static void register_intr_pda(struct sn_irq_info *sn_irq_info)
236 int irq = sn_irq_info->irq_irq;
237 int cpu = sn_irq_info->irq_cpuid;
239 if (pdacpu(cpu)->sn_last_irq < irq) {
240 pdacpu(cpu)->sn_last_irq = irq;
243 if (pdacpu(cpu)->sn_first_irq == 0 || pdacpu(cpu)->sn_first_irq > irq)
244 pdacpu(cpu)->sn_first_irq = irq;
247 static void unregister_intr_pda(struct sn_irq_info *sn_irq_info)
249 int irq = sn_irq_info->irq_irq;
250 int cpu = sn_irq_info->irq_cpuid;
251 struct sn_irq_info *tmp_irq_info;
255 if (pdacpu(cpu)->sn_last_irq == irq) {
257 for (i = pdacpu(cpu)->sn_last_irq - 1;
258 i && !foundmatch; i--) {
259 list_for_each_entry_rcu(tmp_irq_info,
262 if (tmp_irq_info->irq_cpuid == cpu) {
268 pdacpu(cpu)->sn_last_irq = i;
271 if (pdacpu(cpu)->sn_first_irq == irq) {
273 for (i = pdacpu(cpu)->sn_first_irq + 1;
274 i < NR_IRQS && !foundmatch; i++) {
275 list_for_each_entry_rcu(tmp_irq_info,
278 if (tmp_irq_info->irq_cpuid == cpu) {
284 pdacpu(cpu)->sn_first_irq = ((i == NR_IRQS) ? 0 : i);
289 static void sn_irq_info_free(struct rcu_head *head)
291 struct sn_irq_info *sn_irq_info;
293 sn_irq_info = container_of(head, struct sn_irq_info, rcu);
297 void sn_irq_fixup(struct pci_dev *pci_dev, struct sn_irq_info *sn_irq_info)
299 nasid_t nasid = sn_irq_info->irq_nasid;
300 int slice = sn_irq_info->irq_slice;
301 int cpu = nasid_slice_to_cpuid(nasid, slice);
303 pci_dev_get(pci_dev);
304 sn_irq_info->irq_cpuid = cpu;
305 sn_irq_info->irq_pciioinfo = SN_PCIDEV_INFO(pci_dev);
307 /* link it into the sn_irq[irq] list */
308 spin_lock(&sn_irq_info_lock);
309 list_add_rcu(&sn_irq_info->list, sn_irq_lh[sn_irq_info->irq_irq]);
310 reserve_irq_vector(sn_irq_info->irq_irq);
311 spin_unlock(&sn_irq_info_lock);
313 register_intr_pda(sn_irq_info);
316 void sn_irq_unfixup(struct pci_dev *pci_dev)
318 struct sn_irq_info *sn_irq_info;
320 /* Only cleanup IRQ stuff if this device has a host bus context */
321 if (!SN_PCIDEV_BUSSOFT(pci_dev))
324 sn_irq_info = SN_PCIDEV_INFO(pci_dev)->pdi_sn_irq_info;
327 if (!sn_irq_info->irq_irq) {
332 unregister_intr_pda(sn_irq_info);
333 spin_lock(&sn_irq_info_lock);
334 list_del_rcu(&sn_irq_info->list);
335 spin_unlock(&sn_irq_info_lock);
336 if (list_empty(sn_irq_lh[sn_irq_info->irq_irq]))
337 free_irq_vector(sn_irq_info->irq_irq);
338 call_rcu(&sn_irq_info->rcu, sn_irq_info_free);
339 pci_dev_put(pci_dev);
344 sn_call_force_intr_provider(struct sn_irq_info *sn_irq_info)
346 struct sn_pcibus_provider *pci_provider;
348 pci_provider = sn_pci_provider[sn_irq_info->irq_bridge_type];
349 if (pci_provider && pci_provider->force_interrupt)
350 (*pci_provider->force_interrupt)(sn_irq_info);
353 static void force_interrupt(int irq)
355 struct sn_irq_info *sn_irq_info;
361 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[irq], list)
362 sn_call_force_intr_provider(sn_irq_info);
368 * Check for lost interrupts. If the PIC int_status reg. says that
369 * an interrupt has been sent, but not handled, and the interrupt
370 * is not pending in either the cpu irr regs or in the soft irr regs,
371 * and the interrupt is not in service, then the interrupt may have
372 * been lost. Force an interrupt on that pin. It is possible that
373 * the interrupt is in flight, so we may generate a spurious interrupt,
374 * but we should never miss a real lost interrupt.
376 static void sn_check_intr(int irq, struct sn_irq_info *sn_irq_info)
379 struct pcidev_info *pcidev_info;
380 struct pcibus_info *pcibus_info;
383 * Bridge types attached to TIO (anything but PIC) do not need this WAR
384 * since they do not target Shub II interrupt registers. If that
385 * ever changes, this check needs to accomodate.
387 if (sn_irq_info->irq_bridge_type != PCIIO_ASIC_TYPE_PIC)
390 pcidev_info = (struct pcidev_info *)sn_irq_info->irq_pciioinfo;
395 (struct pcibus_info *)pcidev_info->pdi_host_pcidev_info->
397 regval = pcireg_intr_status_get(pcibus_info);
399 if (!ia64_get_irr(irq_to_vector(irq))) {
400 if (!test_bit(irq, pda->sn_in_service_ivecs)) {
402 if (sn_irq_info->irq_int_bit & regval &
403 sn_irq_info->irq_last_intr) {
404 regval &= ~(sn_irq_info->irq_int_bit & regval);
405 sn_call_force_intr_provider(sn_irq_info);
409 sn_irq_info->irq_last_intr = regval;
412 void sn_lb_int_war_check(void)
414 struct sn_irq_info *sn_irq_info;
417 if (!sn_ioif_inited || pda->sn_first_irq == 0)
421 for (i = pda->sn_first_irq; i <= pda->sn_last_irq; i++) {
422 list_for_each_entry_rcu(sn_irq_info, sn_irq_lh[i], list) {
423 sn_check_intr(i, sn_irq_info);
429 void __init sn_irq_lh_init(void)
433 sn_irq_lh = kmalloc(sizeof(struct list_head *) * NR_IRQS, GFP_KERNEL);
435 panic("SN PCI INIT: Failed to allocate memory for PCI init\n");
437 for (i = 0; i < NR_IRQS; i++) {
438 sn_irq_lh[i] = kmalloc(sizeof(struct list_head), GFP_KERNEL);
440 panic("SN PCI INIT: Failed IRQ memory allocation\n");
442 INIT_LIST_HEAD(sn_irq_lh[i]);