2 * Copyright (C) 1998-2000 Andre Hedrick <andre@linux-ide.org>
3 * Copyright (C) 1995-1998 Mark Lord
4 * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
6 * May be copied or modified under the terms of the GNU General Public License
9 #include <linux/types.h>
10 #include <linux/kernel.h>
11 #include <linux/pci.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/ide.h>
15 #include <linux/dma-mapping.h>
20 * ide_setup_pci_baseregs - place a PCI IDE controller native
21 * @dev: PCI device of interface to switch native
22 * @name: Name of interface
24 * We attempt to place the PCI interface into PCI native mode. If
25 * we succeed the BARs are ok and the controller is in PCI mode.
26 * Returns 0 on success or an errno code.
28 * FIXME: if we program the interface and then fail to set the BARS
29 * we don't switch it back to legacy mode. Do we actually care ??
32 static int ide_setup_pci_baseregs(struct pci_dev *dev, const char *name)
37 * Place both IDE interfaces into PCI "native" mode:
39 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
41 if ((progif & 0xa) != 0xa) {
42 printk(KERN_INFO "%s: device not capable of full "
43 "native PCI mode\n", name);
46 printk("%s: placing both ports into native PCI mode\n", name);
47 (void) pci_write_config_byte(dev, PCI_CLASS_PROG, progif|5);
48 if (pci_read_config_byte(dev, PCI_CLASS_PROG, &progif) ||
50 printk(KERN_ERR "%s: rewrite of PROGIF failed, wanted "
51 "0x%04x, got 0x%04x\n",
52 name, progif|5, progif);
59 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
60 static void ide_pci_clear_simplex(unsigned long dma_base, const char *name)
62 u8 dma_stat = inb(dma_base + 2);
64 outb(dma_stat & 0x60, dma_base + 2);
65 dma_stat = inb(dma_base + 2);
67 printk(KERN_INFO "%s: simplex device: DMA forced\n", name);
71 * ide_pci_dma_base - setup BMIBA
72 * @hwif: IDE interface
75 * Fetch the DMA Bus-Master-I/O-Base-Address (BMIBA) from PCI space.
76 * Where a device has a partner that is already in DMA mode we check
77 * and enforce IDE simplex rules.
80 unsigned long ide_pci_dma_base(ide_hwif_t *hwif, const struct ide_port_info *d)
82 struct pci_dev *dev = to_pci_dev(hwif->dev);
83 unsigned long dma_base = 0;
86 if (hwif->host_flags & IDE_HFLAG_MMIO)
87 return hwif->dma_base;
89 if (hwif->mate && hwif->mate->dma_base) {
90 dma_base = hwif->mate->dma_base - (hwif->channel ? 0 : 8);
92 u8 baridx = (d->host_flags & IDE_HFLAG_CS5520) ? 2 : 4;
94 dma_base = pci_resource_start(dev, baridx);
97 printk(KERN_ERR "%s: DMA base is invalid\n", d->name);
105 if (d->host_flags & IDE_HFLAG_CS5520)
108 if (d->host_flags & IDE_HFLAG_CLEAR_SIMPLEX) {
109 ide_pci_clear_simplex(dma_base, d->name);
114 * If the device claims "simplex" DMA, this means that only one of
115 * the two interfaces can be trusted with DMA at any point in time
116 * (so we should enable DMA only on one of the two interfaces).
118 * FIXME: At this point we haven't probed the drives so we can't make
119 * the appropriate decision. Really we should defer this problem until
120 * we tune the drive then try to grab DMA ownership if we want to be
121 * the DMA end. This has to be become dynamic to handle hot-plug.
123 dma_stat = hwif->INB(dma_base + 2);
124 if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) {
125 printk(KERN_INFO "%s: simplex device: DMA disabled\n", d->name);
131 EXPORT_SYMBOL_GPL(ide_pci_dma_base);
134 * Set up BM-DMA capability (PnP BIOS should have done this)
136 int ide_pci_set_master(struct pci_dev *dev, const char *name)
140 pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
142 if ((pcicmd & PCI_COMMAND_MASTER) == 0) {
145 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd) ||
146 (pcicmd & PCI_COMMAND_MASTER) == 0) {
147 printk(KERN_ERR "%s: error updating PCICMD on %s\n",
148 name, pci_name(dev));
155 EXPORT_SYMBOL_GPL(ide_pci_set_master);
156 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
158 void ide_setup_pci_noise(struct pci_dev *dev, const struct ide_port_info *d)
160 printk(KERN_INFO "%s: IDE controller (0x%04x:0x%04x rev 0x%02x) at "
161 " PCI slot %s\n", d->name, dev->vendor, dev->device,
162 dev->revision, pci_name(dev));
164 EXPORT_SYMBOL_GPL(ide_setup_pci_noise);
168 * ide_pci_enable - do PCI enables
172 * Enable the IDE PCI device. We attempt to enable the device in full
173 * but if that fails then we only need IO space. The PCI code should
174 * have setup the proper resources for us already for controllers in
177 * Returns zero on success or an error code
180 static int ide_pci_enable(struct pci_dev *dev, const struct ide_port_info *d)
184 if (pci_enable_device(dev)) {
185 ret = pci_enable_device_io(dev);
187 printk(KERN_WARNING "%s: (ide_setup_pci_device:) "
188 "Could not enable device.\n", d->name);
191 printk(KERN_WARNING "%s: BIOS configuration fixed.\n", d->name);
195 * assume all devices can do 32-bit DMA for now, we can add
196 * a DMA mask field to the struct ide_port_info if we need it
197 * (or let lower level driver set the DMA mask)
199 ret = pci_set_dma_mask(dev, DMA_32BIT_MASK);
201 printk(KERN_ERR "%s: can't set dma mask\n", d->name);
205 if (d->host_flags & IDE_HFLAG_SINGLE)
210 if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) {
211 if (d->host_flags & IDE_HFLAG_CS5520)
217 ret = pci_request_selected_regions(dev, bars, d->name);
219 printk(KERN_ERR "%s: can't reserve resources\n", d->name);
225 * ide_pci_configure - configure an unconfigured device
229 * Enable and configure the PCI device we have been passed.
230 * Returns zero on success or an error code.
233 static int ide_pci_configure(struct pci_dev *dev, const struct ide_port_info *d)
237 * PnP BIOS was *supposed* to have setup this device, but we
238 * can do it ourselves, so long as the BIOS has assigned an IRQ
239 * (or possibly the device is using a "legacy header" for IRQs).
240 * Maybe the user deliberately *disabled* the device,
241 * but we'll eventually ignore it again if no drives respond.
243 if (ide_setup_pci_baseregs(dev, d->name) ||
244 pci_write_config_word(dev, PCI_COMMAND, pcicmd | PCI_COMMAND_IO)) {
245 printk(KERN_INFO "%s: device disabled (BIOS)\n", d->name);
248 if (pci_read_config_word(dev, PCI_COMMAND, &pcicmd)) {
249 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
252 if (!(pcicmd & PCI_COMMAND_IO)) {
253 printk(KERN_ERR "%s: unable to enable IDE controller\n", d->name);
260 * ide_pci_check_iomem - check a register is I/O
265 * Checks if a BAR is configured and points to MMIO space. If so,
266 * return an error code. Otherwise return 0
269 static int ide_pci_check_iomem(struct pci_dev *dev, const struct ide_port_info *d,
272 ulong flags = pci_resource_flags(dev, bar);
275 if (!flags || pci_resource_len(dev, bar) == 0)
279 if (flags & IORESOURCE_IO)
287 * ide_hwif_configure - configure an IDE interface
288 * @dev: PCI device holding interface
292 * @hw: hw_regs_t instance corresponding to this port
294 * Perform the initial set up for the hardware interface structure. This
295 * is done per interface port rather than per PCI device. There may be
296 * more than one port per device.
298 * Returns the new hardware interface structure, or NULL on a failure
301 static ide_hwif_t *ide_hwif_configure(struct pci_dev *dev,
302 const struct ide_port_info *d,
303 unsigned int port, int irq,
306 unsigned long ctl = 0, base = 0;
309 if ((d->host_flags & IDE_HFLAG_ISA_PORTS) == 0) {
310 if (ide_pci_check_iomem(dev, d, 2 * port) ||
311 ide_pci_check_iomem(dev, d, 2 * port + 1)) {
312 printk(KERN_ERR "%s: I/O baseregs (BIOS) are reported "
313 "as MEM for port %d!\n", d->name, port);
317 ctl = pci_resource_start(dev, 2*port+1);
318 base = pci_resource_start(dev, 2*port);
320 /* Use default values */
321 ctl = port ? 0x374 : 0x3f4;
322 base = port ? 0x170 : 0x1f0;
326 printk(KERN_ERR "%s: bad PCI BARs for port %d, skipping\n",
331 memset(hw, 0, sizeof(*hw));
334 hw->chipset = d->chipset ? d->chipset : ide_pci;
335 ide_std_init_ports(hw, base, ctl | 2);
337 hwif = ide_find_port_slot(d);
341 hwif->chipset = hw->chipset;
346 #ifdef CONFIG_BLK_DEV_IDEDMA_PCI
348 * ide_hwif_setup_dma - configure DMA interface
349 * @hwif: IDE interface
352 * Set up the DMA base for the interface. Enable the master bits as
353 * necessary and attempt to bring the device DMA into a ready to use
357 int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
359 struct pci_dev *dev = to_pci_dev(hwif->dev);
361 if ((d->host_flags & IDE_HFLAG_NO_AUTODMA) == 0 ||
362 ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE &&
363 (dev->class & 0x80))) {
364 unsigned long base = ide_pci_dma_base(hwif, d);
366 if (base == 0 || ide_pci_set_master(dev, d->name) < 0)
369 if (hwif->host_flags & IDE_HFLAG_MMIO)
370 printk(KERN_INFO " %s: MMIO-DMA\n", hwif->name);
372 printk(KERN_INFO " %s: BM-DMA at 0x%04lx-0x%04lx\n",
373 hwif->name, base, base + 7);
375 hwif->extra_base = base + (hwif->channel ? 8 : 16);
377 if (ide_allocate_dma_engine(hwif))
380 hwif->dma_base = base;
382 hwif->dma_ops = &sff_dma_ops;
387 #endif /* CONFIG_BLK_DEV_IDEDMA_PCI */
390 * ide_setup_pci_controller - set up IDE PCI
393 * @noisy: verbose flag
394 * @config: returned as 1 if we configured the hardware
396 * Set up the PCI and controller side of the IDE interface. This brings
397 * up the PCI side of the device, checks that the device is enabled
398 * and enables it if need be
401 static int ide_setup_pci_controller(struct pci_dev *dev, const struct ide_port_info *d, int noisy, int *config)
407 ide_setup_pci_noise(dev, d);
409 ret = ide_pci_enable(dev, d);
413 ret = pci_read_config_word(dev, PCI_COMMAND, &pcicmd);
415 printk(KERN_ERR "%s: error accessing PCI regs\n", d->name);
418 if (!(pcicmd & PCI_COMMAND_IO)) { /* is device disabled? */
419 ret = ide_pci_configure(dev, d);
423 printk(KERN_INFO "%s: device enabled (Linux)\n", d->name);
431 * ide_pci_setup_ports - configure ports/devices on PCI IDE
435 * @idx: ATA index table to update
436 * @hw: hw_regs_t instances corresponding to this PCI IDE device
437 * @hws: hw_regs_t pointers table to update
439 * Scan the interfaces attached to this device and do any
440 * necessary per port setup. Attach the devices and ask the
441 * generic DMA layer to do its work for us.
443 * Normally called automaticall from do_ide_pci_setup_device,
444 * but is also used directly as a helper function by some controllers
445 * where the chipset setup is not the default PCI IDE one.
448 void ide_pci_setup_ports(struct pci_dev *dev, const struct ide_port_info *d,
449 int pciirq, u8 *idx, hw_regs_t *hw, hw_regs_t **hws)
451 int channels = (d->host_flags & IDE_HFLAG_SINGLE) ? 1 : 2, port;
456 * Set up the IDE ports
459 for (port = 0; port < channels; ++port) {
460 const ide_pci_enablebit_t *e = &(d->enablebits[port]);
462 if (e->reg && (pci_read_config_byte(dev, e->reg, &tmp) ||
463 (tmp & e->mask) != e->val)) {
464 printk(KERN_INFO "%s: IDE port disabled\n", d->name);
465 continue; /* port not enabled */
468 hwif = ide_hwif_configure(dev, d, port, pciirq, hw + port);
472 *(hws + port) = hw + port;
473 *(idx + port) = hwif->index;
476 EXPORT_SYMBOL_GPL(ide_pci_setup_ports);
479 * ide_setup_pci_device() looks at the primary/secondary interfaces
480 * on a PCI IDE device and, if they are enabled, prepares the IDE driver
481 * for use with them. This generic code works for most PCI chipsets.
483 * One thing that is not standardized is the location of the
484 * primary/secondary interface "enable/disable" bits. For chipsets that
485 * we "know" about, this information is in the struct ide_port_info;
486 * for all other chipsets, we just assume both interfaces are enabled.
488 static int do_ide_setup_pci_device(struct pci_dev *dev,
489 const struct ide_port_info *d,
492 int tried_config = 0;
495 ret = ide_setup_pci_controller(dev, d, noisy, &tried_config);
500 * Can we trust the reported IRQ?
504 /* Is it an "IDE storage" device in non-PCI mode? */
505 if ((dev->class >> 8) == PCI_CLASS_STORAGE_IDE && (dev->class & 5) != 5) {
507 printk(KERN_INFO "%s: not 100%% native mode: "
508 "will probe irqs later\n", d->name);
510 * This allows offboard ide-pci cards the enable a BIOS,
511 * verify interrupt settings of split-mirror pci-config
512 * space, place chipset into init-mode, and/or preserve
513 * an interrupt if the card is not native ide support.
515 ret = d->init_chipset ? d->init_chipset(dev, d->name) : 0;
519 } else if (tried_config) {
521 printk(KERN_INFO "%s: will probe irqs later\n", d->name);
523 } else if (!pciirq) {
525 printk(KERN_WARNING "%s: bad irq (%d): will probe later\n",
529 if (d->init_chipset) {
530 ret = d->init_chipset(dev, d->name);
535 printk(KERN_INFO "%s: 100%% native mode on irq %d\n",
544 int ide_setup_pci_device(struct pci_dev *dev, const struct ide_port_info *d)
546 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
547 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
550 ret = do_ide_setup_pci_device(dev, d, 1);
553 /* FIXME: silent failure can happen */
554 ide_pci_setup_ports(dev, d, ret, &idx[0], &hw[0], &hws[0]);
556 ide_device_add(idx, d, hws);
561 EXPORT_SYMBOL_GPL(ide_setup_pci_device);
563 int ide_setup_pci_devices(struct pci_dev *dev1, struct pci_dev *dev2,
564 const struct ide_port_info *d)
566 struct pci_dev *pdev[] = { dev1, dev2 };
568 hw_regs_t hw[4], *hws[] = { NULL, NULL, NULL, NULL };
569 u8 idx[4] = { 0xff, 0xff, 0xff, 0xff };
571 for (i = 0; i < 2; i++) {
572 ret = do_ide_setup_pci_device(pdev[i], d, !i);
575 * FIXME: Mom, mom, they stole me the helper function to undo
576 * do_ide_setup_pci_device() on the first device!
581 /* FIXME: silent failure can happen */
582 ide_pci_setup_ports(pdev[i], d, ret, &idx[i*2], &hw[i*2],
586 ide_device_add(idx, d, hws);
590 EXPORT_SYMBOL_GPL(ide_setup_pci_devices);