2 * OHCI HCD (Host Controller Driver) for USB.
4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2004 David Brownell <dbrownell@users.sourceforge.net>
7 * [ Initialisation is based on Linus' ]
8 * [ uhci code and gregs ohci fragments ]
9 * [ (C) Copyright 1999 Linus Torvalds ]
10 * [ (C) Copyright 1999 Gregory P. Smith]
13 * OHCI is the main "non-Intel/VIA" standard for USB 1.1 host controller
14 * interfaces (though some non-x86 Intel chips use it). It supports
15 * smarter hardware than UHCI. A download link for the spec available
16 * through the http://www.usb.org website.
20 * 2004/03/24 LH7A404 support (Durgesh Pattamatta & Marc Singer)
21 * 2004/02/04 use generic dma_* functions instead of pci_* (dsaxena@plexity.net)
22 * 2003/02/24 show registers in sysfs (Kevin Brosius)
24 * 2002/09/03 get rid of ed hashtables, rework periodic scheduling and
25 * bandwidth accounting; if debugging, show schedules in driverfs
26 * 2002/07/19 fixes to management of ED and schedule state.
27 * 2002/06/09 SA-1111 support (Christopher Hoover)
28 * 2002/06/01 remember frame when HC won't see EDs any more; use that info
29 * to fix urb unlink races caused by interrupt latency assumptions;
30 * minor ED field and function naming updates
31 * 2002/01/18 package as a patch for 2.5.3; this should match the
32 * 2.4.17 kernel modulo some bugs being fixed.
34 * 2001/10/18 merge pmac cleanup (Benjamin Herrenschmidt) and bugfixes
35 * from post-2.4.5 patches.
36 * 2001/09/20 URB_ZERO_PACKET support; hcca_dma portability, OPTi warning
37 * 2001/09/07 match PCI PM changes, errnos from Linus' tree
38 * 2001/05/05 fork 2.4.5 version into "hcd" framework, cleanup, simplify;
39 * pbook pci quirks gone (please fix pbook pci sw!) (db)
41 * 2001/04/08 Identify version on module load (gb)
42 * 2001/03/24 td/ed hashing to remove bus_to_virt (Steve Longerbeam);
44 * 2001/03/21 td and dev/ed allocation uses new pci_pool API (db)
45 * 2001/03/07 hcca allocation uses pci_alloc_consistent (Steve Longerbeam)
47 * 2000/09/26 fixed races in removing the private portion of the urb
48 * 2000/09/07 disable bulk and control lists when unlinking the last
49 * endpoint descriptor in order to avoid unrecoverable errors on
50 * the Lucent chips. (rwc@sgi)
51 * 2000/08/29 use bandwidth claiming hooks (thanks Randy!), fix some
52 * urb unlink probs, indentation fixes
53 * 2000/08/11 various oops fixes mostly affecting iso and cleanup from
55 * 2000/06/28 use PCI hotplug framework, for better power management
56 * and for Cardbus support (David Brownell)
57 * 2000/earlier: fixes for NEC/Lucent chips; suspend/resume handling
58 * when the controller loses power; handle UE; cleanup; ...
60 * v5.2 1999/12/07 URB 3rd preview,
61 * v5.1 1999/11/30 URB 2nd preview, cpia, (usb-scsi)
62 * v5.0 1999/11/22 URB Technical preview, Paul Mackerras powerbook susp/resume
63 * i386: HUB, Keyboard, Mouse, Printer
65 * v4.3 1999/10/27 multiple HCs, bulk_request
66 * v4.2 1999/09/05 ISO API alpha, new dev alloc, neg Error-codes
67 * v4.1 1999/08/27 Randy Dunlap's - ISO API first impl.
70 * v2.1 1999/05/09 code clean up
72 * v1.0 1999/04/27 initial release
74 * This file is licenced under the GPL.
77 #include <linux/config.h>
79 #ifdef CONFIG_USB_DEBUG
85 #include <linux/module.h>
86 #include <linux/moduleparam.h>
87 #include <linux/pci.h>
88 #include <linux/kernel.h>
89 #include <linux/delay.h>
90 #include <linux/ioport.h>
91 #include <linux/sched.h>
92 #include <linux/slab.h>
93 #include <linux/smp_lock.h>
94 #include <linux/errno.h>
95 #include <linux/init.h>
96 #include <linux/timer.h>
97 #include <linux/list.h>
98 #include <linux/usb.h>
99 #include <linux/usb_otg.h>
100 #include <linux/dma-mapping.h>
101 #include <linux/dmapool.h>
102 #include <linux/reboot.h>
106 #include <asm/system.h>
107 #include <asm/unaligned.h>
108 #include <asm/byteorder.h>
110 #include "../core/hcd.h"
112 #define DRIVER_VERSION "2005 April 22"
113 #define DRIVER_AUTHOR "Roman Weissgaerber, David Brownell"
114 #define DRIVER_DESC "USB 1.1 'Open' Host Controller (OHCI) Driver"
116 /*-------------------------------------------------------------------------*/
118 #undef OHCI_VERBOSE_DEBUG /* not always helpful */
120 /* For initializing controller (mask in an HCFS mode too) */
121 #define OHCI_CONTROL_INIT OHCI_CTRL_CBSR
122 #define OHCI_INTR_INIT \
123 (OHCI_INTR_MIE | OHCI_INTR_UE | OHCI_INTR_RD | OHCI_INTR_WDH)
126 /* On PA-RISC, PDC can leave IR set incorrectly; ignore it there. */
130 #ifdef CONFIG_ARCH_OMAP
131 /* OMAP doesn't support IR (no SMM; not needed) */
135 /*-------------------------------------------------------------------------*/
137 static const char hcd_name [] = "ohci_hcd";
141 static void ohci_dump (struct ohci_hcd *ohci, int verbose);
142 static int ohci_init (struct ohci_hcd *ohci);
143 static void ohci_stop (struct usb_hcd *hcd);
144 static int ohci_reboot (struct notifier_block *, unsigned long , void *);
146 #include "ohci-hub.c"
147 #include "ohci-dbg.c"
148 #include "ohci-mem.c"
153 * On architectures with edge-triggered interrupts we must never return
156 #if defined(CONFIG_SA1111) /* ... or other edge-triggered systems */
157 #define IRQ_NOTMINE IRQ_HANDLED
159 #define IRQ_NOTMINE IRQ_NONE
163 /* Some boards misreport power switching/overcurrent */
164 static int distrust_firmware = 1;
165 module_param (distrust_firmware, bool, 0);
166 MODULE_PARM_DESC (distrust_firmware,
167 "true to distrust firmware power/overcurrent setup");
169 /* Some boards leave IR set wrongly, since they fail BIOS/SMM handshakes */
170 static int no_handshake = 0;
171 module_param (no_handshake, bool, 0);
172 MODULE_PARM_DESC (no_handshake, "true (not default) disables BIOS handshake");
174 /*-------------------------------------------------------------------------*/
177 * queue up an urb for anything except the root hub
179 static int ohci_urb_enqueue (
181 struct usb_host_endpoint *ep,
185 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
187 urb_priv_t *urb_priv;
188 unsigned int pipe = urb->pipe;
193 #ifdef OHCI_VERBOSE_DEBUG
194 urb_print (urb, "SUB", usb_pipein (pipe));
197 /* every endpoint has a ed, locate and maybe (re)initialize it */
198 if (! (ed = ed_get (ohci, ep, urb->dev, pipe, urb->interval)))
201 /* for the private part of the URB we need the number of TDs (size) */
204 /* td_submit_urb() doesn't yet handle these */
205 if (urb->transfer_buffer_length > 4096)
208 /* 1 TD for setup, 1 for ACK, plus ... */
211 // case PIPE_INTERRUPT:
214 /* one TD for every 4096 Bytes (can be upto 8K) */
215 size += urb->transfer_buffer_length / 4096;
216 /* ... and for any remaining bytes ... */
217 if ((urb->transfer_buffer_length % 4096) != 0)
219 /* ... and maybe a zero length packet to wrap it up */
222 else if ((urb->transfer_flags & URB_ZERO_PACKET) != 0
223 && (urb->transfer_buffer_length
224 % usb_maxpacket (urb->dev, pipe,
225 usb_pipeout (pipe))) == 0)
228 case PIPE_ISOCHRONOUS: /* number of packets from URB */
229 size = urb->number_of_packets;
233 /* allocate the private part of the URB */
234 urb_priv = kmalloc (sizeof (urb_priv_t) + size * sizeof (struct td *),
238 memset (urb_priv, 0, sizeof (urb_priv_t) + size * sizeof (struct td *));
239 INIT_LIST_HEAD (&urb_priv->pending);
240 urb_priv->length = size;
243 /* allocate the TDs (deferring hash chain updates) */
244 for (i = 0; i < size; i++) {
245 urb_priv->td [i] = td_alloc (ohci, mem_flags);
246 if (!urb_priv->td [i]) {
247 urb_priv->length = i;
248 urb_free_priv (ohci, urb_priv);
253 spin_lock_irqsave (&ohci->lock, flags);
255 /* don't submit to a dead HC */
256 if (!test_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags)) {
260 if (!HC_IS_RUNNING(hcd->state)) {
265 /* in case of unlink-during-submit */
266 spin_lock (&urb->lock);
267 if (urb->status != -EINPROGRESS) {
268 spin_unlock (&urb->lock);
269 urb->hcpriv = urb_priv;
270 finish_urb (ohci, urb, NULL);
275 /* schedule the ed if needed */
276 if (ed->state == ED_IDLE) {
277 retval = ed_schedule (ohci, ed);
280 if (ed->type == PIPE_ISOCHRONOUS) {
281 u16 frame = ohci_frame_no(ohci);
283 /* delay a few frames before the first TD */
284 frame += max_t (u16, 8, ed->interval);
285 frame &= ~(ed->interval - 1);
287 urb->start_frame = frame;
289 /* yes, only URB_ISO_ASAP is supported, and
290 * urb->start_frame is never used as input.
293 } else if (ed->type == PIPE_ISOCHRONOUS)
294 urb->start_frame = ed->last_iso + ed->interval;
296 /* fill the TDs and link them to the ed; and
297 * enable that part of the schedule, if needed
298 * and update count of queued periodic urbs
300 urb->hcpriv = urb_priv;
301 td_submit_urb (ohci, urb);
304 spin_unlock (&urb->lock);
307 urb_free_priv (ohci, urb_priv);
308 spin_unlock_irqrestore (&ohci->lock, flags);
313 * decouple the URB from the HC queues (TDs, urb_priv); it's
314 * already marked using urb->status. reporting is always done
315 * asynchronously, and we might be dealing with an urb that's
316 * partially transferred, or an ED with other urbs being unlinked.
318 static int ohci_urb_dequeue (struct usb_hcd *hcd, struct urb *urb)
320 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
323 #ifdef OHCI_VERBOSE_DEBUG
324 urb_print (urb, "UNLINK", 1);
327 spin_lock_irqsave (&ohci->lock, flags);
328 if (HC_IS_RUNNING(hcd->state)) {
329 urb_priv_t *urb_priv;
331 /* Unless an IRQ completed the unlink while it was being
332 * handed to us, flag it for unlink and giveback, and force
333 * some upcoming INTR_SF to call finish_unlinks()
335 urb_priv = urb->hcpriv;
337 if (urb_priv->ed->state == ED_OPER)
338 start_ed_unlink (ohci, urb_priv->ed);
342 * with HC dead, we won't respect hc queue pointers
343 * any more ... just clean up every urb's memory.
346 finish_urb (ohci, urb, NULL);
348 spin_unlock_irqrestore (&ohci->lock, flags);
352 /*-------------------------------------------------------------------------*/
354 /* frees config/altsetting state for endpoints,
355 * including ED memory, dummy TD, and bulk/intr data toggle
359 ohci_endpoint_disable (struct usb_hcd *hcd, struct usb_host_endpoint *ep)
361 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
363 struct ed *ed = ep->hcpriv;
364 unsigned limit = 1000;
366 /* ASSERT: any requests/urbs are being unlinked */
367 /* ASSERT: nobody can be submitting urbs for this any more */
373 spin_lock_irqsave (&ohci->lock, flags);
375 if (!HC_IS_RUNNING (hcd->state)) {
378 finish_unlinks (ohci, 0, NULL);
382 case ED_UNLINK: /* wait for hw to finish? */
383 /* major IRQ delivery trouble loses INTR_SF too... */
385 ohci_warn (ohci, "IRQ INTR_SF lossage\n");
388 spin_unlock_irqrestore (&ohci->lock, flags);
389 schedule_timeout_uninterruptible(1);
391 case ED_IDLE: /* fully unlinked */
392 if (list_empty (&ed->td_list)) {
393 td_free (ohci, ed->dummy);
397 /* else FALL THROUGH */
399 /* caller was supposed to have unlinked any requests;
400 * that's not our job. can't recover; must leak ed.
402 ohci_err (ohci, "leak ed %p (#%02x) state %d%s\n",
403 ed, ep->desc.bEndpointAddress, ed->state,
404 list_empty (&ed->td_list) ? "" : " (has tds)");
405 td_free (ohci, ed->dummy);
409 spin_unlock_irqrestore (&ohci->lock, flags);
413 static int ohci_get_frame (struct usb_hcd *hcd)
415 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
417 return ohci_frame_no(ohci);
420 static void ohci_usb_reset (struct ohci_hcd *ohci)
422 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
423 ohci->hc_control &= OHCI_CTRL_RWC;
424 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
427 /* reboot notifier forcibly disables IRQs and DMA, helping kexec and
428 * other cases where the next software may expect clean state from the
429 * "firmware". this is bus-neutral, unlike shutdown() methods.
432 ohci_reboot (struct notifier_block *block, unsigned long code, void *null)
434 struct ohci_hcd *ohci;
436 ohci = container_of (block, struct ohci_hcd, reboot_notifier);
437 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
438 ohci_usb_reset (ohci);
439 /* flush the writes */
440 (void) ohci_readl (ohci, &ohci->regs->control);
444 /*-------------------------------------------------------------------------*
446 *-------------------------------------------------------------------------*/
448 /* init memory, and kick BIOS/SMM off */
450 static int ohci_init (struct ohci_hcd *ohci)
455 ohci->regs = ohci_to_hcd(ohci)->regs;
456 ohci->next_statechange = jiffies;
459 /* SMM owns the HC? not for long! */
460 if (!no_handshake && ohci_readl (ohci,
461 &ohci->regs->control) & OHCI_CTRL_IR) {
464 ohci_dbg (ohci, "USB HC TakeOver from BIOS/SMM\n");
466 /* this timeout is arbitrary. we make it long, so systems
467 * depending on usb keyboards may be usable even if the
468 * BIOS/SMM code seems pretty broken.
470 temp = 500; /* arbitrary: five seconds */
472 ohci_writel (ohci, OHCI_INTR_OC, &ohci->regs->intrenable);
473 ohci_writel (ohci, OHCI_OCR, &ohci->regs->cmdstatus);
474 while (ohci_readl (ohci, &ohci->regs->control) & OHCI_CTRL_IR) {
477 ohci_err (ohci, "USB HC takeover failed!"
478 " (BIOS/SMM bug)\n");
482 ohci_usb_reset (ohci);
486 /* Disable HC interrupts */
487 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
489 (void) ohci_readl (ohci, &ohci->regs->control);
491 /* Read the number of ports unless overridden */
492 if (ohci->num_ports == 0)
493 ohci->num_ports = roothub_a(ohci) & RH_A_NDP;
498 ohci->hcca = dma_alloc_coherent (ohci_to_hcd(ohci)->self.controller,
499 sizeof *ohci->hcca, &ohci->hcca_dma, 0);
503 if ((ret = ohci_mem_init (ohci)) < 0)
504 ohci_stop (ohci_to_hcd(ohci));
510 /*-------------------------------------------------------------------------*/
512 /* Start an OHCI controller, set the BUS operational
513 * resets USB and controller
516 static int ohci_run (struct ohci_hcd *ohci)
519 int first = ohci->fminterval == 0;
523 /* boot firmware should have set this up (5.1.1.3.1) */
526 temp = ohci_readl (ohci, &ohci->regs->fminterval);
527 ohci->fminterval = temp & 0x3fff;
528 if (ohci->fminterval != FI)
529 ohci_dbg (ohci, "fminterval delta %d\n",
530 ohci->fminterval - FI);
531 ohci->fminterval |= FSMP (ohci->fminterval) << 16;
532 /* also: power/overcurrent flags in roothub.a */
535 /* Reset USB nearly "by the book". RemoteWakeupConnected
536 * saved if boot firmware (BIOS/SMM/...) told us it's connected
537 * (for OHCI integrated on mainboard, it normally is)
539 ohci->hc_control = ohci_readl (ohci, &ohci->regs->control);
540 ohci_dbg (ohci, "resetting from state '%s', control = 0x%x\n",
541 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
544 if (ohci->hc_control & OHCI_CTRL_RWC
545 && !(ohci->flags & OHCI_QUIRK_AMD756))
546 ohci_to_hcd(ohci)->can_wakeup = 1;
548 switch (ohci->hc_control & OHCI_CTRL_HCFS) {
552 case OHCI_USB_SUSPEND:
553 case OHCI_USB_RESUME:
554 ohci->hc_control &= OHCI_CTRL_RWC;
555 ohci->hc_control |= OHCI_USB_RESUME;
556 temp = 10 /* msec wait */;
558 // case OHCI_USB_RESET:
560 ohci->hc_control &= OHCI_CTRL_RWC;
561 ohci->hc_control |= OHCI_USB_RESET;
562 temp = 50 /* msec wait */;
565 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
567 (void) ohci_readl (ohci, &ohci->regs->control);
569 temp = roothub_a (ohci);
570 if (!(temp & RH_A_NPS)) {
571 /* power down each port */
572 for (temp = 0; temp < ohci->num_ports; temp++)
573 ohci_writel (ohci, RH_PS_LSDA,
574 &ohci->regs->roothub.portstatus [temp]);
576 // flush those writes
577 (void) ohci_readl (ohci, &ohci->regs->control);
578 memset (ohci->hcca, 0, sizeof (struct ohci_hcca));
580 /* 2msec timelimit here means no irqs/preempt */
581 spin_lock_irq (&ohci->lock);
584 /* HC Reset requires max 10 us delay */
585 ohci_writel (ohci, OHCI_HCR, &ohci->regs->cmdstatus);
586 temp = 30; /* ... allow extra time */
587 while ((ohci_readl (ohci, &ohci->regs->cmdstatus) & OHCI_HCR) != 0) {
589 spin_unlock_irq (&ohci->lock);
590 ohci_err (ohci, "USB HC reset timed out!\n");
596 /* now we're in the SUSPEND state ... must go OPERATIONAL
597 * within 2msec else HC enters RESUME
599 * ... but some hardware won't init fmInterval "by the book"
600 * (SiS, OPTi ...), so reset again instead. SiS doesn't need
601 * this if we write fmInterval after we're OPERATIONAL.
602 * Unclear about ALi, ServerWorks, and others ... this could
603 * easily be a longstanding bug in chip init on Linux.
605 if (ohci->flags & OHCI_QUIRK_INITRESET) {
606 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
607 // flush those writes
608 (void) ohci_readl (ohci, &ohci->regs->control);
611 /* Tell the controller where the control and bulk lists are
612 * The lists are empty now. */
613 ohci_writel (ohci, 0, &ohci->regs->ed_controlhead);
614 ohci_writel (ohci, 0, &ohci->regs->ed_bulkhead);
616 /* a reset clears this */
617 ohci_writel (ohci, (u32) ohci->hcca_dma, &ohci->regs->hcca);
619 periodic_reinit (ohci);
621 /* some OHCI implementations are finicky about how they init.
622 * bogus values here mean not even enumeration could work.
624 if ((ohci_readl (ohci, &ohci->regs->fminterval) & 0x3fff0000) == 0
625 || !ohci_readl (ohci, &ohci->regs->periodicstart)) {
626 if (!(ohci->flags & OHCI_QUIRK_INITRESET)) {
627 ohci->flags |= OHCI_QUIRK_INITRESET;
628 ohci_dbg (ohci, "enabling initreset quirk\n");
631 spin_unlock_irq (&ohci->lock);
632 ohci_err (ohci, "init err (%08x %04x)\n",
633 ohci_readl (ohci, &ohci->regs->fminterval),
634 ohci_readl (ohci, &ohci->regs->periodicstart));
638 /* start controller operations */
639 ohci->hc_control &= OHCI_CTRL_RWC;
640 ohci->hc_control |= OHCI_CONTROL_INIT | OHCI_USB_OPER;
641 ohci_writel (ohci, ohci->hc_control, &ohci->regs->control);
642 ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
644 /* wake on ConnectStatusChange, matching external hubs */
645 ohci_writel (ohci, RH_HS_DRWE, &ohci->regs->roothub.status);
647 /* Choose the interrupts we care about now, others later on demand */
648 mask = OHCI_INTR_INIT;
649 ohci_writel (ohci, mask, &ohci->regs->intrstatus);
650 ohci_writel (ohci, mask, &ohci->regs->intrenable);
652 /* handle root hub init quirks ... */
653 temp = roothub_a (ohci);
654 temp &= ~(RH_A_PSM | RH_A_OCPM);
655 if (ohci->flags & OHCI_QUIRK_SUPERIO) {
656 /* NSC 87560 and maybe others */
658 temp &= ~(RH_A_POTPGT | RH_A_NPS);
659 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
660 } else if ((ohci->flags & OHCI_QUIRK_AMD756) || distrust_firmware) {
661 /* hub power always on; required for AMD-756 and some
662 * Mac platforms. ganged overcurrent reporting, if any.
665 ohci_writel (ohci, temp, &ohci->regs->roothub.a);
667 ohci_writel (ohci, RH_HS_LPSC, &ohci->regs->roothub.status);
668 ohci_writel (ohci, (temp & RH_A_NPS) ? 0 : RH_B_PPCM,
669 &ohci->regs->roothub.b);
670 // flush those writes
671 (void) ohci_readl (ohci, &ohci->regs->control);
673 spin_unlock_irq (&ohci->lock);
675 // POTPGT delay is bits 24-31, in 2 ms units.
676 mdelay ((temp >> 23) & 0x1fe);
677 ohci_to_hcd(ohci)->state = HC_STATE_RUNNING;
681 if (ohci_to_hcd(ohci)->self.root_hub == NULL) {
682 register_reboot_notifier (&ohci->reboot_notifier);
683 create_debug_files (ohci);
689 /*-------------------------------------------------------------------------*/
691 /* an interrupt happens */
693 static irqreturn_t ohci_irq (struct usb_hcd *hcd, struct pt_regs *ptregs)
695 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
696 struct ohci_regs __iomem *regs = ohci->regs;
699 /* we can eliminate a (slow) ohci_readl()
700 if _only_ WDH caused this irq */
701 if ((ohci->hcca->done_head != 0)
702 && ! (hc32_to_cpup (ohci, &ohci->hcca->done_head)
704 ints = OHCI_INTR_WDH;
706 /* cardbus/... hardware gone before remove() */
707 } else if ((ints = ohci_readl (ohci, ®s->intrstatus)) == ~(u32)0) {
709 ohci_dbg (ohci, "device removed!\n");
712 /* interrupt for some other device? */
713 } else if ((ints &= ohci_readl (ohci, ®s->intrenable)) == 0) {
717 if (ints & OHCI_INTR_UE) {
719 ohci_err (ohci, "OHCI Unrecoverable Error, disabled\n");
720 // e.g. due to PCI Master/Target Abort
723 ohci_usb_reset (ohci);
726 if (ints & OHCI_INTR_RD) {
727 ohci_vdbg (ohci, "resume detect\n");
728 ohci_writel (ohci, OHCI_INTR_RD, ®s->intrstatus);
729 if (hcd->state != HC_STATE_QUIESCING)
730 usb_hcd_resume_root_hub(hcd);
733 if (ints & OHCI_INTR_WDH) {
734 if (HC_IS_RUNNING(hcd->state))
735 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrdisable);
736 spin_lock (&ohci->lock);
737 dl_done_list (ohci, ptregs);
738 spin_unlock (&ohci->lock);
739 if (HC_IS_RUNNING(hcd->state))
740 ohci_writel (ohci, OHCI_INTR_WDH, ®s->intrenable);
743 /* could track INTR_SO to reduce available PCI/... bandwidth */
745 /* handle any pending URB/ED unlinks, leaving INTR_SF enabled
746 * when there's still unlinking to be done (next frame).
748 spin_lock (&ohci->lock);
749 if (ohci->ed_rm_list)
750 finish_unlinks (ohci, ohci_frame_no(ohci), ptregs);
751 if ((ints & OHCI_INTR_SF) != 0 && !ohci->ed_rm_list
752 && HC_IS_RUNNING(hcd->state))
753 ohci_writel (ohci, OHCI_INTR_SF, ®s->intrdisable);
754 spin_unlock (&ohci->lock);
756 if (HC_IS_RUNNING(hcd->state)) {
757 ohci_writel (ohci, ints, ®s->intrstatus);
758 ohci_writel (ohci, OHCI_INTR_MIE, ®s->intrenable);
759 // flush those writes
760 (void) ohci_readl (ohci, &ohci->regs->control);
766 /*-------------------------------------------------------------------------*/
768 static void ohci_stop (struct usb_hcd *hcd)
770 struct ohci_hcd *ohci = hcd_to_ohci (hcd);
772 ohci_dbg (ohci, "stop %s controller (state 0x%02x)\n",
773 hcfs2string (ohci->hc_control & OHCI_CTRL_HCFS),
777 flush_scheduled_work();
779 ohci_usb_reset (ohci);
780 ohci_writel (ohci, OHCI_INTR_MIE, &ohci->regs->intrdisable);
782 remove_debug_files (ohci);
783 unregister_reboot_notifier (&ohci->reboot_notifier);
784 ohci_mem_cleanup (ohci);
786 dma_free_coherent (hcd->self.controller,
788 ohci->hcca, ohci->hcca_dma);
794 /*-------------------------------------------------------------------------*/
796 /* must not be called from interrupt context */
800 static int ohci_restart (struct ohci_hcd *ohci)
804 struct urb_priv *priv;
805 struct usb_device *root = ohci_to_hcd(ohci)->self.root_hub;
807 /* mark any devices gone, so they do nothing till khubd disconnects.
808 * recycle any "live" eds/tds (and urbs) right away.
809 * later, khubd disconnect processing will recycle the other state,
810 * (either as disconnect/reconnect, or maybe someday as a reset).
812 spin_lock_irq(&ohci->lock);
814 for (i = 0; i < root->maxchild; i++) {
815 if (root->children [i])
816 usb_set_device_state (root->children[i],
817 USB_STATE_NOTATTACHED);
819 if (!list_empty (&ohci->pending))
820 ohci_dbg(ohci, "abort schedule...\n");
821 list_for_each_entry (priv, &ohci->pending, pending) {
822 struct urb *urb = priv->td[0]->urb;
823 struct ed *ed = priv->ed;
827 ed->state = ED_UNLINK;
828 ed->hwINFO |= cpu_to_hc32(ohci, ED_DEQUEUE);
829 ed_deschedule (ohci, ed);
831 ed->ed_next = ohci->ed_rm_list;
833 ohci->ed_rm_list = ed;
838 ohci_dbg(ohci, "bogus ed %p state %d\n",
842 spin_lock (&urb->lock);
843 urb->status = -ESHUTDOWN;
844 spin_unlock (&urb->lock);
846 finish_unlinks (ohci, 0, NULL);
847 spin_unlock_irq(&ohci->lock);
849 /* paranoia, in case that didn't work: */
851 /* empty the interrupt branches */
852 for (i = 0; i < NUM_INTS; i++) ohci->load [i] = 0;
853 for (i = 0; i < NUM_INTS; i++) ohci->hcca->int_table [i] = 0;
855 /* no EDs to remove */
856 ohci->ed_rm_list = NULL;
858 /* empty control and bulk lists */
859 ohci->ed_controltail = NULL;
860 ohci->ed_bulktail = NULL;
862 if ((temp = ohci_run (ohci)) < 0) {
863 ohci_err (ohci, "can't restart, %d\n", temp);
866 /* here we "know" root ports should always stay powered,
867 * and that if we try to turn them back on the root hub
868 * will respond to CSC processing.
872 ohci_writel (ohci, RH_PS_PSS,
873 &ohci->regs->roothub.portstatus [temp]);
874 ohci_dbg (ohci, "restart complete\n");
880 /*-------------------------------------------------------------------------*/
882 #define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
884 MODULE_AUTHOR (DRIVER_AUTHOR);
885 MODULE_DESCRIPTION (DRIVER_INFO);
886 MODULE_LICENSE ("GPL");
889 #include "ohci-pci.c"
893 #include "ohci-sa1111.c"
896 #ifdef CONFIG_ARCH_S3C2410
897 #include "ohci-s3c2410.c"
900 #ifdef CONFIG_ARCH_OMAP
901 #include "ohci-omap.c"
904 #ifdef CONFIG_ARCH_LH7A404
905 #include "ohci-lh7a404.c"
909 #include "ohci-pxa27x.c"
912 #ifdef CONFIG_SOC_AU1X00
913 #include "ohci-au1xxx.c"
916 #ifdef CONFIG_USB_OHCI_HCD_PPC_SOC
917 #include "ohci-ppc-soc.c"
920 #if !(defined(CONFIG_PCI) \
921 || defined(CONFIG_SA1111) \
922 || defined(CONFIG_ARCH_S3C2410) \
923 || defined(CONFIG_ARCH_OMAP) \
924 || defined (CONFIG_ARCH_LH7A404) \
925 || defined (CONFIG_PXA27x) \
926 || defined (CONFIG_SOC_AU1X00) \
927 || defined (CONFIG_USB_OHCI_HCD_PPC_SOC) \
929 #error "missing bus glue for ohci-hcd"