1 #ifndef _M68KNOMMU_BITOPS_H
2 #define _M68KNOMMU_BITOPS_H
5 * Copyright 1992, Linus Torvalds.
8 #include <linux/compiler.h>
9 #include <asm/byteorder.h> /* swab32 */
13 #ifndef _LINUX_BITOPS_H
14 #error only <linux/bitops.h> can be included directly
17 #include <asm-generic/bitops/ffs.h>
18 #include <asm-generic/bitops/__ffs.h>
19 #include <asm-generic/bitops/sched.h>
20 #include <asm-generic/bitops/ffz.h>
22 static __inline__ void set_bit(int nr, volatile unsigned long * addr)
24 #ifdef CONFIG_COLDFIRE
25 __asm__ __volatile__ ("lea %0,%%a0; bset %1,(%%a0)"
26 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
30 __asm__ __volatile__ ("bset %1,%0"
31 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
37 #define __set_bit(nr, addr) set_bit(nr, addr)
40 * clear_bit() doesn't provide any barrier for the compiler.
42 #define smp_mb__before_clear_bit() barrier()
43 #define smp_mb__after_clear_bit() barrier()
45 static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
47 #ifdef CONFIG_COLDFIRE
48 __asm__ __volatile__ ("lea %0,%%a0; bclr %1,(%%a0)"
49 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
53 __asm__ __volatile__ ("bclr %1,%0"
54 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
60 #define __clear_bit(nr, addr) clear_bit(nr, addr)
62 static __inline__ void change_bit(int nr, volatile unsigned long * addr)
64 #ifdef CONFIG_COLDFIRE
65 __asm__ __volatile__ ("lea %0,%%a0; bchg %1,(%%a0)"
66 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
70 __asm__ __volatile__ ("bchg %1,%0"
71 : "+m" (((volatile char *)addr)[(nr^31) >> 3])
77 #define __change_bit(nr, addr) change_bit(nr, addr)
79 static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
83 #ifdef CONFIG_COLDFIRE
84 __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
85 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
89 __asm__ __volatile__ ("bset %2,%1; sne %0"
90 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
98 #define __test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
100 static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
104 #ifdef CONFIG_COLDFIRE
105 __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
106 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
110 __asm__ __volatile__ ("bclr %2,%1; sne %0"
111 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
119 #define __test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
121 static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
125 #ifdef CONFIG_COLDFIRE
126 __asm__ __volatile__ ("lea %1,%%a0\n\tbchg %2,(%%a0)\n\tsne %0"
127 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
131 __asm__ __volatile__ ("bchg %2,%1; sne %0"
132 : "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
140 #define __test_and_change_bit(nr, addr) test_and_change_bit(nr, addr)
143 * This routine doesn't need to be atomic.
145 static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr)
147 return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
150 static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
152 int * a = (int *) addr;
156 mask = 1 << (nr & 0x1f);
157 return ((mask & *a) != 0);
160 #define test_bit(nr,addr) \
161 (__builtin_constant_p(nr) ? \
162 __constant_test_bit((nr),(addr)) : \
163 __test_bit((nr),(addr)))
165 #include <asm-generic/bitops/find.h>
166 #include <asm-generic/bitops/hweight.h>
167 #include <asm-generic/bitops/lock.h>
169 static __inline__ int ext2_set_bit(int nr, volatile void * addr)
173 #ifdef CONFIG_COLDFIRE
174 __asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
175 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
179 __asm__ __volatile__ ("bset %2,%1; sne %0"
180 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
188 static __inline__ int ext2_clear_bit(int nr, volatile void * addr)
192 #ifdef CONFIG_COLDFIRE
193 __asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
194 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
198 __asm__ __volatile__ ("bclr %2,%1; sne %0"
199 : "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
207 #define ext2_set_bit_atomic(lock, nr, addr) \
211 ret = ext2_set_bit((nr), (addr)); \
216 #define ext2_clear_bit_atomic(lock, nr, addr) \
220 ret = ext2_clear_bit((nr), (addr)); \
225 static __inline__ int ext2_test_bit(int nr, const volatile void * addr)
229 #ifdef CONFIG_COLDFIRE
230 __asm__ __volatile__ ("lea %1,%%a0; btst %2,(%%a0); sne %0"
232 : "m" (((const volatile char *)addr)[nr >> 3]), "d" (nr)
235 __asm__ __volatile__ ("btst %2,%1; sne %0"
237 : "m" (((const volatile char *)addr)[nr >> 3]), "di" (nr)
244 #define ext2_find_first_zero_bit(addr, size) \
245 ext2_find_next_zero_bit((addr), (size), 0)
247 static __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset)
249 unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
250 unsigned long result = offset & ~31UL;
258 /* We hold the little endian value in tmp, but then the
259 * shift is illegal. So we could keep a big endian value
262 * tmp = __swab32(*(p++));
263 * tmp |= ~0UL >> (32-offset);
265 * but this would decrease preformance, so we change the
269 tmp |= __swab32(~0UL >> (32-offset));
277 while(size & ~31UL) {
288 /* tmp is little endian, so we would have to swab the shift,
289 * see above. But then we have to swab tmp below for ffz, so
290 * we might as well do this here.
292 return result + ffz(__swab32(tmp) | (~0UL << size));
294 return result + ffz(__swab32(tmp));
297 #define ext2_find_next_bit(addr, size, off) \
298 generic_find_next_le_bit((unsigned long *)(addr), (size), (off))
299 #include <asm-generic/bitops/minix.h>
301 #endif /* __KERNEL__ */
303 #include <asm-generic/bitops/fls.h>
304 #include <asm-generic/bitops/fls64.h>
306 #endif /* _M68KNOMMU_BITOPS_H */