2 * Copyright (c) 2004, 2005 Topspin Communications. All rights reserved.
3 * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
4 * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
5 * Copyright (c) 2005 Mellanox Technologies. All rights reserved.
6 * Copyright (c) 2004 Voltaire, Inc. All rights reserved.
8 * This software is available to you under a choice of one of two
9 * licenses. You may choose to be licensed under the terms of the GNU
10 * General Public License (GPL) Version 2, available from the file
11 * COPYING in the main directory of this source tree, or the
12 * OpenIB.org BSD license below:
14 * Redistribution and use in source and binary forms, with or
15 * without modification, are permitted provided that the following
18 * - Redistributions of source code must retain the above
19 * copyright notice, this list of conditions and the following
22 * - Redistributions in binary form must reproduce the above
23 * copyright notice, this list of conditions and the following
24 * disclaimer in the documentation and/or other materials
25 * provided with the distribution.
27 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
28 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
29 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
30 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
31 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
32 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
33 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
36 * $Id: mthca_provider.c 4859 2006-01-09 21:55:10Z roland $
39 #include <rdma/ib_smi.h>
40 #include <rdma/ib_umem.h>
41 #include <rdma/ib_user_verbs.h>
44 #include "mthca_dev.h"
45 #include "mthca_cmd.h"
46 #include "mthca_user.h"
47 #include "mthca_memfree.h"
49 static void init_query_mad(struct ib_smp *mad)
51 mad->base_version = 1;
52 mad->mgmt_class = IB_MGMT_CLASS_SUBN_LID_ROUTED;
53 mad->class_version = 1;
54 mad->method = IB_MGMT_METHOD_GET;
57 static int mthca_query_device(struct ib_device *ibdev,
58 struct ib_device_attr *props)
60 struct ib_smp *in_mad = NULL;
61 struct ib_smp *out_mad = NULL;
63 struct mthca_dev* mdev = to_mdev(ibdev);
67 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
68 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
69 if (!in_mad || !out_mad)
72 memset(props, 0, sizeof *props);
74 props->fw_ver = mdev->fw_ver;
76 init_query_mad(in_mad);
77 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
79 err = mthca_MAD_IFC(mdev, 1, 1,
80 1, NULL, NULL, in_mad, out_mad,
89 props->device_cap_flags = mdev->device_cap_flags;
90 props->vendor_id = be32_to_cpup((__be32 *) (out_mad->data + 36)) &
92 props->vendor_part_id = be16_to_cpup((__be16 *) (out_mad->data + 30));
93 props->hw_ver = be32_to_cpup((__be32 *) (out_mad->data + 32));
94 memcpy(&props->sys_image_guid, out_mad->data + 4, 8);
96 props->max_mr_size = ~0ull;
97 props->page_size_cap = mdev->limits.page_size_cap;
98 props->max_qp = mdev->limits.num_qps - mdev->limits.reserved_qps;
99 props->max_qp_wr = mdev->limits.max_wqes;
100 props->max_sge = mdev->limits.max_sg;
101 props->max_cq = mdev->limits.num_cqs - mdev->limits.reserved_cqs;
102 props->max_cqe = mdev->limits.max_cqes;
103 props->max_mr = mdev->limits.num_mpts - mdev->limits.reserved_mrws;
104 props->max_pd = mdev->limits.num_pds - mdev->limits.reserved_pds;
105 props->max_qp_rd_atom = 1 << mdev->qp_table.rdb_shift;
106 props->max_qp_init_rd_atom = mdev->limits.max_qp_init_rdma;
107 props->max_res_rd_atom = props->max_qp_rd_atom * props->max_qp;
108 props->max_srq = mdev->limits.num_srqs - mdev->limits.reserved_srqs;
109 props->max_srq_wr = mdev->limits.max_srq_wqes;
110 props->max_srq_sge = mdev->limits.max_srq_sge;
111 props->local_ca_ack_delay = mdev->limits.local_ca_ack_delay;
112 props->atomic_cap = mdev->limits.flags & DEV_LIM_FLAG_ATOMIC ?
113 IB_ATOMIC_HCA : IB_ATOMIC_NONE;
114 props->max_pkeys = mdev->limits.pkey_table_len;
115 props->max_mcast_grp = mdev->limits.num_mgms + mdev->limits.num_amgms;
116 props->max_mcast_qp_attach = MTHCA_QP_PER_MGM;
117 props->max_total_mcast_qp_attach = props->max_mcast_qp_attach *
118 props->max_mcast_grp;
120 * If Sinai memory key optimization is being used, then only
121 * the 8-bit key portion will change. For other HCAs, the
122 * unused index bits will also be used for FMR remapping.
124 if (mdev->mthca_flags & MTHCA_FLAG_SINAI_OPT)
125 props->max_map_per_fmr = 255;
127 props->max_map_per_fmr =
128 (1 << (32 - ilog2(mdev->limits.num_mpts))) - 1;
137 static int mthca_query_port(struct ib_device *ibdev,
138 u8 port, struct ib_port_attr *props)
140 struct ib_smp *in_mad = NULL;
141 struct ib_smp *out_mad = NULL;
145 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
146 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
147 if (!in_mad || !out_mad)
150 memset(props, 0, sizeof *props);
152 init_query_mad(in_mad);
153 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
154 in_mad->attr_mod = cpu_to_be32(port);
156 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
157 port, NULL, NULL, in_mad, out_mad,
166 props->lid = be16_to_cpup((__be16 *) (out_mad->data + 16));
167 props->lmc = out_mad->data[34] & 0x7;
168 props->sm_lid = be16_to_cpup((__be16 *) (out_mad->data + 18));
169 props->sm_sl = out_mad->data[36] & 0xf;
170 props->state = out_mad->data[32] & 0xf;
171 props->phys_state = out_mad->data[33] >> 4;
172 props->port_cap_flags = be32_to_cpup((__be32 *) (out_mad->data + 20));
173 props->gid_tbl_len = to_mdev(ibdev)->limits.gid_table_len;
174 props->max_msg_sz = 0x80000000;
175 props->pkey_tbl_len = to_mdev(ibdev)->limits.pkey_table_len;
176 props->bad_pkey_cntr = be16_to_cpup((__be16 *) (out_mad->data + 46));
177 props->qkey_viol_cntr = be16_to_cpup((__be16 *) (out_mad->data + 48));
178 props->active_width = out_mad->data[31] & 0xf;
179 props->active_speed = out_mad->data[35] >> 4;
180 props->max_mtu = out_mad->data[41] & 0xf;
181 props->active_mtu = out_mad->data[36] >> 4;
182 props->subnet_timeout = out_mad->data[51] & 0x1f;
183 props->max_vl_num = out_mad->data[37] >> 4;
184 props->init_type_reply = out_mad->data[41] >> 4;
192 static int mthca_modify_device(struct ib_device *ibdev,
194 struct ib_device_modify *props)
196 if (mask & ~IB_DEVICE_MODIFY_NODE_DESC)
199 if (mask & IB_DEVICE_MODIFY_NODE_DESC) {
200 if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
202 memcpy(ibdev->node_desc, props->node_desc, 64);
203 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
209 static int mthca_modify_port(struct ib_device *ibdev,
210 u8 port, int port_modify_mask,
211 struct ib_port_modify *props)
213 struct mthca_set_ib_param set_ib;
214 struct ib_port_attr attr;
218 if (mutex_lock_interruptible(&to_mdev(ibdev)->cap_mask_mutex))
221 err = mthca_query_port(ibdev, port, &attr);
225 set_ib.set_si_guid = 0;
226 set_ib.reset_qkey_viol = !!(port_modify_mask & IB_PORT_RESET_QKEY_CNTR);
228 set_ib.cap_mask = (attr.port_cap_flags | props->set_port_cap_mask) &
229 ~props->clr_port_cap_mask;
231 err = mthca_SET_IB(to_mdev(ibdev), &set_ib, port, &status);
240 mutex_unlock(&to_mdev(ibdev)->cap_mask_mutex);
244 static int mthca_query_pkey(struct ib_device *ibdev,
245 u8 port, u16 index, u16 *pkey)
247 struct ib_smp *in_mad = NULL;
248 struct ib_smp *out_mad = NULL;
252 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
253 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
254 if (!in_mad || !out_mad)
257 init_query_mad(in_mad);
258 in_mad->attr_id = IB_SMP_ATTR_PKEY_TABLE;
259 in_mad->attr_mod = cpu_to_be32(index / 32);
261 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
262 port, NULL, NULL, in_mad, out_mad,
271 *pkey = be16_to_cpu(((__be16 *) out_mad->data)[index % 32]);
279 static int mthca_query_gid(struct ib_device *ibdev, u8 port,
280 int index, union ib_gid *gid)
282 struct ib_smp *in_mad = NULL;
283 struct ib_smp *out_mad = NULL;
287 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
288 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
289 if (!in_mad || !out_mad)
292 init_query_mad(in_mad);
293 in_mad->attr_id = IB_SMP_ATTR_PORT_INFO;
294 in_mad->attr_mod = cpu_to_be32(port);
296 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
297 port, NULL, NULL, in_mad, out_mad,
306 memcpy(gid->raw, out_mad->data + 8, 8);
308 init_query_mad(in_mad);
309 in_mad->attr_id = IB_SMP_ATTR_GUID_INFO;
310 in_mad->attr_mod = cpu_to_be32(index / 8);
312 err = mthca_MAD_IFC(to_mdev(ibdev), 1, 1,
313 port, NULL, NULL, in_mad, out_mad,
322 memcpy(gid->raw + 8, out_mad->data + (index % 8) * 8, 8);
330 static struct ib_ucontext *mthca_alloc_ucontext(struct ib_device *ibdev,
331 struct ib_udata *udata)
333 struct mthca_alloc_ucontext_resp uresp;
334 struct mthca_ucontext *context;
337 memset(&uresp, 0, sizeof uresp);
339 uresp.qp_tab_size = to_mdev(ibdev)->limits.num_qps;
340 if (mthca_is_memfree(to_mdev(ibdev)))
341 uresp.uarc_size = to_mdev(ibdev)->uar_table.uarc_size;
345 context = kmalloc(sizeof *context, GFP_KERNEL);
347 return ERR_PTR(-ENOMEM);
349 err = mthca_uar_alloc(to_mdev(ibdev), &context->uar);
355 context->db_tab = mthca_init_user_db_tab(to_mdev(ibdev));
356 if (IS_ERR(context->db_tab)) {
357 err = PTR_ERR(context->db_tab);
358 mthca_uar_free(to_mdev(ibdev), &context->uar);
363 if (ib_copy_to_udata(udata, &uresp, sizeof uresp)) {
364 mthca_cleanup_user_db_tab(to_mdev(ibdev), &context->uar, context->db_tab);
365 mthca_uar_free(to_mdev(ibdev), &context->uar);
367 return ERR_PTR(-EFAULT);
370 return &context->ibucontext;
373 static int mthca_dealloc_ucontext(struct ib_ucontext *context)
375 mthca_cleanup_user_db_tab(to_mdev(context->device), &to_mucontext(context)->uar,
376 to_mucontext(context)->db_tab);
377 mthca_uar_free(to_mdev(context->device), &to_mucontext(context)->uar);
378 kfree(to_mucontext(context));
383 static int mthca_mmap_uar(struct ib_ucontext *context,
384 struct vm_area_struct *vma)
386 if (vma->vm_end - vma->vm_start != PAGE_SIZE)
389 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
391 if (io_remap_pfn_range(vma, vma->vm_start,
392 to_mucontext(context)->uar.pfn,
393 PAGE_SIZE, vma->vm_page_prot))
399 static struct ib_pd *mthca_alloc_pd(struct ib_device *ibdev,
400 struct ib_ucontext *context,
401 struct ib_udata *udata)
406 pd = kmalloc(sizeof *pd, GFP_KERNEL);
408 return ERR_PTR(-ENOMEM);
410 err = mthca_pd_alloc(to_mdev(ibdev), !context, pd);
417 if (ib_copy_to_udata(udata, &pd->pd_num, sizeof (__u32))) {
418 mthca_pd_free(to_mdev(ibdev), pd);
420 return ERR_PTR(-EFAULT);
427 static int mthca_dealloc_pd(struct ib_pd *pd)
429 mthca_pd_free(to_mdev(pd->device), to_mpd(pd));
435 static struct ib_ah *mthca_ah_create(struct ib_pd *pd,
436 struct ib_ah_attr *ah_attr)
441 ah = kmalloc(sizeof *ah, GFP_ATOMIC);
443 return ERR_PTR(-ENOMEM);
445 err = mthca_create_ah(to_mdev(pd->device), to_mpd(pd), ah_attr, ah);
454 static int mthca_ah_destroy(struct ib_ah *ah)
456 mthca_destroy_ah(to_mdev(ah->device), to_mah(ah));
462 static struct ib_srq *mthca_create_srq(struct ib_pd *pd,
463 struct ib_srq_init_attr *init_attr,
464 struct ib_udata *udata)
466 struct mthca_create_srq ucmd;
467 struct mthca_ucontext *context = NULL;
468 struct mthca_srq *srq;
471 srq = kmalloc(sizeof *srq, GFP_KERNEL);
473 return ERR_PTR(-ENOMEM);
476 context = to_mucontext(pd->uobject->context);
478 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
483 err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
484 context->db_tab, ucmd.db_index,
490 srq->mr.ibmr.lkey = ucmd.lkey;
491 srq->db_index = ucmd.db_index;
494 err = mthca_alloc_srq(to_mdev(pd->device), to_mpd(pd),
495 &init_attr->attr, srq);
497 if (err && pd->uobject)
498 mthca_unmap_user_db(to_mdev(pd->device), &context->uar,
499 context->db_tab, ucmd.db_index);
504 if (context && ib_copy_to_udata(udata, &srq->srqn, sizeof (__u32))) {
505 mthca_free_srq(to_mdev(pd->device), srq);
518 static int mthca_destroy_srq(struct ib_srq *srq)
520 struct mthca_ucontext *context;
523 context = to_mucontext(srq->uobject->context);
525 mthca_unmap_user_db(to_mdev(srq->device), &context->uar,
526 context->db_tab, to_msrq(srq)->db_index);
529 mthca_free_srq(to_mdev(srq->device), to_msrq(srq));
535 static struct ib_qp *mthca_create_qp(struct ib_pd *pd,
536 struct ib_qp_init_attr *init_attr,
537 struct ib_udata *udata)
539 struct mthca_create_qp ucmd;
543 switch (init_attr->qp_type) {
548 struct mthca_ucontext *context;
550 qp = kmalloc(sizeof *qp, GFP_KERNEL);
552 return ERR_PTR(-ENOMEM);
555 context = to_mucontext(pd->uobject->context);
557 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
559 return ERR_PTR(-EFAULT);
562 err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
564 ucmd.sq_db_index, ucmd.sq_db_page);
570 err = mthca_map_user_db(to_mdev(pd->device), &context->uar,
572 ucmd.rq_db_index, ucmd.rq_db_page);
574 mthca_unmap_user_db(to_mdev(pd->device),
582 qp->mr.ibmr.lkey = ucmd.lkey;
583 qp->sq.db_index = ucmd.sq_db_index;
584 qp->rq.db_index = ucmd.rq_db_index;
587 err = mthca_alloc_qp(to_mdev(pd->device), to_mpd(pd),
588 to_mcq(init_attr->send_cq),
589 to_mcq(init_attr->recv_cq),
590 init_attr->qp_type, init_attr->sq_sig_type,
591 &init_attr->cap, qp);
593 if (err && pd->uobject) {
594 context = to_mucontext(pd->uobject->context);
596 mthca_unmap_user_db(to_mdev(pd->device),
600 mthca_unmap_user_db(to_mdev(pd->device),
606 qp->ibqp.qp_num = qp->qpn;
612 /* Don't allow userspace to create special QPs */
614 return ERR_PTR(-EINVAL);
616 qp = kmalloc(sizeof (struct mthca_sqp), GFP_KERNEL);
618 return ERR_PTR(-ENOMEM);
620 qp->ibqp.qp_num = init_attr->qp_type == IB_QPT_SMI ? 0 : 1;
622 err = mthca_alloc_sqp(to_mdev(pd->device), to_mpd(pd),
623 to_mcq(init_attr->send_cq),
624 to_mcq(init_attr->recv_cq),
625 init_attr->sq_sig_type, &init_attr->cap,
626 qp->ibqp.qp_num, init_attr->port_num,
631 /* Don't support raw QPs */
632 return ERR_PTR(-ENOSYS);
640 init_attr->cap.max_send_wr = qp->sq.max;
641 init_attr->cap.max_recv_wr = qp->rq.max;
642 init_attr->cap.max_send_sge = qp->sq.max_gs;
643 init_attr->cap.max_recv_sge = qp->rq.max_gs;
644 init_attr->cap.max_inline_data = qp->max_inline_data;
649 static int mthca_destroy_qp(struct ib_qp *qp)
652 mthca_unmap_user_db(to_mdev(qp->device),
653 &to_mucontext(qp->uobject->context)->uar,
654 to_mucontext(qp->uobject->context)->db_tab,
655 to_mqp(qp)->sq.db_index);
656 mthca_unmap_user_db(to_mdev(qp->device),
657 &to_mucontext(qp->uobject->context)->uar,
658 to_mucontext(qp->uobject->context)->db_tab,
659 to_mqp(qp)->rq.db_index);
661 mthca_free_qp(to_mdev(qp->device), to_mqp(qp));
666 static struct ib_cq *mthca_create_cq(struct ib_device *ibdev, int entries,
668 struct ib_ucontext *context,
669 struct ib_udata *udata)
671 struct mthca_create_cq ucmd;
676 if (entries < 1 || entries > to_mdev(ibdev)->limits.max_cqes)
677 return ERR_PTR(-EINVAL);
680 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd))
681 return ERR_PTR(-EFAULT);
683 err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
684 to_mucontext(context)->db_tab,
685 ucmd.set_db_index, ucmd.set_db_page);
689 err = mthca_map_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
690 to_mucontext(context)->db_tab,
691 ucmd.arm_db_index, ucmd.arm_db_page);
696 cq = kmalloc(sizeof *cq, GFP_KERNEL);
703 cq->buf.mr.ibmr.lkey = ucmd.lkey;
704 cq->set_ci_db_index = ucmd.set_db_index;
705 cq->arm_db_index = ucmd.arm_db_index;
708 for (nent = 1; nent <= entries; nent <<= 1)
711 err = mthca_init_cq(to_mdev(ibdev), nent,
712 context ? to_mucontext(context) : NULL,
713 context ? ucmd.pdn : to_mdev(ibdev)->driver_pd.pd_num,
718 if (context && ib_copy_to_udata(udata, &cq->cqn, sizeof (__u32))) {
719 mthca_free_cq(to_mdev(ibdev), cq);
723 cq->resize_buf = NULL;
732 mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
733 to_mucontext(context)->db_tab, ucmd.arm_db_index);
737 mthca_unmap_user_db(to_mdev(ibdev), &to_mucontext(context)->uar,
738 to_mucontext(context)->db_tab, ucmd.set_db_index);
743 static int mthca_alloc_resize_buf(struct mthca_dev *dev, struct mthca_cq *cq,
748 spin_lock_irq(&cq->lock);
749 if (cq->resize_buf) {
754 cq->resize_buf = kmalloc(sizeof *cq->resize_buf, GFP_ATOMIC);
755 if (!cq->resize_buf) {
760 cq->resize_buf->state = CQ_RESIZE_ALLOC;
765 spin_unlock_irq(&cq->lock);
770 ret = mthca_alloc_cq_buf(dev, &cq->resize_buf->buf, entries);
772 spin_lock_irq(&cq->lock);
773 kfree(cq->resize_buf);
774 cq->resize_buf = NULL;
775 spin_unlock_irq(&cq->lock);
779 cq->resize_buf->cqe = entries - 1;
781 spin_lock_irq(&cq->lock);
782 cq->resize_buf->state = CQ_RESIZE_READY;
783 spin_unlock_irq(&cq->lock);
788 static int mthca_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata)
790 struct mthca_dev *dev = to_mdev(ibcq->device);
791 struct mthca_cq *cq = to_mcq(ibcq);
792 struct mthca_resize_cq ucmd;
797 if (entries < 1 || entries > dev->limits.max_cqes)
800 mutex_lock(&cq->mutex);
802 entries = roundup_pow_of_two(entries + 1);
803 if (entries == ibcq->cqe + 1) {
809 ret = mthca_alloc_resize_buf(dev, cq, entries);
812 lkey = cq->resize_buf->buf.mr.ibmr.lkey;
814 if (ib_copy_from_udata(&ucmd, udata, sizeof ucmd)) {
821 ret = mthca_RESIZE_CQ(dev, cq->cqn, lkey, ilog2(entries), &status);
826 if (cq->resize_buf) {
827 mthca_free_cq_buf(dev, &cq->resize_buf->buf,
828 cq->resize_buf->cqe);
829 kfree(cq->resize_buf);
830 spin_lock_irq(&cq->lock);
831 cq->resize_buf = NULL;
832 spin_unlock_irq(&cq->lock);
838 struct mthca_cq_buf tbuf;
841 spin_lock_irq(&cq->lock);
842 if (cq->resize_buf->state == CQ_RESIZE_READY) {
843 mthca_cq_resize_copy_cqes(cq);
846 cq->buf = cq->resize_buf->buf;
847 cq->ibcq.cqe = cq->resize_buf->cqe;
849 tbuf = cq->resize_buf->buf;
850 tcqe = cq->resize_buf->cqe;
853 kfree(cq->resize_buf);
854 cq->resize_buf = NULL;
855 spin_unlock_irq(&cq->lock);
857 mthca_free_cq_buf(dev, &tbuf, tcqe);
859 ibcq->cqe = entries - 1;
862 mutex_unlock(&cq->mutex);
867 static int mthca_destroy_cq(struct ib_cq *cq)
870 mthca_unmap_user_db(to_mdev(cq->device),
871 &to_mucontext(cq->uobject->context)->uar,
872 to_mucontext(cq->uobject->context)->db_tab,
873 to_mcq(cq)->arm_db_index);
874 mthca_unmap_user_db(to_mdev(cq->device),
875 &to_mucontext(cq->uobject->context)->uar,
876 to_mucontext(cq->uobject->context)->db_tab,
877 to_mcq(cq)->set_ci_db_index);
879 mthca_free_cq(to_mdev(cq->device), to_mcq(cq));
885 static inline u32 convert_access(int acc)
887 return (acc & IB_ACCESS_REMOTE_ATOMIC ? MTHCA_MPT_FLAG_ATOMIC : 0) |
888 (acc & IB_ACCESS_REMOTE_WRITE ? MTHCA_MPT_FLAG_REMOTE_WRITE : 0) |
889 (acc & IB_ACCESS_REMOTE_READ ? MTHCA_MPT_FLAG_REMOTE_READ : 0) |
890 (acc & IB_ACCESS_LOCAL_WRITE ? MTHCA_MPT_FLAG_LOCAL_WRITE : 0) |
891 MTHCA_MPT_FLAG_LOCAL_READ;
894 static struct ib_mr *mthca_get_dma_mr(struct ib_pd *pd, int acc)
899 mr = kmalloc(sizeof *mr, GFP_KERNEL);
901 return ERR_PTR(-ENOMEM);
903 err = mthca_mr_alloc_notrans(to_mdev(pd->device),
905 convert_access(acc), mr);
917 static struct ib_mr *mthca_reg_phys_mr(struct ib_pd *pd,
918 struct ib_phys_buf *buffer_list,
932 /* First check that we have enough alignment */
933 if ((*iova_start & ~PAGE_MASK) != (buffer_list[0].addr & ~PAGE_MASK))
934 return ERR_PTR(-EINVAL);
938 for (i = 0; i < num_phys_buf; ++i) {
940 mask |= buffer_list[i].addr;
941 if (i != num_phys_buf - 1)
942 mask |= buffer_list[i].addr + buffer_list[i].size;
944 total_size += buffer_list[i].size;
947 if (mask & ~PAGE_MASK)
948 return ERR_PTR(-EINVAL);
950 /* Find largest page shift we can use to cover buffers */
951 for (shift = PAGE_SHIFT; shift < 31; ++shift)
952 if (num_phys_buf > 1) {
953 if ((1ULL << shift) & mask)
957 buffer_list[0].size +
958 (buffer_list[0].addr & ((1ULL << shift) - 1)))
962 buffer_list[0].size += buffer_list[0].addr & ((1ULL << shift) - 1);
963 buffer_list[0].addr &= ~0ull << shift;
965 mr = kmalloc(sizeof *mr, GFP_KERNEL);
967 return ERR_PTR(-ENOMEM);
970 for (i = 0; i < num_phys_buf; ++i)
971 npages += (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
976 page_list = kmalloc(npages * sizeof *page_list, GFP_KERNEL);
979 return ERR_PTR(-ENOMEM);
983 for (i = 0; i < num_phys_buf; ++i)
985 j < (buffer_list[i].size + (1ULL << shift) - 1) >> shift;
987 page_list[n++] = buffer_list[i].addr + ((u64) j << shift);
989 mthca_dbg(to_mdev(pd->device), "Registering memory at %llx (iova %llx) "
990 "in PD %x; shift %d, npages %d.\n",
991 (unsigned long long) buffer_list[0].addr,
992 (unsigned long long) *iova_start,
996 err = mthca_mr_alloc_phys(to_mdev(pd->device),
998 page_list, shift, npages,
999 *iova_start, total_size,
1000 convert_access(acc), mr);
1005 return ERR_PTR(err);
1014 static struct ib_mr *mthca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
1015 u64 virt, int acc, struct ib_udata *udata)
1017 struct mthca_dev *dev = to_mdev(pd->device);
1018 struct ib_umem_chunk *chunk;
1019 struct mthca_mr *mr;
1026 mr = kmalloc(sizeof *mr, GFP_KERNEL);
1028 return ERR_PTR(-ENOMEM);
1030 mr->umem = ib_umem_get(pd->uobject->context, start, length, acc);
1031 if (IS_ERR(mr->umem)) {
1032 err = PTR_ERR(mr->umem);
1036 shift = ffs(mr->umem->page_size) - 1;
1039 list_for_each_entry(chunk, &mr->umem->chunk_list, list)
1042 mr->mtt = mthca_alloc_mtt(dev, n);
1043 if (IS_ERR(mr->mtt)) {
1044 err = PTR_ERR(mr->mtt);
1048 pages = (u64 *) __get_free_page(GFP_KERNEL);
1056 write_mtt_size = min(mthca_write_mtt_size(dev), (int) (PAGE_SIZE / sizeof *pages));
1058 list_for_each_entry(chunk, &mr->umem->chunk_list, list)
1059 for (j = 0; j < chunk->nmap; ++j) {
1060 len = sg_dma_len(&chunk->page_list[j]) >> shift;
1061 for (k = 0; k < len; ++k) {
1062 pages[i++] = sg_dma_address(&chunk->page_list[j]) +
1063 mr->umem->page_size * k;
1065 * Be friendly to write_mtt and pass it chunks
1066 * of appropriate size.
1068 if (i == write_mtt_size) {
1069 err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
1079 err = mthca_write_mtt(dev, mr->mtt, n, pages, i);
1081 free_page((unsigned long) pages);
1085 err = mthca_mr_alloc(dev, to_mpd(pd)->pd_num, shift, virt, length,
1086 convert_access(acc), mr);
1094 mthca_free_mtt(dev, mr->mtt);
1097 ib_umem_release(mr->umem);
1101 return ERR_PTR(err);
1104 static int mthca_dereg_mr(struct ib_mr *mr)
1106 struct mthca_mr *mmr = to_mmr(mr);
1108 mthca_free_mr(to_mdev(mr->device), mmr);
1110 ib_umem_release(mmr->umem);
1116 static struct ib_fmr *mthca_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
1117 struct ib_fmr_attr *fmr_attr)
1119 struct mthca_fmr *fmr;
1122 fmr = kmalloc(sizeof *fmr, GFP_KERNEL);
1124 return ERR_PTR(-ENOMEM);
1126 memcpy(&fmr->attr, fmr_attr, sizeof *fmr_attr);
1127 err = mthca_fmr_alloc(to_mdev(pd->device), to_mpd(pd)->pd_num,
1128 convert_access(mr_access_flags), fmr);
1132 return ERR_PTR(err);
1138 static int mthca_dealloc_fmr(struct ib_fmr *fmr)
1140 struct mthca_fmr *mfmr = to_mfmr(fmr);
1143 err = mthca_free_fmr(to_mdev(fmr->device), mfmr);
1151 static int mthca_unmap_fmr(struct list_head *fmr_list)
1156 struct mthca_dev *mdev = NULL;
1158 list_for_each_entry(fmr, fmr_list, list) {
1159 if (mdev && to_mdev(fmr->device) != mdev)
1161 mdev = to_mdev(fmr->device);
1167 if (mthca_is_memfree(mdev)) {
1168 list_for_each_entry(fmr, fmr_list, list)
1169 mthca_arbel_fmr_unmap(mdev, to_mfmr(fmr));
1173 list_for_each_entry(fmr, fmr_list, list)
1174 mthca_tavor_fmr_unmap(mdev, to_mfmr(fmr));
1176 err = mthca_SYNC_TPT(mdev, &status);
1184 static ssize_t show_rev(struct class_device *cdev, char *buf)
1186 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
1187 return sprintf(buf, "%x\n", dev->rev_id);
1190 static ssize_t show_fw_ver(struct class_device *cdev, char *buf)
1192 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
1193 return sprintf(buf, "%d.%d.%d\n", (int) (dev->fw_ver >> 32),
1194 (int) (dev->fw_ver >> 16) & 0xffff,
1195 (int) dev->fw_ver & 0xffff);
1198 static ssize_t show_hca(struct class_device *cdev, char *buf)
1200 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
1201 switch (dev->pdev->device) {
1202 case PCI_DEVICE_ID_MELLANOX_TAVOR:
1203 return sprintf(buf, "MT23108\n");
1204 case PCI_DEVICE_ID_MELLANOX_ARBEL_COMPAT:
1205 return sprintf(buf, "MT25208 (MT23108 compat mode)\n");
1206 case PCI_DEVICE_ID_MELLANOX_ARBEL:
1207 return sprintf(buf, "MT25208\n");
1208 case PCI_DEVICE_ID_MELLANOX_SINAI:
1209 case PCI_DEVICE_ID_MELLANOX_SINAI_OLD:
1210 return sprintf(buf, "MT25204\n");
1212 return sprintf(buf, "unknown\n");
1216 static ssize_t show_board(struct class_device *cdev, char *buf)
1218 struct mthca_dev *dev = container_of(cdev, struct mthca_dev, ib_dev.class_dev);
1219 return sprintf(buf, "%.*s\n", MTHCA_BOARD_ID_LEN, dev->board_id);
1222 static CLASS_DEVICE_ATTR(hw_rev, S_IRUGO, show_rev, NULL);
1223 static CLASS_DEVICE_ATTR(fw_ver, S_IRUGO, show_fw_ver, NULL);
1224 static CLASS_DEVICE_ATTR(hca_type, S_IRUGO, show_hca, NULL);
1225 static CLASS_DEVICE_ATTR(board_id, S_IRUGO, show_board, NULL);
1227 static struct class_device_attribute *mthca_class_attributes[] = {
1228 &class_device_attr_hw_rev,
1229 &class_device_attr_fw_ver,
1230 &class_device_attr_hca_type,
1231 &class_device_attr_board_id
1234 static int mthca_init_node_data(struct mthca_dev *dev)
1236 struct ib_smp *in_mad = NULL;
1237 struct ib_smp *out_mad = NULL;
1241 in_mad = kzalloc(sizeof *in_mad, GFP_KERNEL);
1242 out_mad = kmalloc(sizeof *out_mad, GFP_KERNEL);
1243 if (!in_mad || !out_mad)
1246 init_query_mad(in_mad);
1247 in_mad->attr_id = IB_SMP_ATTR_NODE_DESC;
1249 err = mthca_MAD_IFC(dev, 1, 1,
1250 1, NULL, NULL, in_mad, out_mad,
1259 memcpy(dev->ib_dev.node_desc, out_mad->data, 64);
1261 in_mad->attr_id = IB_SMP_ATTR_NODE_INFO;
1263 err = mthca_MAD_IFC(dev, 1, 1,
1264 1, NULL, NULL, in_mad, out_mad,
1273 memcpy(&dev->ib_dev.node_guid, out_mad->data + 12, 8);
1281 int mthca_register_device(struct mthca_dev *dev)
1286 ret = mthca_init_node_data(dev);
1290 strlcpy(dev->ib_dev.name, "mthca%d", IB_DEVICE_NAME_MAX);
1291 dev->ib_dev.owner = THIS_MODULE;
1293 dev->ib_dev.uverbs_abi_ver = MTHCA_UVERBS_ABI_VERSION;
1294 dev->ib_dev.uverbs_cmd_mask =
1295 (1ull << IB_USER_VERBS_CMD_GET_CONTEXT) |
1296 (1ull << IB_USER_VERBS_CMD_QUERY_DEVICE) |
1297 (1ull << IB_USER_VERBS_CMD_QUERY_PORT) |
1298 (1ull << IB_USER_VERBS_CMD_ALLOC_PD) |
1299 (1ull << IB_USER_VERBS_CMD_DEALLOC_PD) |
1300 (1ull << IB_USER_VERBS_CMD_REG_MR) |
1301 (1ull << IB_USER_VERBS_CMD_DEREG_MR) |
1302 (1ull << IB_USER_VERBS_CMD_CREATE_COMP_CHANNEL) |
1303 (1ull << IB_USER_VERBS_CMD_CREATE_CQ) |
1304 (1ull << IB_USER_VERBS_CMD_RESIZE_CQ) |
1305 (1ull << IB_USER_VERBS_CMD_DESTROY_CQ) |
1306 (1ull << IB_USER_VERBS_CMD_CREATE_QP) |
1307 (1ull << IB_USER_VERBS_CMD_QUERY_QP) |
1308 (1ull << IB_USER_VERBS_CMD_MODIFY_QP) |
1309 (1ull << IB_USER_VERBS_CMD_DESTROY_QP) |
1310 (1ull << IB_USER_VERBS_CMD_ATTACH_MCAST) |
1311 (1ull << IB_USER_VERBS_CMD_DETACH_MCAST);
1312 dev->ib_dev.node_type = RDMA_NODE_IB_CA;
1313 dev->ib_dev.phys_port_cnt = dev->limits.num_ports;
1314 dev->ib_dev.num_comp_vectors = 1;
1315 dev->ib_dev.dma_device = &dev->pdev->dev;
1316 dev->ib_dev.query_device = mthca_query_device;
1317 dev->ib_dev.query_port = mthca_query_port;
1318 dev->ib_dev.modify_device = mthca_modify_device;
1319 dev->ib_dev.modify_port = mthca_modify_port;
1320 dev->ib_dev.query_pkey = mthca_query_pkey;
1321 dev->ib_dev.query_gid = mthca_query_gid;
1322 dev->ib_dev.alloc_ucontext = mthca_alloc_ucontext;
1323 dev->ib_dev.dealloc_ucontext = mthca_dealloc_ucontext;
1324 dev->ib_dev.mmap = mthca_mmap_uar;
1325 dev->ib_dev.alloc_pd = mthca_alloc_pd;
1326 dev->ib_dev.dealloc_pd = mthca_dealloc_pd;
1327 dev->ib_dev.create_ah = mthca_ah_create;
1328 dev->ib_dev.query_ah = mthca_ah_query;
1329 dev->ib_dev.destroy_ah = mthca_ah_destroy;
1331 if (dev->mthca_flags & MTHCA_FLAG_SRQ) {
1332 dev->ib_dev.create_srq = mthca_create_srq;
1333 dev->ib_dev.modify_srq = mthca_modify_srq;
1334 dev->ib_dev.query_srq = mthca_query_srq;
1335 dev->ib_dev.destroy_srq = mthca_destroy_srq;
1336 dev->ib_dev.uverbs_cmd_mask |=
1337 (1ull << IB_USER_VERBS_CMD_CREATE_SRQ) |
1338 (1ull << IB_USER_VERBS_CMD_MODIFY_SRQ) |
1339 (1ull << IB_USER_VERBS_CMD_QUERY_SRQ) |
1340 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ);
1342 if (mthca_is_memfree(dev))
1343 dev->ib_dev.post_srq_recv = mthca_arbel_post_srq_recv;
1345 dev->ib_dev.post_srq_recv = mthca_tavor_post_srq_recv;
1348 dev->ib_dev.create_qp = mthca_create_qp;
1349 dev->ib_dev.modify_qp = mthca_modify_qp;
1350 dev->ib_dev.query_qp = mthca_query_qp;
1351 dev->ib_dev.destroy_qp = mthca_destroy_qp;
1352 dev->ib_dev.create_cq = mthca_create_cq;
1353 dev->ib_dev.resize_cq = mthca_resize_cq;
1354 dev->ib_dev.destroy_cq = mthca_destroy_cq;
1355 dev->ib_dev.poll_cq = mthca_poll_cq;
1356 dev->ib_dev.get_dma_mr = mthca_get_dma_mr;
1357 dev->ib_dev.reg_phys_mr = mthca_reg_phys_mr;
1358 dev->ib_dev.reg_user_mr = mthca_reg_user_mr;
1359 dev->ib_dev.dereg_mr = mthca_dereg_mr;
1361 if (dev->mthca_flags & MTHCA_FLAG_FMR) {
1362 dev->ib_dev.alloc_fmr = mthca_alloc_fmr;
1363 dev->ib_dev.unmap_fmr = mthca_unmap_fmr;
1364 dev->ib_dev.dealloc_fmr = mthca_dealloc_fmr;
1365 if (mthca_is_memfree(dev))
1366 dev->ib_dev.map_phys_fmr = mthca_arbel_map_phys_fmr;
1368 dev->ib_dev.map_phys_fmr = mthca_tavor_map_phys_fmr;
1371 dev->ib_dev.attach_mcast = mthca_multicast_attach;
1372 dev->ib_dev.detach_mcast = mthca_multicast_detach;
1373 dev->ib_dev.process_mad = mthca_process_mad;
1375 if (mthca_is_memfree(dev)) {
1376 dev->ib_dev.req_notify_cq = mthca_arbel_arm_cq;
1377 dev->ib_dev.post_send = mthca_arbel_post_send;
1378 dev->ib_dev.post_recv = mthca_arbel_post_receive;
1380 dev->ib_dev.req_notify_cq = mthca_tavor_arm_cq;
1381 dev->ib_dev.post_send = mthca_tavor_post_send;
1382 dev->ib_dev.post_recv = mthca_tavor_post_receive;
1385 mutex_init(&dev->cap_mask_mutex);
1387 ret = ib_register_device(&dev->ib_dev);
1391 for (i = 0; i < ARRAY_SIZE(mthca_class_attributes); ++i) {
1392 ret = class_device_create_file(&dev->ib_dev.class_dev,
1393 mthca_class_attributes[i]);
1395 ib_unregister_device(&dev->ib_dev);
1400 mthca_start_catas_poll(dev);
1405 void mthca_unregister_device(struct mthca_dev *dev)
1407 mthca_stop_catas_poll(dev);
1408 ib_unregister_device(&dev->ib_dev);