2 * linux/drivers/serial/pxa.c
4 * Based on drivers/serial/8250.c by Russell King.
6 * Author: Nicolas Pitre
7 * Created: Feb 20, 2003
8 * Copyright: (C) 2003 Monta Vista Software, Inc.
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * Note 1: This driver is made separate from the already too overloaded
16 * 8250.c because it needs some kirks of its own and that'll make it
17 * easier to add DMA support.
19 * Note 2: I'm too sick of device allocation policies for serial ports.
20 * If someone else wants to request an "official" allocation of major/minor
21 * for this driver please be my guest. And don't forget that new hardware
22 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
23 * hope for a better port registration and dynamic device allocation scheme
24 * with the serial core maintainer satisfaction to appear soon.
28 #if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
32 #include <linux/module.h>
33 #include <linux/ioport.h>
34 #include <linux/init.h>
35 #include <linux/console.h>
36 #include <linux/sysrq.h>
37 #include <linux/serial_reg.h>
38 #include <linux/circ_buf.h>
39 #include <linux/delay.h>
40 #include <linux/interrupt.h>
41 #include <linux/platform_device.h>
42 #include <linux/tty.h>
43 #include <linux/tty_flip.h>
44 #include <linux/serial_core.h>
47 #include <asm/hardware.h>
49 #include <asm/arch/pxa-regs.h>
52 struct uart_pxa_port {
53 struct uart_port port;
57 unsigned int lsr_break_flag;
62 static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
65 return readl(up->port.membase + offset);
68 static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
71 writel(value, up->port.membase + offset);
74 static void serial_pxa_enable_ms(struct uart_port *port)
76 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
78 up->ier |= UART_IER_MSI;
79 serial_out(up, UART_IER, up->ier);
82 static void serial_pxa_stop_tx(struct uart_port *port)
84 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
86 if (up->ier & UART_IER_THRI) {
87 up->ier &= ~UART_IER_THRI;
88 serial_out(up, UART_IER, up->ier);
92 static void serial_pxa_stop_rx(struct uart_port *port)
94 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
96 up->ier &= ~UART_IER_RLSI;
97 up->port.read_status_mask &= ~UART_LSR_DR;
98 serial_out(up, UART_IER, up->ier);
101 static inline void receive_chars(struct uart_pxa_port *up, int *status)
103 struct tty_struct *tty = up->port.info->tty;
104 unsigned int ch, flag;
108 ch = serial_in(up, UART_RX);
110 up->port.icount.rx++;
112 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
113 UART_LSR_FE | UART_LSR_OE))) {
115 * For statistics only
117 if (*status & UART_LSR_BI) {
118 *status &= ~(UART_LSR_FE | UART_LSR_PE);
119 up->port.icount.brk++;
121 * We do the SysRQ and SAK checking
122 * here because otherwise the break
123 * may get masked by ignore_status_mask
124 * or read_status_mask.
126 if (uart_handle_break(&up->port))
128 } else if (*status & UART_LSR_PE)
129 up->port.icount.parity++;
130 else if (*status & UART_LSR_FE)
131 up->port.icount.frame++;
132 if (*status & UART_LSR_OE)
133 up->port.icount.overrun++;
136 * Mask off conditions which should be ignored.
138 *status &= up->port.read_status_mask;
140 #ifdef CONFIG_SERIAL_PXA_CONSOLE
141 if (up->port.line == up->port.cons->index) {
142 /* Recover the break flag from console xmit */
143 *status |= up->lsr_break_flag;
144 up->lsr_break_flag = 0;
147 if (*status & UART_LSR_BI) {
149 } else if (*status & UART_LSR_PE)
151 else if (*status & UART_LSR_FE)
155 if (uart_handle_sysrq_char(&up->port, ch))
158 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
161 *status = serial_in(up, UART_LSR);
162 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
163 tty_flip_buffer_push(tty);
166 static void transmit_chars(struct uart_pxa_port *up)
168 struct circ_buf *xmit = &up->port.info->xmit;
171 if (up->port.x_char) {
172 serial_out(up, UART_TX, up->port.x_char);
173 up->port.icount.tx++;
177 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
178 serial_pxa_stop_tx(&up->port);
182 count = up->port.fifosize / 2;
184 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
185 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
186 up->port.icount.tx++;
187 if (uart_circ_empty(xmit))
189 } while (--count > 0);
191 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
192 uart_write_wakeup(&up->port);
195 if (uart_circ_empty(xmit))
196 serial_pxa_stop_tx(&up->port);
199 static void serial_pxa_start_tx(struct uart_port *port)
201 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
203 if (!(up->ier & UART_IER_THRI)) {
204 up->ier |= UART_IER_THRI;
205 serial_out(up, UART_IER, up->ier);
209 static inline void check_modem_status(struct uart_pxa_port *up)
213 status = serial_in(up, UART_MSR);
215 if ((status & UART_MSR_ANY_DELTA) == 0)
218 if (status & UART_MSR_TERI)
219 up->port.icount.rng++;
220 if (status & UART_MSR_DDSR)
221 up->port.icount.dsr++;
222 if (status & UART_MSR_DDCD)
223 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
224 if (status & UART_MSR_DCTS)
225 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
227 wake_up_interruptible(&up->port.info->delta_msr_wait);
231 * This handles the interrupt from one port.
233 static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
235 struct uart_pxa_port *up = dev_id;
236 unsigned int iir, lsr;
238 iir = serial_in(up, UART_IIR);
239 if (iir & UART_IIR_NO_INT)
241 lsr = serial_in(up, UART_LSR);
242 if (lsr & UART_LSR_DR)
243 receive_chars(up, &lsr);
244 check_modem_status(up);
245 if (lsr & UART_LSR_THRE)
250 static unsigned int serial_pxa_tx_empty(struct uart_port *port)
252 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
256 spin_lock_irqsave(&up->port.lock, flags);
257 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
258 spin_unlock_irqrestore(&up->port.lock, flags);
263 static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
265 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
266 unsigned char status;
269 status = serial_in(up, UART_MSR);
272 if (status & UART_MSR_DCD)
274 if (status & UART_MSR_RI)
276 if (status & UART_MSR_DSR)
278 if (status & UART_MSR_CTS)
283 static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
285 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
286 unsigned char mcr = 0;
288 if (mctrl & TIOCM_RTS)
290 if (mctrl & TIOCM_DTR)
292 if (mctrl & TIOCM_OUT1)
293 mcr |= UART_MCR_OUT1;
294 if (mctrl & TIOCM_OUT2)
295 mcr |= UART_MCR_OUT2;
296 if (mctrl & TIOCM_LOOP)
297 mcr |= UART_MCR_LOOP;
301 serial_out(up, UART_MCR, mcr);
304 static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
306 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
309 spin_lock_irqsave(&up->port.lock, flags);
310 if (break_state == -1)
311 up->lcr |= UART_LCR_SBC;
313 up->lcr &= ~UART_LCR_SBC;
314 serial_out(up, UART_LCR, up->lcr);
315 spin_unlock_irqrestore(&up->port.lock, flags);
319 static void serial_pxa_dma_init(struct pxa_uart *up)
322 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_receive_dma, up);
326 pxa_request_dma(up->name, DMA_PRIO_LOW, pxa_transmit_dma, up);
329 up->dmadesc = kmalloc(4 * sizeof(pxa_dma_desc), GFP_KERNEL);
335 pxa_free_dma(up->txdma);
337 pxa_free_dma(up->rxdma);
343 static int serial_pxa_startup(struct uart_port *port)
345 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
349 if (port->line == 3) /* HWUART */
350 up->mcr |= UART_MCR_AFE;
357 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
362 * Clear the FIFO buffers and disable them.
363 * (they will be reenabled in set_termios())
365 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
366 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
367 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
368 serial_out(up, UART_FCR, 0);
371 * Clear the interrupt registers.
373 (void) serial_in(up, UART_LSR);
374 (void) serial_in(up, UART_RX);
375 (void) serial_in(up, UART_IIR);
376 (void) serial_in(up, UART_MSR);
379 * Now, initialize the UART
381 serial_out(up, UART_LCR, UART_LCR_WLEN8);
383 spin_lock_irqsave(&up->port.lock, flags);
384 up->port.mctrl |= TIOCM_OUT2;
385 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
386 spin_unlock_irqrestore(&up->port.lock, flags);
389 * Finally, enable interrupts. Note: Modem status interrupts
390 * are set via set_termios(), which will be occurring imminently
391 * anyway, so we don't enable them here.
393 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
394 serial_out(up, UART_IER, up->ier);
397 * And clear the interrupt registers again for luck.
399 (void) serial_in(up, UART_LSR);
400 (void) serial_in(up, UART_RX);
401 (void) serial_in(up, UART_IIR);
402 (void) serial_in(up, UART_MSR);
407 static void serial_pxa_shutdown(struct uart_port *port)
409 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
412 free_irq(up->port.irq, up);
415 * Disable interrupts from this port
418 serial_out(up, UART_IER, 0);
420 spin_lock_irqsave(&up->port.lock, flags);
421 up->port.mctrl &= ~TIOCM_OUT2;
422 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
423 spin_unlock_irqrestore(&up->port.lock, flags);
426 * Disable break condition and FIFOs
428 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
429 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
430 UART_FCR_CLEAR_RCVR |
431 UART_FCR_CLEAR_XMIT);
432 serial_out(up, UART_FCR, 0);
436 serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
437 struct ktermios *old)
439 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
440 unsigned char cval, fcr = 0;
442 unsigned int baud, quot;
444 switch (termios->c_cflag & CSIZE) {
446 cval = UART_LCR_WLEN5;
449 cval = UART_LCR_WLEN6;
452 cval = UART_LCR_WLEN7;
456 cval = UART_LCR_WLEN8;
460 if (termios->c_cflag & CSTOPB)
461 cval |= UART_LCR_STOP;
462 if (termios->c_cflag & PARENB)
463 cval |= UART_LCR_PARITY;
464 if (!(termios->c_cflag & PARODD))
465 cval |= UART_LCR_EPAR;
468 * Ask the core to calculate the divisor for us.
470 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
471 quot = uart_get_divisor(port, baud);
473 if ((up->port.uartclk / quot) < (2400 * 16))
474 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
475 else if ((up->port.uartclk / quot) < (230400 * 16))
476 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
478 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
481 * Ok, we're now changing the port state. Do it with
482 * interrupts disabled.
484 spin_lock_irqsave(&up->port.lock, flags);
487 * Ensure the port will be enabled.
488 * This is required especially for serial console.
493 * Update the per-port timeout.
495 uart_update_timeout(port, termios->c_cflag, baud);
497 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
498 if (termios->c_iflag & INPCK)
499 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
500 if (termios->c_iflag & (BRKINT | PARMRK))
501 up->port.read_status_mask |= UART_LSR_BI;
504 * Characters to ignore
506 up->port.ignore_status_mask = 0;
507 if (termios->c_iflag & IGNPAR)
508 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
509 if (termios->c_iflag & IGNBRK) {
510 up->port.ignore_status_mask |= UART_LSR_BI;
512 * If we're ignoring parity and break indicators,
513 * ignore overruns too (for real raw support).
515 if (termios->c_iflag & IGNPAR)
516 up->port.ignore_status_mask |= UART_LSR_OE;
520 * ignore all characters if CREAD is not set
522 if ((termios->c_cflag & CREAD) == 0)
523 up->port.ignore_status_mask |= UART_LSR_DR;
526 * CTS flow control flag and modem status interrupts
528 up->ier &= ~UART_IER_MSI;
529 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
530 up->ier |= UART_IER_MSI;
532 serial_out(up, UART_IER, up->ier);
534 serial_out(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
535 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
536 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
537 serial_out(up, UART_LCR, cval); /* reset DLAB */
538 up->lcr = cval; /* Save LCR */
539 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
540 serial_out(up, UART_FCR, fcr);
541 spin_unlock_irqrestore(&up->port.lock, flags);
545 serial_pxa_pm(struct uart_port *port, unsigned int state,
546 unsigned int oldstate)
548 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
549 pxa_set_cken(up->cken, !state);
554 static void serial_pxa_release_port(struct uart_port *port)
558 static int serial_pxa_request_port(struct uart_port *port)
563 static void serial_pxa_config_port(struct uart_port *port, int flags)
565 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
566 up->port.type = PORT_PXA;
570 serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
572 /* we don't want the core code to modify any port params */
577 serial_pxa_type(struct uart_port *port)
579 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
583 #ifdef CONFIG_SERIAL_PXA_CONSOLE
585 static struct uart_pxa_port serial_pxa_ports[];
586 static struct uart_driver serial_pxa_reg;
588 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
591 * Wait for transmitter & holding register to empty
593 static inline void wait_for_xmitr(struct uart_pxa_port *up)
595 unsigned int status, tmout = 10000;
597 /* Wait up to 10ms for the character(s) to be sent. */
599 status = serial_in(up, UART_LSR);
601 if (status & UART_LSR_BI)
602 up->lsr_break_flag = UART_LSR_BI;
607 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
609 /* Wait up to 1s for flow control if necessary */
610 if (up->port.flags & UPF_CONS_FLOW) {
613 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
618 static void serial_pxa_console_putchar(struct uart_port *port, int ch)
620 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
623 serial_out(up, UART_TX, ch);
627 * Print a string to the serial port trying not to disturb
628 * any possible real use of the port...
630 * The console_lock must be held when we get here.
633 serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
635 struct uart_pxa_port *up = &serial_pxa_ports[co->index];
639 * First save the IER then disable the interrupts
641 ier = serial_in(up, UART_IER);
642 serial_out(up, UART_IER, UART_IER_UUE);
644 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
647 * Finally, wait for transmitter to become empty
648 * and restore the IER
651 serial_out(up, UART_IER, ier);
655 serial_pxa_console_setup(struct console *co, char *options)
657 struct uart_pxa_port *up;
663 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
665 up = &serial_pxa_ports[co->index];
668 uart_parse_options(options, &baud, &parity, &bits, &flow);
670 return uart_set_options(&up->port, co, baud, parity, bits, flow);
673 static struct console serial_pxa_console = {
675 .write = serial_pxa_console_write,
676 .device = uart_console_device,
677 .setup = serial_pxa_console_setup,
678 .flags = CON_PRINTBUFFER,
680 .data = &serial_pxa_reg,
684 serial_pxa_console_init(void)
686 register_console(&serial_pxa_console);
690 console_initcall(serial_pxa_console_init);
692 #define PXA_CONSOLE &serial_pxa_console
694 #define PXA_CONSOLE NULL
697 struct uart_ops serial_pxa_pops = {
698 .tx_empty = serial_pxa_tx_empty,
699 .set_mctrl = serial_pxa_set_mctrl,
700 .get_mctrl = serial_pxa_get_mctrl,
701 .stop_tx = serial_pxa_stop_tx,
702 .start_tx = serial_pxa_start_tx,
703 .stop_rx = serial_pxa_stop_rx,
704 .enable_ms = serial_pxa_enable_ms,
705 .break_ctl = serial_pxa_break_ctl,
706 .startup = serial_pxa_startup,
707 .shutdown = serial_pxa_shutdown,
708 .set_termios = serial_pxa_set_termios,
710 .type = serial_pxa_type,
711 .release_port = serial_pxa_release_port,
712 .request_port = serial_pxa_request_port,
713 .config_port = serial_pxa_config_port,
714 .verify_port = serial_pxa_verify_port,
717 static struct uart_pxa_port serial_pxa_ports[] = {
724 .membase = (void *)&FFUART,
725 .mapbase = __PREG(FFUART),
727 .uartclk = 921600 * 16,
729 .ops = &serial_pxa_pops,
738 .membase = (void *)&BTUART,
739 .mapbase = __PREG(BTUART),
741 .uartclk = 921600 * 16,
743 .ops = &serial_pxa_pops,
752 .membase = (void *)&STUART,
753 .mapbase = __PREG(STUART),
755 .uartclk = 921600 * 16,
757 .ops = &serial_pxa_pops,
766 .membase = (void *)&HWUART,
767 .mapbase = __PREG(HWUART),
769 .uartclk = 921600 * 16,
771 .ops = &serial_pxa_pops,
777 static struct uart_driver serial_pxa_reg = {
778 .owner = THIS_MODULE,
779 .driver_name = "PXA serial",
783 .nr = ARRAY_SIZE(serial_pxa_ports),
787 static int serial_pxa_suspend(struct platform_device *dev, pm_message_t state)
789 struct uart_pxa_port *sport = platform_get_drvdata(dev);
792 uart_suspend_port(&serial_pxa_reg, &sport->port);
797 static int serial_pxa_resume(struct platform_device *dev)
799 struct uart_pxa_port *sport = platform_get_drvdata(dev);
802 uart_resume_port(&serial_pxa_reg, &sport->port);
807 static int serial_pxa_probe(struct platform_device *dev)
809 serial_pxa_ports[dev->id].port.dev = &dev->dev;
810 uart_add_one_port(&serial_pxa_reg, &serial_pxa_ports[dev->id].port);
811 platform_set_drvdata(dev, &serial_pxa_ports[dev->id]);
815 static int serial_pxa_remove(struct platform_device *dev)
817 struct uart_pxa_port *sport = platform_get_drvdata(dev);
819 platform_set_drvdata(dev, NULL);
822 uart_remove_one_port(&serial_pxa_reg, &sport->port);
827 static struct platform_driver serial_pxa_driver = {
828 .probe = serial_pxa_probe,
829 .remove = serial_pxa_remove,
831 .suspend = serial_pxa_suspend,
832 .resume = serial_pxa_resume,
834 .name = "pxa2xx-uart",
838 int __init serial_pxa_init(void)
842 ret = uart_register_driver(&serial_pxa_reg);
846 ret = platform_driver_register(&serial_pxa_driver);
848 uart_unregister_driver(&serial_pxa_reg);
853 void __exit serial_pxa_exit(void)
855 platform_driver_unregister(&serial_pxa_driver);
856 uart_unregister_driver(&serial_pxa_reg);
859 module_init(serial_pxa_init);
860 module_exit(serial_pxa_exit);
862 MODULE_LICENSE("GPL");