2 * Author: MontaVista Software, Inc.
5 * Based on the OMAP devices.c
7 * 2005 (c) MontaVista Software, Inc. This file is licensed under the
8 * terms of the GNU General Public License version 2. This program is
9 * licensed "as is" without any warranty of any kind, whether express
12 * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
13 * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version 2
18 * of the License, or (at your option) any later version.
19 * This program is distributed in the hope that it will be useful,
20 * but WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
22 * GNU General Public License for more details.
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
29 #include <linux/module.h>
30 #include <linux/kernel.h>
31 #include <linux/init.h>
32 #include <linux/platform_device.h>
33 #include <linux/gpio.h>
35 #include <mach/hardware.h>
38 * Resource definition for the MXC IrDA
40 static struct resource mxc_irda_resources[] = {
42 .start = UART3_BASE_ADDR,
43 .end = UART3_BASE_ADDR + SZ_4K - 1,
44 .flags = IORESOURCE_MEM,
47 .start = MXC_INT_UART3,
49 .flags = IORESOURCE_IRQ,
53 /* Platform Data for MXC IrDA */
54 struct platform_device mxc_irda_device = {
57 .num_resources = ARRAY_SIZE(mxc_irda_resources),
58 .resource = mxc_irda_resources,
62 * General Purpose Timer
63 * - i.MX1: 2 timer (slighly different register handling)
68 /* We use gpt0 as system timer, so do not add a device for this one */
70 static struct resource timer1_resources[] = {
72 .start = GPT2_BASE_ADDR,
73 .end = GPT2_BASE_ADDR + 0x17,
74 .flags = IORESOURCE_MEM
77 .start = MXC_INT_GPT2,
79 .flags = IORESOURCE_IRQ,
83 struct platform_device mxc_gpt1 = {
86 .num_resources = ARRAY_SIZE(timer1_resources),
87 .resource = timer1_resources
90 static struct resource timer2_resources[] = {
92 .start = GPT3_BASE_ADDR,
93 .end = GPT3_BASE_ADDR + 0x17,
94 .flags = IORESOURCE_MEM
97 .start = MXC_INT_GPT3,
99 .flags = IORESOURCE_IRQ,
103 struct platform_device mxc_gpt2 = {
106 .num_resources = ARRAY_SIZE(timer2_resources),
107 .resource = timer2_resources
110 #ifdef CONFIG_MACH_MX27
111 static struct resource timer3_resources[] = {
113 .start = GPT4_BASE_ADDR,
114 .end = GPT4_BASE_ADDR + 0x17,
115 .flags = IORESOURCE_MEM
118 .start = MXC_INT_GPT4,
120 .flags = IORESOURCE_IRQ,
124 struct platform_device mxc_gpt3 = {
127 .num_resources = ARRAY_SIZE(timer3_resources),
128 .resource = timer3_resources
131 static struct resource timer4_resources[] = {
133 .start = GPT5_BASE_ADDR,
134 .end = GPT5_BASE_ADDR + 0x17,
135 .flags = IORESOURCE_MEM
138 .start = MXC_INT_GPT5,
140 .flags = IORESOURCE_IRQ,
144 struct platform_device mxc_gpt4 = {
147 .num_resources = ARRAY_SIZE(timer4_resources),
148 .resource = timer4_resources
151 static struct resource timer5_resources[] = {
153 .start = GPT6_BASE_ADDR,
154 .end = GPT6_BASE_ADDR + 0x17,
155 .flags = IORESOURCE_MEM
158 .start = MXC_INT_GPT6,
160 .flags = IORESOURCE_IRQ,
164 struct platform_device mxc_gpt5 = {
167 .num_resources = ARRAY_SIZE(timer5_resources),
168 .resource = timer5_resources
178 static struct resource mxc_wdt_resources[] = {
180 .start = WDOG_BASE_ADDR,
181 .end = WDOG_BASE_ADDR + 0x30,
182 .flags = IORESOURCE_MEM,
186 struct platform_device mxc_wdt = {
189 .num_resources = ARRAY_SIZE(mxc_wdt_resources),
190 .resource = mxc_wdt_resources,
193 static struct resource mxc_w1_master_resources[] = {
195 .start = OWIRE_BASE_ADDR,
196 .end = OWIRE_BASE_ADDR + SZ_4K - 1,
197 .flags = IORESOURCE_MEM,
201 struct platform_device mxc_w1_master_device = {
204 .num_resources = ARRAY_SIZE(mxc_w1_master_resources),
205 .resource = mxc_w1_master_resources,
208 static struct resource mxc_nand_resources[] = {
210 .start = NFC_BASE_ADDR,
211 .end = NFC_BASE_ADDR + 0xfff,
212 .flags = IORESOURCE_MEM
214 .start = MXC_INT_NANDFC,
215 .end = MXC_INT_NANDFC,
216 .flags = IORESOURCE_IRQ
220 struct platform_device mxc_nand_device = {
223 .num_resources = ARRAY_SIZE(mxc_nand_resources),
224 .resource = mxc_nand_resources,
227 /* GPIO port description */
228 static struct mxc_gpio_port imx_gpio_ports[] = {
230 .chip.label = "gpio-0",
232 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 0),
233 .virtual_irq_start = MXC_GPIO_IRQ_START,
236 .chip.label = "gpio-1",
237 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 1),
238 .virtual_irq_start = MXC_GPIO_IRQ_START + 32,
241 .chip.label = "gpio-2",
242 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 2),
243 .virtual_irq_start = MXC_GPIO_IRQ_START + 64,
246 .chip.label = "gpio-3",
247 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 3),
248 .virtual_irq_start = MXC_GPIO_IRQ_START + 96,
251 .chip.label = "gpio-4",
252 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 4),
253 .virtual_irq_start = MXC_GPIO_IRQ_START + 128,
256 .chip.label = "gpio-5",
257 .base = (void*)(AIPI_BASE_ADDR_VIRT + 0x15000 + 0x100 * 5),
258 .virtual_irq_start = MXC_GPIO_IRQ_START + 160,
262 int __init mxc_register_gpios(void)
264 return mxc_gpio_init(imx_gpio_ports, ARRAY_SIZE(imx_gpio_ports));